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Service Manual

CHASSIS MT62L

Contents

1. Product Specification………………………..……………………...…….…….2 2. Test and Alignment………………….………………………………...………..3 3. Block Diagram………………………………….…….. .......................……..22 4. MB Schematic Diagram…………………………….......................……….23 5. PSU Schematic Diagram..........................................................................36 6. Exploded View

19HS3244................................................................................................38 26C35H....................................................................................................39 32C35H....................................................................................................41 40C35H....................................................................................................42

19HS3244 22HS3244 26C35H 32C35H 40C35F

PictureGoing Price Euro at Intro.Target Volume (K)Intro date/month/qtr. Mar. 2010 Mar. 2010 Mar. 2010 Mar. 2010 Mar. 2010Project Start date Key Distrubution Channel/s MM, BG, CH, TS MM, BG, CH, TS MM, BG, CH, TS MM, BG, CH, TS MM, BG, CH, TSType Classification Small Screen Small Screen Small Screen Small Screen Large ScreenSizes 19W 22W 26W 32W 40WChassis platfrom MT62L MT62L MT62L MT62L MT62LStyling F11 F11 F10 F10 F10Panel Type Classic Classic Classic Classic ClassicBLU CCFL CCFL CCFL CCFL CCFLResoulution HD HD HD HD FHD60Hz/120Hz 60Hz 60Hz 60Hz 60Hz 60HzContrast Ratio Supplier to specify Supplier to specify Supplier to specify Supplier to specify Supplier to specifyBrightness 400nits or Less 400nits or Less 400nits or Less 400nits or Less 400nits or LessView Angle Supplier to specify Supplier to specify Supplier to specify Supplier to specify Supplier to specifyAnti reflex coated glass Supplier to specify Supplier to specify Supplier to specify Supplier to specify Supplier to specifyDynamic Contrast Yes Yes Yes Yes YesLight sensor No No No Yes YesBacklight Control Yes Yes Yes Yes YesAnlogue/Digital Digital Digital Digital Digital DigitalMPEG2 Yes Yes Yes Yes YesMPEG4 Yes Yes Yes Yes YesDVB‐T/ T2/ C frontend DVB‐T DVB‐T DVB‐T DVB‐T DVB‐TMHEG 1.06 No No No No NoCI(PCMCIA) Yes Yes Yes Yes YesCI+ No No No No NoOAD No No No No NoDVBT CVBS output Yes Yes Yes Yes YesComb Filter 3D 3D 3D 3D 3DDe‐interlacing 3D 3D 3D 3D 3DSound Output 2 X 3W 2 X 3W 2 X 3W 2 X 5W 2 X 5WNo of Speakers 2 2 2 2 2Mono/Stereo/BBE Stereo Stereo Stereo Stereo StereoMEMC No No No No NoTeletext Teletext 1.5 Teletext 1.5 Teletext 1.5 Teletext 1.5 Teletext 1.5No of pages(Teletext) 100‐1000p 100‐1000p 100‐1000p 100‐1000p 100‐1000pClose Caption No No No No NoHD Video Playback No No No No NoMP3 Playback No No No No NoPhoto viewer Yes Yes Yes Yes Yes

OSD Languages

German, Italy, Czech,Croatian, Danish,Hungarian, Dutch,Norwegian, Polish,Portuguese, Romanian,Slovak, Slovenian,Serbian, Finnish,Swedish, Turkish, Greek,Bulgarian,Russian,Latvian,Lithuanian,Estonian,

French, German,Italy, Czech,Croatian, Danish,Hungarian, Dutch,Norwegian, Polish,Portuguese,Romanian, Slovak,Slovenian, Serbian,Finnish, Swedish,Turkish, Greek,Bulgarian,




PIP/PAT/PAP/PIC/PAC PAT/PAP PAT/PAP PAT/PAP PAT/PAP PAT/PAPColor tone adjustment No No No No NoSwitch on Time 8 seconds 8 seconds 8 seconds 8 seconds 8 secondsTime shift No No No No No12V\24V DC input No No No No NoECO Yes Yes Yes Yes YesBuild in IB No No No No NoPC capability (up to maximum fo WXGA WXGA WXGA WXGA WXGARear CVBS in No No No No NoRear CVBS out No No No No NoRear YPbPr Yes Yes Yes Yes YesRear HDMI 1 1 1 1 1Audio Output No No No No NoSCART 1 Yes Yes Yes Yes YesSCART 2 No No No No NoPC Input No No No No NoSPDIF No No No No NoHeadphone jack No No No No NoEthernet (RJ‐45) No No No No NoJack audio in 3.5mm Yes Yes Yes Yes YesUSB connector No No No No NoSide CVBS in No No No No NoSide HDMI Yes Yes Yes Yes YesSide Headphone No No No No NoSide USB Yes Yes Yes Yes YesNo of keys 6 6 6 6 6Front/Side Side Side Side Side SideFront Cabinet HG spray paint HG spray paint HG spray paint HG spray paint HG spray paintBack Cabinet Spray paint Spray paint Spray paint Spray paint Spray paintDVD slot in No No No No NoRemote control RC199 RC199 RC199 RC199 RC199Table Top Stand Yes Yes Yes Yes YesHard Switch Yes Yes Yes Yes YesSwivel Stand No No No Yes YesVoltage Range 230V 230V 230V 230V 230VStandby Power

Factory Alignment Specification of normal SIACP

Page 1 of 19

TCL WW R&D FPD CENTER


For MT5362 serial Version：V0.1

For the following Chassis：

MT62L:A mini edition of MT62B

MT62S: MT62B + MS6M20(MEMC module) for super slim LCD

MT62F:A full function edition of MT62B

PREPARED BY : Wei Lin DATE : 2010-02-07

APPROVED BY : DATE :


Page 2 of 19

Disclosure The information contained in this document is proprietary to TCL SZ FPD lab and shall not be disclosed by the recipient to third persons without the written permission of the team leader or GM of R&D.

Revision History

Status, Ver Date, Drafter Description of changes

V0.10 2010-02-07 This is the first version of normal SIACP ·HDMI as the main absolute input ·The password of factory menu is 9735


Page 3 of 19

These chassises are designed for European LCD TV with MPEG4. The main chip is from Mediatec (MT5362 series) and supports below inputs and outputs:

class item MT62L MT62S MT62F

ATV ( PAL B/G D/K I, SECAM B/G D/K L/L)

√ √ √

DTV (DVB-T,DVB-C,DVB-S)

DVB-T DVB-T DVB-C

DVB-T DVB-C DVB-S

HDMI (480i/p, 576i/p, 720p up to 1080i/p, compliant v1.2. with HDCP)

2 5 3

VGA √ √ VGA/DVI audio √ Share with

CMP √

CMP (YPrPb can support from 480i up to 1080p,audio)

√ √ √

SCART1 (CVBS & RGB,audio)

√ √ √

SCART2 (CVBS & YC,audio)

Side AV or back AV (CVBS,audio)

Back AV

USB player (picture,video,audio)

Picture Picture, Video, audio

Picture, Video, audio

SCART1 output (CVBS,audio)

√ √ √

SCART2 output (CVBS,audio)

Headphone output √ SPDIF output Coaxial Optical Coaxial

input &

output

MEMC √ CI+ √ √ function Serial connector P5 P16 P3

Others I2C connector of MEMC module PM3

Serial connector of MT5362 definition: Pin1:VCC Pin2:RXD Pin3:TXD Pin4:GND I2C connector of MEMC definition: Pin1:VCC Pin2:GND Pin3:SCL Pin4:SDA


Page 4 of 19

INFO:

All tests and measurements mentioned hereafter have to be carried out at a normal mains voltage (220 ~ 240 VAC)

All voltages have to be measured with respect to ground, unless otherwise stated All final tests have to be done on a complete set including LCD panel in a room with temperature of

25+/-7°C The White Balance (color temperature) has to be performed into subdued lighted room after at

least 1 hour of warm-up/burn-in. This is applicable for both Alignment and Picture Performance evaluation at OQA in order to be set free of any temperature drift ( colorimetry vs time) 1. Electrical Assembly Alignment

1.1. Preconditions – DC/DC Check Before power on, please check the board according to the relevant block diagram and circuit

diagram, and make sure that no serious error should destroy the board. For example,the output of DC/DC and LDO should not shorted to ground.

Supply a suited voltage and power on , then check the voltage according to the relevant block diagram , circuit diagram and voltage spec . the error should less than 5% .For example, the voltage for main chip(DV33, AV33,DV18,DV11,etc.), the voltage for DDR (DDRV) , the voltage for amplifier(AUDIO_PWR),etc. Only the standby voltage is necessary if there is no software in the flash .

1.2. SW download Download the latest release MT62_SW into the flash using MTK SW tool. See Appendix

“How to download FLASH SW”. Or upgrade the SW from USB port if there is a initial SW in the falsh and the set can work normally See Appendix ” How to upgrade FLASH SW from USB”.

Download the latest release MEMC_SW (skip this step if no MEMC module on the chassis). See Appendix “How to download FLASH SW for MEMC module”.

1.3. Panel ID check and modify There is different ID stored in the NVM depended on different Panels. Modify it with Hyper

terminal if the initial ID or a wrong ID make the set can not display clearly. See Appendix . It can be checked and modified in Factory menu->Feature->Panel ID if the set can display clearly . The set should be restart if the panel ID is changed .

1.4. Functional Test

Once the boards (chassis, KB, IR, PSU…) and the panel are well interconnected, connect all external generator devices to relevant inputs/outputs below according to their respective test patterns format and check picture content and sound quality accordingly:

Source Test signal (generator) Test pattern (format/image) Analog /Digital Tuner RF cable Full Band (VHF/UHF) + CATV

DVB-T Composite(CVBS) Chroma/Fluke PAL Half Color & Gray bars SCART1 (CVBS) SCART1 (RGB)

Chroma/Fluke PAL Half Color & Gray bars Half Color & Gray bars

SCART2 (CVBS) SCART2 (Y/C)

Chroma/Fluke PAL Half Color & Gray bars

VGA Chroma/QuantumData 1024x768@60Hz


Page 5 of 19

Half Color & Gray bars CMP (YPrPb) Chroma/QuantumData 1080i@60Hz

Half Color & Gray bars HDMI DVD with HDMI compliancy Movie 720p@60Hz

Headphone RF cable First channel Loud Speakers RF cable First channel

SCART1 (CVBS out) RF cable First channel SCART2 (CVBS out) Chroma/Fluke PAL Half Color & Gray bars

Audio tones can be defined by the factory (ie: 1KHz & 3KHz, sweep, …). Picture video formats can be changed by the factory according to their own standard.

1.5. ADC Calibration To ensure the ADC performance, the error of “generator+cable” must be less than 2%. The

following inputs require an ADC calibration for the time being. VGA(skip this step if no VGA input on the chassis)

Provide a test signal 1024×768@60Hz with WhiteBlack squares. Select the corresponding FactoryMenu-> ADC Calibration-> Auto Color , then press ”OK”

key on RemoteControl to start. Value of status will change to “OK” if succeed. CMP

Provide a test signal 720p@60Hz with 100% 8 steps ColorBar. Select the corresponding FactoryMenu-> ADC Calibration-> Auto Color , then press ”OK” key on RemoteControl to start. Value of status will change to “OK” if succeed.

Scart RGB Provide a test signal PAL 576i with 100% 8 steps ColorBar. Select the corresponding FactoryMenu-> ADC Calibration-> Auto Color , then press ”OK”

key on RemoteControl to start. Value of status will change to “OK” if succeed. The mean of status value: “NONE”= no input is successful in ADC calibration. “OK”= current input is successful in ADC calibration. “NOK”= current input is fail in ADC calibration. “ALL”= all inputs required are successful in ADC calibration. R Gain, G Gain, B Gain, R Offset, G Offset, B Offset in FactoryMenu-> ADC Calibration

page can be fine-tuned if necessary but not required. 1.6. DDC & EDID Test

The E-EDID data structure are according to VESA Enhanced EDID 1.3 (and EIA/CEA-861B for

HDMI). Both VGA and HDMI have their own separate bin files: For EDID check, it’s needed to check whether the correct EDID is downloaded by checking

corresponding EDID NVM Checksum or read them out to check bit by bit if it is in line with the released EDID bin file.

1.7. HDCP Test For HDCP compliancy, it’s needed to check whether the HDCP key has been well set.


Page 6 of 19

1.8. CI+ Key activation and test(This step is only for the models with CI+ function ) Select factory menu-> Update CI+ Credential-> Update CI+ Credential , then press ”OK” key on RemoteControl to active the CI+ KEY. The Valid(CI+ state) state turn to “Yes” and Cus Code(Custom Code), Serial Num display if succeed. Download the CI+ Key and try to active it again if fail.

2. Final Assembly Alignment

2.1. FactoryMenu Follow the below steps to pop-up the Factory Menu in case of “FactoryKey” is disable: - press RemoteControl key “MENU” to display main menu - Select “Picture” and press “OK” key to enter the picture submenu - Select “Contrast” item - press the subsequence RemoteControl keys “9”, “7”, “3” and “5” Press RemoteControl key “Blue” To pop-up the Factory Menu in case of “FactoryKey” is

enable. The status of “FactoryKey” can be changed in FactoryMenu->System-> FactoryKey Press RemoteControl “OK” key or “RIGHT” key to enter the submenu. Press RemoteControl “Menu” key to go back to the root menu. Press RemoteControl “RIGHT”or “LEFT” key to change the values. Press RemoteControl “OK” key run the function. Press RemoteControl “Exit” key exit the factorymenu.

2.2. Entering to “P” Mode Turned on the factory key to enter into “P” mode.The TV will display “P” in bottom left corner in “P” mode.

2.3. White Balance Alignment Make sure that the picture mode is “vivid”, enter to “P” mode(turned on the factory key) and switch off “Pic. Enhance” in Factory Menu-> WD Alignment before white balance alignment .

VGA,CMP,SCART RGB,DTV,CVBS_PAL Color Coordinates are relative to HDMI. CVBS_SECAM and CVBS_NTSC Color Coordinates are relative to CVBS_PAL. Warm and Cool Color Coordinates are relatives to Normal mode. Only HDMI(YUV 720p@60Hz) input requires color temperature adjustment. All the Relative

Matrix Offsets should be set while doing alignment.

Expected Targets and Tolerances The measured parameters should be “x, y” coordinates. The White Balance alignment should be performed using a contact less analyzer (ei: Minolta CA-210). The analyzer may not touch the screen surface, and measurement must be performed in a


Page 7 of 19

dark environment keeping the probe(s) at 90+/-2° from the panel. The result should measure up the relevant spec.

The alignment have to fulfill the requirements in Application Form.

Alignment FlowChart Provide a test signal on the input and align the WB as described inside attached document ensuring first that the BackLight value is matching below table:

MTK_EuroAlignmentF

lowchart.doc

2.4. High Pot. and Insulating Resistance Tests

At the end of the process, a High Pot. and an Insulating Resistance tests are required for matching Safety Electrical requirements (ei: xxxx)

High Voltage Withstanding requirements

- “Voltage” 4240 VDC - “Max Leakage Current” 1 mA - “Test Time” 3 sec

Insulating Resistance requirements

- “Voltage” DC500V - “Threshold Max” - “Threshold Min” 4MΩ - “Test Time” 3 sec

3. Factory default settings

Do the “Reset shop” before packing.The detail of reset shop follow OOB setting. “Factory Menu” Definition 1)． System

MTK-Euroalignment flow chart

// The purpose is to take into account the maximum panel abilities depending on spread batches

GetMaximumLuminance()

{

MaxLUMA = 0;

// Set RGB Gain and Scaling Contrast to maximum range

SetPreconditions(MAX)

{

RED Gain = 255;

GREEN Gain = 255;

BLUE Gain = 255;

RED DC Offset = 128;

GREEN DC Offset = 128;

BLUE DC Offset = 128;

Scaling Brightness =128;

Scaling Contrast = 255;

}

// PeakWhiteOMATarget definition

MaxLUMA = GetLuminanceMeasure(PROBE1) * 0,82;

}

// The purpose of this pattern is to have all the required things in a while

-2%

0%

2%

4%

6%

8%

10%

12%

time

video level (%)

WBAlignment()

{

// Switch to once it has been well calibrated

SelectInput(MODE);

// Select 4/3 format

SelectFomat(MODE);

// Select ColorTemp mode to Normal

SelectColorTemp(NORMAL);

// Select PicturePreset mode to Standard (OMA)

SelectPicturePreset(STANDARD);

// Retrieve the maximum available luminance

PeakWhiteOMATarget = GetMaximumLuminance ();

// Set RGB Gain & DC Offset, Scaling Brightness & Contrast to nominal

// BLUE Gain & DC Offset would be fixed to their respective nominal range 128

SetPreconditions(NOMINAL)

{

RED Gain = 128;

GREEN Gain = 128;

BLUE Gain = 128;

RED DC Offset = 128;

GREEN DC Offset = 128;

BLUE DC Offset = 128;

Scaling Brightness =128;

Scaling Contrast = 128;

}

// Loop until… due to interaction between luma and colorimetry (Gain/Offset)

Do

{

// Adjust Scaling Brightness to reach BlackLevel spec. 1% +2/-1%

// Black Pattern (0IRE) visible on 4/3 left and/or right curtains

bScalingBrightness = AlignScalingBrightness();

// Adjust Scaling Contrast to reach PeakWhiteOMATarget +/-10%

// White Flat Field Pattern (100IRE)

bScalingContrast = AlignScalingContrast();

// Adjust RED & GREEN Gain to reach ‘x’ & ‘y’ High Ligth requirements

// White Flat Field Pattern (100IRE)

bGain = AlignGain();

// Adjust RED & GREEN Offset to reach ‘x’ & ‘y’ Low Ligth requirements

// Gray Flat Field Pattern (25IRE)

bDCOffset = AlignDCOffset();

}

While ((bScalingBrightness & bScalingContrast & bGain & bDCOffset) != OK)

}

_1238570482.

weilin文件附件MTK_EuroAlignmentFlowchart.doc


Page 8 of 19

Item Sub-item Value Note Factory Key Off/On OFF：hotkey is invalid

ON ：hotkey(blue key) is availability

Power Mode Boot/Standby/Last Status

Boot: Enter power on mode

Standby: Enter standby mode

Last Status: power on according to last

status

Burning Mode Off/On Select panel On with left/right key, Press “EXIT” key to enter the burning mode;

Press “Menu” key on keyboard to exit the

burning mode

Pre-Frequency Poland Run Press “OK” key to run Pre-Frequency Huizhou Run Press “OK” key to run Pre-Frequency Thailand Run Press “OK” key to run Reset User Clear date of NVM in user menu,except

the value of language / related

installation/Factory setting,then set to the

default value.

Reset All clear NVM values，and set to default value。

System

Reset Shop Clear date of NVM in user menu,include the value related installation,and Clear

date of factory menu except the item of

Balance and sound ,set to default value

2)．Feature

Item Sub-item Value/Sub-item Note FleshTone Off/On

Adaptive Luma Control Off/On

Light sensor Off/On Some models have have no this feature.

Auto/Low/Mid/High (it should be “On/Off “ in 26 inch and smaller ones)

Set the backlight mode

Backlight Low Set the backlight value of Low mode

Backlight Mid Set the backlight value of Mid mode

Backlight High Set the backlight value of High (or Off) mode

ADP low control point Set the low point in dynamic backlight control curve

ADP mid control point Set the mid point in dynamic backlight control curve

Feature

Adaptive Backlight

ADP high control point Set the high point in dynamic


Page 9 of 19

backlight control curve

White Peak Limitator Off/On

TunerAGC -44~127 Project ID ID Select panel ID with left/right

key, restart the set to take

effect.

In MT62F and MT62S chassises: There is no “Adaptive Backlight” item, “Auto/Low/Mid/High” “Backlight” “ADP low control point” “ADP mid control point” “ADP high control point” are in the “feature” page. There is only “Backlight” item instead of “Backlight Low” “Backlight Mid” “Backlight High”. It set the backlight value of current backlight mode.

3)． ADC Calibration

Item Sub-item Value Note Source HDMI,etc VGA\CMP\scart RGB require Calibration Auto color Run Press “OK” key to run Status NONE

/ NOK / OK / ALL

NONE:No source has been calibrated

NOK:Current source hasn’t been calibrated

OK: Current source has been calibrated

ALL:All sources have been calibrated

R Gain G Gain B Gain R Offset G Offset

ADC Calibration

B Offset

For fine tune ADC manually.

4)． WD Alignment

Item Sub-item Value Note Pic. Enhance ON/OFF Press “Right” key to switch off all of the

items in the feature submenu. This should

be done before white balance alignment.

If it’s off, the way to switch it on is to reset

user/shop or set on the features in

Feature sub-item manually.

Source HDMI,etc For balance source： HDMI,VGA,DTV,PAL,SECAM,NTSC,Scar

t RGB,CPM, HDMI

Color Temperature Normal /Warm/Cool

The value of Warm and cool is the offset

of Normal mode.

R Gain R White balance G Gain G White balance B Gain B White balance

WD Alignment

R Offset R Gray balance


Page 10 of 19

G Offset G Gray balance B Offset B Gray balance Scaling Brightness Scaling Contrast Scaling Saturation Auto phase Run Press “OK” key to adjust the signal to

avoid the ripple in CMP source, it is not

necessary.

5)．Sound

Item Sub-item Value Note VOL_0 0

VOL_10 5

VOL_50 20

VOL_90 145

Sound

VOL_100 255

6)． Version info

Item Sub-item Value Note Project: *** Panel: *** MT62 Ver: *** Date: ***

Version info

MCU Ver: *** 7) ． Factory Clone& User Clone (MT62S,MT62F have no this function now) Select “Factory Clone” in the factory menu to ernter the factory clone menu

Item Sub-item Value Note TV TO USB(Factory) DO Press “Right” key to copy the

data(WB,ADC,picture setting,etc) to USB

Fac Clone

USB TO TV(Factory) DO Press “Right” key to set the data(WB,ADC,picture setting,etc) from

USB Enter another password “6” “4” “0” “5” in “menu” -> “picture” -> “contrast” status to ernter the user

clone menu Value Note TV TO USB(user) DO Press “Right” key to copy the data(channel map,picture setting,etc)

to USB USB TO TV(user) DO Press “Right” key to set the data(channel map,picture setting,etc)

from USB 8) ． Update CI+ Credential (only for the chassises with CI+ function)


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Item Sub-item Value Note Update CI+ Credential DO Press “OK” key to active the CI+ KEY

Update from USB DO Press “OK” key to download the CI+ KEY from USB

Erase CI+ Credential DO Press “OK” key to erase the CI+ KEY

Valid Show the CI+ state

Cus Code Show the CI+ custom code

Update CI+ Credential

Serial Num Show the CI+ serial number


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Appendix “How to download MCU SW” Prepare WT_MCU_ISP SW tool for update.

1. Connect the PC to the serial connector on board using a special serial device(USB or COMx).

2. Provide the a correct voltage to the board. 3. Start “Weltrend MCU ISP.exe” and download the MCU SW. (please see file

Visio-ISPToolGuide_ver090.pdf)

Appendix “How to download FLASH SW”

Prepare MTK SW tool for update.

1. Connect the PC to the serial connector on board using a special serial device (USB or COMx).

2. Provide the a correct voltage to the board 3. Start “MTKTOOL.exe” application under MTKxx folder, and set the parameters as below

picture(notice:select MT836X chassiss):

4. Press “Browse” button to select the corresponding SW bin file to upload 5. Press “Upgrade” button to start downloading the SW and wait the gauge displayed “100%”

that means the SW has been successfully downloaded. In the meanwhile, all operations such erasing flash and so… are parsed into the debug window script.

6. Once the SW is downloaded, switch-off/on the chassis board and wait few seconds for eeprom update.

See Appendix ” How to upgrade FLASH SW from USB”

1. Save the new software file(*.pkg) in the root directory of USB, and modify it’s name as upgrade.pkg.

2. Plug in the USB. 3. Power on the set. 4. Press any key on keyboard and keep more than 2 second, about 5 second later , the LED on


Page 13 of 19

IR board will flash after upgrade begin. The LED off if upgrade succeed.The LED stop flashing and keep on if upgrade fail,check the set and try again. If the set display normally, follow the indication instead of Step4.

Appendix “Modify panel ID with Hyper terminal”

①. Connect the PC to the board using a special serial device (USB or COMx). ②. Provide a correct voltage to the board ③. Save the password file “password for hyperTerminal.txt” to your computer.

D:\MT62\调试说明\已发布\password f

④. Start HyperTerminal “HyperTrm.exe” in your computer. ⑤. Fill the name.

⑥. Select the Com Port you are using.

⑦. Set the items as below picture.

€€��€€0000.0e0t0

weilin文件附件password for hyperTerminal.txt


Page 14 of 19

.

Select “File->Save->” to Save the setting. Then start HyperTerminal “atsc.ht” in your computer instead of step ③ to ⑦ later ⑧. Send the password.

⑨. Select the password file saved in your computer.


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⑩. Under the folder “DTV>” enter “pmx.s.p +ID”,e.g.: pmx.s.p 102

See the panel ID in another document .

⑪. Press “Enter”, the panel signal will be printed in the window


Page 16 of 19

Appendix “How to download FLASH SW for MEMC module”

Prepare MSTAR SW tool for update: Install the driver:CDM_Setup.exe Save the MS_TV folder to your PC,

1. Connect the PC to the I2C connector on board using a special I2C device (USB or COMx). 2. Provide a correct voltage to the board. 3. Start “ISP_Tool.exe” application under MS_TV folder:

4. Press “config” button On the Menu to enter the corresponding page, change the ISP slave

address to “0x94” and confirm that if the Port Type is correct, correct it if not.


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5. Press “Read” button on the Menu to enter the corresponding page and Press “Read” button

on this page to load the software(*.bin) on your PC

6. Press “Auto” button on the Menu to enter the corresponding page


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7. Press “Conect” button on the Menu. A message will popup

to tell you the result. Press “OK” button to close the message. If fail to connect with “Can’t find the Device Type!! ” Message ,Check the hardware and parameters setting of the ISP_Tool , Press “Dis Con” button , then “Conect” button again, until it identify the flash memory IC.

8. Press “Run” button in the current page to download the software.”Pass” will display on the

right bottom corner if succeed.


Page 19 of 19

I2C Dimming

BL On/Off

AGC IF+/IF-

SERIA

L TS

SERIA

L TS

TV C

VB

S OU

T

CEC

HDMI1

HDM2

EDID

EDID

YPbPr SCART1 SPDIF

PANEL

LVDS

TUNER：07-361AI5-TE1G

U10 MT8295B

U700

Digital AMP

STA*** BW

FLASH

64Mbit

TV_CVBS

CI CARD

PARALLEL TS

PARALLEL TS

R

L

SCL SDA

Key&IR Pad KEY

IR

U24 EEPROM M24C16MN

POWER SUPPLY MT62L

Block Diagram_V1.0

YPbPr

CVBS

RGB

CVBS IN

Y/C IN

MONITOR OUT

CVBS IN

RGB IN

FS

FB

Y

Pb

Pr

RGB

VSYNC

HSYNC

CVBS

IN

SPDIF

OUT HDMI_Rx I2C

IIS_A OUT

AL1 L/R OUT

AL2 L/R OUT

IIS_B OUT

Audio IN

DACOUT1

(DTV_CVBS)

LVDS

OUT

U201

MT5362ANG ADC CVBS DECODER 3D COMB FILTER SCALER MPEG4 DECODER LVDS TRANSIMITER HDMI RECEIVER AUDIO DECODER

CRYSTAL

MEMOFRY

IF

DDR IF

USB

USB

IF U18

AUDIO SW

RX TX

U13 DDR2 512M

U12 DDR2 512M

DTV-T DEMO

DVI Audio IN

U3 RC4558

Y/C IN

I2C

comm

unication

Audio OUT

For S

ervic

e Onl

y

TCL C

onfid

entia

l

For S

ervic

e Onl

y

TCL C

onfid

entia

lT

GN

D/A

DJ

OU

T

VIN

4

BS

IN

SW COMP

FB

SS

GND

EN

T

BS

IN

SW COMP

FB

SS

GND

EN

T

INOUT

GND

T

GND

GN

D/A

DJ

OU

T

VIN

4

GN

D/A

DJ

OU

T

VIN

4

D1B

D1A

G2

G1

S2

D2B

D2A

S1

GN

D/A

DJ

OU

T

VIN

4

VOUTVIN

ADJ/GND

BOOT

DRIVE

FB GND

LGATE

PHASE

VCC

UGATE

GN

D/A

DJ

OU

T

VIN

4

...

.............

DD-MM

DD-MM

DD-MM

DD-MM

...

...

...

...

...

...

...

...

...

5-5-2008_15:52...........

... ... ...

...

...

...

DD-MM-YY

......

Tel +86-755-3331xxxx Fax +86-755-3331xxxxNanshan District, Shenzhen, GuangdongB Building, TCL Tower, Nanhai Road

TCL Thomson Electronics Ltd.

OF :

PAGE:ON:BY:BY:

ON:

CHECKEDDATE

Last saved :DESCRIPTION Last modifNAME

A

3 2 1

F

E

D

C

B

8 7 6 5

5

4 3 2 1

TH

IS D

RA

WIN

G C

AN

NO

T B

E C

OM

MU

NIC

AT

ED

TO

UN

AU

TH

OR

IZE

D P

ER

SON

S C

OPI

ED

UN

LE

S S

PER

MIT

TE

D I

N W

RIT

ING

F

E

D

C

B

A

4678

FORMAT DIN A2

Index-LabDESIGNATION

SBU :

TCLNO:

DRAWN

VOUTVIN

ADJ/GND

T

T

T

T

T

T

T

T

T T

T

T

DIMMING

BL ON/OFF

Back Light circuit

HI = > POWER_OFF

LO = > POWER_ON

about 1mm

ON/OFF_PWR

Z18

Z17

Z1624V_MAYBE

Z14

Z13

Z1

C46

3

0.1U

C23

7

0.1U

0.1U

C45

6

R58347K/NC

C76

470U6V3

C62

470U6V3

C83100U

16V

C2310.1U

3K9R467

C46

20.01U

12V

1

10

1112

1314

1516

2

34

56

78

9

P19

5VOUT

AUDIO_PWR

PANEL_DIM

ON/OFF_PWR

+5VOUT

PAN_ON/OFF

PAN_ON/OFF

23

1

U31AZ1084

DV33

DV33L34200R

+3V3SB

TUNER_5V

TUNER_5V

AV33

VBR_EXT

R89

8K2

+5V

D12LL414816V

1000UC

75

5VSB

4U7

C52

C244

0.1U

200RL33

L32200R

AV_5V

C2501U

C49

722

0P

123

4

U7

LD1117S

L29200R

C23

00.

1U

B

C

E

Q47BT3904

R44

810

K

1

2

3 6

5

8

4

7

U16

RT8110

23

1

U33NC/AIC1084

123

4LD1117S33

U9

AV

33A

V33

R5

2R7

7

8

4

2

3

5

6

1

Q38

D13N03LT

C243

0.01U

R456

10R

C44

010

00P

2R7R1

C74

1000U16V

123

4

U8

NC/LD1117S33

C2350.1U

NC/600RL82

12V

C46147U

6V3

0.1U

C23

8

C81

100U6V3

L115UH

200RL30

C534U

7

AV125AV125

C80

100U6V3

+5V

R6

330R

C72

100U

6V3

C71

100U6V

3

C70

100U

6V3

R45

91K

2

0.1UC

245

C23

90.

1U

R445

220R

AV25

123

4

U6LD1117S25

C236

0.1U

C234

0.1U

R2

120R

C23

20.

1U

D11LL4148

Z50

L809120R 32

1

U811RT9166-33

C872

100U

6V3

C809

100U

6V3C824

1U C82

50.

1U C82

60.

1U

L95NC/120R

R100R

0RR9

C44

20.

1U

0.1U

C43

8

L114200R

AUDIO_PWR

12V_IN

NC

/0R

R11

R46

010

K

R170NC/0R

R43

110

K

R4464K7

+3V3SB

6K8R453

B

C

E

Q28BT3904

D21

LL4148

C240

1U

B

C

E

Q29BT3904

600R

L112

L113600R

R47

14K

7

R47010K

R466NC/1K

+5V

+5V

L38200R

L915UH

Z66

L15210UH

DV11

1

2

3 6

5

8

4

7

U21

MP1482

L15030R

R48

54K

7R

484

20K

3300PC

252

0.01UC251

R480

2K2

C24

80.

1U

R557100K

C4510.1U

12V

C4500.1U

4U7

C61

C44

922

0P

Z67L151

10UHDDRV

L11830R

R55

510

K

L815UH

3300PC

246

0.01UC219

R482

2K2

C24

10.

1U

R483100K

1

2

3 6

5

8

4

7

U20

MP1482

C4460.1U

C82100U

16V

12V

C4480.1U

4U7

C60

L37200R

C44

722

0P

10KR

556

DV33A

+5V

OU

T

5VSB

24V

_MA

YB

E

PA

N_O

N/O

FF

PA

NE

L_D

IM

AU

DIO

_PW

R

GPIO_7

PAN_ON/OFF

PANEL_DIM

GPIO_9

+3V3SB

D10LL4148

D9LL4148

D8

LL4148

D7LL4148

D5LL4148

D2LL4148

R88

2K2

R874K7

R86

4K7

R854K7

B

E

C

Q6BT3906

R84

2K2

R83

1K8

AV33

DV33

CI_VCC

8V

AV25

PWR_PROTECT

123

4

U1LD1117S50

C3

47U

16V

12V

C11

100U

16V

C150.1U

C14

0.1UC10100U16V

R3

0R/NC

5R1R33 R32

5R1 8V

PANEL_DIM

Z15

24V_MAYBE

+5VOUT

For S

ervic

e Onl

y

TCL C

onfid

entia

lSDA

SCL

WC

VCC

VSS

E2/NC

E1/NC

E0/NC

...

.............

DD-MM

DD-MM

DD-MM

DD-MM

...

...

...

...

...

...

...

...

...

5-5-2008_15:52...........

... ... ...

...

...

...

DD-MM-YY

......



OF :

PAGE:ON:BY:BY:

ON:

CHECKEDDATE


A

3 2 1

F

E

D

C

B

8 7 6 5

5

4 3 2 1

TH

IS D

RA

WIN

G C

AN

NO

T B

E C

OM

MU

NIC

AT

ED

TO

UN

AU

TH

OR

IZE

D P

ER

SON

S C

OPI

ED

UN

LE

S S

PER

MIT

TE

D I

N W

RIT

ING

F

E

D

C

B

A

4678

FORMAT DIN A2


SBU :

TCLNO:

DRAWN

VCC

D-

D+

GND

T

TT

TT

TT

TT

TT

T

TT

TT

T

JRTCKOPWM2JTDIJTCKOPWM1OPWM0JTMSJTDOJTRST_VCXOOSDA0GPIO6GPIO4OSCL1OSCL0GPIO5GPIO2OSDA1GPIO3GPIO1GPIO19GPIO17GPIO18GPIO14GPIO15GPIO7GPIO16GPIO13GPIO12GPIO0OSDA2OSCL2GPIO11OIROGPIO10GPIO9GPIO8U0TXU0RXOPCTRL5OPCTRL4OPCTRL3OPCTRL2OPCTRL1OPCTRL0ORESET_OPWRSBOIRIAVDD12_LDOAVDD12_DMPLLAVDD12_ADCPLLAVDD12_TVDPLLAVDD12_DTDPLLAVDD12_SYSPLLAVDD12_APLLADIN5_SRVADIN4_SRVADIN2_SRVADIN3_SRVADIN1_SRVADIN0_SRVAVDD12_USBAVDD33_USBAVDD33_USB1USB_DM0USB_DP0USB_DM1USB_DP1USB_VRTXTALIAVSS33_XTALAVDD33_XTALXTALOAVSS33_USBAVSS33_USB1AVSS12_USBAVSS12_PLLAVSS12_PLL1AVSS12_PLL2

TT

T T

TT

T

T

T T

T

T

2.9V(12V)

2.1V(9V)2.7V

By Ada.Du

NEAR IC NEAR IC

MUST NEAR IC

54MHz CRYSTAL SYSTEM EEPROM

For 3.3V Tarp

JTAG Port

IIC ADDRESS "A0"

LO = > Wp

HI = > Write

MUST NEAR IC

System Reset#

USB_DP0

USB_DM0

R9010K

R92

10K

10P

C46

R14710K B

C

E

Q1BT3904

B

E

C

Q9BT3906

R10

01K

8

R97

0RMCU-RESET

ORESET#

R11

04K

7

21

R35

V27

0RA

21

R34V27

0RA

21

R13

21

R12

X1054M

SERVICE_TX

+3V3SB

Z21Z11

USB_DP0

SERVICE_RX

OPWRSB

OPCTRL0

ADIN2

GPIO_7GPIO_16

+5V

L10930R

C452

NC/10P

ORESET#

E2P

RO

M_V

CC

E2P

RO

M_W

/C

E2P

RO

M_O

SD

A0

E2P

RO

M_O

SC

L0

OSDA0

R2800R

R2220R

C536

1000P

R13

11K

DV33

USB_VRTZ54

AF6AE6

AC1AE1AC2AD2AE2AF2AB3AC3AD3AE3AF3AB4AC4AD4AE4AA5AB5AD5AA6A12B14A15B15B16C16D16E16E17E18E20D21E21C22D22C23D23E23AB8AC8AD8AB9AC9

AB10AC10AD10AB11AC11AD11

V13R23N24P24R24N25N26W23W24Y24Y25

AA25AA26

V10AC6AD6AE5AF5AE6AF6AF4V26W25V24V25AC7AD7V11P22N23P23

U201

MT5362

OIRO

JRTCK

VCXO

PBS_TX

PBS_RX

PEND_MUTE

JTAG_DBGACK

JTAG_DBGRQ

JTDO

DV33_PU

JTCK

JTMS

JTDI

JTRST#JTRST#

TVTREF#1

DV33

DV33

USB_DM0

AV125AV33

L42

600R

+3V3SB

AV125

L45 600R

R143

33R

U0TX

U0RXL39

30R

L3530R

F4F3

1

2

3

4

P5

OPCTRL2

5VSB

GPIO_15

GPIO_18

PWR_PROTECT

R1164K7

R146 180K

B

C

E

Q5

BT3904

C153

NC/10P

3

2

4

1

P7

GPIO_14

OPCTRL4OPCTRL5

U0RX

GPIO_19

OPCTRL1

IRSTB

LED

PBS_RX

PBS_TX

VCXO

ADIN3

R291100R

BOLRCK

R123

10K

R525 180K

C467

10P

C465

10P

C464

10P

C466

10PR12510K

R12010K

C454

10P

C260

47P

C259

47P

PWRDET

KEY

BOSDATA0

C271U

OIRO

GPIO_13

C420.01U

CB780.1U

0.1UCB73

CB850.1U

C9223300P

R11733R

R112NC/0R

GPIO_8

OSDA2OSCL2

GPIO_0

OPCTRL3

ADIN5

GPIO_12

PEND_MUTE

BOMCLK

BOBCK

4U7C25

R1371R

USB_DP0USB_DM0

R12

14K

7

OPCTRL2

GPIO_6

5

6

7

8

4

3

2

1U24

M24C16MN

OSCL0

0.1U

C15

6

U0TX

OSDA0

OXTALI

C87

100U6V3

C22

1000P

R10433R

DV33

R132

4K7

OXTALI

DV33

C_XREG

54

721 3

68

R50

110

K

JTAG_DBGRQ

JTAG_DBGACK

JTDO

R122

10K

TVTREF#1

R1111K

CB70

0.1U

R11

94K

7

L44 600R

L43

600R

CB87

C0402/SMD0.1U

C31

4U7

R1094K7

R136 5K1

REMARK=1%

C20

10PC21

10P

C532

1000P

L36

0.82UH

R31820K

JRTCK

OXTALO

AVDD12_PLL

AVDD33_XTAL

JTDIJTCKOPWM1OPWM0JTMSJTDOJTRST#

GPIO_1

GPIO_10GPIO_9

C_XREGAVDD12_PLLAVDD12_PLLAVDD12_PLLAVDD12_PLLAVDD12_PLLAVDD12_PLL

AVDD12_USBAVDD33_USBAVDD33_USB

AVDD33_XTALOXTALO

OSCL0

JTDI

JTMS

JTCK

AVDD33_USB

R1024K7

R1011K/NC

B

E

C

Q10BT3906

R96

47K

C110U

R95

100K

R94 33

K

C17

0.1U

12V

R384K7

R374K7

C19

10PC18

10P

AVDD12_USB

R934K7

+3V3SB

OPCTRL1

For S

ervic

e Onl

y

TCL C

onfid

entia

lVCC3IOVCC3IO1

DVSSDVSS1DVSS2DVSS3DVSS4DVSS5DVSS6DVSS7DVSS8DVSS9

DVSS10DVSS11DVSS12DVSS13DVSS14DVSS15DVSS16DVSS17DVSS18DVSS19DVSS20DVSS21DVSS22DVSS23DVSS24DVSS25DVSS26DVSS27DVSS28DVSS29DVSS30DVSS31DVSS32DVSS33DVSS34DVSS35DVSS36DVSS37DVSS38DVSS39DVSS40DVSS41DVSS42DVSS43DVSS44DVSS45DVSS46DVSS47DVSS48DVSS49DVSS50DVSS51DVSS52DVSS53DVSS54DVSS55DVSS56DVSS57DVSS58DVSS59DVSS60DVSS61DVSS62DVSS63DVSS64DVSS65DVSS66DVSS67

VCCKVCCK1VCCK2VCCK3VCCK4VCCK5VCCK6VCCK7VCCK8VCCK9VCCK10VCCK11VCCK12VCCK13VCCK14VCCK15VCCK16VCCK17VCCK18VCCK19VCCK20VCCK21VCCK22VCCK23VCCK24VCCK25VCCK26VCCK27VCCK28VCCK29POCE0_PACLEPAALEPOWE_PDD6PDD7POOE_PARB_PDD2PDD5PDD4PDD3PDD1POCE1_PDD0VCC3IO_1VCC3IO_1_1VCC3IO_1_2VCC3IO_1_3

...

.............

DD-MM

DD-MM

DD-MM

DD-MM

...

...

...

...

...

...

...

...

...

5-5-2008_15:52...........

... ... ...

...

...

...

DD-MM-YY

......



OF :

PAGE:ON:BY:BY:

ON:

CHECKEDDATE


A

3 2 1

F

E

D

C

B

8 7 6 5

5

4 3 2 1

TH

IS D

RA

WIN

G C

AN

NO

T B

E C

OM

MU

NIC

AT

ED

TO

UN

AU

TH

OR

IZE

D P

ER

SON

S C

OPI

ED

UN

LE

S S

PER

MIT

TE

D I

N W

RIT

ING

F

E

D

C

B

A

4678

FORMAT DIN A2


SBU :

TCLNO:

DRAWN

T

T

T

T T

DU2

VCC

DU1

S

DU3

DU4

W

DU5

VSS

DU6

DU8

DU7

Q

HOLD C

D

T

T

By Ada.Du

Bottom Side

Bottom SideCORE BYPASS

I / O BYPASS

XTAL 54MHzStrapping Mode

XTAL 27MHz

OPCTRL2(O)OPCTRL3(O)

00 01

Nor BootStrapping Mode

NAND Bootlarge NAND Boot

OPWM1(O)OPWM0(O)

0

0 00 11

AOLRCKAOBCKOPWM2Normal modeStrapping Mode

CPU model mode 00 1

0 0 0

0 10

Core Reset 3.3V

Core Reset 0.9V

Trap Mode

SCAN mode

Core Reset 1usOPCTRL4OPCTRL5

0

0

1 1

0 11

0

MT5362 STRAPPING MODE

ICE mode

OPCTRL4

POCE0#

Z22

DV

33S

4

2

3

7

5

6

9

11

10

12

14

13

8

1 16

15

U2

M25P64P

DD

1

PO

OE

#

PDD1

FRESET#

PD

D0

R156 0R

POCE1# POCE1#PDD1

C279

0.1U

C278

0.1U

C277

0.1U

C276

0.1U

C275

0.1U

C274

0.1U

C273

0.1U

C272

0.1U

C271

0.1U

C270

0.1U

C269

0.1U

C268

0.1U

C267

0.1UC266

0.1U

C265

0.1U

C264

0.1U

C263

0.1U

R164NC/4K7

R168NC/4K7

R166NC/4K7

R160NC/4K7

R1584K7

R1694K7

R1674K7

R1654K7

R1634K7

R1614K7

NC/4K7 R159

C91

1U

AOBCK

R1034K7

1UC90

DV33

DV33

DV33

DV33

DV11

DV33

DV33

DV33

DV11

C73

47U6V3

AC5AB6

B1C2K2U2V2D3L3V3D4L4U4E5K5T5G6T6Y6AA7L10P10T10M11N11T11L12M12N12P12R12T12U12L13M13N13P13R13T13L14M14N14P14R14T14U14K15M15N15P15R15T15L16M16N16P16R16T16U16F17K17M17P17T17L18N18R18U18F20E22

C6C7D7E7C8D8E8

K10R10U10L11P11R11U11V12U13V14L15U15K16V16L17N17R17U17V17K18M18P18T18A16B17C17D17A18B18C18D18A19B19C19D19E19C20D20F18F19F21F22

U201

MT5362

C282

3300P

C281

3300P

C280

0.01U

OPWM1

OPCTRL5

AOLRCK

OPWM0

OPCTRL3 POCE0#

PDD5PDD4PDD3

POWE#PDD6

PAALEPACLE

PDD2

POOE#

PDD0

PARB#

PDD7

R15

74K

7

DV33

DV33C202

0.1U

L110

600R

DV33S

DV33S

FRESET#

POOE#

PDD0

GND

For S

ervic

e Onl

y

TCL C

onfid

entia

l

GND

GND

RA2

RA12

RA6RA7

RA0

RA9

RA11

RA5

RA8

RA10

RA3RA4

RA1

RDQ6

RDQ3

RDQ1

RDQ7

RDQ2

RDQ4

RDQ0

RDQ5

RDQS0RDQS0_RDQM0

RDQ10RDQ11RDQ12

RDQ9

RDQ13RDQ14

RDQ8

RDQ15

RDQS1_RDQS1

RDQM1

RDQ17

RDQ19RDQ20

RDQ22

RDQ16

RDQ21

RDQ18

RDQ23

RDQS2RDQS2_RDQM2

RDQ31

RDQ24

RDQ29

RDQ27RDQ26RDQ25

RDQ28

RDQ30

RDQS3RDQS3_RDQM3

RCAS_RWE_

RCS_

RBA1RODT

RBA0

RRAS_

RCKE

REXTDNREXTUP

VCC2IOVCC2IO1VCC2IO2VCC2IO3VCC2IO4VCC2IO5VCC2IO6VCC2IO7VCC2IO8VCC2IO9

VCC2IO10VCC2IO11VCC2IO12VCC2IO13VCC2IO14VCC2IO15VCC2IO16VCC2IO17VCC2IO18VCC2IO19VCC2IO20VCC2IO21VCC2IO22

RCLK0_RCLK0

RCLK1_RCLK1

RVREF

AVDD12_MEMPLLAVSS12_MEMPLL

VS

SQ

10V

SS

Q9

VS

SQ

8V

SS

Q7

VS

SQ

5V

SS

Q4

VS

SQ

3V

SS

Q2

VS

SQ

1

VS

S5

VS

S4

VS

S3

VS

S2

VS

S1

VDDQ10VDDQ9VDDQ8VDDQ7VDDQ6VDDQ5VDDQ4VDDQ3VDDQ2

VDD1VDD2VDD3VDD4

CK

UDQS

LDQS

VSSDL

DQ15

DQ7

DQ14

DQ6

DQ13

DQ5

DQ12

DQ4

VDDL

DQ11

DQ3

DQ10

DQ2

DQ9

DQ1

DQ8

VREF

VDDQ1

LDQS

VDD5

UDQS

WE

BA1BA0

NC/A13A12A11

A1A0

CK

CAS

CKE

RAS

CS

A10A9A8A7A6A5A4A3

UDM

A2

LDM

ODT

VS

SQ

6DQ0

VS

SQ

10V

SS

Q9

VS

SQ

8V

SS

Q7

VS

SQ

5V

SS

Q4

VS

SQ

3V

SS

Q2

VS

SQ

1

VS

S5

VS

S4

VS

S3

VS

S2

VS

S1

VDDQ10VDDQ9VDDQ8VDDQ7VDDQ6VDDQ5VDDQ4VDDQ3VDDQ2

VDD1VDD2VDD3VDD4

CK

UDQS

LDQS

VSSDL

DQ15

DQ7

DQ14

DQ6

DQ13

DQ5

DQ12

DQ4

VDDL

DQ11

DQ3

DQ10

DQ2

DQ9

DQ1

DQ8

VREF

VDDQ1

LDQS

VDD5

UDQS

WE

BA1BA0

NC/A13A12A11

A1A0

CK

CAS

CKE

RAS

CS

A10A9A8A7A6A5A4A3

UDM

A2

LDM

ODT

VS

SQ

6DQ0

...

.............

DD-MM

DD-MM

DD-MM

DD-MM

...

...

...

...

...

...

...

...

...

5-5-2008_15:52...........

... ... ...

...

...

...

DD-MM-YY

......



OF :

PAGE:ON:BY:BY:

ON:

CHECKEDDATE


A

3 2 1

F

E

D

C

B

8 7 6 5

5

4 3 2 1

TH

IS D

RA

WIN

G C

AN

NO

T B

E C

OM

MU

NIC

AT

ED

TO

UN

AU

TH

OR

IZE

D P

ER

SON

S C

OPI

ED

UN

LE

S S

PER

MIT

TE

D I

N W

RIT

ING

F

E

D

C

B

A

4678

FORMAT DIN A2


SBU :

TCLNO:

DRAWN

Bottom Side DDR#2

By Rockie

Bottom Side DDR#1

DDR BYPASS BOTTOM SIDE

NEAR IC

DDR#1 DDR#2

NEAR IC NEAR DRAM

C78

220U6V3

C77

220U6V3

DDRV

MEM_VREF

AV12_MEMPLL

C321

0.1U

C319

0.1U C318

0.1U

C317

0.1U

C316

0.1UC314

0.1U

C313

0.1U

C312

0.1U

C310

0.1U

C311

3300P

C309

0.1U

C304

0.1UC303

0.1U

C301

0.1U

C302

3300P

C300

0.1U

C299

0.1U

C297

0.1U

C296

0.1U

C295

0.1UC294

0.1U

C291

0.1U

C289

0.1U

C288

0.1U

C287

0.1U

C293

3300P

C286

0.1U

C285

0.1UC284

0.1U

C98

0.1U

C94

0.1U

R2921K

RCLK1

RCLK0

CLK1#CLK0#

CLK0#

RCLK1

RCLK0

CLK1#

CLK0

CLK1

RCLK0#

R2931K

RCLK1#R536

22R

R53522R

R53722R

R53822R

R17422R

R17322R

R17822R

R17722R

R17622R

R17522R

C93

0.1U

C101

0.1U

C320

0.1U

54

721

3 6

8

R505

22R

54

721

3 6

8

R504

22R

MEM_VREF

DDRV

AV125

DDRV

DDRVDDRV

DDRV

DDRV

DDRV

33R R172

33RR171

MRRAS#

MRODT

CLK1

MRWE#

MRCAS#

MRCS#

MRCKE

MEM_VREF

RDQM2RDQM3

RDQS2#RDQS2

RDQS3#RDQS3

H8

H2

F8

F2

D8

D2

B8

B2

A7

P9

N1

J3 E3A

3

G9G7G3G1E9C9C7C3C1

A1E1J9

M9

K8

A8

E8

J7

B9

F9

B1

F1

D9

H9

D1

H1

J1

D3

H3

D7

H7

C2

G2

C8

J2

A9

F7

R1

B7

K3

L3L2

R8R2P7

M3M8

J8

L7

K2

K7

L8

M2P3P8P2N7N3N8N2

B3

M7

F3

K9

E7

G8

U13

HYB18TC512160BF

H8

H2

F8

F2

D8

D2

B8

B2

A7

P9

N1

J3 E3A

3

G9G7G3G1E9C9C7C3C1

A1E1J9

M9

K8

A8

E8

J7

B9

F9

B1

F1

D9

H9

D1

H1

J1

D3

H3

D7

H7

C2

G2

C8

J2

A9

F7

R1

B7

K3

L3L2

R8R2P7

M3M8

J8

L7

K2

K7

L8

M2P3P8P2N7N3N8N2

B3

M7

F3

K9

E7

G8

U12

HYB18TC512160BF

MRCKE

MEM_VREF

RDQM0RDQM1

RDQS0#RDQS0

RDQS1#RDQS1

L1

M1

L2M2

K3

M3

K4

M4

L5

M5

N5M6

N6

C1

A2

B2

B3

C3

A4

C4

D5

D2D1E4

F1F2E3

F3

G3F4

G4

G5

E2E1

F5

T1

T2R3

T3

U3

R4

T4

R5

U1V1V4

Y1

Y2

AA2

W3Y3W4

V5

W5

W1W2U5

J1P1

J2

P2J3

N3

J4

N4

A5B5

G2N2R2A3H3P3AA3B4H4P4Y4AA4C5H5J5P5Y5D6E6J6R6V6W6

H1H2AB1AB2

P6

M10N10

U201

MT5362

RA3MRA3

RBA1MRBA1

MRCKE RCKE

RWE#

RODT

54

721

3 6

8R503 22R

54

721

3 6

8R50222R

MRA6 RA6

R486100R

R487100R

L48 600R

C96

1U

C95

1UC292

3300P

RA7

RDQ5

MRWE#

RDQ0

RDQ4

MRODT

RDQ2

RDQ26

RDQ31

MRA4

RDQ18RDQ19

RA0

RDQ21

RDQ30

RDQ20

RBA0

RDQ28

RCAS#

RDQ27

RDQ1

RDQ24RDQ23

MRBA0

MRBA0

RDQ3

MRA5

RDQ25

AV12_MEMPLL

RDQ22

MRA11MRA10

MRA12

RDQ17

MRBA1

RDQ7

RCS#

RDQ13

MRCAS#

RA2MRA7

MRA7

RDQ6

MEM_VREF

RCLK0#

RDQ8

MRA6

RDQ10

RCLK1#

RDQ12

MRA8

RDQ11

MRA3MRCS#

MRA1

MRA2

MRA2

MRA9

RDQ9

RDQ15

RDQ16

RDQ29RDQ14

MRA0

MRA0

RA6

RA4

RA7

RWE#

RDQ5

RDQ0

RDQ4

RDQ2

RDQS1

RDQ26

RDQS2

RDQM2

RBA1

RDQM3

RDQ31

RDQS3

RA3

RDQ18RDQ19

RA0

RDQ21

RDQ30

RDQ20

RBA0

RDQ28

RCAS#

RDQ27

RDQ1

RRAS#

RDQ24

RDQ23

RDQ3

RDQ25

RDQS2#

RDQ22

RDQ17

RA11RDQS0

RDQ7

RCS#

RDQ13

RA2RDQ6

RA9

RDQ8

RDQ10

RA10

RDQ12

RA8

RDQM1

RCKE

RDQ11

RDQM0

RA1

RDQS0#

RDQ9

RDQ15

RDQ16

RA12

RODT

RDQ29

RDQ14

RA5

RDQS1#

RDQS3#

C99

1UC298

3300P

C315

3300P

MRODT

MRA2MRA3MRA4MRA5MRA6MRA7MRA8MRA9

MRA10

MRCS#

MRRAS#MRCAS#

CLK0

MRA0MRA1

MRA11MRA12

MRBA0MRBA1

MRWE#

600RL49

RA4

RRAS#

RA11RA8

MRA4MRA11

MRRAS#MRA8

RA1

RA12RA9

RA5MRA12

MRA1MRA9

MRA5

RA10MRA10

For S

ervic

e Onl

y

TCL C

onfid

entia

l SDASCLWPVCCGNDA2A1A0

ALINASPDIFAVDD12_HDMIHDMI_SDA2HDMI_SCL2PWR5V_2HDMI_CECHDMI_SDA1PWR5V_1HDMI_SCL1HDMI_SDA0HDMI_SCL0PWR5V_0AVSS33_HDMIAVSS33_HDMI1AVDD33_HDMIAVDD33_HDMI1RX0_CBRX0_CRX0_0BRX0_0RX0_1BRX0_1RX0_2BRX0_2RX1_CBRX1_CRX1_0BRX1_0RX1_1BRX1_1RX1_2BRX1_2RX2_CBRX2_CRX2_0BRX2_0RX2_1BRX2_1RX2_2BRX2_2

SDA

SCL

WP

VCC

GND

A2

A1

A0

NC21

GND1

RX2-

RX1+

GND2

RX1-

RX0+

GND3

RX0-

RXC+

GND4

RXC-

NC1

NC2

DDCCLK

DDCDA

GND5

VCC

RX2+

HPD

NC20

RX2+

GND1

RX2-

RX1+

GND2

RX1-

RX0+

GND3

RX0-

RXC+

GND4

RXC-

NC1

NC2

DDCCLK

DDCDA

GND5

VCC

HPD

...

.............

DD-MM

DD-MM

DD-MM

DD-MM

...

...

...

...

...

...

...

...

...

5-5-2008_15:52...........

... ... ...

...

...

...

DD-MM-YY

......



OF :

PAGE:ON:BY:BY:

ON:

CHECKEDDATE


A

3 2 1

F

E

D

C

B

8 7 6 5

5

4 3 2 1

TH

IS D

RA

WIN

G C

AN

NO

T B

E C

OM

MU

NIC

AT

ED

TO

UN

AU

TH

OR

IZE

D P

ER

SON

S C

OPI

ED

UN

LE

S S

PER

MIT

TE

D I

N W

RIT

ING

F

E

D

C

B

A

4678

FORMAT DIN A2


SBU :

TCLNO:

DRAWN

T

T

T

T

T

T

TT

T

T

T

NEAR IC

HDMI port 1

NEAR ICHDMI BYPASS CAP.

HDMI port 0(side)

R15

1

10K

/NC

R41

10K

/NC

R19

110

K

R197 100R

Z23

H1-E

DID

-WP

ALIN

HDMI_SCL0HDMI_SDA0

HDMI_SDA0

HDMI_SDA1

HDMI_SCL1

HDMI_SDA1

H2-E

DID

-WP

Z2

HD

MI5V

_1

HD

MI5V

_0

HDMICAB1

HDMI5V_1

21

R47

V27

0RA

HDMI5V_0

HDMICAB0

AVDD12_CVCC

AVDD33_H

CEC

C323

0.1U

C322

0.1U

C104

0.1U

C103

0.1U

SDDCCLK

SDDCDA

HDMI5V_0

HDMI5V_1

HDMI5V_1

HDMI5V_0

HDMI5V_0

OPCTRL4

RX0_CB

RX0_1B

RX0_2B

RX0_2

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

P15

21

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

1

19

20

P16

R19

2

1K

R19

3N

C/1

00K

R20

1N

C/1

00K

ALIN

R19

910

K

5

6

7

8

4

3

2

1U27

AT24C02

R20

0

1K

HDMI_SCL0

1 2R27

21R30

1 2R28

21R26

21R23

1 2R25

1 2R22

21R24

1 2R18

21R19

21R16

1 2R15

21R14

RX0_2

RX0_2B

RX0_1

RX0_1B

AV33

AV125

+3V3SB

21

R50

V27

0RA

R198 100R

R206 100R

R205 100R

21

R56

V27

0RA

D26E26V15

AB12AC12AD12AC13AC14AD14AC15AB16AC16AD16AB17AC17AD17AD18AE15AF15AE16AF16AE17AF17AE18AF18AE11AF11AE12AF12AE13AF13AE14AF14AE7AF7AE8AF8AE9AF9

AE10AF10

U201

MT5362

R1830R

C105

1U

RX1_0

LL4148

D6R186

27K

HDMI_SCL0

HDMI_SDA2

HDMI_SCL1

HDMI_SCL2

AVDD12_CVCC

RX0_0

RX0_2B

HDMI5V_1

RX0_0B

RX0_1

CEC

RX0_2

RX0_CB

HDMI5V_0

AVDD33_HAVDD33_H

HDMI5V_2

RX0_C

RX0_1B

HDMI_SDA0HDMI_SCL0

ASPDIF

HDMI_SDA1CEC_T

RX1_1

RX2_CBRX2_C

RX1_0RX1_0B

RX1_CBRX1_C

RX2_0B

RX1_2

RX2_1

RX1_1B

RX1_2B

RX2_0RX2_1B

RX2_2RX2_2B

21

R49

V27

0RA

R19

647

K

R19

547

K

R19

4 1K

B

C

EQ12BT3904

HDMI_SDA0

21

R55

V27

0RA

R20

447

K

R20

347

K

R20

2 1K

B

C

EQ15BT3904

21

R53

V27

0RA

5

6

7

8

4

3

2

1U28

AT24C02

RX1_CB

RX1_C

RX1_0B

RX1_1

RX1_2

RX1_2B

L50

600R

C106

1U

L51

600R

RX0_CB

RX0_C

RX0_0B

RX0_0

1 2R17

21R21

1 2R20

RX1_1B

RX0_C

RX0_0B

RX0_0

RX0_1

RX1_1

RX1_0

RX1_C

HDMI_SDA1

HDMI_SCL1

RX1_2

RX1_2B

RX1_1B

RX1_0B

RX1_CB

CEC

OPCTRL3

HDMI_SCL1

For S

ervic

e Onl

y

TCL C

onfid

entia

lGND

GNDGND

GND

GND

AVDD12_LVDSAVDD33_LVDSAAVDD33_LVDSBO0PO0NO1PO1NO2PO2NOCKPOCKNE0PE0NO3PO3NE1PE1NO4PO4NE2PE2NECKPECKNE3PE3NE4PE4NAVSS12_VPLLAVDD12_VPLLTP_VPLLAVSS_LVDSAVSS_LVDS1AVSS_LVDS2

GND

GND

GND

...

.............

DD-MM

DD-MM

DD-MM

DD-MM

...

...

...

...

...

...

...

...

...

5-5-2008_15:52...........

... ... ...

...

...

...

DD-MM-YY

......



OF :

PAGE:ON:BY:BY:

ON:

CHECKEDDATE


A

3 2 1

F

E

D

C

B

8 7 6 5

5

4 3 2 1

TH

IS D

RA

WIN

G C

AN

NO

T B

E C

OM

MU

NIC

AT

ED

TO

UN

AU

TH

OR

IZE

D P

ER

SON

S C

OPI

ED

UN

LE

S S

PER

MIT

TE

D I

N W

RIT

ING

F

E

D

C

B

A

4678

FORMAT DIN A2


SBU :

TCLNO:

DRAWN

GND

T

TT

GND

T

TT

TT

HI = > LVDS POWER ON

By Ada.Du

NEAR IC

NEAR IC

NEAR IC

LO = > LVDS POWER OFF

LVDS POWER CONTROL

LVDS OUT

R22

00R

R5486K8

LVDS_FORMAT

R20

80R

R21

90R

R21

31K

C3611U

+5V L120NC/200R

+5VOUT

L145200R

L55NC/500R

1 2

4

6

8

12

14

16

18

20

10

22

24

26

28

3

5

7

9

11

13

15

17

19

21

23

25

27

29 30

32

34

36

38

40

31

33

35

37

39

P11

LVDS_VDDOUTLVDSVDD

LVDSVDD

OD

_SE

L

VB

R_E

XT

DC

R

BIT

_SE

L

LVD

S_F

OR

MA

T

Z3

BIT_SEL

GPIO_1R39

10K

R4010K

G

DSQ16PMV65XP

NC

AVDD12_VPLL

AVDD12_LVDS

B

C

E

Q18BT3904

R5880R

R20

7NC

/0R

R586NC/0R

BIT_SEL

GP

IO_1

NC/0RR214

12V

L56200R

L132200R

L131200R

C537

0.1U

R58210K

R21622K

C360

0.1U

C455

10U

16V

C436

0.1U

C108

0.1U

C109

0.1U

C329

0.1U

C324

0.1U

LVDSVDD

VBR_EXTLVDS_FORMAT

AN55DCR

DCR

AN00

R217470K

D23LL4148

R21

8N

C/1

K

R20

9N

C/1

K

AV

33

AV33

AV125

AV125

AN99

AN88

AP99

AN44

AN33

AP44

NC/0RR215

C344 10P GPIO_18

AP66

2

1 4

3

L26EXC24C

ECKP

E4P

E4N

AP99

AN99

2

1 4

3

L18EXC24C

C353 10P

C352 10P

AP88

AN88

AP77

AN77

AP66

AN55

E3N

E2N

E1P

E1N

E0P

E0N

AP44

AN44

O4P

2

1 4

3

L19EXC24C

O3N

O2P

O2N

O1N

O0N

C23

4U7

L54

600R

L53

600R

L52

600R

C107

1U

K12E10E12A6B6A7B7A8B8A9B9C9D9

A10B10C10D10A11B11C11D11C12D12C13D13C14D14K13K14B12E9

E11K11

U201

MT5362

AVDD33_LVDSAVDD33_LVDS

AVDD12_VPLL

O3P

AVDD12_LVDS

O0N

O1N

O0P

O1P

E4N

E2N

OCKP

ECKP

E2P

O2N

OCKN

O3NE1P

O2P

ECKN

E1N

O4N

E3P

O4P

E3NE4P

E0PE0N

AVDD33_LVDS

CLK11-

AN22

AP00

AP11

AP22

CLK11+

AN11

AP33

AP55

AP77

CLK22+

AP88

AN66

AN77

CLK22-

C355 10P

C354 10P

2

1 4

3

L22EXC24C

2

1 4

3

L21EXC24C

2

1 4

3

L20EXC24C

2

1 4

3

L17EXC24C

2

1 4

3

L16EXC24C

2

1 4

3

L15EXC24C

2

1 4

3

L14EXC24C

2

1 4

3

L13EXC24C

C351 10P

C350 10P

C349 10P

C348 10P

C347 10P

C346 10P

C345 10P

C343 10P

C342 10P

C340 10P

C339 10P

C338 10P

C336 10P

C335 10P

C330 10P

E3P

OCKP

AP00

AN00

O0P

AP11

AN11

O1P

AP22

AN22

CLK11+

CLK11-OCKN

O3P AP33

AN33

AP55

E2P

ECKN

CLK22+

CLK22-

AN66

C357 10P

C356 10PO4N

2

1 4

3

L27EXC24C

C359 10P

C358 10P

GPIO_19

PANEL_DIM

For S

ervic

e Onl

y

TCL C

onfid

entia

lGND

GND

GND

GND

GND

WHITE

RED

YELLOW

RED

WHITE

GND

GND

GNDGND

GND

GND

GND

GN

D

GN

DG

ND

GND

GND

FSAVSS33_VDACAVSS33_VDAC_BGAVDD33_VDACAVDD33_VDAC_BGVDAC_OUT2VDAC_OUT1CVBS_BYPASS1CVBS_BYPASS0

AORAIR

AOL

AGND

BGND

AIL

B

SWITCH

GGND

CLKOUT

G

DATA

RGND

DATAGND

R

BLNK

VGND

BLNKGND

VOUT

VIN

SHIELD

GND

...

.............

DD-MM

DD-MM

DD-MM

DD-MM

...

...

...

...

...

...

...

...

...

5-5-2008_15:52...........

... ... ...

...

...

...

DD-MM-YY

......



OF :

PAGE:ON:BY:BY:

ON:

CHECKEDDATE


A

3 2 1

F

E

D

C

B

8 7 6 5

5

4 3 2 1

TH

IS D

RA

WIN

G C

AN

NO

T B

E C

OM

MU

NIC

AT

ED

TO

UN

AU

TH

OR

IZE

D P

ER

SON

S C

OPI

ED

UN

LE

S S

PER

MIT

TE

D I

N W

RIT

ING

F

E

D

C

B

A

4678

FORMAT DIN A2


SBU :

TCLNO:

DRAWN

T

T

T

T

T

T

T

T

T

TT

T

T

T

T

T

TT

T

T

T

GND

GND

Nearly Connector

Nearly 5362

By Ada.Du

VIDEO DAC

NEARLY ICNEARLY CONNECTOR

NEARLY IC NEARLY CONNECTOR

Function SelectNear IC

FAST BLANKING

TV SCART CVBS BYPASS MUX

Near Connector

R16

8082

KR

1681

27K

TV_CVBS_OUT

SCT1_AV_OUT

TV_CVBS_OUT

B

C

E

Q48BT3904

F31

12

R23

1

V27

0RA

C2410U

R1550R

C6070.1U

R16711K

R16

7533

0R

R167375R

F8

R21

175

R

ADIN3

Z9

Z8

Z7

C5

0.1U

21

R48

V270RA/NC

21

R153

V270R

A/N

C

21

R152

V270R

A/N

C

21

V270R

A/N

C

R46

21

R29V270RA/NC

21

D16

9

V27

0RA

/NC

21

D167

V270R

A/N

C

21

D166

V270R

A/N

C

21

D159

V270R

A/N

C

21

D156

V270R

A/N

C

21

D155

V270R

A/N

C

L231.8UH

F21

R26

856

0 1%

CVBS_BYPS0CVBS_BYPS1

SCT1_AV_OUT

SCT1_AV_OUT

SCT1_AV_IN

SCT1_AV_IN

SCT1_FB_IN

SCT1_R_IN

SCT1_G_IN

SCT1_FS_INSCT1_B_IN

SCT1_AUL_IN

SCT1_AUL_OUT

SCT1_AUR_IN

SCT1_AUR_OUT

SCT1_AUR_OUT

SCT1_AUR_IN

SCT1_AUL_IN

Y_IN

YPBPR_R_IN

YPBPR_L_IN

PR_IN

PB_IN

Y_IN

C11

6 1U

R163810K

CB46

0.1U

C6740.01U

C6700.01U

C6690.01U

C6670.01U

F20

R16

4175

R

C6030.047U

R175368R

R174968R

C66

8 15P

R16403K6

C67

1 15P

C60

2 47P

R16

8575

R

AVDD33_VDAC

R1686100R

21

10

20

9

19

8

18

7

17

6

16

5

15

4

14

3

13

2

12

1

11

P1

C30

6 47P

R1683100R

FB25

600RE13E14E15C15D15A13B13

AB23AC23

U201

MT5362

AV33

C30

7N

S/4

7P

R17

5475

RR

1757

75R

R16390R

R16880R

R15

7075

R

C67

3 15P

R175868R PR0P

SCT1_B_IN

SCT1_R_IN

DACOUT1DACOUT2AVDD33_VDACAVDD33_VDAC

CVBS2P

CVBS_BYPS0CVBS_BYPS1

FS SOY0

COM0

Y0P

PB0P

F11

F12

F13

F14

F19

SCT1_AUR_OUTSCT1_AUL_OUT

SCT1_FB_IN

F22

SCT1_FS_IN

SCT1_AV_IN

SCT1_B_IN

SCT1_G_IN

SCT1_R_IN

AIN1_L

C301U

C437

470P

C439

470P

R30415K

R30515K

L1030R

L1130R AIN1_R

SCT1_AUL_IN

SCT1_AUR_IN1U

C34

R2956K8

R2966K8

SCT1_FB_IN

SCT1_G_IN

R1266K8

R1246K8

L6730R

L6630R

R11815K

R11515K

1UC112

C138

470P

C137

470P

C1111U

1

2P9

1

2P2

1

4

2

5

3

6P3

F9

F7

R11418R

R11318R

R10818R

R10768R

C11

0 15P

C10

2 15P

C89 1

5P

R1060R

R1050R

R9156R

R7156R

C1364700P

C1350.01U

R70100R

C1340.01U

R6968R

R5456R

C1330.01U

R5168R

C1320.01U

YPBPR_R_IN

YPBPR_L_IN AIN4_L

AIN4_R

PB_IN1

Y_IN

PR_IN1PR_IN

PB_IN

COM1

SOY1

Y1P

PB1P

PR1P

PB_IN

PR_IN

YPBPR_R_IN

YPBPR_L_IN

DACOUT1

SCT1_FS_IN

SCT1_AUL_OUT

FS

Y_IN1

+5V

+5V

TV_CVBS_OUT

For S

ervic

e Onl

y

TCL C

onfid

entia

lGND

GND

T

S

R

GND

GND

GND

GND

GND

GND

GND

2IN+

2IN-

2OUT

VCC+

1IN+

1IN-

1OUT

VCC-

GND

GND

GND

GND

...

.............

DD-MM

DD-MM

DD-MM

DD-MM

...

...

...

...

...

...

...

...

...

5-5-2008_15:52...........

... ... ...

...

...

...

DD-MM-YY

......



OF :

PAGE:ON:BY:BY:

ON:

CHECKEDDATE


A

3 2 1

F

E

D

C

B

8 7 6 5

5

4 3 2 1

TH

IS D

RA

WIN

G C

AN

NO

T B

E C

OM

MU

NIC

AT

ED

TO

UN

AU

TH

OR

IZE

D P

ER

SON

S C

OPI

ED

UN

LE

S S

PER

MIT

TE

D I

N W

RIT

ING

F

E

D

C

B

A

4678

FORMAT DIN A2


SBU :

TCLNO:

DRAWN

GND

GND

GND

GND

GND

GND

GND

GND

GND

Y0B

Y2B

ZB

Y3B

Y1B

E

VEE

VSS A1

A0

Y3A

Y0A

ZA

Y1A

Y2A

VDD

GND

GND

AIN_RAIN_LAVSS33_AADCAVSS33_REFN_AADCAVDD33_REFP_AADCAVDD33_AADCAVSS33_ADAC1AVSS33_ADAC0AVSS33_ADAC1_1AVSS33_ADAC0_1AVDD33_ADAC1AVDD33_ADAC0AR2AR0AR1AL0AL1AL2AOSDATA3AOSDATA4AOLRCKAOSDATA2AOSDATA0AOBCKAOMCLKAOSDATA1AVICMVMID

GND

GNDGND

GND

GND

GND

T

T

TT

T

SCART1 Audio Output

Near IC Near IC

Near ICNear IC

Near IC

C9710U16V

C10010U16V

L62 600R

SCT1_AUL_OUT

SCT1_AUR_OUTR179

470R

470RR? L63 600R

R5847K

OPP_2.5V

OPP_2.5V

12V

10UC49

R810R

R1306K8

AIN1_L

R29

747

K

A0SDATA1

AL0O

AR0O AR0O

DVI_R_IN

DVI_L_IN

DVI_R_IN

DVI_L_IN

DVI_L_IN

CB

1660.1U

AVDD33_ADAC0

AIN_R0

ADAC_VCM

R302 10K

10KR

303

AVDD33_ADAC1

AV

33REFP_AADC

AVDD33_AADC

+5V

AIN_L0

R37610KCI_GPIO14

ADCOUTR

CE61710U 16V

ADCOUTL

CE61410U 16VR1769470R

ADCOUTR

4K7

R377

L141120R

CB168

0.1U

CB

175

0.1U

CB

174

0.1U

CB

171

0.1UAOSDATA0

R56133R

R56433R

R56333R

R416

47K

R418

47K

R56233R

AOLRCK

C253

100P

C435

100P

ASDATA

ALRCLK

CI_GPIO0

L123220RAOBCK

AOMCLK

C64 47U 16V

C124 0.1U

AOSDATA0

K25L26M23L24K24M25J22J23G25G26K22K23J24H25J25H26J26K26B24C24D24A25B25C25D25B26H24L25

U201

MT5362

R419

47K

CE

610

10U

16V

0.1U

C60

1

0.1U

CB

170

1

2

3

4

5

6

7

8 9

10

11

12

13

14

15

16

U18

HEF4052B

R29

947

K

R29

847

K

L78 600R

+5V

L122220R

SELECTM2

FB50

600R

C33

7 10U

AV33

AV

33

FB53

600R

AV33

FB51

600R

FB52

600R

R1695470R

C609

220PC

614220P

ADAC_VCM

AL1OAL0OAR1O

AVDD33_ADAC0AVDD33_ADAC1

AVDD33_AADCREFP_AADC

ADCOUTL

AOMCLKAOBCK

AOLRCK

R36633R

+5V

4K7

R346

R34410K

B

C

E

Q7BT3904

SELECTM1

R41133R

B

C

E

Q8BT3904

AMCLK

ABCLK

R5947K

C40 10

00P

1000

PC

39

3

2

1

5

6

7

8

4

U3

RC4558

L61220R

220RL47

C9210U16V

R5710K

R5210K

C37 100P

R4533K

R4433K

R4333K

R4233K

C8810U

16V C822U16V

C360.1U

C35100P

C33

0.1U

C291000P

C281000P

AR0O

AL0O

VIMD_AADC

VIMD_AADC

SELECTM1

SELECTM2

AIN_L0

AIN3_R

AIN1_R

AIN4_L

AIN3_L

AIN4_R

AIN_R0

R1296K8

2

1

3

P8

R12815K

R12715K

C1141U

C145

470P

L8430R

L8330R

470P

C144

1UC113

AIN3_R

DVI_R_IN

AIN3_L

For S

ervic

e Onl

y

TCL C

onfid

entia

l

...

.............

DD-MM

DD-MM

DD-MM

DD-MM

...

...

...

...

...

...

...

...

...

5-5-2008_15:52...........

... ... ...

...

...

...

DD-MM-YY

......



OF :

PAGE:ON:BY:BY:

ON:

CHECKEDDATE


A

3 2 1

F

E

D

C

B

8 7 6 5

5

4 3 2 1

TH

IS D

RA

WIN

G C

AN

NO

T B

E C

OM

MU

NIC

AT

ED

TO

UN

AU

TH

OR

IZE

D P

ER

SON

S C

OPI

ED

UN

LE

S S

PER

MIT

TE

D I

N W

RIT

ING

F

E

D

C

B

A

4678

FORMAT DIN A2


SBU :

TCLNO:

DRAWN

GND

GND

GND

T

GNDGND

T

T

T

GND

GND

GND

GND

GND

GND

GND

GN

D

GND

GN

D

GND

GND

VDD_DIG2

GND_DIG

SCL

SDA

INT_LINE

RESET

SDI

LRCKL

BICKL

XT1

PLLGND

PLL_FILTER

PLL_VDD

POWERDN

VSS_DIG

VDD_DIG

OUT4B

OUT3A

OUT3B

CONFIG

VDD

GND_REG

OUT1A

GND1

VCC1

OUT1B

OUT2A

VCC2

GND2

OUT2B

VCC_REG

VSS

TESTMODE

SA

GND_SUB

OUT4A

GND

T

T

T

T

Connect AMP gnd with tuner gnd

Single point to DGND

Single point to DGND

As close as possible to the pin

Single point to GND

DIGITAL AMP.ONLY USE AT 335BWL

OUT1B

OUT2A

R+

L-

R+

R-

L-

L+

AMP_+12V

L70322UH

L70022UH

L70222UH

L70122UH

R72322R

+3V3SB

+3V3SB

+3V3SB

AMP_+12V

C7170.1UC

746

1U

C718

0.1U

C7451UC700

220U35V

C701

220U35V

1

2

3

4

P702

R-

L+

OSDA0

OSCL0

DELAY-ON

C734

330P

C733

330P

6R8R727

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

19

U700

STA333BW

1UC

1941

UC

193

OUT2B

OUT1A

C70

30.

47U

C70

20.

47U

R1400R

R1410R

R1350R

C4

100U16V

ADIN5

C738

0.22U

L712 12

0R

L713120R

1000

PC

752

C75

110

00P

1000

P

C75

0

1000

PC

749

1000

PC

748

C74

710

00P

R7490R

L90 NC/30R

R498100R

C73

1 20P

AMP_SDA

C73220P

D701LL4148

12VA

MP

_+12V

R499100R

Z10

Z47

Z46

C7350.22U

AUDIO_PWR

C704

10U

AMP_+12V

C1950.1U

R7266R8

L4 30R

L89 30R

L630R

L3 30R

C70947U

16V

R72522R R728

6R8

R7071M

C7211000P

C7444U7

16V

3V3

R7410R

AV33

L5 30R

C74

20.

1U

C73

60.

1UC

741

0.1U

C73

90.

1U

C723

4700P

C75

50.

1U

C7190.1U

C7160.1U

C72

00.

1U

NC

/0R

R74

2

3V3

3V3

C96

110

00P

C96

010

00P

D70

46V

8R

969

2K4

D703LL4148

D700LL4148

6R8R724

R7334K7

R73

533

0R

R7342K

R9631K

D702LL4148

R96

210

K

B

C

E

Q915BT3906

R96

010

K

B

CE

Q701

BT

3906

R7062K2

B

C

E

Q700

BT3904

3V3

3V3

R74

3N

C/0

R

R740100K

3V3

ALRCLK

4K7R73

8

AMP_SCL

AMP_SDA

ASDATA

ABCLK

AMCLK

C722

680P

L711600R

L710 60

0RR

704

3R3

R7033R3

C7150.1U

C7400.22U

C7370.22U

R73710K

R73610K

+3V3SB

0RR744

Z45

PWDN

AMP_SCL

CI_GPIO13RESET#

ASDATA

PWDN

PWDN

PLL_FILT

AMP_SCL

AMP_SDA

OUT1A

OUT1B

OUT2A

OUT2B

ALRCLK

PLLGND

3V3

ABCLK

AMCLK

For S

ervic

e Onl

y

TCL C

onfid

entia

l

GND

GND

GND GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GNDGND GND

GND

GND

GND

GND

CI_MIVALCI_MCLKICI_MDI0CI_MISTRTCI_MCLKOCI_MOSTRTCI_MOVALCI_MDO0

OUT

FAULT

ILIM

EN

GND

INGND

GND

GND

GND

GND

GPIO0GPIO1GPIO2T3CLKT3SYNCT3VALIDT3DATAVCC33_0T0CLKT0SYNCT0VALIDT0DATA0GND33_0T0DATA1

T0DATA3T0DATA4VCC18_0

T0DATA2

D3

D4

D5

D6

D7

GND18

CE

1#

A10

OE

#

A11

A9

A8

A13

A14

T0DATA5T0DATA6T0DATA7

VC

C33

_1

WE

#

RE

AD

Y

A16

A15

A12

A7

A6

A5

GN

D33

_1

A4

A3

A2

A1

A0

D0

D1

VC

C33

_2

D2

WP

CD1#

D11

D12

D13

D14

GND33_2

D15

CE

2#

VS

1#

GPIO7GPIO8GPIO9

VCC33_3

IOR

D#

IOW

R#

A17

A18

A19

A20

A21

GN

D33

_3

A22

A23

A24

A25

VS2#

RESET

VCC18_1

WAIT#

INPACK#

REG#

BVD2

BVD1

D8

GND18_1

D9

D10

CD2#

GP

IO10

GP

IO11

GP

IO12

CI_CEB

CI_WEB

CI_

DA

TA

7C

I_D

AT

A6

VC

C33

_4

CI_

DA

TA

5C

I_D

AT

A4

CI_

DA

TA

3

CI_DATA2CI_

DA

TA

1C

I_D

AT

A0

GN

D33

_4C

I_C

LEC

I_R

B

CI_

INT

CI_

OE

B

RE

SE

TB

XT

ALI

XT

ALO

AV

DD

33_X

TA

L

AV

SS

33_X

TA

LA

VD

D18

_PLL

AV

SS

18_P

LL

VC

C33

_5T

S_V

ALI

DO

TS

_CK

OT

S_D

AT

AO

TS

_SY

NC

OG

ND

33_5

GP

IO13

GP

IO14

CI_

ALE

GND

...

.............

DD-MM

DD-MM

DD-MM

DD-MM

...

...

...

...

...

...

...

...

...

5-5-2008_15:52...........

... ... ...

...

...

...

DD-MM-YY

......



OF :

PAGE:ON:BY:BY:

ON:

CHECKEDDATE


A

3 2 1

F

E

D

C

B

8 7 6 5

5

4 3 2 1

TH

IS D

RA

WIN

G C

AN

NO

T B

E C

OM

MU

NIC

AT

ED

TO

UN

AU

TH

OR

IZE

D P

ER

SON

S C

OPI

ED

UN

LE

S S

PER

MIT

TE

D I

N W

RIT

ING

F

E

D

C

B

A

4678

FORMAT DIN A2


SBU :

TCLNO:

DRAWN

CLOSE TO CI CONNECTOR

By Ada.Du

CLOSE TO MT8295

CLOSE TO CI CONNECTOR

CLOSE TO MT8295

SERIAL TS INPUT TO MT8295

EXTERNAL CI FUNCTIONMT536X INTERNAL DVB-T DEMOD

CLOSE TO MT536X

Support CINo Support CI

R1719R1716

NS4.7K

4.7KNS

Strapping

CLOSE TO MT8295

CLOSE TO MT8295

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