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The top documents tagged [gate oxide thickness]
CMOS technologies in the 100 nm range for rad-hard front-end electronics in future collider experiments V. Re a,c, L. Gaioni b,c, M. Manghisoni a,c, L
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Lecture #3 VLSI Design
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Microelectronics & VLSI at IIT Bombay: Academic Programmes J. Vasi Department of Electrical Engineering Indian Institute of Technology, Bombay 2002
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V. Re a,c , L. Gaioni b,c , M. Manghisoni a,c , L. Ratti b,c , V. Speziali b,c , G. Traversi a,c
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Electrically driven phenomena in ferroelectric materials Alexei Grigoriev
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