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Studies of Upset and Nonlinear Effects in Circuits and Systems

John Rodgers, Todd Firestone, Victor Granatstein,Thomas Antonsen, Ed Ott, Steve Anlage*, Renato Mariz de Moraes*, Vassili

Demergis*, Alexander Glasser* and Marshal Miller*

Institute for Research in Electronics and Applied Physics*Department of PhysicsUniversity of Maryland

College Park, MD 20742

rodgers@umd.edu

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Goals of Microwave Effects Task• Not another “cookbook” approach• Investigate basic high-frequency electronics• Measure the (out-of-band) frequency response of

fundamental devices excited by microwave pulses• Map transfer characteristics of circuits• Develop simple but comprehensive models for

simulations• Understand how RF response scales with device

size, speed, logic levels and operating voltages.

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Outline• Overview of nonlinear circuit elements and their

microwave characteristics• Examples of experimental results:

– Parasitic resonances in integrated circuits– Simple rectification by electrostatic discharge (ESD) protection– Bias shift, RF gain, and instability in devices– Effects from RF sources with wideband modulation– Chaotic circuit response

• Results from high-frequency SPICE Models• RF Effects in systems

IC development and technological trends

Source: “Logic Reference Guide,” Texas Instruments Inc., 2002.

Num

ber i

n Se

rvic

e

Circuits under test at UMD

Faster, Smaller, Lower Voltage

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Examples of input circuitry in advanced logic

Virtually all chips have electrostatic discharge protection integrated into their physical layout

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Typical layout of a CMOS gate with electrostatic discharge (ESD) protection

Capacitive loading is predominately from ESD

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Schematic of a CMOS data line

Inverter

Lparasitic

ESDDiode C(V,f)

ESDDiode C(V,f) Vcc

Driver

IC Package

Bus Line

Typical LC values in advanced CMOS have GHz resonant

frequencies

RF Pulse

Analysis of simplified CMOS input (series RLD circuit) with equivalent diode model

2

11

j SdV

in P j j S

sC RVAV s L C sC R

+= =

+ +

/ ( ) /p j D sQ L C V R=

( ) 1 / ( ) /V R P j D SA j L C V Rω = −

Typical values: 0 3

10110

j

P

V

S

C pF

L nHR MR

ΩΩ

0.5 32 61.5 6

R

V

f GHzQ

A

< << <

< <

Give:

Calculated capacitance, impedance and voltage gain for simplified CMOS model

Cj0=3.6 pF, Lp=16nH, Rs=15 Ω

Vol

tage

Gai

n

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Measured input impedance (small signal) vs. frequency and bias voltage in typical micron-scale CMOS

1

10

100

1000

0 0.5 1 1.5

Frequency [GHz]

Impe

danc

e [O

hms]

Vbias= -0.60

Vbias= 0.0Vbias= +2.0

•Cj, fr, and Q depend on bias voltage

•Logic voltages at input shift the microwave response

•How about rectified voltages?

Vil

Input Current, TimeIn

put V

olta

ge

RF

RFVddInput I-V

characteristic of CMOS w/ ESD

diodes

PMOS

NMOSESD

ESD

LinVout

Vrf

Vlogic

VddCBP

ESR

LVdd

IRF

IRFVlogic steers RF current which

determines circuit impedance and

response

Rectification of RF in Circuits w/ ESD Diodes and Parasitic Elements

Realistic “digital” waveforms have high probability of being near the threshold voltage where RF

susceptibility is high.

-6

-4

-2

0

2

4

6

0 50 100 150 200

Time [µsec]

Volta

ge [V

]

0

V_outV_logicRF

Also, the high-frequency response (fr, and Q) in devices

is a moving target.

Eye diagram of Pentium data

The diode detects the AM (pulse) frequencies on the RF carrier and generates harmonics of

the excitation signal

2det RFv v G′∝

RF-to-Baseband voltage transfer related to diode parameters.

The signal the CMOS sees occupies two distinct frequency bands.

Detected voltage (small-signal) at baseband:

0

10

0

Frequency

Am

plitu

de

0

10

0 2000

FrequencyA

mpl

itude

Baseband

RF Harmonics

Effects due to Rectification of RF pulse by ESD diodes

0

0.5

1

1.5

2

2.5

3

3.5

0 1 2 3 4 5 6

Time (µsec)

Volta

ge

Vout

Vin

-2

-1

0

1

2

3

4

5

0 10 20 30

Time (µsec)

Volta

ge

VoutVin

0

0.5

1

1.5

2

2.5

3

3.5

0 5 10 15 20Time [µsec]

Volta

ge [V

]

Vin

Vout

Prompt Bit Error

Undefined Voltages & Latent Latch

Oscillations

-1

0

1

2

3

4

5

0 5 10 15 20

Time (µsec)

Volta

ge VoutVin

More Oscillations

Example of CMOS family (LVX) that is latched by RF only when input is biased

high

0

0.5

1

1.5

2

2.5

3

3.5

0 5 10 15 20Time ( µsec )

Volta

ge (V

)

Vin

Vout

Contours of measured large-signal response in advanced CMOS

HCT ALVC

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RF pulse biasing both CMOS transistors into conduction where they amplify high-frequencies.

Tail End of LVX Input and Output Voltages as RF Pulse Terminates

0

0.5

1

1.5

2

2.5

4 5 6 7 8

Time [microseconds]

Volta

ge

Vin

Vout

PMOS

NMOSESD

ESD

+Vdd

VinLparasitic

Vout

Ids

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Nonlinear response in circuits generates harmonics of the RF and modulation signals which can excite high

and low-frequency oscillations in the circuit.

Video Clip

-2

-1

0

1

2

3

4

5

0 10 20 30

Time (µsec)

Volta

ge

VoutVin

CMOS RF→RF transfer characteristics

0

0.5

1

1.5

2

2.5

3

0 0.5 1 1.5RF Amplitude [V]

Out

put V

olta

ge [V

]

0

2

4

6

8

Supp

ly C

urre

nt [m

A]

VoltageCurrent

-8

-4

0

4

8

0 0.25 0.5 0.75 1 1.25 1.5RF Amplitude [V]

RF

Gai

n [d

Bv]

0

1

2

3

4

Out

put R

F A

mpl

itude

[V

]

GainAmplitude

Video Clip

Measurements

Simulation Results

Video Clip

How to hit a moving target

Scope

SpectrumAnalyzer

30 dB 20 dBHughes 8537HTWTA

Variable Atten.

Attenuator

20 dB

RF DetectorDelay Line

DUT= ALVCBias Tee

Vout

Vbias

0

0.05

0.1

0.15

0.2

0 1 2 3 4

Time [us]

RF

Am

plitu

de

-75

-65

-55

-45

-35

-25

-15

0 2 4 6

Frequency [GHz]

Spec

tral

Pow

er [d

Bm

]

-0.4

-0.3

-0.2

-0.1

0

-0.4 -0.3 -0.2 -0.1 0

A(t)

A(t-

7tau

/4)

Response of Advanced Low-Voltage CMOS to wideband RF source (RF amplitude = 450 mV)

0

0.5

1

1.5

2

0 1 2 3 4 5 6

Time [ µsec ]

Inpu

t Res

pons

e Vo

ltage

-5

-2.5

0

2.5

5

Out

put V

olta

ge

Chaos in the Driven RLD Circuit

Voltage acrossResistor R ~ I

V0 sin(ωt)f = 2.5 MHz

1

2

4

chaos

I

Driving Amplitude V0 (V)

Bifurcation diagramMaximum

Voltage acrossResistor R R = 25 Ω

L = 50 µHD = NTE610f = 2.5 MHz

12

4 chaos

R L D

Data

Diode τRR(ns)

Cj(pF)

Results with f0 ~ 1/τRR

Results with f0 ~ 10/τRR

Results withf0 ~ 100/τRR

1N5400 7000 81 Period-doublingandchaos for f/f0 ~ 0.11 – 1.64

Period-doubling andchaos f/f0 ~ 0.16 –1.76

No chaos, nor period-doubling

1N4007 700 19 Period-doublingandchaos for f/f0 ~ 0.13 – 2

Period-doubling andchaos for f/f0 ~ 0.23 – 1.3

No period doubling or chaos

1N5475B 160 82 Period-doublingandchaos for f/f0 ~ 0.66 – 2.2

No chaos, nor period-doubling

No chaos, nor period-doubling

NTE610 45 16 Period-doublingandchaos for f/f0 ~ 0.14 – 3.84

Period-doubling only for f/f0 ~ 1.17 –3.25

No chaos, nor period-doubling

Search for Period Doubling and Chaos in Driven RLD Circuit

RLD

VLF jLCf

π21

0 =

V0 sin(2π f t)

L D

R

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Rg

Vref

VincVg(t)

+V(t)-

Transmission Line

Chaos in the Driven Diode Distributed Circuit

Delay differential equations for the diode voltage

Z0

delay T

A simple model of p/n junctions in computersNew

Time-Scale!

mismatch

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Vg = .5 V Period 1

Vg = 2.25 V Period 2

Vg = 3.5 V Period 4

Vg = 5.25 V Chaos

V(t)

(Vol

ts)

V(t)

(Vol

ts)

V(t)

(Vol

ts)

V(t)

(Vol

ts)

Time (s)

Time (s)

Time (s)

Time (s)

Chaos in the Driven Diode Distributed Circuit

Simulation results

f = 700 MHzT = 87.5 psRg = 1 ΩZ0 = 70 ΩPLC, Cr = Cf/1000

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Vg (Volts)

Stro

be P

o in t

s (V

o lts

)

Period 2

Period 1

Period 4

Chaos

Chaos in the Driven Diode Distributed Circuit

f = 700 MHzT = 87.5 psRg = 1 ΩZ0 = 70 ΩPLC, Cr = Cf/1000

Simulation results

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RF effects modeling using SPICE

Includes:• Package and bonding parasitics• High frequency characteristics of power line and bypass capacitor• ESD diodes: reverse recovery, Cj(V), Rs and charge conservation

Lp

8 nH

0.2 pF

VDD = 3V

10 kΩ

Vbias

100 MHzLPF

200 pF

ESD_LVC

ESD_LVC_VDD

vRF

LVCCMOS

vdet

1 MΩ

Lp

Lp8 nH

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Comparison of measured and simulated response in CMOS w/ ESD

Video ClipModels can even predict relaxation oscillations:

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RF Effects in communications anddata systems

•Generalize approach for a wide variety of devices using scaling laws

•Study RF interactions between interconnected devices on transmission lines

•Develop systems-level response models

•Validate simulations with measurements

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RF effects decease when devices are heavily loaded by low-impedance interconnects and

line drivers.

PMOS

NMOSESD

ESD

+Vdd

LparasiticVout

Zline

DriverConductance

RF Pulse

Vdet

Systems Example: Programmable LAN Switch

0

2

4

6

8

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5

Resonant Frequency (GHz)

Qua

lity

Fact

or

0

200

400

600

800

0.4 0.8 1.0 1.2 1.7 1.9 3.0

Pin

Cou

ntI/O

Logic

System Controller

CPU

Memory

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Summary of Most Significant Results

• Identified the culprits: Nonlinear devices (e.g. ESD diodes) have been shown to be the likeliest cause of upset in circuits, µwave diode model works

• Know their MO: i.e. how to measure & model the fundamental HF elements and construct equivalent circuits

• Variety of effects (rectification, oscillation, RF gain and instability) in circuits have been characterized.

• Studied some important scaling laws: device size, speed, operating and logic voltages, package parasitics

• Can predict RF effects: High-frequency SPICE models are fast, easy & work

• Outline a systems-level approach: looks promising, significant progress made

Note: Basis for intelligent design of HPM sources (frequency, bandwidth, modulation, pulse width, etc.)

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Future Work• Study emerging technologies (BiCMOS, LinBiCMOS,

Low Voltage Differential, deep submicron).• Further investigate nonlinear effects and excitation: RF

pulses with complex (esp. chirp), chaotic and ultra-wideband modulation.

• Continue development of systems models which include:– Voltage-frequency response statistics,– RF gain, coupling and cascaded response in interconnected devices– Effects from time delay and reflections in transmission line-

coupled devices.• Couple transfer characteristics devices and circuits to

cables and enclosures.

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Collaborations

• Titan-Jaycor• Institute for Defense Analysis• NRL• ARL• Philips Semiconductor• Future: Univ. New Mexico, AFRL, DIA