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Struktury analogových IO – vnitřní zapojení OZ
Jiří Hospodka
Elektrické obvody – analýza a simulace
katedra Teorie obvodů, 804/B3ČVUT FEL
7. přednáška
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 1 / 18
Struktury analogových IO – vnitřní zapojení OZ
µA741, µA741YGENERAL-PURPOSE OPERATIONAL AMPLIFIERS
SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000
2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AVAILABLE OPTIONS
PACKAGED DEVICESCHIP
TASMALL
OUTLINE(D)
CHIPCARRIER
(FK)
CERAMICDIP(J)
CERAMICDIP(JG)
PLASTICDIP(P)
TSSOP(PW)
FLATPACK
(U)
CHIPFORM
(Y)
0°C to 70°C µA741CD µA741CP µA741CPW µA741Y
–40°C to 85°C µA741ID µA741IP
–55°C to 125°C µA741MFK µA741MJ µA741MJG µA741MU
The D package is available taped and reeled. Add the suffix R (e.g., µA741CDR).
schematic
IN–
IN+
VCC+
VCC–
OUT
OFFSET N1
OFFSET N2
Transistors 22Resistors 11Diode 1Capacitor 1
Component Count
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 2 / 18
Základní koncepce OZ
RiI22I1
T1 T2
T3 T4
T5
T6
T7
T8Rz
+Ucc
−Ucc
+
−
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 3 / 18
Základní koncepce OZ – rozdělení na bloky
RiI22I1
T1 T2
T3 T4
T5
T6
T7
T8Rz
+Ucc
−Ucc
+
−
u1
uoA = uiBuoB = uiC
u2
Vstupní část , rozkmitový a koncový stupeň
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 4 / 18
Základní koncepce OZ – nastavení pracovních bodů
RiI22I1
T1 T2
T3 T4
T5
T6
T7
T8Rz
+Ucc
−Ucc
+
−
I2
I1 I1
I1βF
I1βF
αF I1I2β2F
I2βF
Io0
Io0
Io0βF
Io0βF
0
αF I12αF I12+βF
Iin = 80 nA, Ioutmax = 20mA, βF = β = 80, UA = 100V, Rz = 2 kΩ
I1 = βF Iin, I2 = Ioutmax/βF , Io0 ≈ I2.
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 5 / 18
Základní koncepce OZ – nastavení pracovních bodů
RiI22I1
T1 T2
T3 T4
T5
T6
T7
T8Rz
+Ucc
−Ucc
+
−
I2
I1 I1
I1βF
I1βF
αF I1I2β2F
I2βF
Io0
Io0
Io0βF
Io0βF
0
αF I12αF I12+βF
Iin = 80 nA, Ioutmax = 20mA, βF = β = 80, UA = 100V, Rz = 2 kΩ
I1 = βF Iin, I2 = Ioutmax/βF , Io0 ≈ I2.
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 5 / 18
Metoda dělení řetězce
gmAuiAuiA roAriA uoA
A
gmBuiB
B
u1 uiB riB
. . .
. . .
. . .
. . .
roB uoB
B
gmC uiCuiC roCriC uoC
C
Rz u2
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 6 / 18
Analýza základní koncepce OZ – vstupní díl
Diferenční zesílení
2I1
T1 T2
T3 T4
+Ucc
−Ucc
+
−
u1
uoA
riA
roA
u12
−u12
riBre3||rp4 uoA
−u12
u12
re1 re2
rzAube4 gmube4
ie1 ie2
αie2αie1
i1
≡ 0Ro
ioA
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 7 / 18
Analýza základní koncepce OZ – vstupní díl
Diferenční zesílení
2I1
T1 T2
T3 T4
+Ucc
−Ucc
+
−
u1
uoA
riA
roA
u12
−u12
riBre3||rp4 uoA
−u12
u12
re1 re2
rzAube4 gmube4
ie1 ie2
αie2αie1
i1
≡ 0Ro
ioA
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 7 / 18
Analýza základní koncepce OZ – vstupní díl
Diferenční zesílení
re3||rp4 uoA
−u12
u12
re1 re2
rzAube4 gmube4
ie1 ie2
αie2αie1
i1
≡ 0Ro
ioA
re1 = re2 = re
ie1 = ie2 = ie =u12re
gmube4 = αie1β
β + 2.=
.= αie1 = αie
ioA = −2αie
uoA = −2αu12rerzA =
= −gmrzA u1 = AuA u1
rzA = (ro2||ro4)||riB
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 7 / 18
Analýza základní koncepce OZ – vstupní díl
Diferenční zesílení
re3||rp4 uoA
−u12
u12
re1 re2
rzAube4 gmube4
ie1 ie2
αie2αie1
i1
≡ 0Ro
ioA
re1 = re2 = re
ie1 = ie2 = ie =u12re
gmube4 = αie1β
β + 2.=
.= αie1 = αie
ioA = −2αie
uoA = −2αu12rerzA =
= −gmrzA u1 = AuA u1
rzA = (ro2||ro4)||riB
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 7 / 18
Analýza základní koncepce OZ – vstupní díl
Souhlasné zesílení – ideové schéma
re3||rp4 uoA
us
re1 re2
rzAube4 gmube4
ie1 ie2
αie2αie1
i1
Ro
ioA
ie1 = ie2 = ie =us
re + 2Ropokud gmube4 = ie ,
pak ioA = 0 a As = 0!
zde: gmube4 = αie1β
β + 2
uoA = ioArzA = · · ·.= − usRoβrzA
As =uoAus
.= − rzARoβ
, Ro re
H =∣∣∣∣AuAAs
∣∣∣∣ .= gmRoβ
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 7 / 18
Analýza základní koncepce OZ – vstupní díl
Souhlasné zesílení – ideové schéma
re3||rp4 uoA
us
re1 re2
rzAube4 gmube4
ie1 ie2
αie2αie1
i1
Ro
ioA
ie1 = ie2 = ie =us
re + 2Ropokud gmube4 = ie ,
pak ioA = 0 a As = 0!
zde: gmube4 = αie1β
β + 2
uoA = ioArzA = · · ·.= − usRoβrzA
As =uoAus
.= − rzARoβ
, Ro re
H =∣∣∣∣AuAAs
∣∣∣∣ .= gmRoβ
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 7 / 18
Analýza základní koncepce OZ – vstupní díl
Souhlasné zesílení – kompletní zapojení
re3||rp4
us
re1 re2
ube4 gmube4
ie1 ie2
αie2αie1
is
Ro
ro1ro2
uoArzA
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 7 / 18
Analýza základní koncepce OZ – rozkmitový stupeň
RiI2
T5
T6
+Ucc
−Ucc
uiBuoB
riB roB
riC
roA
riB = (β + 1)(re5 + rπ6) == (β + 1)2rπ6 = 2rπ5
AuB = −gm6rzB2
rzB = roB ||riC = (Ri ||ro6)||riCRi ≈ ro6
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 8 / 18
Analýza základní koncepce OZ – koncový stupeň
T7
T8Rz
+Ucc
−Ucc
uiC
u2
riC
roC
roB
riC = (β + 1)Rz
AuC =Rz
Rz + rek.= 1, rek = re7 = re8
roC = rek +roB
β + 1.=roB
β + 1
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 9 / 18
Modelový příklad výpočtu zesílení OZ
β = 80
UA = 100V
Rz = 2kΩ
RiI22I1
T1 T2
T3 T4
T5
T6
T7
T8Rz
+Ucc
−Ucc
+
−
u1
uoA = uiBuoB = uiC
u2
I1 = 6, 4µA ⇒ re1.= 4kΩ, rπ1
.= 300kΩ, roA
.= 8MΩ
I2 = 250µA ⇒ riB.= 1, 3MΩ, roB
.= 200 kΩ, riC
.= 160 kΩ
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 10 / 18
Modelový příklad výpočtu zesílení OZ
β = 80
UA = 100V
Rz = 2kΩ
RiI22I1
T1 T2
T3 T4
T5
T6
T7
T8Rz
+Ucc
−Ucc
+
−
u1
uoA = uiBuoB = uiC
u2
AuA =uoAu1= −gm(roA ||riB )
.= −280,AuB =
uoBuiB= −gm6(roB ||riC )
2.= −890,
AuC.= 1, Au = AuAAuBAuC
.= 250 000.
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 10 / 18
Modelový příklad výpočtu zesílení OZ
β = 80
UA = 100V
Rz = 2kΩ
RiI22I1
T1 T2
T3 T4
T5
T6
T7
T8Rz
+Ucc
−Ucc
+
−
u1
uoA = uiBuoB = uiC
u2
AuA =uoAu1= −gm(roA ||riB )
.= −280,AuB =
uoBuiB= −gm6(roB ||riC )
2.= −890,
Rz →∞ ⇒ AuB = 2000 ! a Au.= 560 000 oproti původním 250 000.
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 10 / 18
Vnitřní struktura IO, operačního zesilovače TL071
TL071, TL071A, TL071B, TL072TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS
S LOS 080D ± S E P T E MB E R 1978 ± R E V IS E D AUG US T 1996
3P OS T OF F IC E B OX 655303 ω DALLAS , T E XAS 75265
s c hematic (eac h amplifier)
C 1
V C C +
IN +
V C C -
1080 Ω 1080 Ω
IN -
T L 071 Only
64 Ω128 Ω
64 Ω
All component values shown are nominal.
OF F S E TNUL L(N1)
OF F S E TNUL L(N2)
OUT
18 pF
C OMP ONE NT C OUNT ²
C OMP ONE NTT Y P E
T L 071 T L 072 T L 074
R es istors 11 22 44R es istorsTrans istors
1114
2228
4456
J F E T 2 4 6Diodes 1 2 4C apacitors 1 2 4epi-F E T 1 2 4
² Includes bias and trim circuitry
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 11 / 18
Vnitřní struktura IO, OZ LM741LM741Operational AmplifierGeneral DescriptionThe LM741 series are general purpose operational amplifi-ers which feature improved performance over industry stan-dards like the LM709. They are direct, plug-in replacementsfor the 709C, LM201, MC1439 and 748 in most applications.
The amplifiers offer many features which make their applica-tion nearly foolproof: overload protection on the input andoutput, no latch-up when the common mode range is ex-ceeded, as well as freedom from oscillations.
The LM741C is identical to the LM741/LM741A except thatthe LM741C has their performance guaranteed over a 0˚C to+70˚C temperature range, instead of −55˚C to +125˚C.
Connection Diagrams
Typical Application
Metal Can Package
DS009341-2
Note 1: LM741H is available per JM38510/10101
Order Number LM741H, LM741H/883 (Note 1),LM741AH/883 or LM741CH
See NS Package Number H08C
Dual-In-Line or S.O. Package
DS009341-3
Order Number LM741J, LM741J/883, LM741CNSee NS Package Number J08A, M08A or N08E
Ceramic Flatpak
DS009341-6
Order Number LM741W/883See NS Package Number W10A
Offset Nulling Circuit
DS009341-7
August 2000
LM741
OperationalA
mplifier
© 2000 National Semiconductor Corporation DS009341 www.national.com
Electrical Characteristics (Note 5) (Continued)
Note 3: For operation at elevated temperatures, these devices must be derated based on thermal resistance, and Tj max. (listed under “Absolute Maximum Rat-ings”). Tj = TA + (θjA PD).
Thermal Resistance Cerdip (J) DIP (N) HO8 (H) SO-8 (M)
θjA (Junction to Ambient) 100˚C/W 100˚C/W 170˚C/W 195˚C/W
θjC (Junction to Case) N/A N/A 25˚C/W N/A
Note 4: For supply voltages less than ±15V, the absolute maximum input voltage is equal to the supply voltage.
Note 5: Unless otherwise specified, these specifications apply for VS = ±15V, −55˚C ≤ TA ≤ +125˚C (LM741/LM741A). For the LM741C/LM741E, these specifica-tions are limited to 0˚C ≤ TA ≤ +70˚C.
Note 6: Calculated value from: BW (MHz) = 0.35/Rise Time(µs).
Note 7: For military specifications see RETS741X for LM741 and RETS741AX for LM741A.
Note 8: Human body model, 1.5 kΩ in series with 100 pF.
Schematic Diagram
DS009341-1
LM74
1
www.national.com 4
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 12 / 18
Vnitřní struktura IO, OZ µA741
µA741, µA741YGENERAL-PURPOSE OPERATIONAL AMPLIFIERS
SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000
2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AVAILABLE OPTIONS
PACKAGED DEVICESCHIP
TASMALL
OUTLINE(D)
CHIPCARRIER
(FK)
CERAMICDIP(J)
CERAMICDIP(JG)
PLASTICDIP(P)
TSSOP(PW)
FLATPACK
(U)
CHIPFORM
(Y)
0°C to 70°C µA741CD µA741CP µA741CPW µA741Y
–40°C to 85°C µA741ID µA741IP
–55°C to 125°C µA741MFK µA741MJ µA741MJG µA741MU
The D package is available taped and reeled. Add the suffix R (e.g., µA741CDR).
schematic
IN–
IN+
VCC+
VCC–
OUT
OFFSET N1
OFFSET N2
Transistors 22Resistors 11Diode 1Capacitor 1
Component CountµA741, µA741YGENERAL-PURPOSE OPERATIONAL AMPLIFIERS
SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000
2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AVAILABLE OPTIONS
PACKAGED DEVICESCHIP
TASMALL
OUTLINE(D)
CHIPCARRIER
(FK)
CERAMICDIP(J)
CERAMICDIP(JG)
PLASTICDIP(P)
TSSOP(PW)
FLATPACK
(U)
CHIPFORM
(Y)
0°C to 70°C µA741CD µA741CP µA741CPW µA741Y
–40°C to 85°C µA741ID µA741IP
–55°C to 125°C µA741MFK µA741MJ µA741MJG µA741MU
The D package is available taped and reeled. Add the suffix R (e.g., µA741CDR).
schematic
IN–
IN+
VCC+
VCC–
OUT
OFFSET N1
OFFSET N2
Transistors 22Resistors 11Diode 1Capacitor 1
Component Count
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 13 / 18
Vnitřní struktura IO, operačního zesilovače OP07
REV. A
Information furnished by Analog Devices is believed to be accurate andreliable. However, no responsibility is assumed by Analog Devices for itsuse, nor for any infringements of patents or other rights of third parties thatmay result from its use. No license is granted by implication or otherwiseunder any patent or patent rights of Analog Devices.
aOP07
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 2002
Ultralow Offset VoltageOperational Amplifiers
FEATURES
Low VOS: 75 V Max
Low VOS Drift: 1.3 V/C Max
Ultra-Stable vs. Time: 1.5 V/Month Max
Low Noise: 0.6 V p-p Max
Wide Input Voltage Range: 14 V
Wide Supply Voltage Range: 3 V to 18 V
Fits 725,108A/308A, 741, AD510 Sockets
125C Temperature-Tested Dice
APPLICATIONS
Wireless Base Station Control Circuits
Optical Network Control Circuits
Instrumentation
Sensors and Controls
Thermocouples
RTDs
Strain Bridges
Shunt Current Measurements
Precision Filters
GENERAL DESCRIPTIONThe OP07 has very low input offset voltage (75 µV max forOP07E) which is obtained by trimming at the wafer stage. Theselow offset voltages generally eliminate any need for external null-ing. The OP07 also features low input bias current (±4 nA forOP07E) and high open-loop gain (200 V/mV for OP07E). Thelow offsets and high open-loop gain make the OP07 particularlyuseful for high-gain instrumentation applications.
The wide input voltage range of ±13 V minimum combined withhigh CMRR of 106 dB (OP07E) and high input impedace pro-vides high accuracy in the noninverting circuit configuration.Excellent linearity and gain accuracy can be maintained even at
high closed-loop gains. Stability of offsets and gain with time orvariations in temperature is excellent. The accuracy and stabilityof the OP07, even at high gain, combined with the freedomfrom external nulling have made the OP07 an industry standardfor instrumentation applications.
The OP07 is available in two standard performance grades. TheOP07E is specified for operation over the 0°C to 70°C range, andOP07C over the –40°C to +85°C temperature range.
The OP07 is available in epoxy 8-lead Mini-DIP and 8-lead SOIC.It is a direct replacement for 725,108A, and OP05 amplifiers;741-types may be directly replaced by removing the 741’s nullingpotentiometer. For improved specifications, see the OP177 orOP1177. For ceramic DIP and TO-99 packages and standardmicro circuit (SMD) versions, see the OP77.
Figure 1. Simplified Schematic
PIN CONNECTIONS
Epoxy Mini-Dip (P-Suffix)8-Pin SO (S-Suffix)
8
7
6
5
1
2
3
4
NC = NO CONNECT
VOS TRIM
–IN
+IN
VOS TRIM
V+
OUT
NCV–
OP07
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 14 / 18
Vstupní obvody operačního zesilovače OP07
REV. A
Information furnished by Analog Devices is believed to be accurate andreliable. However, no responsibility is assumed by Analog Devices for itsuse, nor for any infringements of patents or other rights of third parties thatmay result from its use. No license is granted by implication or otherwiseunder any patent or patent rights of Analog Devices.
aOP07
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 2002
Ultralow Offset VoltageOperational Amplifiers
FEATURES
Low VOS: 75 V Max
Low VOS Drift: 1.3 V/C Max
Ultra-Stable vs. Time: 1.5 V/Month Max
Low Noise: 0.6 V p-p Max
Wide Input Voltage Range: 14 V
Wide Supply Voltage Range: 3 V to 18 V
Fits 725,108A/308A, 741, AD510 Sockets
125C Temperature-Tested Dice
APPLICATIONS
Wireless Base Station Control Circuits
Optical Network Control Circuits
Instrumentation
Sensors and Controls
Thermocouples
RTDs
Strain Bridges
Shunt Current Measurements
Precision Filters
GENERAL DESCRIPTIONThe OP07 has very low input offset voltage (75 µV max forOP07E) which is obtained by trimming at the wafer stage. Theselow offset voltages generally eliminate any need for external null-ing. The OP07 also features low input bias current (±4 nA forOP07E) and high open-loop gain (200 V/mV for OP07E). Thelow offsets and high open-loop gain make the OP07 particularlyuseful for high-gain instrumentation applications.
The wide input voltage range of ±13 V minimum combined withhigh CMRR of 106 dB (OP07E) and high input impedace pro-vides high accuracy in the noninverting circuit configuration.Excellent linearity and gain accuracy can be maintained even at
high closed-loop gains. Stability of offsets and gain with time orvariations in temperature is excellent. The accuracy and stabilityof the OP07, even at high gain, combined with the freedomfrom external nulling have made the OP07 an industry standardfor instrumentation applications.
The OP07 is available in two standard performance grades. TheOP07E is specified for operation over the 0°C to 70°C range, andOP07C over the –40°C to +85°C temperature range.
The OP07 is available in epoxy 8-lead Mini-DIP and 8-lead SOIC.It is a direct replacement for 725,108A, and OP05 amplifiers;741-types may be directly replaced by removing the 741’s nullingpotentiometer. For improved specifications, see the OP177 orOP1177. For ceramic DIP and TO-99 packages and standardmicro circuit (SMD) versions, see the OP77.
Figure 1. Simplified Schematic
PIN CONNECTIONS
Epoxy Mini-Dip (P-Suffix)8-Pin SO (S-Suffix)
8
7
6
5
1
2
3
4
NC = NO CONNECT
VOS TRIM
–IN
+IN
VOS TRIM
V+
OUT
NCV–
OP07
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 15 / 18
Vnitřní struktura IO, operačního zesilovače OP50
Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 16 / 18
Vnitřní struktura IO, oeračního zesilovače LM358
Typical Single-Supply Applications (V+ = 5.0 VDC) (Continued)
Using Symmetrical Amplifiers toReduce Input Current (General Concept)
00778732
Schematic Diagram (Each Amplifier)
00778703
LM15
8/LM
258/
LM35
8/LM
2904
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Jiří Hospodka (ELO) Struktury analogových IO 7. přednáška 17 / 18