status report on the new charged hodoscope for p326
DESCRIPTION
Status report on the new charged hodoscope for P326. Mauro Raggi for the HODO working group Perugia – Firenze 07/09/2005. Outline. The ALICE MRPC Detector layout Performance: time resolution, efficiency, rate, and ageing MRPC in the P326 Charged hodoscope - PowerPoint PPT PresentationTRANSCRIPT
Mauro Raggi
Status report on the new charged Status report on the new charged hodoscope for P326hodoscope for P326
Mauro Raggi
for the HODO working group Perugia – Firenze
07/09/2005
Mauro Raggi
Outline Outline
The ALICE MRPC– Detector layout
– Performance: time resolution, efficiency, rate, and ageing
MRPC in the P326 Charged hodoscope– Possible design for charged hodo– Channels and readout– The signal collection and the new PCB layout – Prototype development status
Conclusion
Mauro Raggi
The ALICE Multigap Resistive Plate The ALICE Multigap Resistive Plate Chambers (MRPC)Chambers (MRPC)
Mauro Raggi
ALICE detector layoutALICE detector layout
2 anode and 1 chatode PCB with picup pads
5+5 250 m gaps filled with gas mixture
1 cm honeycombs panel for mechanical stability
96 pads per module readout with 32 flat cable
Differential signal send to interface card
13x120 cm2 area for each module
7x120 cm2 active area for each module
Greater number of gaps
Lower HV (+6.5 kV, -6.5 kV)
Signal amplitude greater of a factor 2
Mauro Raggi
FrontEnd electronicFrontEnd electronicALICE has developed for this porpouse, fast (1ns peaking time) front-end amplifier/discriminator (NINO). Each NINO can handle 8 channels.
The input is low impedance (40-75 Ω) differential, and the output standard is an open-collector LVDS (Low Voltage Differential Signal).
NINO can respond to another signal immediately (few ns) after the end of a previous signal (almost no dead time).
On each front end card 3 NINO chip are mounted so the card can
handle 24 ch.
The NINO ASIC
bonded to the PCB
Mauro Raggi
MRPC performanceMRPC performance
Efficiency > 99%Time resol. < 50 ps
Test performed with the ALICE TOF rate 50 Hz
Mauro Raggi
Rate tests at GIFRate tests at GIF The MRPC were tested for efficiency up to a rate of 1.6 kHz
The performance seem to be stable only using an effective voltage of 11.4 kV
The MRPC were tested for time resolution up to a rate of 1.6 kHz
The time resolution seem to decrease a little bit
The resolution at 1.6 kHz is well above 100 ps
This performance are very suitable for P326
New high rate test are mandatory to validate performance up to 5 kHz
Mauro Raggi
Ageing test at GIFAgeing test at GIF
Irradiation with 7∙109 particles/cm2
The performances seem to remain stable in time
The total amount of irradiated charge is equivalent to only 140 days of P326 run:
)(2
9
3261
86400*/
107daysRUNP
cycledutycmrate
Mauro Raggi
Fast Charged Hodo requiremetsFast Charged Hodo requiremets
1. Time resolution better than 100 ps
2. Operation rate > 2 kHz/cm2 beam region
3. “Q1” Efficiency >99% with low “Q2” contamination
4. Radiation hardeness to resist to 240 days of run
5. No dead space
6. Low material budget in front of LKR
Mauro Raggi
Possible hodo layoutPossible hodo layout
240x240 cm2 detector
2 or 3 planes to avoid dead space
4 quadrants: 120x120 cm2
~ 960 pads per quadrant
~ 20 slabs 6x120 cm2 sensible area
≤ 48 pads per slab
Front end electronicsThe final geometry and granularity will be fixed using MC simulation
120 cm
120 cm
Mauro Raggi
Possible slab configurationPossible slab configuration
Beam
Plan
e 1P
lane 1
Plan
e 2P
lane 2
Beam
Plan
e 1P
lane 2
Plan
e 3Solution A Solution B
Modules 160 180
Front end Chips 960 1080
Front end cards 320 360
Solution A Solution B
48 ch per Moudule 7680 8640
24 ch per module 3840 4320
Readout TDC ?? ??
Solution A Solution B
Mauro Raggi
The new PCB for P326The new PCB for P326
The PCB design used by ALICE is not suitable for P326:– The connectors on each side introduce too much dead space
between two modules
– It’is very difficult to bring signals out of the detector using ALICE configuration
– The material budget would not be uniform due to connectors and cables
A new layout of the PCB has to be designed– Strip line to transport the signal to one side of the detector
– Connectors only at the end of each module
Mauro Raggi
The problem of signal collection The problem of signal collection
In the ALICE configuration you do not have any reflection due to very short trasmission line from pads to connectors
P326P326ALICEALICE
In P326 the longer transimission line is up to 120cm. This may introduce reflections of the signal if the line impedence is not controlled.
The impedence of the strip line can be controlled using a ground plane in the PCB
Mauro Raggi
New detector for P326New detector for P326
5 x 400m glasses
PCB anodico
Layout of a single stack module
6 Gaps 250m
PCB catodico
+10-13 KV
0 flottante
Ground layerStrip line layerPad layerEmpty layer
Empty layerPad layerStrip line layerGround layer
550m glass
550m glass
X0(mm) (1 Plane) % X0 (3 Planes) % X0
Glass 127.0 3.1 mm 2.45 9.3 mm 7.3
PCB (FR4) 174.0 3.4 mm 1.95 10.2 mm 5.85
4.4 13.2
Mauro Raggi
PCB LayoutPCB Layout
Pads plane
0.5
mm
0.5
mm
0.7
mm
1.7
mm
Ground plane
Strip line plane
Empty plane
0.4 mm
1 mm
Total thickness 1.7 mm
Empty plane thickness fixed by high HV ≤ 15 kV
Ground plane thickness = empty plane one due to symmetry
Pads dimension 2.4x3.4 cm2
48 stripline of 0.4 mm width with a distance of 1 mm to avoid crosstalk
Mauro Raggi
The first prototypeThe first prototype
We want to check if the signal transportation through strips to the final connector will actually work
What is the effect of the ground plane in the efficiency and timing performance of the detector
We will use exaclty the same geometry of the alice PCB but introducing strip to transport the signal and the ground plane
50 pin connector
Layout of PCB prototype with 48 channels
10 cm 20 cm 30 cm
48 pads =2.4*3.4 cm2 connected to the readout
48 pads =2.4*3.4 cm2 not connected to the readout
60 cm
Mauro Raggi
The test facilityThe test facility
MR
PC
-1
MR
PC
-2
MR
PC
-3
Interfaceboard
FE
electronicboards
Gas in
HV
48 readout channels 2 flat 50 pin connectors 2 front end boards each MRPC 6 front end “Nino” chips
For each MRPC
144 readout channels 6 flat 50 pin connectors 6 front end boards each MRPC 18 front end “Nino” chips
All test facility
In order to test the module performance we will contruct a 3 modules test facility
Mauro Raggi
ConclusionConclusion
A first prototipe for a hodo module has been developedThe production of the PCB starts in september First prototype assembly foreseen in october Cosmic ray test will be hopefully done within 2005Test of efficiency and time resolution at high rate are
mandatory to validate detector performance in the P326 environment: test with NA48 facility in 2006.