State of SiC based Power Electronics

Subhashish Bhattacharya

FREEDM Systems Center

PowerAmerica Institute

North Carolina State University

Sunlamp Architecture

Contributions of the Sunlamp Project:

Overall architecture selection and dc-dc and dc-ac converter designs. Combining PV and ES on the DC Side with a 3-winding transformer for new topologies

and system benefits. System level Integration simulation and experimental demonstration Advanced magnetic core and high frequency transformer fabrication, design, and

testing.

Conventional MV grid connection using low frequency transformer.

Proposed MV grid connection using isolated power electronic converters and simpler dc-ac converter structure.

Triple Active Bridge (TAB) and Magnetic Designs

Highlights of the Sunlamp Project

10kW, 20kW and 50kW TAB converter demonstrated at NC State University.

Prototypes designed based Upon 3-Limb and Single Core, 3-Winding Transformers.

HF Transformer Design, Build, and Test.

Experimental results from a TAB under test.

A triple active bridge (TAB) integrating PV and an energy storage.

PV

ES

DC

BUS

VpvdcVesdc

Vdc3

IpvIes

Controller

PWM

PWM

PWM

I3

VPV

V3

V1a V1b

V2a V2bVES

1700V SiC Mosfet

Converter

1200V SiC Mosfet

Converter1200V SiC Mosfet

Converter

Various inductor designs realized for the TAB.

Vpv(1kV/div)

Ves(1kV/div)

V3(1kV/div)

Ipv(20A/div)

Ies(10A/div)

I3(10A/div)

Vpv(1kV/div)

Ves(1kV/div)

V3(1kV/div)

Ipv(20A/div)

Ies(10A/div)

I3(10A/div)

Various transformer designs realized for the TAB.

MUSE-SST Architecture

Contributions of the MUSE-SST Project:

3-phase 100 kW SST structure

Connects 4.16 kV, 60 Hz grid to 480 V, 60 Hz grid with currently at 7.2 kV high voltage DC link and 800 V low voltage DC link

High Voltage side converters are 3-Φ 2-level converters, Low voltage side converter is 2-level converter

High frequency transformer forms Y-Δ connections for near sinusoidal current.

Proposed Topology along with the devices used on the MV and LV side of the converter

Highlights of the MUSE-SST Project:

Initial Testing of 10 kV SiC MOSFETs

Developed MV gate driver for driving the 10 kV SiC MOSFETs

Advanced control with monitoring and protection functions using NI CRIO

Advanced methods to mitigate the effects of high dv/dt of SiC MOSFETs on passive components

MUSE-SST Designs and Initial Results

10 kV SiC MOSFET in XHV-6 packaging

1200 kV SiC MOSFET in High Performance low inductive package

Gate Driver designed at NC State for 10 kV SiC MOSFET

Double Pulse Test at 7.2 kV (Ch4: Common Mode Current in Gate Driver)

Short Circuit Test at 7.5 kV dc-link voltage

Gate Driver designed at NC State for 1200 V SiC MOSFET

Initial Testing of 10 kV SiC MOSFETs in boost converter operation

Loop Thermosyphoon based heatsinks

MTDC as a Flexible Large Power Transformer

Four terminal HVDC System

Back to Back HVDC System

Three terminal HVDC System

RST

345 kV

NHV

200 MVA single phase stack

Cell 1

Cell n

Cell 1

Cell n

Cell 1

Cell n

ncell

front end AC – DC stage

DC – DC stage with MF isolation

ncell

ncell

RST

345 kV

NHV

200 MVA single phase stack

Cell 1

Cell n

Cell 1

Cell n

Cell 1

Cell n

ncell

front end AC – DC stage

DC – DC stage with MF isolation

ncell

ncell

GND2 GND3

RST

345 kV

NHV

200 MVA single phase stack

Cell 1

Cell n

Cell 1

Cell n

Cell 1

Cell n

ncell

front end AC – DC stage

DC – DC stage with MF isolation

ncell

ncell

RST

345 kV

NHV

200 MVA single phase stack

Cell 1

Cell n

Cell 1

Cell n

Cell 1

Cell n

ncell

front end AC – DC stage

DC – DC stage with MF isolation

ncell

ncell

GND2 GND3

RST

345 kV

NHV

200 MVA single phase stack

Cell 1

Cell n

Cell 1

Cell n

Cell 1

Cell n

ncell

front end AC – DC stage

DC – DC stage with MF isolation

ncell

ncell

GND4

Terminal#1

Terminal#2

Terminal#3

Terminal#4

RST

345 kV

NHV

200 MVA single phase stack

Cell 1

Cell n

Cell 1

Cell n

Cell 1

Cell n

ncell

front end AC – DC stage

DC – DC stage with MF isolation

ncell

ncell

GND2

Multi terminal HVDC System SST as Multi plug

Terminal#1

Terminal#n

Terminal#p

Terminal#x

Terminal#y

Terminal#z

HVDC Network

front end AC – DC stage

DC – DC stage with MF isolation

back end DC – AC stage

{

{

Input AC Terminal

Output AC Terminal

PrimaryDC Port

SecondaryDC Port

{

{Input AC Terminal

Output AC Terminal

Input DC Terminal

Output DC Terminal

{

{

Battery Bank

PV Panels

Battery Bank

Fuel Cell

Wind Turbine

Renewable Energy Integration with SST

MTDC as a Flexible Large Power Transformer

PV Inverter Systems Enabled by SiC based

Four Quadrant Power Switch

8 channel isolated gate driver developed in-house at NCSU

(a) Conventional power architecture for DC-AC conversion, b) High-frequency link single phase inverter using 4-QPS enabled cyclo-converter (c) High-frequency link three phase inverter using 4-QPS enabled cyclo-converter

1200 V BIDFET and applications:

Newly developed 4-Quadrant Single Die SiC-JBSFET based Power Semiconductor Switches (4-QPSs) are used to enable a new breed of Power Conversion Systems (PCS) for photovoltaic (PV) applications based on a cyclo-converter topology

Novel DC/AC power converter topologies

Characterization of 1200 VSIC BIDFET

PV Inverter applications

Standard power module developed in PREES

AGC(Autonomous Grid Connector)

Architecture

Contributions of the AGC Project: The three level topology causes reduction in harmonics leading to lower size filter inductor at input. The three level topology helps in increasing the voltage level without increasing the device rating. Series connection with three level topology helps in avoiding the higher level topology which allows

simple control and better reliability. The size of three level converter with series connection will be compact than 5 level converter without

series connection.

Proposed Topology along with the devices used on the MV and LV side of the converter

AGC Initial Testing Results

Series connected Half Bridge configuration in single phaseTwo series connected SiC 10kV MOSFETs based 3-L NPC pole

Schematic of Two series connected SiC 10kV MOSFETs based 3-L NPC pole

2500V DC bus voltage, 9.7A peak current, 60Hz fundamental, 12.5kHz switching frequency

VAN (pole-to-DC midpoint voltage): 500V/div, Iload (load current): 5A/div; Time: 5ms/div

HV SiC 10-15 kV BIDFET and RC-IGBT

(a) Conventional Solid State Circuit Breaker and (b) Bi-DFET

(a) Bidirectional Switch based on (a) 2 series connected silicon IGBTs and diodes, (b) 2 anti-parallel connected reverse blocking silicon IGBTs, (c) 2 series connected 4H-SiC Power MOSFETs and diodes and (d) 2 anti-parallel connected reverse blocking 4H-SiC Power MOSFETs and diode

(a) (b)

AFEC: MV DAB AFEC: LV

MV Grid(4160 V L -L)

LV Grid(480 V L -L)

LCL Filter LCLFilter

C f

GridGrid

Proposed Monolithically Integrated FQS

Lf

Cf Cf

Cf

Cf Cf

Cf

Lf

(a) (b)

(a) Conventional three-phase SST (b) Bi-DFET based three-phase SST

HV SiC 10-15 kV BIDFET and RC-IGBT:

Design and development of 10-15 kV BIDFET and RC-IGBT

Converter design and component selection

Characterization of 10 kV/10 A SIC BIDFET

Building the 50 kW AC-AC Matrix Converter

Series Connection Capability of 15 kV/10 A BIDFETs

GaN based Four-Quadrant Switch (see ECCE 2017 paper)

Equivalent representation of FQS

• 600V, 5A rated devices in a single die

• Low On-state resistance means reduced conduction loss

175 mΩ (@ 25◦C, VG1K1= 5V)

197 mΩ (@ 80◦C, VG1K1= 5V)

• Low switching loss enables higher switching frequencies,

reduced filter size

Eon = 30.16µJ and Eoff = 4.9µJ (@ Id = 5A, Vds = 350V,

Rgon = 15Ω and Rgoff = 1Ω)

• Use of GaN HEMT allows increased efficiency and increased

power density

Variation of on-state resistance with Vgs (at

different temperatures)

Total Switching loss variation with drain current @ 25◦C

with Vdc=350V

High Speed Machine (HSM) Drives Enabled using GaN FQS

• Matrix Converter using

FQS enables high

efficiency AC-AC

conversion

• Higher Power densities due

to lack of energy storage

• UPF operation at any load

• Bidirectional Power flow

capability

• Sinusoidal input and output

currents

• Popular topology for motor

drive applications

• Use of the GaN FQS helps

reduce switching losses–

higher switching

frequencies and reduced

filter size, further

improving power density

Direct Matrix Converter based IPMSM Drive using GaN FQS

NCSU Develops Integrated Intelligent Gate Driver and Interface System for Medium Voltage Converter Applications

15kV isolated DC power supply Isolation transformer coupling capacitance: 1.43pF

Dynamically changing effective

gate

resistance during

module switching

Gate-voltage level reduction

Active gating and protection circuit

Short circuit protection of 10kV/10A Gen-3 SiC

MOSFET at 6kV, 220A current, Trip time: 2.4μs

Gate driver validation: Boost-buck setup

Intelligent Gate Driver

Specification ValueTurn-on Voltage 18 V -> 20V

Turn-off Voltage -5 V

Supply Input Voltage 9-10 V

Switching Frequency Up to 20 kHz

Turn-on Gate Resistance 10-33 Ω

Turn-off Gate Resistance 10-15 Ω

Isolation Voltage Up to 15 kV

dv/dt capability > 50 kV/µs

Isolation Transformer

Coupling Capacitance

< 5 pF (1- 100 MHz)

With short circuit protection and diagnosis features

Experimental results series connection of two 15kV

SiC IGBT devices with RC snubber

Figure: Balanced Turn-off characteristics At 10kV DC bus voltage with RC snubber.

[Ch3: Top device VGE (20 V/div); Ch2: Total voltage (1 kV/div); Ch4: Bottom device VCE (1 kV/div);

Math1: Ch2-Ch4: Top device VCE (1 kV/div) Ch1: Bottom device current: IC(5 A/div);]

Experimental results series connection of two 10kV SiC

MOSFET devices with RC snubber

Figure: Balanced static & dynamic voltage sharing between two 10kV SiC

MOSFETs 12kV DC bus voltage with RC snubber.

[Ch3: Top device VGS (20 V/div); Ch2: Total voltage (1 kV/div); Ch4: Bottom device VDS (1 kV/div);

Math1: Ch2-Ch4: Top device VDS (1 kV/div) Ch1: Bottom device current: ID(5 A/div);]

Inductive clamped circuits characterization of two series connected devices and

four series connected SiC 1700V devices

17

(a) two series connected 1.7 kV SiC

MOSFETs per arm of a phase leg

(b) Four series connected 1.7 kV SiC

MOSFETs per arm of a phase leg.

Experimental setup with series connected 1.7 kV SiC

MOSFET devices

18

• Experimental setup of one phase-leg with four series connected SiC MOSFET devices per

arm mounted on heat sink, dc link snubber capacitor, RdCd snubber for each device and

eight-channel gate driver; (a) Top View; (b) Side view.

DC-AC operation with two series connected 1.7 kV MOSFET devices per

arm of full-bridge at 10 kHz, 1800 V input DC, m = 0.6, AC load peak

current of 150 A (1000 Hz) and nearly 76 kVA load

19• Input current (Iin), Output AC voltage(VAB), AC current (Iab), and one of low side MOSFET

gate voltage

20

Acknowledgements

Thank You!!!

Questions

Acknowledgements:

FREEDM Systems Center, PowerAmerica

ARPA-E and DOE

Dept. of ECE, NC State University