some features of creating grid structure for simulation of nanotransistors

Мэдээллийн Технологийн

Сургууль

Монгол Улсын Их Сургууль

Some features of creating GRID structure for simulation of nanotransistors

Bolormaa Dalanbayar, Batnyam Battulga

National Universiry of MongoliaSchool of Information Technology


СургуульOutline

i. About SIT

ii. Why parallel computation in SIT curricula?

iii. Nanoelectronics development

iv. Siesta and parallel processing in SIT

v. Conclusion


СургуульIntroduction

Presented work – small GRID structure based Unicore software technology

DFT simulation of a bulk silicon using Siesta package


СургуульSchool of Information Technology

1967 – First Radio-Electronic Engineers

1990 – Electronics Department

2002 – School of Information Technology


СургуульSchool of Information Technology

Departments:

Electronics

Computer and Information Technology

Communication Technology

Research centers:

Research center of NLP

Research center of Mobile and Embedded technology

Animation studio


СургуульWhy parallel computation in SIT curricula?

Nano electronics in Electronics curricula :


СургуульWhy parallel computation in SIT curricula?

2010-2011

Matlab simulation (Landauer-Buttiker formalism, SC Iteration, NEGF,…)

2011-2012

First ab-initio simulation in Siesta (Linear-scaling DFT )


СургуульNanoelectronics development Nanotransistor development:

- Experimental

- Computational

Nanotransistor modeling :

- physical process simulation (ab initio,…)

- characteristic simulation (NEGF approach,…)

- TCAD (Silvaco, Synopsis…)


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Simulation and Method Solving the 3D Poisson equation for the

electrostatic potential

Solving the 2D, 1D Schrodinger equations

Solving the coupled or uncoupled nonequilibrium Green function (NEGF) transport equations for the electron charge density.

Numerical simulation of ID


СургуульSimulation and Method: Matlab

The computed log(ID) vs. VG transfer characteristics of a ballistic SNWFET with a SiO2 insulator layer (k = 3:9 and 25)


СургуульSimulation and Method: Matlab

The computed ID vs. VD common source characteristics of ballistic SNWFET with a HfO2 insulator layer (k = 3:9 and 25)


СургуульNanoelectronics development

Many electron problem:

Quantum Chemistry (Hartree-Fock, CI…)

Quantum Monte Carlo

Perturbation theory (propagators)

Density Functional Theory (DFT)

Very efficient and general

BUT implementations are approximate and hard to improve (no systematic improvement)


СургуульSiesta and parallel processing in SIT Nano transistor (device physics) – atomistic models

Gabriele Penazzi, PhD dissertation Rome, June 2010.


СургуульSiesta and parallel processing in SIT

Nano transistor (device physics) continuous models

Gabriele Penazzi, PhD dissertation Rome, June 2010.



Atomistic models:

- Siesta

- GROMACS

- VASP

- CASDEP

- ABINIT …



Siesta Methods:

- Born-Oppenheimer (relaxations, mol.dynamics)

- DFT (LDA, GGA)

- Pseudopotentials (norm conserving,factorised)

- Numerical atomic orbitals as basis (finite range)

- Numerical evaluation of matrix elements (3Dgrid)


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Siesta and parallel processing in SIT

Pseudopotential of Si:


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Carrier charge:


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Bulk Si


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Used UNICORE 6


СургуульConclusion

Double site configuration


СургуульConclusion

Performed calculations in double site UNICORE GRID site:

- Matlab code of NEGF

- Feature selection Matlab code

- DFT Siesta code

- Band structure Siesta code


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Conclusion

Future plan:

- Development of cluster

- Testing of Torque

- Repeating our calculations

- Creation of education site map in UB


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Thank you for attention

A@Q?

some features of creating grid structure for simulation of nanotransistors

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