smt dec2010 final
TRANSCRIPT
December 2010 • SMT Magazine 1
EnginEEring solutions for pcb manufacturing
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Measurement of Pressure Distribution During Encap-sulation of Flip Chips p.40
Track & Trace: Hologram Leading the Way to Added Value p.48
Innovation in Electronics: The Intersection of Printed Electronics and PWB As-sembly p.52
printing difficult applications
Get On Board
TheFinelineexpress!
December 2010 • SMT Magazine 3
In this issue, we shine a spotlight on the challenges and solutions related to printing increasingly miniaturized, complex applications.
In our cover story, Printing Difficult Applications, Michael Yu, senior manufacturing engineer with Nexlogic Technologies, explains how mixed technologies and ultra-fine features can wreak havoc on your solder mask processes. Yu also details some powerful methods for preventing ineffective paste release, partially exposed pads and traces, and unacceptable final assembly quality. Numerous stencil materials and solder pastes are examined, along with techniques to help you even the odds when the going gets rough.
Publisher Ray Rasmussen provides a preview of the upcoming “IPC Conference on Printed Electronics: What Does it Mean for the Printed Circuit Board Industry?” The conference, scheduled for January 18-19 in Irvine, California, may turn out to be a major wake-up call for our industry. PE technology has the potential to be massively disruptive to the electronics industry, yet most traditional PCB and PCBA makers seem to be hoping the whole thing just goes away.
But ignoring PE may be hazardous to your company’s future. At this conference, you’ll hear from early adopters who are already using PE to build PCBs at a much lower cost point than traditional PCBs – lower, even, than PCB makers in Asia. Speakers will also cut through the hype, detailing the limitations of PE.
In this month’s Feature Video section, you’ll find the following crucial interviews:
Dr. Bob Hubbard, Director of Technology Development at Lambda Technologies, explains why increasingly smaller assemblies have led to the use
of microwave curing for flip-chip underfills.
Sue Mucha of Powell-Mucha Consulting, an expert in supply chain management, discusses some of the challenges she’s seeing in risk mitigation, as
well as some possible ways to eliminate any unpleasant surprises.
The SMT 2011 Editorial CalendarYou’re no doubt busy getting ready for
2011 – the Year of the Rabbit, in case you’re keeping track. To help you plan ahead for 2011, we have just released the official SMT Magazine 2011 Editorial Calendar. We’ll be bringing you coverage of a variety of topics throughout the year, including the hottest market segments, medical electronics, military and aerospace, advanced packaging, high-rel issues, and much more. Don’t miss a single issue.
Have a great holiday season!
Welcome to the December 2010 issue of SMT Magazine
December 2010 • SMT Magazine 3
4 SMT Magazine • December 2010
Contents
December 2010
volume 25
number 8
www.smtonline.com
Feature StoryPrinting Difficult Applicationsby michael yu
FeatureD viDeoSThe Science of Curing Flip-Chip Underfills with Microwave
No Surprises: Trends in EMS Risk Mitigation
columnSIPC’s First Printed Electronics Conference by ray rasmussen
Part 1: Defining Package Variationsby vern Solberg
It’s Never Perfect from the Startby barry matties
The Value Management Project, Part IIby Stephen J. marshall
extraSLetters to the Editor
SMTOnline Highlights & Ad Index
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51
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10
71
engineering
SolutionS
For pcb
manuFacturing
articleSCopper Tin Intermetallic Crystals’ Role in Formation of Microbridges Between Leads, Part II by Jeff Kukelhan
Measurement of Pressure Distribution During Encapsulation of Flip Chipsby Dr. thomas Schreier & Jeffery g. Stark Track and Trace: Hologram Leading the Way to Added Valueby ian lancaster
Innovation in Electronics: The Intersection of Printed Electronics and PWB Assemblyby Joel yocom & Jim Davis
ShortSCTS Boosts Manufacturing Capacity in Mexico
Henkel’s Dr. Brian Toleno Joins SMTA Board of Directors
QPL Announces ITAR Registration
IPC, NPL Host Soldering and Assembly Defects Webinar
Incap India Announces Organizational Changes
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40
48
52
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35
39
47
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6 SMT Magazine • December 2010
news on the subject as it relates to our industries, there are tons more that we don’t. Most of these technologies and markets are outside of the industry as we know it (much of it in solar). And, although there are opportunities for fabricators and assemblers, some of those technologies might be best left to the larger players. But there are real opportunities, today, for smaller fabricators and assemblers.
You’ll hear from people using PE technologies today to build PCBs at much lower costs than traditional circuits, well below the lowest prices of our Asian competitors. You’ll hear from PCB suppliers developing materials for the PE industry, as well as others using PE technologies to deliver new products for PCB fabrication. We’ve invited an assembler to talk about efforts in partnership with a company making PE circuits, now.
Our keynote, Matt Timm of Soligie, will give us a “reality check” on the PE industry. Yes, there’s a lot of hype about PE: Timm will help us filter fact from fiction. Soligie is a contract manufacturer in the PE space and will certainly help us understand the opportunities PE has for the industry. Soligie comes to PE via the printing industry, which is quite telling.
We’ll hear from DARPA, Boeing, PARC and others. What are they are working on and why are they looking to PE for solutions? New
Last April, several of us met at the APEX show to discuss printed electronics (PE) and, in particular, how to help our industries become more aware of the opportunities afforded us by this new, exciting and emerging technology. At that meeting we decided to take steps to elevate PE within the PCB industry to help fabricators and assemblers gain a better understanding of the opportunities PE presents and we needed to show the industry what others are doing: What’s the status of the PE industry today? Where does it fit with PCBs? Where doesn’t it?
After APEX, we presented the idea to IPC’s Tony Hilvers, who completely supported the creation of an “exploratory” conference designed to start the PE ball rolling for our industry. Over the last six months, IPC’s Susan Filz has been working to put the pieces together for the “IPC Conference on Printed Electronics: What Does it Mean for the Printed Circuit Board Industry?” The conference is scheduled for January 18-19, 2011 in Irvine, California.
In developing the program, we really wanted to be able to give conference attendees an overview of the PE industry as it relates to PCBs and assemblies. At SMT, we hear about RFID, OLEDs and other up-and-coming technologies all the time. Daily, we publish
IPC’s First Printed Electronics Conference
by Ray Rasmusseni-connect007
THE WAy I SEE IT
What’s it going to take for the traditional electronics packaging industry to develop the systems necessary to offer its customers the efficiencies that pe technologies present? a new January 2011 meeting “ipc conference on printed electronics: What Does it mean for the printed circuit board industry?” will provide much needed answers.
in Summary
8 SMT Magazine • December 2010
Venture Research Corporation will talk about the future of the PCB as it crashes into PE.
What’s it going to take for the traditional electronics packaging industry to develop the systems necessary to offer its customers the efficiencies that PE technologies present? Hilvers will talk about how we can get our customers to accept these technologies. What’s it going to take to put together IPC standards for PE technologies?
Not everyone agrees with me that PE is a threat to the traditional PCB. In an article last year, I talked about my vision of what could transpire over the coming decade. That article lead to an e-mail exchange between me and Dr. Hayao Nakahara. Maybe I was wrong to suggest that PE was such a potential threat to the industry. I still believe, as I did then, that many of the PCBs we make today could be replaced by PE technologies. Even Naka conceded that PE will have an impact. It’s coming. This conference is designed to keep us from getting blindsided.
Another friend expressed quite a bit of frustration over the PE hype in a recent article. Joe Fjelstad, President of Verdant Electronics, says: “It is good to be enthusiastic and printed electronics definitely seem worthy of a good measure of enthusiasm, but that enthusiasm should be grounded in facts and thoughtful reasoning.” Comments like his are exactly why
we’re meeting. For us, as an industry, to be able to identify real threats and opportunities (I see PE as more of an opportunity than a threat), we have to come together. We have to hear from those on all sides of the issue.
I’m an enthusiastic supporter of PE-PCB technologies and truly believe PE technologies can open windows of opportunities for us all going forward. If we’re involved now in developing those solutions, we’ll have an opportunity to play. If not, some other industry (like printing) will develop the processes, materials, equipment and standards and we’ll be left with the crumbs.
Please join us. The IPC has put together a world-class program, which will help us all gain a better understanding of the opportunities this exciting technology can offer. For more information or to register, click here. SMT
THE WAy I SEE IT continues
“Joe Fjelstad, President of Verdant
Electronics, says: “It is good to be
enthusiastic and printed electronics
definitely seem worthy of a good measure
of enthusiasm, but that enthusiasm
should be grounded in facts and
thoughtful reasoning.” Comments like
his are exactly why we’re meeting.
”
ray rasmussen is the publisher and chief editor for i-connect007 publications. he has worked in the industry since 1978 and is the former publisher and chief editor of CircuiTree Magazine. ray can be contacted at: [email protected]
For more information on this subject visit us online at: www.smtonline.com
10 SMT Magazine • December 2010
that of traditional aluminum-based PCBs and at a lower cost.
We do not know if this technology will ultimately succeed. There are many other requirements for that, but it is an example of a competitive technology helping the irremediable decay of our industry; and it could be sooner than expected. I still am in denial; I do not want to believe that the end is near.
All the best,
Fernando Sanchez MicropressSao Paulo, Brazil
____________.____________
Holden Makes His Opinion Known
Ray,I see that you are still a good editor,
shaking things up a bit with your opinion about how “The old PCB may be on its way out!”
Well, I agree with all of you! The only thing we can depend on is change! Everyone has a good point, but like the story about the three blind men touching different parts of the elephant, it all depends on your perspective.
Density and miniaturization will decrease the size of the PCB used in electronics, but the functions and applications will continue to grow. Our growth will never be as large as the semiconductor or embedded s/w, and we might even begin to decline in square meters
Letter Re: IPC Executive Summit: The End in Sight Hello Ray,
It’s been a long time since we were in command of the PCB business. Or, at least, we had the illusion of being in charge, at one time. No more.
I read with usual interest your “The Way I See It” in SMT Magazine and wanted to tell you our brief story with HB-LED PCBs. Unfortunately, I don’t think that lighting LEDs will “save” the industry.
Since 2009, we’ve been watching this “new market” hoping it might extend the life of the PCB era a bit longer. Since the Occam Process meeting in October 2007 we’ve “known” the end of PCB will come.
Due to the particular conditions of this country [Brazil], we decided to look for innovations. At first we started to make our own laminate for HB-LEDs since our aluminum prices are similar to those in China. Actually, the cost was less than the FOB price quoted by the Chinese. But our strong currency allows importations from China to compete in several steps of the production chain, which caused local PCB manufacturers and lighting fixture manufacturers to instead buy their aluminum boards from China.
In short, we ended with a patent application (USPTO) for a process that interconnects HB-LEDs without a traditional PCB made from a laminate. We used a ceramic coating applied directly onto the aluminum base. We made several lamps that are working fine with half the weight of traditional designs at one quarter of the size with maximum thermal efficiency. It is totally recyclable. It uses a less complex manufacturing cycle than
Letters to the editor
iN SUMMArY
____________________
For more go to page 68, or click here.
in last month’s issue (page 6), editor ray rasmussen wrote about the alarming information he encountered at the iPC executive Summit. he questioned if the end of the PCB was in sight and readers responded in a big way.
December 2010 • SMT Magazine 11
12 SMT Magazine • December 2010
Solder Paste Printing ChallengesGreater numbers of PCBs are populated
with mixed technologies, combining 0.4 mm and 0.5 mm pitch technology. Flip-chip, CSP, WLP and BGA packages co-exist on the same board as these technology developments continue. Also, some traditional SMD connectors require thick solder paste. Solder-charge SMT multiple-pin connectors also require thick solder paste. But 0.4 mm pitch CSP and small bump flip-chips need a thinner stencil to achieve a higher area ratio by acquiring sufficient solder paste release.
Flip-chip and fine-pitch CSP packages normally use no-solder-mask defining (NSMD) pads because there is a large registration tolerance (+/- 3 mil) for the solder mask. If a paste printing process is used, the tendency
by Michael yu, Senior Manufacturing Engineer nexlogic technologieS, inc.
Successful ultra-fine feature solder printing has become difficult and more challenging with the continuing trend toward miniaturizing electronic assemblies, thus posing printing issues for difficult applications. at the same time, oems are demanding not only increasing reliability of their high-density pcb applications, but also high, near 100% yields, a crucial requirement in today’s highly competitive markets.
in Summary
printing difficult applications
December 2010 • SMT Magazine 13
toward short defects becomes greater. Also, there is a major tendency toward opens for small-bump CSPs and flip-chips (including WLPs) due to the thickness of the solder mask layer, plus most pick-and-place (P&P) machines don’t have a force-control capability. This means placed chips are not evenly placed into paste during the P&P process. Chip weight alone is not sufficient to overcome the solder-paste surface tension during the reflow stage, resulting in open solder defect of one or fewer bump-joints.
Solution and LimitationsNormally, most 0.5 mm pitch fine-pitch
CSP/flip-chip/WLP/BGA components have 9.8 to 11 mil pad diameter. Mask quality and registration are stable and improved due to the large gap. A 2-mil stencil aperture size can be increased (from 11 mil to 13 mil) to achieve a 13 mil stencil aperture (round). This means a 0.81 area ratio for the 4-mil thickness stencil.
Most 0.4 mm pitch fine-pitch CSP/flip-chip/WLP/BGA components have difficulties in getting effective paste release and acceptable final assembly quality. A 9.5-mil pad size and 6.25-mil gap don’t provide enough room for a stable mask attachment, and safe clearance between the two pad paste depositions. Here, stencil aperture cannot be increased to enlarge area ratio. Due to the +/- 3-mil mask registration, there could be some partial exposed trace/pads. Sometimes, as a worst case, mask protection is lost. It’s best to use a 3-mil thick stencil with 10-mil round aperture and 0.83 area ratio.
The popular 100 µm (3.9-mil) diameter pad of 100 µm bump (CSP/WLP/flip-chip) poses a difficult situation for paste releasing (for 3-mil stencil, area ratio is 0.33). This very small pad is not designed for the paste process. The best approach here is to use a flux-only process with force-control P&P machines to avoid the stencil printing process. For the solder paste
14 SMT Magazine • December 2010
process, you should use 8-mil pads (200µm bump diameter) for CSP, WLP and flip-chip. Therefore, 3-mil stencils with an 8-mil circle aperture can be used (area ratio 0.67, no aperture size increase).
There are three options for the stencil materials. The chart below shows the characteristics of each stencil material. Experience tells us to use new stencil material (instead of using a standard 301 stainless A) to improve paste-releasing capability. An alternative solution is to use 2-mil stencils with 8-mil circle aperture (area ratio 1.00, no aperture size increase). Also, it’s important to prepare a couple of 2-mil stencils for a large quantity production job because the 2-mil stencils have short working/operational life.
For prototype jobs with frequent layout changes, stencil life is not an issue. For simple boards, area ratio of more than 0.75 can be
easily achieved through stencil foil thickness selection. For 0.4 and 0.5 mm pitch mixed complex jobs, 3 or 2-mil stencils cannot be used due to insufficient solder deposition on the connectors and non-fine-pitch components. You can do some aperture modification by increasing the size and changing the circle to a square shape with rounded corners to get better area ratio paste deposition.
Newer stencil material developments provide the industry with new directions to improve the paste printing process. The traditional standard stencil foil uses mil-grade 300 series stainless steel material regarded as standard material Stencil A. It has a rough aperture wall surface featuring 25 to 30 µm grain size. The laser-cut mil-grade stainless stencil has an 88% paste releasing volume for a 0.75 area ratio. For a 0.66 area ratio, 85% paste releasing volume is recommended.
Table 1: the characteristics of each stencil material.
December 2010 • SMT Magazine 5
16 SMT Magazine • December 2010
Even without a price increase, one can get a new and better stencil (Stencil B). For example, the new 304 series stainless steel is specifically designed for laser-cutting and solder paste stencil printing. Called a “fine-grain material,” it has 9µm grain size. The laser-cutting fine-grain stencil has an 88% paste releasing volume for a 0.62 area ratio. For a 0.57 area ratio, 85% paste releasing volume is achievable.
With a price premium you can get the best stencil, Stencil C, with a smooth aperture wall surface. This newly developed ultra-fine-grain material features 2 µm grain size. This is 304 series stainless steel specifically designed for ultra precise laser cutting and solder paste stencil printing. This laser-cutting ultra-fine-grain stencil has an 88% paste releasing volume for a 0.55 area ratio. For a 0.51 area ratio, 85% paste releasing volume is achievable.
The new stencil material saves time and money and delivers significant benefits in comparison with 300 series stainless steel stencil including:
1. Flatter Stencils – allows for more accurate printing with improved registration and print accuracy (including paste height control and paste releasing volume control).
2. Harder Surface – provides a more durable stencil increasing cycle time between stencil changes, as well as increasing stencil life for the thin stencils (2 mil and 3 mil).
3. More Uniform Surface Aspect – allows for higher stress relaxation properties so stencils that are laser cut or etched will have more consistent results.
4. Uniform Fine-Grain Structure – yields smoother aperture walls, better paste releasing and will yield better results from zero cutting when step etching is involved.
5. Superior Fatigue Strength –
Exceptionally Smooth Surface and Elevated Wear Factor – stencils that ordinarily would require electroforming can now be laser-cut on the new stainless steel saving time and money.
6. Super Fine Crystal Grain – it is achieved by reducing carbon which moderates re-crystallization behavior and prevents the formation of Cr23C6 (Chrome-carbide – seen
as smut and rust on the surface, which prevents formation of a passivation layer); adding Nitrogen which gives solid solution strengthening; and the addition of Niobium which yields ultra-fine-grain size and provides
secondary protection against the formation of Cr23C6.
7. Greater Hardness and Longer Cycle Life – super fine crystal grain, discussed above, results in a huge increase in the number of crystal grains in the stencil and thus the number of crystal grain boundaries. Since energy is absorbed at the grain boundary, the increase in grain boundaries yields higher energy absorption. This provides a stencil material with hardness greater than 430 HV and has a longer cycle life before failure in the applications.
Other Contributing Factors to Improved Printing Process
1. Three standard global fiducial marks on the three corners of a PCB would help achieve accurate printing paste registration and accurate component placement.
2. High performance paste printer with wet print deposit accuracy and repeatability ±25 microns (±0.001”) at six sigma, process capability index (Cpk) of greater than or equal to 2.0. The higher the Cpk, the lower the variability with respect to the process specification limits. In a six sigma process, the Cpk is greater than or equal to 2.0.
3. Tightly controlling the uniform thickness of the stencil foil is extremely
“The new stencil material saves time and money and delivers significant benefits in comparison
with 300 series stainless steel stencil.
”
18 SMT Magazine • December 2010
important. The supplier provides ultra-fine-grain stencil material with ±0.2 mil across the foil surface. This thickness tolerance directly impacts paste height control tolerance and final quality of printing.
4. Tightly controlled surface tension of framed stencil is much better than foil stencil or universal frame-less foil. It provides aperture position accuracy as well as high paste registration accuracy. For a used stencil, check the foil tension before printing to avoid solder bridging and insufficient solder defects.
5. Fab warpage (twist and bow) will cause a paste printing quality problem. It’s suggested that 0.75% (7.5 mil per inch board length dimension) be used as max warpage tolerance for standard products. For high end products, 0.5% should be used as max warpage tolerance.
6. For all BGA, CSP, WLP, flip-chip, LGA and multiple-row QFN components, 100% post-reflow x-ray inspection should be performed and all images saved with the board serial number and reference locations. All defect information should be saved, and the 100% post-placement x-ray inspection used to check alignment and solder bridging before reflow. Also, new chips should be used to do rework for any soldering defects since bumped CSP/WLP/flip-chip components cannot be re-balled with the traditional BGA re-balling technology.
Post-printing, a 100% visual inspection for paste deposition condition is very important. For high volume production, AOI is used as a tool to do this inspection before the P&P process. For any paste printing defects, touch-
Figure 1: Solder-charge high-density connectors are a big challenge for soldering quality.
20 SMT Magazine • December 2010
up can be performed with a simple bamboo stick tool. This way, low area ratio and standard 4 mil stencils can be used to get good yield for 0.4 mm and 0.5 mm pitch mixed assemblies.
7. Compared to type 3 standard solder paste, commercially available type 4, type 4.5 and type 5 solder paste will yield better results for the ultra-fine-pitch, high mixed complex assemblies (0.4 mm and 0.5 mm pitch). With those types of pastes area ratio requirements can be reduced, and thus allows the use of a 4 mil stencil to provide good paste printing results and final yields for highly complex boards.
8. No-clean solder paste is better than water-soluble paste for the ultra-fine-pitch SMD components and complex boards (0.4 mm and 0.5 mm pitch). It also prevents the cleaning process issues and problems because of the small gap under ICs, which doesn’t allow the complete cleaning of corrosive flux residues and the chip-out problem during the washing process.
9. Solder-charge high-density connector is the big challenge for soldering quality, Figure 1. While regular BGA components have spherical solder balls attached to the leads and pads, their ball pitch is a constant and the center of the pad is the center of the solder sphere; the solder-charge-style connectors employ the unique solder charge design,
thereby making it a difficult application to work with.
10. Unlike the uniform ball-grid arrangement of BGA components, solder-charge blocks, Figure 2, are offset from the center making the leads appear to be in pairs. They appear as two joints with pitch minus (solder-charge width plus lead width) and the next two joints with pitch plus (solder-charge width plus lead width), as shown in Figure 3. The solder-charge block orientation alternates from row to row; solder-charge blocks are positioned back to back.
11. The center of the connector pads is not the center of the solder-charge block; instead, it is the center of the non-solder-joint leads. They create a huge difficulty for solder-joint final quality and reliability.
Due to the above reasons, solder-charge connector manufacturers require using 35 mil (0.89 mm) diameter pads and 6 mil stencils. A majority of PCB layout designers are not familiar with this type of device. They use normal 25 to 28-mil diameter pads, usually resulting in bad quality joints and poor reliability in future. Therefore, it is best to follow the connector manufacturers’ requirements to use 35 mil pads.
Using 6-mil thickness stencils may be too thick for the small features of ultra-fine-pitch
Figure 2: Solder-charge blocks are offset from the center, making the leads appear to be in pairs.
Figure 3: leads appear as two joints with pitch minus (solder-charge width plus lead width) and the next two joints with pitch plus (solder-charge width plus lead width).
22 SMT Magazine • December 2010
CSP/WLP/flip-chip components. Therefore, new stencil material should be used to get good yield for the small feature areas with thick stencil.
ConclusionNew stencil material provides a new
method and defined relationship between the area ratio and solder paste releasing volume. Even with the most complex boards, reliable quality and good yield are achieved under the low area ratio of 0.50 to 0.55 and a 4-mil stencil limitation.
With a well-controlled printing process and other SMT processes, flip-chip/CSP/WLP paste-printing defects can be prevented, while achieving the same yield as the flux-only process yield. This helps to eliminate the high-cost and time-consuming under fill process. Using two printers and two stencils also avoids large capital expenditure: One printer with a thin stencil to print the miniature components and a second in-line printer with a thicker stencil to cover the large solder paste volume requirement.
Through process optimization, a large process window can be found for the most complex assemblies to ensure final quality. At the same time, moderate assembly costs can be maintained to meet OEM customers’ toughest requirements in today’s technically-competitive market and cost-sensitive environment. SMT
michael yu is senior process engineer at nexlogic technologies, San Jose, california, with extensive experience in process control, Smt process and manufacturing resources management. he has been in the emS industry
for over 15 years with work experience at bema electronics and ractron electronics. yu has a bS in mechanical engineering from Shanghai university and an mS in mechanical engineering from South Dakota School of mines & technology.
CTS Corporation, a leading supplier of EMS, is expanding its EMS operations in Matamoros, Mexico. Growing demand for low-cost North American assembly has led to the establishment of a dedicated EMS facility, which will be fully operational by first quarter 2011 and will increase manufacturing space by 55,000 square feet.
The expansion enables CTS to add specialized services, such as conformal coating and BGA re-work, in addition to providing PCB and box build assembly. There will be a new focus on test engineering with the addition of full in circuit and functional testing, as well as test simulation for field operations. CTS will also provide fully-configured, highly-complex level 5 product
integration and direct ship logistics from Mexico for the first time to CTS’ customers’ end-customers. The new site will service customers in the communications, security, medical, industrial and instrumentation sectors.
CTS EMS is a turnkey provider of manufacturing solutions to customers in a range of electronics equipment markets. The company has manufacturing facilities in N.A., Europe and Asia and a broad product offering and a complete range of turnkey services. CTS is a leading designer and manufacturer of electronic components and sensors and a provider of EMS to OEMs in the automotive, communications, medical, defense and aerospace, industrial and computer markets.
CTS Boosts Manufacturing Capacity in Mexico
24 SMT Magazine • December 2010
by Jeff Kukelhanbae SyStemS electronicS, intelligence & Support
in Summaryunless the solder in a reservoir is regularly changed, the dissolved copper reaches a point of saturation, forming orthorhombic cu6Sn5 crystals. Solder drawn from a saturated pot can solidify into joints whose surface finish exhibits many needle-like metallic protrusions. this paper documents failures caused by this phenomenon and identifies the cause of the problem and rework techniques used to prevent its occurrence.
A final experiment using actual solder paste was conducted to confirm the refined hypothesis. It was performed on a scrap Sn63/Pb36/Ag2 solder paste assembly. Excess solder paste was applied to the fine pitch gull wing leads of several components prior to the paste reflow operation. After the reflow operation these paste reflow bridge structures were carefully examined for any signs of Cu6Sn5 crystal growth or protrusion. None were found (see Figure 15). Several of these locations were then reworked using the same soldering iron, flux and desoldering braid previously described in this paper. This time, microbridges formed between several of the reworked fine pitch gull wing leads (see Figures 16 and 17). A handheld multimeter confirmed resistance readings of less than one ohm across these structures.
The reworked assembly and its microbridge structures were subsequently processed through a Microjet Inline Cleaner featuring 20 psi to 40 psi pressure aqueous wash and rinse jets, which replicated and completed the normal production rework process. The lab created microbridges, despite their delicate appearance and brittle constituent structures,
PREVENTING SHORT CIRCUIT SOLDER FAILURES
Copper Tin Intermetallic Crystals’ Role in Formation of Microbridges Between Leads, Part II
Editor’s note: this is part ii of Kukelhan’s article. to read part i, click here.
December 2010 • SMT Magazine 25
survived this washing process intact. The component with the two microbridges shown in Figure 17 was then selected for further analysis. With the aid of an end mill the subject component was cut from the
scrap assembly, along with its solder joints and underlying PWB material. Afterwards the excised component was mounted on an aluminum viewing stub with double sided carbon tape, and its surfaces were sputtered
After the reflow operation these paste reflow bridge structures were carefully examined for any signs of Cu6Sn5 crystal growth or protrusion. None were found.“ ”
Figure 15: Solder bridges made by applying excess Sn62/pb36/ag2 solder paste to the 0.2mm gaps between the 0.5 mm pitch gull wing leads of the inset component. the paste was subjected to a normal reflow profile in a hot air belt oven. the bridges were located in the area outlined in red.
Figure 16: this overall view of the bridge site shown in Figure 15 was taken after the bridged joints had been reworked with desoldering braid and a soldering iron. note that the reworked solder joints on the right are bright and shiny, while the as reflowed joints on the left are somewhat duller.
Figure 17: two microbridges (red and green arrows) that formed while reworking the Sn62/pb36/ag2 solder paste bridges shown in Figure 15.
Figure 18: Scanning electron micrographs of as reflowed solder joints (left) and reworked solder joints (right) from the row of solder joints shown in Figure 16. the red and green arrows highlight the same two microbridges first shown in Figure 17. the yellow box on the left shows the location from which the eDS spectrum in Figure 19 was obtained.
26 SMT Magazine • December 2010
MICROBRIDGES BETWEEN LEADS continues
with palladium. Various features associated with this mounted specimen were then examined via scanning electron microscopy and energy dispersive spectroscopy (see Figures 18 through 25).
The first structures to be examined in detail were the as reflowed solder joints. As expected,
their surfaces were smooth and unbroken by any protruding intermetallic crystals (see Figure 18). However, an EDS spectrum obtained from the solder that formed one of these joints contained 1.7% copper by weight (see Figure 19). This confirmed the hypothesis that the solder paste which had been deposited to form these joints was indeed absorbing significant amounts of dissolved copper from the component leads and PWB lands during the reflow process.
The next structure to be examined was the larger of the two microbridges (see Figures 18 and 20). It consisted of several aligned intermetallic crystals that were bound together on one end by a narrow cone of solder attached to the lateral fillet surface of one of the component’s gull wing leads. The longest of these aligned and bound crystals extended out of the cone and was buried on its other end in the lateral fillet surface of the adjacent
Figure 19: eDS spectrum obtained from the as reflowed solder joint surface outlined by the yellow box in Figure 18. the Sn62/pb36/ag2 solder paste that formed this joint absorbed approximately 1.7% copper (cu) by weight.
Figure 20: Detail scanning electron micrographs of the microbridge highlighted by the red arrow in Figures 17 and 18. this microbridge consisted of several mutually aligned cu6Sn5 crystals, held together within a narrow cone of solder (location a) that merged with the solder joint on the right. the longest of these crystals (location b) extended out of this cone and merged with the solder joint on the left. additional cu6Sn5 crystals can be seen embedded within the thin layer of solder along the edges of the gull wing leads. Several of these are highlighted here with yellow arrows. eDS spectra obtained from locations a and b are shown in Figures 21 and 22, respectively.
Figure 21: eDS spectrum obtained from location a in Figure 20. the combination of elements present at this location confirmed the initial visual assessment that this site consisted of a subsurface bundle of cu6Sn5 crystals covered by a thin film of Sn62/pb36/ag2 solder.
28 SMT Magazine • December 2010
MICROBRIDGES BETWEEN LEADS continues
gull wing lead. EDS spectra were obtained from two locations on this microbridge. The first location was at the point where several of the crystals were covered by a thin layer of solder near the tip of the cone. The thin layer of solder at this location registered measureable quantities of tin, lead and silver. Even so, this site still registered 20% copper by weight (see Figure 21). The nearby location on the surface of the single protruding intermetallic crystal, where there was no visible layer of solder, exhibited negligible lead and silver peaks. It was composed primarily of copper and tin in a stoichiometric ratio of 6.8 to 5, respectively (see Figure 22), a close match for known intermetallic compound Cu6Sn5.
The third structure examined was the smaller of the two microbridges (see Figures 18 and 23). It consisted of a single intermetallic crystal that spanned the lateral fillet surfaces of two adjacent fine pitch gull wing solder joints. An EDS spectrum obtained from the center span of this crystal was composed primarily of copper and tin, in a stoichiometric ratio of 6.8 to 5, respectively (see Figure 24), again a close match for known intermetallic compound Cu6Sn5.
Figure 22: eDS spectrum obtained from location b in Figure 20. this single crystal surface exhibited virtually no silver (ag) or lead (pb). the copper/tin stoichiometric ratio at this location was 6.8 to 5, respectively, a close match for cu6Sn5. the silicon peak was attributed to the pWb surface (i.e. glass fibers) in the background.
Figure 23: on the left is a detail scanning electron micrograph of the microbridge highlighted by the green arrows in Figures 17 and 18. this microbridge consisted of a single cu6Sn5 crystal that merged into narrow cones of solder on the surfaces of two gull wing solder joints. an eDS spectrum obtained from location a is shown in Figure 24. the micrograph on the right shows a dense cluster of smaller intermetallic crystals found along the edge of one of the reworked gull wing leads. an eDS spectrum obtained from the area outlined in yellow is shown in Figure 25.
Figure 24: eDS spectrum obtained from location a in Figure 23. this single crystal surface exhibited virtually no silver (ag) or lead (pb). the copper/tin stoichiometric ratio at this location was 6.8 to 5, respectively, again a close match for cu6Sn5. the silicon peak was attributed to the pWb surface in the background.
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During the SEM examination of the reworked solder joints it was noted that many of the gull wing leads had fine needle-like protrusions along their lateral edges. These were typically grouped in clusters, and were considerably smaller than the microbridge structures (see again Figure 23). An EDS spectrum was obtained from a single protrusion in one of these clusters. It, too, was composed primarily of copper and tin (see Figure 25) in a stoichiometric ratio of 6.6 to 5, respectively. These structures were essentially outcroppings of Cu6Sn5 crystals. In a parallel study conducted on production hardware with real solder paste bridges, a production operator working on an Sn63/Pb37 paste assembly produced more intermetallic crystal clusters along the edges of reworked fine pitch leads than actual microbridges (see examples Figure 26).
The experimental results detailed in Figures 15 through 26 confirmed the mechanism outlined in Figure 14. Fine pitch solder joints and bridges absorb copper from component leads and PWB lands during the paste reflow
process. When the amount of absorbed copper exceeds the solubility limit of the solder in these structures, it precipitates out as Cu6Sn5 crystals, particularly as the solder cools and solidifies. When the bridge is subsequently reworked with a soldering iron and copper desoldering braid, its constituent Cu6Sn5 crystals continue to grow and concentrate as molten solder is drawn from the bridge site. A single large crystal, or several smaller entangled crystals, can then lodge between the two fine pitch leads as the last of the molten bridge solder wets onto the desoldering braid. It is these lodged crystals that form a microbridge.
Attempts to reflow sample microbridges with a soldering iron and flux alone proved futile. A literature search soon revealed why. The melting point of Cu6Sn5 intermetallic compound is 415°C, far above allowable rework soldering temperatures4. Clearly, a different approach to reworking fine pitch solder bridges was needed.
The need for a more suitable rework method was driven home by a customer return. A microbridge on an assembly from this return unit caused a short circuit condition between two fine pitch component leads. This condition had gone undetected because the in-house test process did not
Figure 25: eDS spectrum obtained from the site outlined by the yellow box on the cluster of intermetallic crystals shown in Figure 23. the metallic crystal that generated this spectrum was composed primarily of copper and tin, and relatively little silver (ag) or lead (pb). the copper/tin stoichiometric ratio at this location was 6.6 to 5, respectively, again a close match for cu6Sn5. the silicon peak was attributed to the pWb surface in the background.
Figure 26: actual production Sn63/pb37 solder paste bridges located in the 0.2 mm gap between adjacent 0.5 mm pitch gull wing leads (left). the same locations outlined on the left are shown again on the right after being hand reworked by a production operator with a soldering iron and desoldering braid. clusters of cu6Sn5 crystals can be seen along the edges of both component leads.
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MICROBRIDGES BETWEEN LEADS continues
simultaneously activate the signals associated with the two affected component leads. The customer application, however, did enable both signals simultaneously, and the ensuing signal interference resulted in a failure. While the individual test condition for that particular lead pair was quickly identified and corrected, it soon became apparent that identifying a similar test condition for every adjacent fine pitch lead pair on every assembly would not be feasible. The more practical approach was to prevent the formation of microbridges in the first place. Recommended Rework Method
Taking into account the mechanism outlined in this paper, the obvious way to prevent microbridges is to prevent the formation of their precursor structures: solder paste reflow bridges. This is certainly the leanest approach, and one that is the main thrust of ongoing process improvements at BAE Systems’ Fort Wayne facility. However, those specific efforts lie outside the scope of this paper. Within the context of this discussion, a reliable rework method is needed for solder paste reflow bridges. In a low volume, high mix, high value assembly operation, reflowed solder paste bridges are a process problem that occasionally must be dealt with. Without a reliable rework method for paste reflow bridges, the formation of microbridges is a definite risk. Once formed, a microbridge can slow the progress of an expensive electronic subassembly through in-house test and unit build processes. Ultimately, as already demonstrated, a microbridge can delay hardware shipments and cause field returns.
The rework method developed out of this investigation takes advantage of the peculiar mechanism that results in the formation of Cu6Sn5 crystals in the first place: the solubility limit of copper in tin/lead and tin/lead/silver solders. Clearly, if the amount of dissolved copper in the reflowed solder paste can be kept low, Cu6Sn5 crystals will not form and therefore cannot be left behind to form a microbridge during the rework process. As will be outlined later, one way to limit the
dissolution of copper is to utilize components and PWBs with solderable base metal surfaces of some material other than copper. That being said, if a fine pitch component and its PWB lands both have pure copper finishes, then the solder bridge that joins them will almost certainly be saturated, if not already supersaturated, with copper and Cu6Sn5 crystals after a typical paste reflow process. Thus, the key to reworking a copper saturated fine pitch solder bridge comes down to dissolving its Cu6Sn5 crystals and diluting its dissolved copper. While the method that has been derived from this premise is somewhat unconventional, it has produced satisfactory results.
As outlined in Figures 27A and 27B, the first step is to add several drops of liquid flux to the site, after which a soldering iron is applied to the PWB lands of the affected fine pitch solder fillets, while rosin cored solder wire of the appropriate alloy is used to add
Figure 27: to rework a fine pitch solder bridge (a), use a soldering iron to melt the bridge and add in fresh solder from solder wire of the appropriate alloy (b). Keep the fresh solder and the bridge solder molten for several seconds to allow time for both to mix. the fresh solder will dissolve any cu6Sn5 crystals in the bridge solder. the added solder should roughly double the size of the bridge (c). afterwards, apply desoldering braid directly to the bridge site with the tip of the soldering iron.
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MICROBRIDGES BETWEEN LEADS continues
even more solder to the bridge site. On first glance, this step may seem counterintuitive. However, it serves a key purpose. Adding fresh solder to the bridge site dilutes the copper in the bridge material and allows any Cu6Sn5 crystals to enter back into solution. The affected fillets and bridge solder should be kept molten just long enough to roughly double the volume of solder in the solder bridge (Figure 27C). Once this has been accomplished, desoldering braid should be pressed against the bridge site with the tip of the soldering iron (27D). After the excess solder has been melted and drawn off, fresh solder can be added back to the individual fine pitch solder joints as needed, again using the soldering iron and solder wire of the appropriate alloy. If executed properly, this rework method should eliminate the paste bridge without creating a microbridge (Figure 28).
The rework method for an actual microbridge, should one form, follows the same regimen. Fresh solder is first added to the site of the microbridge. The added solder should be kept molten for a few seconds to allow time for the Cu6Sn5 crystals in the microbridge to again dissolve and enter back into solution. Only then should the excess solder be drawn off with desoldering braid as described above.
It is also possible, as already mentioned in this paper, to mechanically remove an existing microbridge structure with the tip of a fine test probe or dental pick. Cu6Sn5 crystals are brittle and easily broken. However, this particular rework method concedes the formation of the microbridge in the first place, and it assumes that the microbridge will either be visually identified at the point of rework, or detected during a subsequent electrical test.
Because of their extremely small size, and the difficulties associated with evaluating every adjacent fine pitch lead pair on an electronic assembly, neither method of detection is guaranteed. Furthermore, electrical detection is frequently accompanied by long production delays, as the affected subassembly must be pulled from a test stand, or worse yet a finished unit, and rerouted back to a repair station. Additionally, it is one thing to know that a short circuit condition exists on an assembly, quite another to physically isolate it to a nearly invisible microbridge on the basis of a single fault code in a subassembly or unit test report.
Mechanical removal methods also entail certain risks. Fine pitch gull wing leads are mechanically delicate and easily damaged. Inserting any type of tool between them can cause lead damage, and broken microbridges produce even smaller conductive particles that need to be removed from the reworked assembly. For these reasons, production operators were instructed to rework solder paste reflow bridges in a manner that minimized the risk of microbridge formation. They were also advised to rework actual microbridges using the soldering iron method described in the preceding paragraph. Additional Observations
While developing the basic soldering iron rework methods outlined in the preceding section, the following related phenomena were noted:
• Microbridges are more likely to form if the intent of the rework operator is to draw off just enough solder to break the solder paste bridge. A better technique is to draw off all of the available solder from the bridged joints,
Figure 28: the reworked fine pitch solder bridge site from Figure 27. no microbridges formed during the rework process.
December 2010 • SMT Magazine 33
34 SMT Magazine • December 2010
MICROBRIDGES BETWEEN LEADS continues
and then add back fresh solder as needed with a soldering iron and solder wire.
• The placement of the desoldering braid at the rework site impacts the likelihood of microbridge formation. If the braid is placed near the outside ends of the PWB lands, rather than in direct contact with the solder bridge, microbridges are more likely to form (see Figure 29). Placing the braid and the soldering iron near the end of the PWB land results in the slower draw of molten solder from the paste bridge, which must wick along the surfaces of the fine pitch joints and the PWB lands. This method of limited solder withdrawal takes longer and, as such, promotes additional copper dissolution and Cu6Sn5 crystal growth. Large Cu6Sn5 crystals are not easily transported within the thin stream of solder that flows along the surfaces of fine pitch solder joints. This contributes to the eventual concentration and entanglement of the larger crystals between the fine pitch leads linked by the ever shrinking bridge site. Applying the desoldering braid directly to the bridge allows the excess solder to be drawn off rapidly, leaving less time for Cu6Sn5 crystal growth and little opportunity for large crystals to lodge between the fine pitch leads.
• Fresh desoldering braid is less prone to produce a microbridge than braid that has already absorbed some solder (see again Figure 29).
• Rework is best performed at magnifications of 30X or higher. Microbridges are difficult to see at lower magnifications.
Mitigating FactorsLead Finish: Copper fine pitch gull wing
leads shed copper atoms into the molten solder that surrounds them during the paste reflow process. Nickel barriers, like those found on component leads with palladium/nickel and palladium/nickel/gold surface finishes, will prevent copper dissolution during the reflow process. As such, component leads with a nickel barrier layer are expected to be less prone to the formation of microbridges during a rework operation.
PWB Finish: As with component leads, printed wiring boards made with a nickel barrier will not contribute copper to their solder fillets during the paste reflow process and will be less prone to form microbridges during a rework operation.
Multiple Reflows: Electronic assemblies made with double sided surface mount printed wiring boards, and processed through two solder paste print and reflow operations, pose a special risk. Fine pitch components and PWB lands located on the first print and reflow side of the assembly will be subjected to an additional exposure to molten solder when the alternate side of the assembly is put through its solder paste reflow operation. This second reflow process essentially doubles the contact time between fine pitch copper leads and printed wiring board lands and their molten solder joints, which in turn promotes additional copper dissolution, and even more Cu6Sn5 crystal growth. Fine pitch solder bridges located on this side of the assembly, if not reworked between reflow operations, will be especially prone to microbridge formation.
ConclusionA mechanism has been identified that
details the steps by which nearly invisible short circuit paths form between adjacent
Figure 29: lab experimentation indicated that microbridges were more likely to form when the desoldering braid was applied along the extreme outside edge of the printed wiring board lands, and when the desoldering braid was already partially soaked with solder (left). no microbridges formed when fresh desoldering braid was applied directly to the bridge site, in conjunction with the rework method outlined in Figure 28.
December 2010 • SMT Magazine 35
MICROBRIDGES BETWEEN LEADS continues
fine pitch gull wing leads on Sn63/Pb37 and Sn62/Pb36/Ag2 solder paste reflow assemblies. These short circuit paths, which have been named microbridges, are comprised mainly of orthorhombic Cu6Sn5 intermetallic crystals. The crystals initially form during the original solder paste reflow operation, and upon solidification, can be found within the solder joints of fine pitch leads, as well as any reflowed solder paste bridges that might join them. Cu6Sn5 crystals continue to grow and concentrate when exposed to the conditions associated with a common hand rework process meant to remove solder bridges. Under the right rework conditions, a single large Cu6Sn5 crystal, or multiple small Cu6Sn5 crystals linked by a thin film of solder, can lodge between adjacent fine pitch gull wing leads, forming a microbridge that short circuits the affected component terminations.
The hand rework method used to remove fine pitch solder paste bridges was reviewed and modified. The revised method minimizes the chance that a microbridge will form when
hand reworking a solder bridge between adjacent fine pitch gull wing leads on a solder paste reflow assembly. An additional hand rework method was developed that allows for the effective elimination of an actual microbridge should one form while reworking a fine pitch solder bridge. SMT References:
1. Manko, H.J., “Solders and Soldering,” 3rd Ed. McGraw-Hill, New York, 1992, pp. 94-96.
2. Boettinger, W.J., Handwerker, C.A., Kattner, U.R., “Reactive Wetting and Intermetallic Formation,” in The Mechanics of Solder Alloy Wetting and Spreading, Yost, F.J., Hosking, F.M. and Frear, D.R., Ed., Van Nostrand Reinhold, NY, 1993, pp. 130-131.
3. Klein-Wassink, R.J., “Soldering in Electronics,” 2nd Ed., Electrochemical Publications, Isle of Man, British Isles, 1989, pp. 160-161.
4. Manko, H.J., “Solders and Soldering,” 3rd Ed. McGraw-Hill, New York 1992, page 99.
Electronics industry colleagues have nominated and elected Henkel’s Brian Toleno, Ph.D. to the SMTA Board of Directors. His term will span three years, during which time he will serve on the association’s planning and globalization committee.
SMTA Executive Administrator, JoAnn Stromberg, said, “Even though Brian has just now been elected to our Board of Directors, his work with and support of the SMTA for well over a decade has been invaluable. He is always willing to assist with anything, from writing and presenting papers at SMTA events to offering technical advice, Brian is viewed as one of our go-to resources for all things surface-mount materials-related.”
Having worked in the electronics industry since 1998, Toleno brings a depth of experience and breadth of knowledge to his position on the SMTA Board of Directors. Currently, Toleno serves as the Director of Technical Service Engineering for Henkel’s electronic materials group and heads up a team of 32 scientists and engineers worldwide.
“To be nominated and then elected to the SMTA Board by your peers is a humbling and very gratifying experience,” explains Toleno. “I have seen the excellent work the SMTA has done to promote education, foster industry communities and further the advance of the electronics assembly industry.”
Henkel’s Dr. Brian Toleno Joins SMTA Board of Directors
36 SMT Magazine • December 2010
contact variations are compared in Figure 1.
The definition JEDEC has developed for the SON package family is a “no-lead rectangular semiconductor package with metalized terminals on two sides of the bottom surface of the package.” JEDEC defines the QFN as a “no-lead semiconductor package with metalized terminals on four sides of the bottom surface
of the package.” The terminal contacts are located along the edges of the bottom surface of the QFN package body may be arranged in 1, 2 or 3 rows. Typical of the single row QFN, the multiple row QFN package is often a lead-frame-based product. The package assembly is typical of other lead-frame based semiconductors. The die element is first bonded to the top surface of the die attach paddle (DAP) followed by wire-bond termination from the perimeter die-bond pads to the terminal contact features of the lead-frame. The package is completed when the plastic casing is molded around the die and wire-bond area—leaving only the bottom area of terminals and heat spreader exposed for solder attachment. When bottom surface of the die attach paddle (DAP) is exposed outside the mold compound, it serves as thermal transfer feature to conduct heat away from the die element and package body.
As noted, the lead-frame style QFN and SON are encapsulated in a transfer mold
With a goal of reducing packaging costs and addressing the need for miniaturization, several semiconductor suppliers have adopted bottom surface termination configurations. These semiconductor package variations go by such diverse names as Quad Flat Pack No-Lead (QFN), Land Grid Array (LGA), Small Outline No-Lead (SON), Plastic Quad Flat No-Lead (PQFN), Micro Lead Frame Plastic (MLFP™), Micro Lead-Frame Package (MLP™) and many more.
Many of the QFN and SON devices utilize a copper lead-frame for die attach and wire-bond, but, because the lead contacts do not protrude outside the body outline, they are classified as “lead-less.” The terminations can be positioned on two sides, four sides or, with more complex high pin-count applications, multiple rows. Standards for these leadless package families extend a great deal of latitude for the suppliers. The Joint Electronic Device Engineering Council (JEDEC) JC-11 committee members have developed guidelines for manufactures that define several no-lead package outlines that allow several variations for contact geometry, contact pitch and contact location in relation to the outer edge of the package unit (pullback or no-pullback). The no-pullback variation, for example, is when the bottom located contact geometry is positioned even with the outer edge of the package outline. The pullback and no-pullback
the Joint electronic Device engineering council (JeDec) Jc-11 committee members have developed guidelines for manufactures that define several no-lead package outlines that allow several variations for contact geometry, contact pitch and contact location in relation to the outer edge of the package unit (pullback or no-pullback).
Part 1:Defining Package Variations
by Vern Solberg
BOTTOM TERMINAL COMPONENTS (QFN-SON) in Summary
38 SMT Magazine • December 2010
process. Two configurations are used in the mold process. One configuration is designed so that each package profile and outline is defined by the mold tool. The mold tool is designed to furnish a tapered side wall, leaving access to a slightly protruding (no-pullback) copper lead area. This variation can be singulated by punching or saw cutting. The no-pullback terminal allows the contact ends to be flush with the outside edge. The second mold variation furnishes a monolithic encapsulation over all device units requiring saw singulation compared in Figure 2. In the case of saw singulated devices, the ends of the copper lead-frame structure will also remain exposed.
The QFN and SON often qualify as a Chip Scale Package (CSP) because the outline of the package is often only slightly larger than the die element. The market growth for these products is due in part to their relatively small package outline; however, its low manufacturing cost is the key driver that has enabled widespread use of this package. Low package level assembly cost may not automatically translate into overall low board
level manufacturing cost since this package presents a number of challenges. To assist the PCB designer and assembly process engineer considering use of these package families, an Association Connecting Electronics Industries (IPC) task group was formed to develop a new document that furnishes both guidance and end product requirements. The result of the effort is the IPC-7093, a design and assembly process implementation document focusing exclusively on the no-lead package families. In developing the document it was decided to use a common name that would include a wide range of package types: Bottom Termination Component (BTC). This term generically includes all no-lead package types since they require a common approach for design and assembly. Although many of the BTC devices utilize a copper lead-frame for die attach and wire-bond, other package variations adopt multilayer ceramic or organic substrate technology for packaging. The lead-frame type QFN package families are generally furnished with a contact pitch of 1.0 mm or less with a package outline ranging from (but not limited to) 3.0 mm2 to 9.0 mm2.
The IPC-7093 document, although not a complete recipe for all no-lead component
DEFINING PACKAGE VARIATIONS continues
Figure 1: comparing terminal-to-edge variations.
Figure 2: comparing QFn/Son over-mold variations.
December 2010 • SMT Magazine 39
families, identifies many of the characteristics that influence the successful implementation of a robust and reliable assembly processes and provides guidance information to component suppliers regarding the issues being faced in the assembly process. Solder joint reliability remains a concern for the larger outline QFN package. The more traditional SMT leaded packages (SOIC, QFP) have relatively long and somewhat flexible leads. The BTC packages on the other hand, do not have a lead extension and form that can absorb stresses and strains introduced by differing coefficient of thermal expansion between the package and the substrate. This factor, combined with a very low stand-off height and because a growing majority will be joined with a tin-rich RoHS compliant solder alloy, one can expect a relatively shorter solder joint life, especially for products exposed to very harsh environments.
While the lack of traditional leads allows lower package thickness and better electrical and thermal performance, the low standoff height may also trap flux residue. And if the trapped flux is active, the corrosion
potential is increased. Also, the potential for opens in solder joint is a key concern. It is paramount that the package and PCB be very flat to achieve a satisfactory mechanical and electrical interface. In addition, to control the effects of the large surface area of the die attach pad feature during the reflow soldering process, it will be necessary to tailor the solder stencil pattern or alter the mating thermal plane on the PC board. Part two of this column will address land pattern and circuit routing recommendations for SON and QFN package types while part three will focus on PCB designer’s role accommodating the solder attachment process. SMT
DEFINING PACKAGE VARIATIONS continues
vern Solberg is an independent technical consultant specializing in surface mount and microelectronic design and assembly process development. he may
be contacted at (408) 568-3734 or at [email protected].
Quality Production Limited (QPL), a leading EMS company specializing in turnkey manufacturing of high-mix, complex products for military, avionics, industrial, medical and energy management markets, today announced that it has instituted organizational structures and procedures to comply with ITAR regulations governing the export and import of defense-related articles and services. For QPL this entails maintaining tight controls over electronic and paper designs, drawings and specifications, as well as customer furnished equipment.
ITAR compliance will offer QPL a critical ability to secure business with companies whose products are subject to military export controls.
The timing of the initiative is opportune for QPL. In March 2010, the Obama administration established the National Export Initiative (NEI) with a charter to help the US transition from the most severe financial and economic crisis in generations to a sustained recovery.
For more information, visit www.qpl-ems.com.
QPL Announces ITAR Registration
40 SMT Magazine • December 2010
in Summaryhomogenous pressure distribution within the molding cavity is of particular importance for encapsulation of mechanically-sensitive electronic components, e.g., memS sensors, bare dies and flip chips. With the implementation of specially multilayered sensor films, a fast estimation of the pressure distribution within the cavity will be possible.
This article investigates a new pressure measurement method usable during packaging of electronic systems. With pressure-sensitive multilayers, it is possible to determine the pressure distribution on the surface of mold cavities and on various electronic substrates
during packaging processes. The pressure sensitive multilayer is based on commercially-available films, such as Pressurex® [1], which change color directly proportional to the amount of pressure applied.
Homogenous pressure distribution within the molding cavity is of particular importance for encapsulation of mechanically-sensitive electronic components, e.g., MEMS sensors, bare dies and flip chips. With the implementation of specially multilayered sensor films, a fast estimation of the pressure distribution within the cavity will be possible. We successfully used the new sensor concept to investigate industrial transfer molding processes with epoxy molding compounds (EMC). On distinct points of the mold cavity conventional piezo pressure sensors have been applied to measure a time-dependent pressure signal.
by Dr. Thomas Schreier-Alt, FraunhoFer iZm – mmZ, and Jeffrey G. Stark, SenSor proDuctS, inc.
Measurement of Pressure Distribution During Encapsulation
of Flip Chips
December 2010 • SMT Magazine 41
IntroductionThe integration of sensors and actuators
transforms classical IC packaging into a complex encapsulation process of multi-chip modules. Reliability of such a mechanically-interconnected system in a package is determined by the manufacturing conditions: Process induced pre-stresses interfere with strains during field service; process tolerances have an influence on functionality, reliability and lifetime of the system. The manufacturing process window of a multi-chip module can be much smaller compared to a single-chip encapsulation process and development of a robust production requires improved knowledge of material’s behavior and its interaction with process parameters.
The aspect of thermo-mechanical stress during reactive molding is often neglected, as the encapsulation process itself is considered stress free. Even for epoxies with low viscosity during processing, this assumption is often
disproved in practice. The need to monitor forces acting on the embedded electronic parts during the complete polymer encapsulation process is essential considering the spreading usage of MEMS sensors within the automotive industry and their increased demand for signal stability, production tolerances and cost [1]. To meet these demands, microelectronic sensors on chip surface level have been developed [2, 3] providing an accurate insight into the stress distribution. To evaluate the strain distribution within the polymer, optical strain gauges have been adopted by one of the authors [4].
One disadvantage of both active sensors is that the transfer molding process itself can only be monitored if the electrical or optical signals are led through the metal tooling without shorting. To avoid holes or grooves within the tool, Fraunhofer IZM developed a new method to measure cavity pressure based on commercially available pressure indicating films.
With pressure-sensitive multilayers, it is possible to determine the pressure distribution on the surface of mold cavities and on various electronic substrates during packaging processes.“ ”
Measurement of Pressure Distribution During Encapsulation
of Flip Chips
Figure 1: upper mold tool (left), overmolded pcb substrate with film gate.
42 SMT Magazine • December 2010
Multilayered Pressure-Sensitive FilmsThis report illustrates, as shown in Figure
1, the optimization of a transfer overmolding process regarding the pressure distribution on a PCB (1) fitted with electronic components (flip chips, quad flat no leads): An epoxy pellet is inserted and compressed by a plunger (2) therefore forced to melt and fill the cavity through the film gate (3). The results of the pressure-indicating film were verified by a
Kistler pressure sensor mounted flushing with the mold cavity wall, chronologically recording pressure values at the measurement spot (4).
The piezo sensor from Kistler is sensitive up to pressure values of 2,000 bar/200 MPa. The recorded pressure values during transfer molding of flip chips in the MAP-type package reach up to 130 bar/13 MPa. Figure 2 shows the time-dependent distribution of the pressure recorded at point (4). The maximum pressure is constant for ~10s, afterward a slight pressure increase up to 140 bar is recorded according to the exothermal polymerization process that is heating up the polymer, increasing the pressure within the closed cavity. The polymerization is followed by material shrinkage, decreasing the pressure down to 50 bar. Afterward, the mold tool is opened.
Disadvantages of pressure sensors within the mold cavity are the missing areal pressure distribution and the occurrence of unattractive marks on the part’s surface, labeled (5) in Figure 1. For most injection-molded parts, these marks are only a decorative defect. For electronic sensors, these marks can result in severe problems during pick and place mounting or laser labeling. To overcome
MEASUREMENT OF PRESSURE DISTRIBUTION DURING ENCAPSULATION OF FLIP CHIPS continues
Figure 3: experimental setup: a pcb substrate is covered on top or bottom side with a pressure-sensitive film. this sandwich is placed between the top and bottom mold. the epoxy molding compound is injected between the upper pressure film and the top mold.
Figure 2: typical pressure values [bar] plotted against time [s] recorded by a Kistler pressure sensor.
44 SMT Magazine • December 2010
these disadvantages, a multilayer consisting of a pressure-sensing film (sensitivity 100 to 500 bar), an adhesive layer and an isolating polyimide film were mounted on top of the PCB substrate. The isolating film has to fix the pressure film mechanically and prevent it from degassing or swelling (softening temperature of PET resin: 80°C) enabling test durations at 180°C of several minutes without detraction of the sensor function.
By using a standard molding process, the polymer melt has been injected on top of this multilayer, generating pale red color changes on the pressure indicating film. By digital image recording (scanner) and software processing, the different color intensities of red are transformed into clear distinguishable color values. The digitally-processed film shows a very uniform pressure distribution between 120 and 140 bar (Figure 4). Only at the areas far away from the gate does the pressure drop below 100 bar.
Apart from the pressure within the cavity, the contact area between the upper mold wall and the substrate was analyzed. The first observation is that the film left strong red marks directly on the PCB surface (Figure 4, left). Here the film is squeezed between the PCB substrate and the top mold tool. Frictional movements between the two parts rub parts
of the color within the pressure film into the PCB. This effect enabled us to observe directly where the mold tool had contact with the PCB. A uniform and complete contact is necessary to prevent the material from flowing over the substrate (flash).
Also, the contact pressure between the substrate and the bottom mold wall could be measured. At this side of the substrate no polymer is injected, but a uniform pressure distribution is important to avoid damage of the solder pads. Figure 5 shows that all solder pads clearly emerge from the flat PCB surface. As the pressure on top of the pads is lowest, the substrate has only mechanical contact to the mold tool with the solder resist, sited between the rectangular pads. The maximum pressure recorded between the mold tool and the PCB substrate is 300 bar, at the edges of the pressure film. The inner area next to the mold cavity shows lower pressure values ~150 to 200 bar. They are corresponding to the pressure applied by the EMC in the cavity (Figure 4). Because the solder pads have no contact to the bottom mold, the pressure at the bearing are is increased. Conclusions
Pressure measurement films, such as the Pressurex® sensor film used in this study, have been proven to be appropriate sensors to
Figure 4: pcb substrate (front side) with removed molding compound and pressure sensor film. imaging shows pressure drops with increasing distance to the film gate.
MEASUREMENT OF PRESSURE DISTRIBUTION DURING ENCAPSULATION OF FLIP CHIPS continues
December 2010 • SMT Magazine 45
�is calendar was created by the SMT editorial
team, working closely with the board of SMT
Editorial Advisors. If a subject is important to
you and your business, chances are we will cov-
er it. �e content of the 2011 issues will feature
articles relevant to the stated topic. But we also
felt it was important to remain flexible enough
to allow for coverage of timely technical issues.
Our new “In Depth Focus” technology section
in every issue is where you will find special cov-
erage on everything related to Surface Mount
Technology (SMT). Some of the topics we’ll
be covering here are: PCB substrates, solder-
able finishes, component packaging and inter-
connection, solders, pastes and fluxes, screen
printing and liquid deposition, adhesives and
conductive adhesives, component placement,
reflow soldering, wave soldering, selective sol-
dering, cleaning, inspection and test, underfills,
encapsulants and conformal coatings, rework
and repair, quality control and much more.
We are dedicated to providing our readers with
relevant information necessary to educate, in-
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contact us at: [email protected].
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46 SMT Magazine • December 2010
characterize encapsulation of microelectronic systems. The correct characterization of this manufacturing process is essential for all further quality and reliability analyses. The methods and insights presented can be used for the development of stress minimized packaging processes and can be the basis for an enhanced reliability characterization of microelectronic and mechatronic systems regarding polymer encapsulation processes. SMT
References:1. Pressurex Sensor Film, www.sensorprod.
com, Sensor Products Inc. (USA). 2. R. Müller-Fiedler, V. Knobloch,
“Reliability aspects of microsensors and micro-mechatronic actuators for automotive applications,” Microelectronics Reliability 2003; 43: 1085-1091.
3. K. Niehoff, T. Schreier-Alt, F. Schindler-Saefkow, F. Ansorge, H. Kittel, “Thermo-Mechanical Stress Analysis,” IEEE European Microelectronics and Packaging Congress EMPC, 2009.
4. T. Schreier-Alt, F. Schindler-Saefkow, O. Wittler, H. Kittel, “Encapsulation of system in package - process characterization and
optimization,” Proceedings of 2nd ESTC, 2008.5. T. Schreier-Alt, F. Ansorge, H. Reichl,
“Fiber Optic Strain and Structural Health Monitoring in Polymer Electronic Packaging,” Proceedings of Electronic Components and Technology Conference, 2007.
6. Topaq Analysis System, www.sensorprod.com/topaq, Sensor Products Inc. (USA). About Fraunhofer IZM – MMZ
Since its establishment in 1993, Fraunhofer IZM (Germany) has become one of the leading research institutions in the field of electronic packaging and system integration worldwide. The company is dedicated to keeping manufacturers and users of microelectronic products on top of technological developments, covering everything from material selection, simulation, design and interconnection technologies up to the transfer into customers’ production line. Micro-Mechatronic Systems, near Munich, develops technologies for mechatronic systems containing mechanical, electrical and software functions. Advanced research is performed with the focus on novel interconnection and encapsulation methods.
About Sensor Products Inc. Headquartered in New Jersey and
established in 1990, Sensor Products Inc. is a world leader in the manufacture and distribution of tactile pressure sensing solutions. The company’s customized and off-the-shelf products are installed within all of the Fortune 500 industrial companies, as well as thousands of smaller manufacturing firms. Their sensors are used in applications as diverse as tire testing to semiconductor manufacturing and from R&D labs to space missions. Additionally, the company provides in-house and on-site stress and pressure mapping analysis, as well as a variety of regional technical seminars.
For more information on this subject visit us online at: www.smtonline.com
Figure 5: pressure distribution over the bottom side of the substrate and its bond pad, as imaged [6].
MEASUREMENT OF PRESSURE DISTRIBUTION DURING ENCAPSULATION OF FLIP CHIPS continues
December 2010 • SMT Magazine 47
as assemblies get smaller and smaller, parts are being stressed and warpage occurs. microwave curing technology is now becoming a useful technique for flip chip assembly. Dr. bob hubbard, Director, technology Development at lambda technologies, explains why.
The Science of Curing Flip-Chip Underfills with Microwave
Video Interview
by Real Time with...RTW SMTAI 2009
www.realtimewith.com
To keep dedicated professionals up-to-date, IPC and the U.K. National Physical Laboratory (NPL) have teamed up to sponsor a free Webinar on January 27, 2011, a precursor to the hands-on, three-day Process Defects Clinic that will be held at IPC APEX Expo in April.
According to Bob Willis, NPL Process Defects Database Consultant, the advent of lead-free technology made every step of the assembly process more difficult. “Common process problems today relate to the correct selection of printed board materials, surface finishes and soldering materials,” says Willis.
Willis will share common problems, helpful solutions and ways to investigate the root causes. The Webinar will cover the most frequent defect types; how
to monitor process defect levels, record defects for investigation and coordinate process parameters; the most common wave, selective and reflow soldering defects; and how to find defect causes and cures.
To sign up for the free Webinar, visit www.ipc.org/defects-registration.
In April, Willis will staff a free process defects clinic at IPC APEX Exp. Over three days, April 12-14, 2011, the clinic will help identify process problems for visitors and provide suggested solutions. Attendees of the event are invited to bring electronic assemblies for examination or process problems for discussion. Pre-register for free exhibit hall admission to IPC APEX Expo and the on-site process defects clinic at www.ipcapexexpo.org/register.
IPC, NPL Host Soldering and Assembly Defects Webinar
48 SMT Magazine • December 2010
in Summaryin recent times we’ve begun to see the added value role that authentication technology plays in improving supply chain management. ian lancaster, general Secretary of the international hologram manufacturers association (ihma), looks at the versatility and role of “track and trace” hologram technology and what it offers purchasers of electronic components.
Counterfeit electronic components are entering the UK market in alarmingly huge numbers, costing the economy an estimated £1 billion a year according to the UK Electronics Alliance (UKEA). The explosion is driven by many factors: Increased industrial
globalisation, extended supply chains, the growth of brands, weak regional law enforcement and lenient criminal penalties. Moreover, the impact of the internet as a conduit for cheap counterfeit goods and the impact of high-quality reprographic technology have also made it easy and affordable to copy manufacturers’ products.
The rising tide of counterfeit electronic components is causing producers to tighten their grip on the supply chain, so it is not surprising that global OEMs recognise the value that holograms can play in an expanding range of anti-counterfeiting and brand protection applications.
For example, Underwriters Laboratories (UL) is one of the world’s largest safety certification organisations, which has been testing products for public safety for more than a century. The company has issued a
Track and Trace:Hologram leading the Way to added Value
by Ian Lancasterinternational hologram manuFacturerS aSSociation
December 2010 • SMT Magazine 49
Tackling the issue typically requires the marking of individual items with a unique serial number or “license plate”.“ ”
new holographic security label for UL-certified products which is a marked improvement on previous versions.
The features of the new holographic label which can be used for authenticating electronic components include a gold background (to help customs officers and other law enforcement agencies, distributors, retailers and consumers quickly identify the new label), colour shifting ink, a repeating pattern of floating UL symbols with a distinctive burst pattern around one of the floating UL symbols, over which product information and a tracking code are printed, with the die cutting in register to these.
The label also includes additional covert security features, one of which is checked by the UL Authenticator, a special credit card-size device that authorities can use to better identify counterfeit products.
However, the success of holograms doesn’t lie only in its visual product authentication benefits. The technology’s ability to incorporate other data forms and product tracking information is becoming increasingly important, and commercially acceptable, with the added bonus of being able to link on-pack product identification with supply chain management, market enforcement and forensic support services.
New imaging techniques and combinations of other overt authentication technologies with holograms are producing a new generation of optical security devices which combine ease of recognition benefits with significantly enhanced resistance to counterfeits. This enables the identity and distribution of electronic components to be controlled through an expanded system solution involving security authentication features, tracking mechanisms and investigative services.
Grey Market ChallengeIndeed, the rise of the internet and
globalisation is blurring the edges of once geographically-based markets, often impinging upon an organisation’s ability to maintain brand image by selling only in premium channels. The result is a burgeoning grey market economy (where legitimate goods are produced in unauthorised quantities or diverted to a market in which a retailer has no
right to sell them) with exclusive, aspirational, often counterfeit products turning up for sale anywhere in the world from street corner traders in the big cities to small villages in remote provinces.
The grey economy is challenging today’s global market place,
threatening revenue streams, eroding margins, damaging corporate reputations, adding extra stress to distributor and retailer relationships and generally opening up the opportunity for service and warranty fraud on a grand-scale.
Tackling the issue typically requires the marking of individual items with a unique serial number or “license plate”. These can then be tracked through the whole supply chain process from the production line to final point-of-sale.
Armed with the information this facility provides, companies and the anti-counterfeiting agencies that work on their behalf can examine products found in markets on the other side of the world, on the premises of an unauthorised retailer or dealer or on a “fly-by-night” Web site and pose the question: “How did it get here?”, an important first step in beginning to find out what happened and where the problem lies.
Today’s advanced holograms offer beneficial “track and trace” features which can help users generate unique sequential, encrypted or random serial numbers or
“The rising tide of counterfeit electronic components is causing producers to tighten their grip on the supply chain, so it is not surprising that global OEMs recognise the
value that holograms can play in an expanding range of anti-counterfeiting
and brand protection applications.
”
50 SMT Magazine • December 2010
identify and mark products overtly or covertly either via special self adhesive labels or directly onto product using a variety of print technologies.
The identity of individual items can be linked to packaging through a unique code, which in turn can be linked to case ID, pallet ID or container ID. The recording of this so-called parent-child relationship between unit pack, carton and pallet is the beginning of an electronic pedigree, which allows the item to be tracked throughout the many layers of the distribution chain: From the factory and packaging through distribution to the final user.
This type of usage can also be used to capture important events in a product’s life cycle, QA rejects and product returns, for instance, creating a flexible database that offers product history and other business reporting benefits.
Of particular value to component producers (and a strong financial incentive to make the investment in such systems) is the fact that the information generated at this labelling stage can be linked to an enterprise resource planning (ERP) system which links in a single database the data needed for a variety of business functions such as manufacturing, supply chain management, finance, projects, HR and customer relationship management.
The move toward outsourcing the production of goods might be beneficial in terms of reducing manufacturing costs, but it had a major impact upon the control of brand security and visibility. Here, holograms can be integrated into the supply chain security process to enable companies to maintain control of their products from the sourcing of labels or proprietary components to the manufacturing and shipment of finished goods.
Holograms can be integrated with secure web interfaces to help eliminate rogue ordering of products while authorized distributors can pick, pack and ship items in carefully measured quantities to customers with the product’s movements throughout the supply chain tracked and fully documented.
When brand owners or licensors make agreements to enable a third-party to produce licensed products, a security device is typically used to ensure authenticity and to help keep track of royalties. Sequentially numbered anti-counterfeit security labels are supplied to the manufacturing site in exactly the correct number corresponding to the quantity of items ordered.
Here, the role of the hologram is to act as the security device, an integral part of an all round added value information toolkit designed to support the secure ordering, shipping, tracking and control of components. The inclusion of serial number tracking
enables the licensor to search the history of a particular serial number and identify to whom that item was shipped and when.
Conversely, if any items are discovered in the marketplace lacking the security label, it is automatically
unauthorized thus opening the door to prosecution of the vendor for illicit trading.
Future RolesMoving forward, the ability of holograms
to incorporate other data forms and product tracking information will become increasingly important. One example of this is image serialisation, which can become visible to the naked eye when generated by overprinting or using an optical numbering method. Alternatively, it can remain covert and encrypted, requiring a special reading tool or machine to decipher it.
This enables holograms to be used for an
“The move toward outsourcing the production of goods might be beneficial in terms of reducing manufacturing costs, but it had a major impact upon the control of brand security and visibility.
”
TRACK AND TRACE continues
December 2010 • SMT Magazine 51
no one likes to find surprises in their supply chain. Sue mucha discusses some of the challenges she’s seeing in risk mitigation, as well as some possible ways to eliminate any unpleasant surprises.
No Surprises: Trends in EMS Risk Mitigation
Video Interview
by Real Time with...SMTAI 2010
www.realtimewith.com
ever widening range of anti-counterfeiting and brand protection applications, linking on-pack product identification with supply chain management, market enforcement and forensic support services. In this way, the identity and distribution of goods can be controlled through a total system solution involving security authentication features, tracking mechanisms and investigative services.
Unquestionably, one of the keys to the success of holograms since being adopted for authentication purposes in the early 1980s has been the ability to adapt and constantly find new roles. We will undoubtedly see more and more interesting developments for the technology like the ability to personalise holograms, which is just beginning to take off, that will offer far reaching benefits that develop and expand further the role of track and trace.
So, with the seemingly remorseless march of technology and the resolve of governments, anti-counterfeiting agencies and companies around the world to stand firm in the face of international organised crime, as well as the casual opportunist, there’s no reason why the hologram will not continue to evolve, becoming more and more enmeshed in global supply chains and adding value in the process. SMT
The International Hologram Manufacturers Association (IHMA), is made up of over 80 of the world’s leading hologram companies. IHMA members are the leading producers and converters of holograms for banknote security, anti-counterfeiting, brand protection, packaging, graphics and other commercial applications around the world. IHMA member companies actively cooperate to maintain the highest professional, security and quality standards.
For more information on this subject visit us online at: www.smtonline.com
52 SMT Magazine • December 2010
in SummaryWhile some advances in this printed electronics technology have been made over the past 50 years, the last five years has seen an explosion in the development of materials and processes to create unique devices. most forecasts predict that printed electronics will be a $350 billion industry by 2020 and will catch up to the semiconductor industry at about that time.
INNOVATION IN ELECTRONICS: the intersection of printed Electronics
and pWb assembly
The very simplest definition of printed electronics is the use of printing technologies to create electronic devices. Historically, the very first circuit boards were made by using screen printing carbon inks and could be classified as printed electronics. While some advances in
this technology have been made over the past 50 years, in the last five years there has been an explosion in the development of materials and processes, and the application of them, to create unique devices. The result is a level of excitement and optimism that parallels the introduction of the semiconductor. Most forecasts predict that printed electronics will be a $350 billion industry by 2020 and will catch up to the semiconductor industry at about that time.
Very little of this development work has been performed by traditional PWB or EMS suppliers. In a tight economy, these companies have stayed focused on their core business with very little appetite for the risk associated with new technology development, particularly if it is the slight est bit non traditional. That becomes clear when you see how little attention the IPC has paid to the development of printed electronics. That is all changing now as two companies, Conductive Inkjet Technologies (CIT) and BT Manufacturing Company LLC, have joined forces to bring assemblies based on new printed electronics technology to market.
by Joel yocom, conDuctive inKJet technology, and Jim Davis, bt manuFacturing
December 2010 • SMT Magazine 53
Two companies, Conductive Inkjet Technologies (CIT) and BT Manufacturing Company LLC, have joined forces to bring assemblies based on new printed electronics technology to market. “ ”
INNOVATION IN ELECTRONICS: the intersection of printed Electronics
and pWb assembly
Conductive Inkjet TechnologyCIT was founded in 2005 to develop and
find applications for a catalytic ink technology that showed great potential for creating printed electronic products. In a two-step process, CIT developed a catalytic ink that would metalize in commercial electroless plating solutions with a special focus on copper. CIT realized at the time that they could create some intriguing value propositions for the industry. Years of engineering and development work went into the design of the MetalJet 6000i roll-to-roll inkjet printer and the MetalJet 6000p roll-to-roll plating line. Both were commissioned in October 2009 and have been operating continuously in the company’s Cambridge, England, plant since that time shipping rolls of circuit material to a variety of applications.
This first generation line is 300 mm wide with a 282 mm print width as material rolls underneath a fixed print head. The printer takes advantage of the latest-generation Xaar 1001 head with a very reliable 360 dpi nozzle density. With print speeds up to 30 meters per minute and proprietary change on the fly software, this system combines a unique level of speed and flexibility.
The 6000p plating line includes unique features designed to make the operation stable and keep
the footprint small. By using proprietary fluidized bearing technology in the tank, the company is able to put 60 meters of web into a 3-meter-long tank with no moving parts in the plating solution. The entire line is only 4 meters long including on board storage tanks for the plating solution and etchant, which is a mere fraction of comparable plating lines.
When you add it all together, you have a process capable of producing 5 million square feet of thin copper circuitry on polyester films at below world-class pricing that requires a footprint smaller than many offices. That doesn’t really begin to describe the real value proposition created by this process which can be summarized in three words: Digital, additive and continuous.
• Digital means that no tooling is required because the company prints directly from a bitmap file. Not only does that eliminate the cost of tooling, but also the requirement of storage, handling and maintenance. Since the company’s proprietary software supports change on the fly technology, every image can be different. Cycle time for production and prototypes is counted in days.
• Additive means that the company only puts ink and copper down where the design needs circuitry. Nothing is wasted and the process creates a very small environmental footprint. One major impact of this conservation of resources is below world-class pricing.
• Continuous means that the material is transported under the print head at a steady rate and there are no breaks for tooling or repeats. That allows the company to print very long circuits with no special effort or additional labor or cost involved. The company routinely produces 15’ long circuits at no premium in cost.
54 SMT Magazine • December 2010
As with all processes, there are limitations. Right now, the processes support a single-sided circuit technology that is limited to about three microns of electroless copper for the conductors. The good news is that when the below world-class pricing is factored in, this fits perfectly with the type of devices coming out of the printed electronics revolution.
The Challenge: Assembly
While CIT has developed a highly-valued process, the company is not a full service flex circuit manufacturer or assembler, and customers, for the most part, need a functioning device and not a bare circuit. So, the company partnered with BT Manufacturing of Melbourne, Florida, to provide turnkey printed electronic products to its customers.
BT has more than 30 years of contract manufacturing experience and a history of providing high levels of customer satisfaction. BT immediately appreciated the potential that the technology represented and began to invest in the development of the assembly processes required to populate the CIT flex. Within six months, a wide variety of products had been jointly developed and successfully produced.
The MetalJet technology creates a solid copper conductor that represents a solderable surface. The substrate, however, is polyester and has a maximum Tg in the range of 150°C depending on the film. Standard soldering temperatures would be very damaging to the film so processes were developed using tin/
bismuth solder. This product reflows between 145°C and 150°C and is widely available from any major solder supplier.
BT was the first partner to combine this low-temperature solder paste and CIT’s circuit technology into a standard pick-and-place reflow line. The material is handled just like any flex circuit by rigidizing it with a carrier pallet. With some process development work, BT was able to create a reflow profile that didn’t damage the polyester film and created outstanding solder joints.
One of the unexpected benefits of the low-temperature solder combined with thin, smooth copper is the absence of wicking. With traditional SMT soldering, a mask is required to dam the solder and prevent it from wicking down the traces. Since there is no wicking, BT is able to customize the amount of paste that is applied and avoid the cost and process issues of solder mask.
The ResultThe belief that the growth of printed
electronics doesn’t impact the existing PWB and EMS infrastructure is simply short-sighted. These emerging applications are different from traditional products, but only in shape and appearance. At the end of the day, printed electronics products need components mounted and a means of connection. That is really what the industry has been doing for decades. With some vision and boldness, today’s printed electronics companies can become the future leaders of tomorrow.
While there are many examples of successes that have resulted from the CIT/BT partnership,
INNOVATION IN ELECTRONICS continues
56 SMT Magazine • December 2010
a very interesting one is the joint development of a highly-flexible, low-cost capacitive touch sensor platform. Because the substrate is readily solderable, the microcontroller, support passives and even surface mount LEDs are mounted directly onto a single integrated product. By choosing an easily programmable microcontroller and using CIT’s digitally printed substrate, the CIT/ BT team is able to provide low-cost, customized products at any volumes with very little NRE expense.
Printed electronics technologies don’t exist in a vacuum. For the most part, they are nothing but components that need to be part of an integrated product to provide value to customers. The partnership between CIT and BT Manufacturing does just that by taking CIT’s printed electronic circuit technology and turning it into an electronic product that is valued by a growing and energetic customer base. SMT
Incap India, an energy-segment equipment supplier, has annouced the following organizational changes:
Jarmo Kolehmainen, Managing Director and a member of the Group Management Team, is leaving Incap Corporation to accept new duties at another company. The following appointments will take place at Incap’s Indian operations beginning January 1, 2011.
K.R. Vasantha has been appointed Managing Director of Incap Contract Manufacturing Services Pvt. Ltd. Vasantha was previously been in charge of Incap’s Indian manufacturing operations and the
Tumkur factory. Murthy Munipalli has been appointed
Director, Energy Efficiency Asia. He was previously in charge of the sales and marketing of services provided by Indian operations. Murthy continues to manage the design and project management activities in India.
Jari Koppelo, who is in charge of the Business Unit Energy Efficiency Europe, will, as from January 1, 2011, also be responsible for Energy Efficiency Asia.
Kirsti Parvi continues acting as Financial Director and Controller of the Indian subsidiary.
Incap India Announces Organizational Changes
INNOVATION IN ELECTRONICS continues
Joel yocom is a 25-year veteran of the pcb industry and has spent most of his life working with flexible circuits and the development of new products. he has worked for
lpc and parlex and consulted for a number of technology companies. currently he is the business Development manager for conductive inkjet technology and has spent the last several years developing their circuit technology and studying the emerging printed electronics market.
Jim Davis has more than 30 years experience in the con-tract electronic manufacturing arena. his experience includes a wide range of technical and managerial roles while serving
a broad range of industry sectors. Davis is cur-rently executive vice president of bt manufac-turing company llc.
58 SMT Magazine • December 2010
On the other side of the idea spectrum was a great idea that was wildly successful—the Chrysler Minivan. Now celebrating 25 years in the marketplace, the minivan concept has been a huge success for Chrysler. The company still holds a 40% market share in the category. Unlike Coke, Chrysler either got really lucky or just better understood their customer
and their needs—my guess is the latter.Amazon took ownership of an idea that
many thought would be the death of them. At the time of this idea’s roll-out, Amazon was already struggling to be profitable. The company announced that it would offer its customers free shipping. In the minds of the critics, this was a huge mistake.
Amazon initially began with free shipping on all orders above $99, but later modified the offer to free shipping on all orders above $25. The idea worked—the number of orders increased, greatly, and there is no doubt about their profitability today. Not only did the volume of orders increase, but the average dollar value soared right along with it. How many of us have added just one more item to meet the free shipping threshold? Free shipping is still in place today for orders over $25.
So, as you move forward with your next idea, make sure you have the basics covered. As in the case with Amazon, even when it
As companies plan new products, services and strategies, there is usually a tendency to plan for perfection. Of course we want to start with our best foot forward, but perfection is unrealistic. If you look at the beginnings of great ideas, companies and strategies, over a period of time, you will notice incremental improvements.
The thought here is not to get paralyzed in the planning phase —you must to have enough faith in your strategy to get started. That’s not to say you don’t perform your due diligence, but you don’t have to over-analyze it either. If an idea is strong, it shows its strength quickly; if it’s not, you will be able to make that judgment just as quickly. The key is to avoid false starts—do your homework to avoid the big pitfalls.
The world of marketing has its fair share of major false starts. Remember the New Coke product roll-out and marketing campaign? Here is where they missed the mark altogether: The company failed to realize the emotional connection their customers have with The Real Thing. They spent millions on rolling out the “new taste” of Coke. It was only on the market for a few months before the company realized what a horrible mistake they had made. Now, 20 years later, the original Coke taste—The Real Thing—is still going strong as the market-leading soda in a crowded market while New Coke is long gone.
as companies plan new products, services and strategies, if they were to wait for perfection, there would be no new products, services and strategies. this week’s “the Sales cycle” explores idea implementation in our businesses.
It’s Never Perfect from the Start...
by Barry Mattiesi-connect007
THE SALES CyCLE in Summary
60 SMT Magazine • December 2010
seemed counter-intuitive, they understood the motivators for online shoppers and they are fanatical about data. In a business where the margins are tighter, Amazon must find ways to streamline operations and it’s the data that guides decisions. When you are looking at a new idea, let the data help guide you, but also be sure to balance that data with wisdom. Amazon was far from perfect at the start, but who can argue with their success now?
Amazon’s fourth quarter revenue reached $6.7 billion and the company reported earnings of $225 million for that quarter, ended December 31, 2008, compared with a profit of $207 million a year earlier. The total 2008 year revenue reached $19.17 billion—not too bad for a little Internet company that many doubted at the beginning.
Coke, however, also had good data. In their taste tests, people clearly preferred the taste of the New Coke. Unfortunately, the company relied and acted solely on that information. If they had also used business wisdom, the company would have never even considered making such a monumental change. The market was so emotionally attached to the product there really was no reason to introduce a new recipe.
So, as you move forward with your plans, look to others to see what has worked for them. Also look to what has failed—we typically learn more from failures. Always use data, your experience and (most importantly) your wisdom. Remember that not everything will be perfect when you start, but, over time, your idea will evolve into what the market needs and will support.
The first iPod most likely wasn’t what Apple envisioned it to be from a feature point of view. The product started out as a really cool MP3 player; it did not support video, Wi-Fi, texting, photos or applications as it does
IT’S NEVER PERFECT FROM THE START... continues
barry matties started in pcb manufacturing in the early 80s. in 1987, he co-founded CircuiTree Magazine. nearly 13 years later, CircuiTree was sold as the leading publication
in the industry. in the early 2000s barry and his former CircuiTree partner, ray rasmussen, joined forces again and acquired pcb007. over the years, pcb007 has grown and continues to thrive. in July of this year, barry and ray ac-quired SMT Magazine. With his many years of business leadership skills, barry now produces this column for anyone who has a desire for success. the column relates 25 years of success-ful business leadership, including marketing and selling strategies that really work. read a few and decide for yourself.
today, but it was a good idea that the market supported.
The latest iPod Touch is, more than likely, what Steve Jobs and his team envisioned when they first developed the iPod. Now, the
iPhone is going through a similar metamorphosis. The first generation iPhone was slower and not as capable, but still a game-changing idea in a great form factor. The second generation was much better—just imagine what
the tenth generation will offer.If Apple had waited for perfection—on
these or any of their other products—IBM might still be in the personal computer game. Instead, this proves that you must choose a point of entry and implement your idea. It will be new ideas that will be the main driving force in the future and will help the industry thrive. The question is: Will it be your idea to which the market responds? SMT
“The world of marketing has its fair share
of major false starts. Remember the New Coke
product roll-out and marketing campaign?
”
62 SMT Magazine • December 2010
today, the marketplace is the final arbiter of a company’s life or death and the decision is based on value. the value of a pcb is inversely proportional to its cost. this article explores the issues a company might encounter while planning quality using a project management methodology.
in Summary
Note from the author: Please remember, the information provided is my interpretation of the subject matter and is provided for reference only.
For those readers who missed Part I, this two-part article explores the issues a company might encounter while planning a new value proposition using standard project management methodology. Part I presented phase one, initiation, and phase two, planning of the project. Here, we start with a project plan and address the implementation and closing phases of the project.
Phase Three: ImplementationImplementation can be the difficult part
of managing a project. The degree of difficulty relates to the level of planning and the buy-in of the project team.
Project Team Kickoff MeetingThe kickoff meeting brings team members
together for a project plan review to ensure a common understanding of the plan. In addition, the project manager, through a team member discussion, can use this meeting to communicate methods that will be used to manage and control the project during the implementation phase. Involving team members in this process builds project manager-team communications, thereby
making project success more likely.
Table 1 depicts a Project Team Kickoff Meeting Template that is used to present the elements of the project plan. “Management Methods” list methods that you, as project manager, plan to use to ensure that all aspects of the implementation phase are met. Under “Expectations,” list the expectations you have for the
team members, including communicating with the project manager to ensure all aspects of the implementation phase are met.
Determine when team members are available and schedule the meeting. Several days prior to the scheduled meeting, prepare
The Value Management Project, Part II
by Stephen J. Marshall, National Sales Managercalumet electronicS corporation
MARSHALL MATTERS
Table 1: project team Kickoff meeting template.
64 SMT Magazine • December 2010
the agenda and send it, and the Management Methods/Expectations Worksheet, to team members for review in preparation for discussion during the project team kickoff meeting. Remember, it is essential to receive endorsement of the project’s scope, budget and schedule from executive management prior to implementation! Project Team Kickoff Meeting Follow-up
Send meeting minutes to team members and invite additions and/or corrections. Include team input in the Management Methods and Expectations Worksheet and send this to team members for a follow-up review. Invite additions and/or corrections.
Manage Scope and RequirementsWhen the deliverables change during
the course of the project, the current budget and deadlines are adjusted to reflect the additional work. The new estimated cost, effort and duration become the approved baseline for the project. Managing changes to project scope and requirements is guided by the change management process in the change management plan. Changes to scope and requirements are a common threat to projects. Project managers must watch for “scope creep”: an increase in scope that doesn’t include a corresponding adjustment to project cost, effort or timeline may result in the project being delivered late or over budget. Manage Roles
A team can make or break the project. Managing project roles ensures people involved in the project are used in the most effective way. This includes all project stakeholders, sponsors, customers and others identified in the project charter. Effective management techniques can include:
• Establish clear roles and responsibilities for all team members;• Engender project ownership in team members;• Secure appropriate training;• Provide feedback and appraise team performance;
• Manage changes in project staffing;• Document changes to project roles and responsibilities; and• Update the project schedule and budget.
Manage Project Schedule The project schedule outlines a detailed
plan of major project activities and tasks, the planned start and end date for each task, and the resources allocated to each task. Additionally, the project schedule is used to monitor progress and keep the project on track. Managing the project schedule is an ongoing activity to ensure the project is meeting deadlines and providing deliverables on time. When significant variances occur, the schedule is updated and appropriate actions are taken.
Request regular activity reports from project team members to update the progress on assigned tasks. Progress reports should include the efforts spent on tasks to date, and the estimates of future effort required to complete them. Emphasize accurate and timely reporting, and be diligent in collecting the information at a detailed level. Pay particular attention to critical path tasks.
The Baseline Schedule Tracker Template in Table 2 demonstrates several key indicators you can use to manage the project schedule using the Baseline Schedule developed in Phase Two. Schedule modifications as of the last update date are documented and the form is revised and saved.
THE VALUE MANAGEMENT PROJECT, PART II continues
Table 2: baseline Schedule tracker template.
December 2010 • SMT Magazine 65
Using the baseline schedule established in the Plan Stage, make periodic revisions to reflect any new information about Activities, Tasks and Subtasks. Changes could include addition of new Activities, Tasks and Subtasks or adjustments to the Effort Estimate, Planned Start Date, Planned End Date or Resource assignments. When all adjustments are complete, revise the Last Update date. Remember, if approved, the revised schedule becomes the new baseline.
Manage Budget Managing the project budget is an ongoing
activity that answers the question: “Are we spending what we expected to spend based on how the project is proceeding?” The goal is to keep costs within the budget estimates. This requires monitoring all costs associated with the project and taking corrective actions when variances occur. During the Planning Phase, an agreed-upon baseline budget is created for the project and approved by the project sponsor. Adjusting the budget results in a new baseline and requires approval from the project sponsor. Remember, each time the sponsor approves a new budget, the new approved budget becomes the baseline budget for tracking project costs. The project manager uses this baseline to track expenditures and measure the performance of the project. The Baseline Budget Tracker Template below describes several steps you can take to manage a project budget.
Using the baseline budget established in the planning phase, make any adjustments to line item amounts. Enter the baseline budget for the line item. This is the current budget amount approved by the project sponsor. Enter the adjusted amount for the line item. Show negative adjustments in parentheses. Enter the amount for the Revised Project Budget. Remember, if approved, the revised budget becomes the new baseline.
Manage CommunicationsManaging communications makes sure
that everyone who is involved in the project is kept informed. Information is made available to appropriate audiences at the appropriate time, as defined in the Communication Plan developed in the Planning Stage.
Key project communications include project team progress reports to the project manager describing project accomplishments and revised estimates of work to be completed. Project status reports are compiled for the project sponsor and other relevant audiences to measure the health and progress of the project against the project plan.
Control Quality Controlling quality confirms that the
project deliverables and processes comply with quality standards. Quality control and assurance activities work to eliminate the causes of unsatisfactory results. The project manager implements the quality control and quality assurance activities outlined in the quality management plan. Managing quality helps prevent problems and deficiencies in project deliverables and aids in making project processes more efficient and effective.
Control IssuesThe adverse impact of unresolved issues
tends to grow over time. Following the process described in the issue management plan helps ensure satisfactory project results by resolving issues effectively as soon as possible after they have been identified.
Control ChangeAdequate evaluation of a change allows
THE VALUE MANAGEMENT PROJECT, PART II continues
Table 3: baseline budget tracker template.
66 SMT Magazine • December 2010
Stephen J. marshall is the national Sales manager for calumet electronics corporation and has been with the company since 1993. During that time, he has been involved in a variety of activities related to performance
specifications and quality standards with a front row seat to several industry-changing events, including the conversion to electronic production data, the dot.com bust, the growth of Smt, the introduction of rohS and the current economic recession. marshall is well-qualified to address conformance to specifications including ipc-6011, ipc-6012, mil-prF-31032 and mil-prF-5510 performance and qualification specifications and compliance with standards including iSo9001, aS9100 and nadcap. to contact Stephen, click here. to access Stephen’s blog, click here.
change approvers to make fully informed decisions about the impact of a change on the project and its deliverables. Proper integration of a change into the project documentation ensures that the project team has a clear description of the work they are to perform at all times. The project manager implements the change management process outlined in the change management plan.
Control Risks The project manager implements the risk
management process outlined in the risk management plan and monitors the risk plans to ensure that the plans are being executed successfully. New risks are assessed on a regular basis and incorporated into the plan. Following the process described in the risk management plan helps assure satisfactory project results by detecting the occurrence of the factors that can cause risks to be realized and by responding accordingly to the plan.
Accept Project The ultimate measure of success for the
implementation phase is the acceptance of the product by the customer and the acceptance of the project by the project sponsor. This activity formally acknowledges that all deliverables from the Implementation Phase are completed, accepted and approved by the project customers and the project sponsor. Formal acceptance and approval signifies that the project is essentially over and is ready for the close out phase.
Phase Four: Close OutHold a final status meeting with the project
sponsor, customer and key stakeholders. Compare the product delivered to the established baseline scope and requirements and confirm that the product has been successfully developed. Confirm that the product has been successfully transitioned to the ongoing support organization. Transfer any outstanding issues or actions items to the customer. Document and transfer any items that are deferred to a later phase of the project. Obtain a final acceptance signature from the project sponsor.
ConclusionThe Value Management Project is never
really closed. It is an ongoing project that has direct correlations to most quality standards. The elements included in project management are similar to elements of ISO9000 and AS9100. The project team is similar to the technical review board outlined in the Department of Defense Performance Specification for Rigid Printed Circuit Boards MIL-PRF-31032. Quality management systems that fail to add value cannot meet the competitive nature of the global marketplace. This article attempts to present a proven approach for planning quality management instead of simply maintaining a certification. SMT
References:University of Wisconsin DOiT Project Management Advisor Wikipedia ESI International Project Management Institute
THE VALUE MANAGEMENT PROJECT, PART II continues
68 SMT Magazine • December 2010
Letters to the eDitor continues from page 10
of shipments. All industries go thru these changes and so may we. But, electronics is not through “gobbling up” other industries.
Just look at the electronics in the all-electric auto Tesla compared to a standard hydrocarbon engine vehicle with numerous “machined metal motion converters” (transmission, engine, differential, clutch, brakes, etc.) and we have just started to “invade.” I see a great future for personal medical devices as we get older and medical care costs more, elderly care using robotics is growing; soon we will use electronics to grow food and purify water! All the alternative energy uses electronics. And I still think we can use electronics and PE (printed electronics) in fabrics for fashions!
I think that the greatest changes will occur from an area we least expect it! By developing the $50 computer for Africa and making it solar-powered and “self-generated networking” so that these kids can be educated even with their dirt floors, we open up the possibility that these kids will use these computers to change the nature of software development. We see it already with kids making millions out of apps for the iPhone at $5 or $10 each. The driving force is that the kids in Africa now have a way to earn hard currency, not just herding goats!
This was brought home to me when I purchased a “MicroComputer Development System” for my grandkids. It said it was for 12 years and up! It teaches Basic Programming, which is quite simple and logical for today’s kids (learning a computer language is simpler than learning a foreign language and easy for kids). The illustration and experiments were done with a simple “kluge pin-board” and wire, so no soldering is required. But with it, my grandkids could solve electronics problems by writing software that required me to get a master’s degree in 1970 and design complex electronics with ICs, transistors, resistors and capacitors. The solution was a $12 MicroProcessor that ran off a 9 volt battery and got its program from the PC. Remember that column I wrote for
CircuiTree back in September 2006 about LEGO MINDSTORM and how “Intelligent Toys” were challenging kids all over the world?
LEGO has worked out a new “symbolic language” that grade schoolers can master and is installing it in grade schools.
Happy Holden Foxconn
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The Printed Circuit Board: More Important Now Than Ever
My interest was piqued by a recent article from the pen of good friend, Ray Rasmussen. In his column, Ray reviews a presentation by Phil Plonski of Prismark Partners on a tear-down analysis of an Apple iPad. Ray comments on the profoundly dense interconnection, with package-on-package (PoP), flip-chip, etc. The result is a product with super-dense IC packing with a minimum of printed circuit boards (PCBs) needed. The micrograph, from Prismark, shows this impressive packaging design.
Ray goes on to lament that these types of designs require fewer and fewer PCBs. He then states: “It won’t be long before they learn how to build the iPad and iPhone without a PCB altogether.”
Whoa, slow down! Let’s think this statement through.
The PCB provides at least two fundamental functions:
1. It provides mechanical support for the electronic components.
2. It interconnects the components to each other and provides input/ output connections so that the electronics can interact with the user.
(PCB experts will point out that there are many other functions such as heat transfer,
December 2010 • SMT Magazine 69
electrical impedance matching, electromagnetic shielding and a few other things the PCB provides in addition to those mentioned above. Many product designs require all of these functions of the PCB; however, even the most basic designs require 1 and 2.)
It is an imperative in any electrical design to minimize the number of components, PCBs, connectors, etc. to minimize cost and increase performance. However, the minimization of PCBs often results in those used becoming more complex and hence having more “value added.”
In looking at the micrograph cross-section, one could strongly argue that the PCB has never been so important or so strongly a “partner” in the design. The multi-level, fine feature, high-density interconnection provided by this PCB is truly a miracle of modern PCB manufacturing. Any other “PCB-less” design would require these functions and would essentially, by any other name, be a PCB. As an example, let’s say all of these functions were performed by the case of the electronic device. To manufacture this new PCB-less device, the processes that are used to make a PCB would be needed to form these functions in the product’s case. In addition, solder paste printing, component placement and reflow soldering of the case would likely be a challenge!
So expect the PCB to be alive and well for some time to come...and never more needed.
Dr. Ron Lasky, Senior TechnologistIndium Corporation
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Nakahara: End Not in Sight for PCBs
I completely agree with the view stated by Ron Lasky in his article The Printed Circuit Board: More Important Now Than Ever.
I don’t know what Phil Plonski presented, but I can guess from Ray’s original column, IPC Executive Summit: The End in Sight. Phil, my dear friend, showed me a photo of an iPad, which has a microvia design of 1+8+1 or 10L, which will be designed to 3+4+3 for the second generation iPad.
A PCB maker has recently bought 40 laser drilling machines to supply microvia boards for the iPad in 2011.
My first IPC meeting was in the fall of 1966 in Chicago. IPC “tentatively” concluded that PCB production in the mid-1960s was about $500 million worldwide, of which 60 to 70% were made in the United States.
The most important thing I remember is that many functions were being integrated into a single chip (SMT was already available at that time for military IC packages), and therefore, the volume of PCBs would continue to go down and there would be no need for PCBs in the future.
Here we are 45 years later. Worldwide PCB production will reach $52 billion this year and the production will continue to grow in the next 10 years. Yes, it is true that the surface area of PCBs for many applications tends to be smaller with functional integration. But there are more applications being born and many more cell phones, PCs, flat TVs, digital cameras, set-top boxes, etc., are being produced.
Yes, we see the ups and downs of the market, but when one sees the market in the long term, the manufacture of electronic products is on a continuous rise and so more PCBs are needed. I can tell you right at this moment, there are more than 20 new PCB plants under construction in China, and not the size we are talking about in the United States. Many of them have a monthly production capacity of more than 1 million square feet “initially.”
Many in the western world complain that China builds too much capacity. Then, what can they do? Kill those who are building more capacity? The world seems to be able to absorb these circuit boards.
70 SMT Magazine • December 2010
The need for PCBs will remain at least during my lifetime and the total PCB area will continue to increase.
Hayao Nakahara N.T. Information Ltd.
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The PCB Not So Important? Tarzwell Weighs In
I read with great interest Dr. Ron Lasky’s reply to Ray Rasmussen’s recent column IPC Executive Summit: The End in Sight. Sorry, Ron, but I tend to agree with Ray. The PCB is being phased out in many applications.
In The Printed Circuit Board: More Important Now Than Ever, your reply to Ray’s column, you write:
Ray goes on to lament that these types of designs require fewer and fewer PCBs. He then states: “It won’t be long before they learn how to build the iPad and iPhone without a PCB altogether.” Whoa, slow down! Let’s think this statement through.
The PCB provides at least two fundamental functions:
1. It provides mechanical support for the electronic components.
2. It interconnects the components to each other and provides input/ output connections so that the electronics can interact with the user.
True, the PCB has not disappeared yet, but the writing is on the wall. To say the PCB will always be needed may be premature. I have seen and worked on non-PCB electronic
applications. Components can now be placed on board the base silicon die, as can other chips. Now there’s just a single chip in your IPod.
Remember, a decade ago a GPS unit required three large PCBs.
I have worked on a few designs where we put all the chips and components on a larger base die, and this is happening more and more. Designers are able to work around the PCB because the chips are smaller and contain more electronics, which means we can achieve more functionality on a single miniature chip die. So it is not a 100% given that we need PCBs to mount the components on.
As for requiring the PCB traces to interconnect the chips, this is also not true. I have seen working personal computers that used no PCBs. Each chip had an LED transmitter/receiver mounted on top; the light wave signals were beamed between chips, and the only interconnect were power and ground wires.
A second application with no PCB was a future “reduction in cost” experiment in which we looked at radio wave communication between chips. It was relatively easy to make a small receiver/transmitter die that attached on top of larger chips to send and receive RF signals.
The RF die cost pennies per chip, and a simple flex polyester membrane was used for power. The elimination of the PCB, along with its design, fabrication and assembly, dropped the cost of the product almost $50, something many price-sensitive companies would be interested in.
Yes, there can be advanced electronic products without a PCB.
Robert Tarzwell DMR Ltd.
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Letters to the eDitor continues from page 69
December 2010 • SMT Magazine 71
Ad Index SMTOnline News HighlightsSMTC Reports 48% Revenue Growth in Q3SMTC Corporation has reported 2010 third quarter results. Revenue for the quarter increased by 48% to $65.4 million and net income for the quarter, at $2.6 million, was $2.4 million higher than the same quarter in the prior year.
Kitron Reports Improved Revenue, Operating ProfitKitron’s revenue amounted to NOK 351.9 million in the third quarter of 2010, a 4.8% increase compared with the same period last year. Cash flow from operations was negative by NOK -39.8 million (NOK 11.0 million). Order intake was NOK 334.0 million and the order backlog was NOK 848.2 million, a decrease of 11.3 and an increase of 9.0 % respectively.
Sypris Posts Double Digit Growth in Q3Revenue for the company’s Electronics Group was $20.7 million in the third quarter compared to $25.6 million in the prior year period, primarily as a result of the completion of certain older low-margin programs within the EMS business.
Nortech to Acquire Winland’s EMS Biz“We’re pleased to expand our world-class manufacturing capabilities, including adding valuable new capacity for printed circuit board assemblies,” said Mike Degen, Nortech Systems’ President and CEO. “Winland had developed a reputation for excellence in design and manufacturing and together we’ll advance that success going forward.”
Blackfox..................................... 27
Calumet.................................... 21
CA Picard.................................. 17
Circuitronics.............................. 15
Digi-Key Corporation............... 1, 2
EPEC.......................................... 29
ERC (McDry)............................... 7
Henkel....................................... 19
I-Connect007............................ 61
Indium....................................... 11
IPC ..................................... 57, 59
K & F Electronics....................... 33
Koh Young Technology............... 5
Nordson Asymtek...................... 23
P. Kay Metal............................... 43
Prototron Circuits....................... 37
Q-Fab.......................................... 9
SMTA Pan Pacific....................... 63
SMT Magazine.......................... 45
Survival Book............................. 67
U.S. Circuit................................ 55
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