slides pech2 july05
TRANSCRIPT
© Ned Mohan, 2005
2- 1
Chapter 2 Design of Switching Power-Pole
2-1 Power Transistors and Power Diodes 2-2 Selection of Power Transistors 2-3 Selection of Power Diodes
2-4 Switching Characteristics and Power Losses in Power-Poles
2-5 Justifying Switches and Diodes as Ideal
2-6 Design Considerations 2-7 The PWM Controller IC
References Problems
Appendix 2A Diode Reverse-Recovery and Power Losses
© Ned Mohan, 2005
2- 2
POWER TRANSISTORS AND POWER DIODES
• Voltage Rating
• Current Rating
• Switching Speeds
• On-State Voltage
© Ned Mohan, 2005
2- 3
SELECTION OF POWER TRANSISTORS
• MOSFETs
• IGBTs
• IGCTs
• GTOs
• Niche devices: BJTs, SITs, MCTs
Figure 15-1 Power semiconductor devices.
Thyristor IGBT MOSFETIGCT(a)
101 102 103 104
102
104
106
108
Thyr
isto
r
IGBT
MOSFET
Pow
er (V
A)
Switching Frequency (Hz)
IGCT
(b)
Thyristor IGBT MOSFETIGCT(a)
Thyristor IGBT MOSFETIGCT(a)
101 102 103 104
102
104
106
108
Thyr
isto
r
IGBT
MOSFET
Pow
er (V
A)
Switching Frequency (Hz)
IGCT
(b)
101 102 103 104
102
104
106
108
Thyr
isto
r
IGBT
MOSFET
Pow
er (V
A)
Switching Frequency (Hz)
IGCT
101 102 103 104
102
104
106
108
Thyr
isto
r
IGBT
MOSFET
Pow
er (V
A)
Switching Frequency (Hz)
IGCT
(b)
© Ned Mohan, 2005
2- 4
MOSFETs
2.5 2.7( )
toDS on DSSR Vα
Figure 2-1 MOSFET: (a) symbol, (b) i-v characteristics, (c) transfer characteristic.
G
D
SGSV+
−
DSV
Di
+
−
(a) (c) (b)
GSV 11V=
9V7V5V
DSV
Di
0( )GS GS thV V≤
( ) 1/slopeDS onR =
GSV
Di
0
oI
( )GS thV ( )oGS IV
© Ned Mohan, 2005
2- 5
IGBTs
Figure 2-2 IGBT: (a) symbol, (b) i-v characteristics.
−
+
C
E
G CEV
GEV−
+
Ci
GEV
CEV
Ci
(a) (b)
−
+
C
E
G CEV
GEV−
+
Ci
−
+
C
E
G CEV
GEV−
+
Ci
GEV
CEV
Ci
GEV
CEV
Ci
(a) (b)
© Ned Mohan, 2005
2- 6
Power Semiconductor Price Trends
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
1990 1995 2000 2005
USD/A
Pricing (USD/A) 1200 V IGBTs
© Ned Mohan, 2005
2- 7
SELECTION OF POWER DIODES
• Line-frequency diodes
• Fast-recovery diodes
• Schottky diodes
• SiC Schottky diodes
Figure 2-3 Diode: (a) symbol, (b) i-v characteristic.
(a) (b)
A K
AKi
AKv0
(a) (b)
A K
AKi
AKv0
© Ned Mohan, 2005
2- 8
SWITCHING CHARACTERISTICS AND POWER LOSSES IN POWER-POLES
Figure 2-4 MOSFET in a switching power-pole.
(a) (b)
inV+
−
Di
oI
Di
0DSv
off
onoIGGR
GGV DSv−
+
inV(a) (b)
inV+
−
Di
oI
Di
0DSv
off
onoIGGR
GGV DSv−
+
inV
© Ned Mohan, 2005
2- 9
Turn-on Characteristic
Figure 2-5 MOSFET turn-on.
(c)(b)
Di
DSv
oIon
off
A
0
0
0
GSv
t
t
oIDiinV DSv
( )d ont rit fvt
GGv
(a)
oI
inV
−
+G
S
DDi
0GGv B
DSv
inV
( )oGS Iv( )GS thv
(c)(b)
Di
DSv
oIon
off
A
0
0
0
GSv
t
t
oIDiinV DSv
( )d ont rit fvt
GGv
(a)
oI
inV
−
+G
S
DDi
0GGv B
DSv
inV
( )oGS Iv( )GS thv
© Ned Mohan, 2005
2- 10
Example 2-1 In the converter of Fig. 2-4a, the transistor is a MOSFET which carriesa current of 5 A when it is fully on. If the current through thetransistor is to be limited to 40 A during a malfunction in which casethe entire input voltage of 50 V appears across the transistor, whatshould be the maximum on-state gate voltage that the gate-drive circuitshould provide? Assume the junction temperature jT of the MOSFET
to be 0175 C .
Solution The transfer characteristic of this MOSFET is shown in Fig. 2-6. It shows that
if 7.5GSV V= is used, the current through the MOSFET will be limited to 40 A.
Figure 2-6 MOSFET transfer characteristic.
40 A
10 A
1A
0.1A
100 A
4.0 5.0 6.0 7.0 8.0 9.010.07.5V
DI
GSV
40 A
10 A
1A
0.1A
100 A
4.0 5.0 6.0 7.0 8.0 9.010.07.5V
DI
GSV
© Ned Mohan, 2005
2- 11
Turn-off Characteristic
Figure 2-7 MOSFET turn-off. (a)
oI
inV−
+
GS
DDi
0GGv
(b)
Di
DSv
oIon
off
D
0
C
(c)
0
0
GSv
t
t
oIDi
inV
DSv
( )d offt rvt fit
GGv( )oGS Iv( )GS thv
DSv
inV
(a)
oI
inV−
+
GS
DDi
0GGv
(b)
Di
DSv
oIon
off
D
0
C
(c)
0
0
GSv
t
t
oIDi
inV
DSv
( )d offt rvt fit
GGv( )oGS Iv( )GS thv
DSv
inV
© Ned Mohan, 2005
2- 12PSpice Modeling: C:\FirstCourse_PE_Book03\Power_pole_PSpice_Diode.sch
© Ned Mohan, 2005
2- 13
Time
0s 0.2us 0.4us 0.6us 0.8us 1.0us 1.2us 1.4us 1.6usV(M2:d,M2:s) -I(V2)
-10
0
10
20
30
40
50
DSv
Di
Simulation Results: MOSFET Voltage and Current
© Ned Mohan, 2005
2- 14
Calculating Power Losses Within the MOSFET (assuming an ideal diode)
Conduction Loss: 2( )cond DS on oP d R I=
Switching Losses: , ,1 ( )2sw in o c on c off sP V I t t f= +
,c on ri fvt t t= +
,c off rv fit t t= +
Figure 2-8 MOSFET switching losses.
0t
oI DSv
,c ont
rit fvt
0t
Di
inV
,c offtrvt fit
DSvinV
Di
,c ont
,c offt
swp in oV I in oV Iswp
0t
oI DSv
,c ont
rit fvt
0t
Di
inV
,c offtrvt fit
DSvinV
Di
,c ont
,c offt
swp in oV I in oV Iswp
© Ned Mohan, 2005
2- 15
Gate Driver Integrated Circuits (ICs) with Built-in Fault Protection
Figure 2-9 Gate-driver IC functional diagram.
12extV V=CCV
cv
S
12extV V=CCV
cv
S
© Ned Mohan, 2005
2- 16
JUSTIFYING SWITCHES AND DIODES AS IDEAL
Very High Converter Efficiencies
• Low on-state voltage drops across devices
• Low switching losses
© Ned Mohan, 2005
2- 17
• Switching Frequency
• Selection of Transistors and Diodes
• Magnetic components
• Capacitor Selection
DESIGN CONSIDERATIONS
max max
ˆrms
pw
LIIAk J B
= ,
max max
conv y y rmsp
w s
k V IA
k B J f= ∑
Figure 2-10 Capacitor ESR and ESL.
C ESL ESRC ESL ESR
© Ned Mohan, 2005
2- 18PSpice Modeling: C:\FirstCourse_PE_Book03\Capacitor_Characteristics.sch
© Ned Mohan, 2005
2- 19
Frequency
1.0KHz 3.0KHz 10KHz 30KHz 100KHz 300KHz 1.0MHzI(L2) I(L1) -I(V3)
0A
10A
20A
30A
40A
50A
Simulation Results: Individual and Total Admittances
© Ned Mohan, 2005
2- 20
Thermal Design
( )j a jc cs sa dissT T R R R Pθ θ θ= + + +
Figure 2-11 Thermal design: (a) semiconductor on a heat sink, (b) electrical analog.
jcRθ
dissP
(b)
csRθ sa
Rθ
aT
aTsTcTjT
(a)
chip
heat sinkisolation pad
jTcT
sT aT
ambient
casejc
Rθ
dissP
(b)
csRθ sa
Rθ
aT
aTsTcTjT
(a)
chip
heat sinkisolation pad
jTcT
sT aT
ambient
case
© Ned Mohan, 2005
2- 21
Design Tradeoffs
Magnetics andcapacitors
size
Heatsink
Sf
Magnetics andcapacitors
size
Heatsink
Sf
Figure 2-12 Size of magnetic components and heat sink as a function of frequency.
© Ned Mohan, 2005
2- 22
PWM CONTROLLER IC
( )( ) ˆc
r
v td tV
=
Figure 2-13 PWM IC waveforms.
0sd T
sTt
r̂V( )cv t
t
rv
( )q t0
1
0sd T
sTt
r̂V( )cv t
t
rv
( )q t0
1
© Ned Mohan, 2005
2- 23
APPENDIX 2A: Diode Reverse Recovery and Power Losses
Diode Forward Loss: , (1 )diode F FM oP d V I= − ⋅
Diode Reverse Recovery Characteristic:
Diode Switching Losses: , ,1( )2diode sw RRM b d neg sP I t V f= ⋅ ⋅
Figure 2A-1 Diode reverse recovery characteristic.
0
rrtat bt
RRMI
t
t0
FMV
,d negV
rrQ
0
rrtat bt
RRMI
t
t0
FMV
,d negV
rrQ
© Ned Mohan, 2005
2- 24PSpice Modeling: C:\FirstCourse_PE_Book03\ Power_pole_MUR2020.sch
© Ned Mohan, 2005
2- 25
Time
0s 0.2us 0.4us 0.6us 0.8us 1.0us 1.2us 1.4us 1.6usV(M2:d,M2:s) -I(V2)
-10
0
10
20
30
40
50
Simulation Results: MOSFET Voltage and Current
© Ned Mohan, 2005
2- 26
Example 2A-1 In the switching power-pole of Fig. 2-4a, 40inV V= and the output current is 5oI A= . The switching frequency 200sf kHz= . The MOSFET switching times are 15 and 15ri fvt ns t ns= = . The diode snaps-off at reverse recovery such that
20rr at t ns= = (such that 0bt = ) and the peak reverse-recovery current 2RRMI A= . Calculate the additional power loss in the MOSFET due to the diode reverse recovery.
Figure 2A-2 Waveforms with diode reverse-recovery current.
DSv
0
0
0 t
t
t
rit
inV
fvt
a rrt t=
oI
Di
RRMI
swp
fvt
DSv
0
0
0 t
t
t
rit
inV
fvt
a rrt t=
oI
Di
RRMI
swp
fvt