slide 1-1 work in teams on the remainder of the processor assignment work incrementally on the...

1

• Work in teams on the remainder of the processor assignment

• Work incrementally on the processor assignment

• Don’t hesitate to ask questions and to ask for help!

• Understanding how to build the processor, how to program in machine language, and in its assembly language will go a long way!!!!!!

Digital Techniques Fall 2007 André Deutz, Leiden University

Org Remarks; building the computer (i.e. processor)

2

• Recall: the summary of a d-flip-flop

• In the implementation with Digital Works: use the built-in edge triggered d-flip-flop of DW for any of the state elements (such as registers, program counter, data-memory etc).


Org Remarks; building the computer (i.e. processor)

3Orgrem: Why should you keep a design notebook? Make it On-line

° Keep track of the design decisions and the reasons behind them• Otherwise, it will be hard to debug and/or refine the design• Write it down so that you can remember in long project: 2

weeks ->2 yrs• Others can review notebook to see what happened

° Record insights you have on certain aspect of the design as they come up

° Record of the different design & debug experiments• Memory can fail when very tired

° Industry practice: learn from others’ mistakes

4


Orgrem: Content of the On lineDesign Note Book

• Top 10 things to put in your on-line design notebook

– 10. Start: type “date” and copy & paste into your notebook.

– 9. What is the goal/objective of today?

– 8. Description of any problem: what did you see? what did you do?

– 7. Keep track of the time whenever you do a new “compile.”

– 6. Procedures for testing and running experiments.

– 5. Outputs of tests and experiments.

– 4. Insights and thoughts you have while you work.

– 3. Copy & paste headers of important emails.

– 2.. Last thing of the day: One line summary => Notebook Index.

– 1. Finish: type “date” and copy & paste into your notebook.

5


The Big Picture: Where are We Now?

• The Five Classic Components of a Computer

• Today’s Topic: Datapath Design

Control

Datapath

Memory

ProcessorInput

Output

6

building our processor/computer

• Our toy will help us to understand The von Neumann model

• Utterly useful; also useful for the following courses: dite, computer architecture, operating systems, assembly language, machine language, assemblers, ….

• We focus on Single-cycle computer:


7

define: Single-cycle datapath

All instructions execute in a single cycle of the clock (positive edge to

positive edge)

Advantage: a great way to learn CPUs.

Drawbacks: unrealistic hardware

assumptions,slow clock period

8

Instruction Set of Our Tiny Mips computer

• NB as powerful as C++

• Obviously far less expressive than C++


10Get acquainted with the instruction set of TM

• Write a program which computes the sum of 3 and 4.

• Write a program (using looping/repetition) which computes the sum of the first three integers

• Write a program which determines the largest of two numbers.

• There is a canonical (not always efficient) of translating high level language (say C++) constructs (selection and repetition) into assembly language

11A solution for the addition of the first three natural numbers. Assume that we also have an unconditional branch instruction ‘br L’ with the

meaning: PC L And less important: we also assume that we have the stop instruction called halt.A solution:Address instruction comment0 ldi reg1, 1 const 11 ldui reg1, 0 make sure reg1 contains 12 ldi reg2, 0 reg2 accumulates sum3 ldui reg2, 0 make sure reg2 contains 04 ldi reg3, 3 reg3 corresponds to the upper

limit of iterations5 ldui reg3, 0 make sure reg3 contains 06 ldi reg0, 0 reg0 is the counter7 ldui reg0,0 make sure reg0 contains 08 add reg0, reg1 bump counter9 add reg2, reg0 accumulate sumA seq reg0, reg3 set conditionB breq D if eq {PC D}C br 8 br {PC 8}D halt

12


Single cycle data paths: AssumptionsProcessor uses synchronous logicdesign (a “clock”).

f T

1 MHz 1 μs

10 MHz 100 ns

100 MHz 10 ns

1 GHz 1 ns

All state elements act like positive edge-triggered flip flops.

D Q

clkReset ?

13

Addr Data

InstrMem

D

PC

Q+0x1

A portion of the datapath used forFetching instructions and incrementing

The program counter (PC)

14

opcodeoperand1

operand2

15

Data flow on pos edge

• The following slides show the data flows for most instructions such as: or, and, add, sub

16


How data flows after posedge

4rd1

RegFile

4rd2

WE4

wd

2 rs12 rs22 ws

4ALU

4

4

opLogic

Addr Data

InstrMem

D

PC

Q+0x1

17

Dataflow on pos edge

• The following slide shows the dataflow with a minor adjusment for instructions such as ldi and ldui (for one of the sources a a 4-bit wide 4 to 1 mux (a better name would be: data selector) is used

18


How data flows after posedge (detail: adjustment for ldi and ldui instructions)

4rd1

RegFile

4rd2

WE4

wd

2 rs12 rs22 ws

4ALU

4

4

opLogic

Addr Data

InstrMem

D

PC

Q+0x1

4

4

444

Dat

a se

lect

or

(

mux

)

ALU source

19


How data flows after posedge (detail: adjustment for ldi and ldui instructions)

4rd1

RegFile

4rd2

WE4

wd

2 rs12 rs22 ws

4ALU

4

4

opLogic

Addr Data

InstrMem

D

PC

Q+0x1

4

4

444

Dat

a se

lect

or

(

mux

)

ALU source

20

Digital Techniques Fall 2007 André Deutz, Leiden UniversityDigital Techniques Fall 2007 André Deutz, Leiden University

Register File

4-bit register

4-bit register

4-bit register

4-bit register

Chooses one of Registers

Selects a secondregister

Chooses registerto be written

Dat

a to

be

wri

tten

Write Enable

Dat

a by

rea

dig

from

Seco

nd c

hose

n re

gist

er

Dat

a by

rea

ding

fro

mFi

rst

chos

en

regi

ster

to read

to read

21

Rough idea on implementation in DW

• The following slide gives a rough idea how the datapath for the instructions is implemented (except ld, st and addi)

• NB: our specification requires the breq to be implemented with absolute addressing (that is the address of the next to be executed instruction is contained in L (and PC gets L) when the branch is taken, as opposed to relative addressing: PC gets PC+L) when the branch is taken)

slide 1-1 work in teams on the remainder of the processor assignment work incrementally on the...

Documents