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11/14/2002 SFR Workshop - Sensors 1 Sensors SFR Workshop November 14, 2002 Eray Aydil, Nathan Cheung, Bruce Dunn, Kameshwar Poolla, Costas Spanos Berkeley, CA

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Page 1: SFR3 Sensors 111402 - University of California, San Diegocden.ucsd.edu/internal/Publications/workshop_archive/2002_Nov/talk/S… · 11/14/2002 SFR Workshop - Sensors 19 Ion Flux Uniformity

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1

Sensors

SFR WorkshopNovember 14, 2002

Eray Aydil, Nathan Cheung, Bruce Dunn, Kameshwar Poolla, Costas Spanos

Berkeley, CA

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Sensors• Broad goals of project

– Develop platform for fully autonomous sensor arrays capable of operating in harsh environments

– Develop novel sensors and transduction schemes to be used with the autonomous platform

• Applications– Process modelling– Equip design/process optimization

• Outline– Battery development (Dunn)– Encapsulation (Cheung)– Plasma sensors (Aydil)– Tomography-based sensors (Poolla)

– Process Control– Diagnostics

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Development of Lithium Batteries for Powering Sensor Arrays

SFR WorkshopNovember 14, 2002

Bruce DunnUCLA

Student contributors: Tim Yeh and Daren Chow

2003 GOALS: a) Battery operation between room temperature and 150°Cb) Battery survivability to sensor soldering operations

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Project Objectives

In order to provide on-board power of SMART wafers, a low profile, thermally stable, high energy density battery must be used.

Battery Requirements:Temperature capability: 150°CVacuum (10-2 torr).Operating voltage: > 2.5 VDischarge current: 2 mA.Discharge time: > 10 minutes.Low Profile: 500 µm or less.Area: Less than 3 cm x 3 cm.Rechargeable; 10 cycles.

State-of-the-art batteries do not meet theserequirements:- Temp. limitations (button cell, Panasonic)- Too thick (button cell)- Low capacity (thin film)

Panasonic primary battery;60°C temperature limit

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UCB: Fabrication of wells on a silicon wafer

UCLA: Fabrication of lithium polymer battery; thickness < 500 µm

UCB: Plasma-assisted bonding

Further tests will be carried out at UCLA to evaluate battery performance after bonding.

Current Program: Improvements in Battery PackagingPlasma-Assisted Bonding Approach (with N Cheung)

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Current Program: Higher Operating Temperatures Battery operation between room temperature and 150°C

New nanocomposite electrolyte incorporated into battery structure• successful operation at 125oC and 150oC; designed capacity demonstrated• battery cycled several times between RT and 125 or 150oC without difficulty

0

0.5

1

1.5

0 2 4 6 8

Cap

acity

(mAh

)

25°C 125°C 150°C

0

0.5

1

1.5

0 2 4 6 8

Cycles

Cap

acity

(mAh

)

25oC 125oC 150oC

Batteries discharge nicely at elevated temperature. No capacity loss when alternate between RT and 125oC or 150oC

2

2.5

3

3.5

4

0 300 600 900 1200 1500 1800 2100Time (S)

Volta

ge (V

)

2 mA discharge for 30 min. at 25, 125 and 150oC

125 C

25 C150 C

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SST/Gel Electrolyte/LiCoO2

22.5

33.5

44.5

0 2000 4000 6000 8000 10000Time(s)

Volta

ge v

s. L

i/Li+

First generation design: Stainless steel anode

SST anode

SST current collectorPolymer electrolyte

LiCoO2 cathode

• Successful lithium deposition atSST/electrolyte interface

• First discharge works well, then cell degrades rapidly• Capacity decreases with cycling;

0.31mAh 0.04mAh in 5 cycles

Current Program: Higher Operating TemperaturesDevelopment of Lithium-Free Battery

Lithium-free approach avoids problems with exposing battery to temperatures above Tm of lithium (180oC): lithium electrode created after exposure

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Current Program: Higher Operating Temperatures Development of Lithium-Free Battery

• In-situ deposition of lithium at carbon/polymer interface• Only small capacity loss in 7 cycles:

0.33mAh 0.28mAh• Good reversibility and cycling

SST current collectorPolymer electrolyte

SST current collector

LiCoO2 cathodeCarbon paper anode

SST/Carbon Paper/Gel Electrolyte/LiCoO2

22.5

33.5

44.5

0 2000 4000 6000 8000 10000

Time(s)

Volta

ge v

s. L

i/Li+

Results show that the anode host material is critical for in-situlithium formation

• Second generation design: Thin carbon anode

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Summary and Research Plans

• Accomplished Goals for 9/30/2002New nanocomposite electrolyte integrated into batteryLithium-free battery demonstrated (in-situ lithium formation)

• The Next 6 MonthsStill thinner batteries for plasma-assisted bonding approach

Improve the electrochemical properties of lithium-free battery;demonstrate full-size battery operation and temperature testing

Battery is about the same height as the etched well (300~320μm)

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Smart Wafer Integration byWafer Bonding and Layer Transfer

Yonah Cho , Zhongsheng Luo, Zhengxin Liu, Vorrada Loryuenyong,

and Nathan Cheung

Collaborators : Bruce Dunn (UCLA)

2002 GOAL: Prototyping a SMART wafer with optical metrologyand encapsulated power source

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Motivation

Self-powered sensor wafer Optical metrology capabilityWafer-scale deposition/etching uniformity and end-point mappingApplicable to a large variety of materials (low-k materials and metal)Monitor for hostile processing environments ( Plasma, wet etching, CMP).

SiBattery Detector Photon emitter

Data transmission

Photon emitter Data collecting, processing, storage unit

MEMS SensorDielectric layer

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Milestones2002•Demonstrate subsystem with encapsulation power

2003•Demonstrate integration of signal processing systems with MEOMS on sensor wafer

Progress

•Low-temperature encapsulation demonstrated

•Completion of optical source, switch, and power components

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Justification for ApproachSimulated Effect of incident wavelength on the reflectance

Incident wavelength (A)

Thic

knes

s (µ

m)

θ=35°460nm

The reflectance fluctuation periodicity (2p) is not very sensitive to the incident wavelength: ∆p/d ≈0.4% at λ=460±10 nm, where d is the film thickness.

λ=[400nm,600nm]

λ=[400nm,600nm]

SiO2 onsmartwafer

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Progress: Prototype Components

Solid-stateThin film battery

-

+

Base Si Wafer

Top ViewGaN based LED

V

Electrolyte: LiPONLi based electrodesVmax = 4.2 VoltsCapacity = 0.4mA-hr

CdS optical switch

R dark = up to 10 MΩR light = ~ 10 Ω

λmax = 462 nmI = 20mA @ V< 4V

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Wafer cleaning:wet and dry (O2 plasma)

Lid Si Wafer

Base Si WaferBattery

Optical switch

LED

Bonding

Insertion of components

BatteryOptical switch

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Battery

Optical switch

LED

System-Off

System-On

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Filters for Molecular Spectroscopy

Filter 1

Filter 2

θ

λ2 ± ∆λ

Detector

λ 2

Ref

lect

anc e

( R) &

Tra

nsm

it tan

c e ( T

)

400 600 900 1000

λ2 = 700 nm

500 800

0.0

0.0

0.5

1.0

0.5

1.0

Filter 1

RR

R

Multilayer TiO2/Si3N4/ SiO2 filters Incidence angles:

Filter 1: θ = 35 °Filter 2: θ = 0 °

Filter 2T

T

Wafer surface

λ1 = 460 nm

λ1 λ2Surface molecules Simulated R and T

λ (nm)

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Summary

• Design and prototyping of sensor wafer with optical metrology

• Completion of optical source, switch, and power components

•Photo-detector and filter components to be added• Demonstrate thickness monitoring capability

Goals for 2002-2003

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Ion Flux Uniformity in Plasma Reactors

SFR Workshop & ReviewBerkeley, CA

November 14, 2002

Tae Won Kim and Eray S. AydilUniversity of California Santa Barbara

Chemical Engineering Department

2002 GOAL: build and demonstrate 8” diameter on wafer ion flux probe array in industrial plasma etcher with external electronics

9/30/2002.

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Motivation and Problem Statement• Uniformity of ion bombardment flux is critical to plasma

etching because it determines the uniformity of etching and etching profile evolution.

• Uniform plasma etching processes are developed by trial and error and uniformity requirement is in addition to several otherconstraints imposed on selectivity, anisotropy, etch rate, etc.

• Our goal has been to provide tools that allow fundamental understanding of the factors that affect the plasma and etching uniformity in realistic plasma etching chemistries.

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Experimental Approach•We have been developing and using on-wafer ion flux probe arrays capable of mapping J+ (r,θ) on a wafer and using this probe array to study the factors that affect the plasma and etching uniformity in realistic plasma etching chemistries.

Kim et al., Rev. Sci. Instrum. 73, 3494 (2002)

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Progress SummarySince Program Started

Finished experiments in Lam TCP reactor with 8” wafers and realistic etching chemistries (Cl2/SF6/Ar/He/O2/HBr).

Implemented modeling to understand some of the “wall effects” onetching uniformity in Cl2 etching of Si in TCP reactors.

Imaged low frequency periodic spatio/temporal variations in ion flux in inductively coupled SF6 plasmas

Since April

Designed electronics and built an ICP reactor to implement probearray on rf-biased electrodes.

Developed a theoretical framework and conducted simulations to understand and predict ion flux uniformity in plasma mixtures.

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Nondimensionalized Governing EquationsElectron energy balance

Charged particle mass balance

Boundary conditions

0)exp()83.3()1(exp~ 21

2 =−+−−+∇− eT

effeffinelasticrfeTelasticT DaJBDaDa θ

θβξςθθθ

ereceT

iziz DaDa γθθ

θβ

θαθ −−=∇+∇− ++ )exp()~(~~ 2 E

−+−− −=∇−∇− θθγθθαθ rece

att DaDa)~(~~ 2 E

−+ −= γθθθ e

0=∇ Tθ

TPe θϑθαθ +++ =∇+∇− )~(~~ 2 E

0=−θ

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Framework for understanding Ion Flux Distribution

Ion flux distribution

Skin depthPenetration depth ofplasma powerδ~1/ne

0.5(SF6 >Cl2 >Ar)

p

LBδ2

=

e- energy relaxation lengthdiffusion length w/o losingenergyλe~ 1/ σ (Ar > Cl2 >SF6)

MDRkTDa

e

Reelastic )1(

22

2

γ−><

=

><−=

ee

Rgeffinelastic kTD

HkRnDa

)1(5.1

02

γ

Diffusion of ionsD+ ~ 1/p

+

=DRnk

Da Rgiziz

20

MkT

DRPe eR ><

=+

Ion loss mechanismsurface loss: loss to the wallsvolume loss: i-i recombination

+

+ ><=

DRnkDa Rrec

rec

20

MkT

DRPe eR ><

=+

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Relative magnitudes dimensionless #s determine the ion flux uniformity

15 10 5 00

5

10

z (c

m)

5 10 150

5

10

r (cm)

kTe (eV) n+ (1010 cm-3)

Ar

2.3

2.4

1.8

4.2

5 10 150

5

10

15 10 5 00

5

10

r (cm)

z (c

m)

1.8

3.6

0.5

5.5

Cl2

15 10 5 00

5

10

r (cm)

z (c

m)

5 10 150

5

10

1

6

0

2.6

SF6

B~13Daelastic~0.01Dainelastic~1

B~4Daelastic~102

Dainelastic~104

Darec ~ 102

B~5Daelastic~1Dainelastic~102

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Ion Flux Uniformity in Ar, Cl2, SF6

1.00

.92

1.00

0.92

-15 -10 -5 0 5 10 150.0

0.2

0.4

0.6

0.8

1.0

Imax = 1.42 mA/cm2

Imax = 1.39 mA/cm2

Nor

mal

ized

ion

flux

r (cm)-15 -10 -5 0 5 10 150.0

0.2

0.4

0.6

0.8

1.0

Imax = 0.35 mA/cm2

Imax = 0.42 mA/cm2

Nor

mal

ized

ion

flux

r (cm)-15 -10 -5 0 5 10 150.0

0.2

0.4

0.6

0.8

1.0

Imax = 0.22 mA/cm2

Imax = 0.12 mA/cm2

Nor

mal

ized

ion

flux

r (cm)

1.00

0.82

Ar Cl2 SF6

cross sections

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Can be extended to mixtures

∑=

kkme

emixe m

kTD,

, ν

Electron diffusivity

Elastic collision loss

kelastick

kmixelastic DayDa ,2

, ∑= effkinelastic

kk

effmixinelastic DayDa ,

2, ∑=

Inelastic collision loss

∑=k

kizkmixiz DayDa ,,

Production and consumption of ions

∑=k

kreckmixrec DayDa ,, ∑=k

kattkmixatt DayDa ,,

Positive ion loss by Bohm flux

∑><

=+

kkk

eRmix My

kTDRPe

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Comparison between Experiments and SimulationIout

0 20 40 60 80 1000.0

0.5

1.0

1.5 Measured Predicted

Ion

flux

SF6 mole fraction0 20 40 60 80 100

0.0

0.5

1.0

1.5 Measured Predicted

Ion

flux

Cl2 mole fraction

Ar/SF6 Ar/Cl2

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Comparison between Measured and calculated Uniformity

-15 -10 -5 0 5 10 15

0.6

0.8

1.0

Predicted Measured

Nor

mal

ized

ion

flux

r (cm)

-15 -10 -5 0 5 10 150.6

0.8

1.0

Predicted Measured

Nor

mal

ized

ion

flux

r (cm)

-15 -10 -5 0 5 10 150.6

0.8

1.0

Predicted Measured

Nor

mal

ized

ion

flux

r (cm)

-15 -10 -5 0 5 10 150.6

0.8

1.0

Predicted Measured

Nor

mal

ized

ion

flux

r (cm)

0 % Cl2 10 % Cl2

50 % Cl2 100 % Cl2

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2002 and 2003 Goals• September 30th, 2001 Build and demonstrate

Langmuir probe based on-wafer ion flux probe array using external electronics.

• September 30th, 2002 Build and demonstrate 8”on-wafer ion flux probe array in industrial plasma etcher with external electronics.

Continue to work towards getting the on wafer probe array to work with rf bias.

Increasing time resolution of the probe array.

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Electrical Impedance Tomographybased Metrology

SFR Workshop & ReviewNovember 14, 2002

Michiel Krüger, Kameshwar Poolla, Costas SpanosBerkeley, CA

2003 GOAL: to demonstrate the feasibility of an EIT based sensor to measure plasma induced potential at wafer surface,

by 9/30/2003.

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Motivation• In-situ Plasma Sensing is very important:

– Diagnostics (drifts, detection of process instabilities)– Design (electrode configuration in plasma tools)– Control (to reduce process variability)– Model verification

• Current metrology has shortcomings– Expensive and complex– Invasive, sometimes destructive– No real-time data available, only time-integral

⇒Develop class of sensors based on EIT– Spatially resolved– Time resolved– Inexpensive

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The Problem

What was the state of the wafer during processing?

processingequipmentwafers to

be processed finished wafer

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stage B - EITstage A – special wafer design

stage C – modeling

Our Approach

conductivity profile

physical orchemical processwafer

state

( )θ,rX ( )θσ ,r

EIT based sensor

on wafer

measured conductivity profile

( )θσ ,ˆ rinverse physicalor chemical

modelestimatedwafer state

( )θ,ˆ rX

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Electrical Impedance Tomography• Widely used in biomedical applications, geology and

non-destructive product testing• Basic idea:

– force known current through interior of object from electrodes at edge

– measure potentials at edge electrodes• Stage B – EIT:

– reconstruct conductivity σ profile from potential measurements V at edge measurements

– simplified explanation•• parameterize estimate • minimize using NLP

electrode

Iin

Iout

( )θσ( )( )θσϕ ˆ−V

( )σϕ=V

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• Hot spot:• Inverse algorithm works well

( )( ) ( )

v

ee yyxx

Keyx σσ22

,−+−

=∆

actual conductivity profile estimated conductivity profile

Simulation Example: two hot spots

hot spot centers

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wafer

electrodesensing area

EIT based sensor wafer• Simple electronics• Electrodes placed at edge• Minimal wiring • Spatial information• Minimal processing• Many applications:

⇒ Etch rate/uniformity⇒ Plasma induced potential at wafer surface– Temperature

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Etch Rate: Stage A – Wafer Design• Conductance of doped Poly-Si function of thickness• Simple process flow• Easy to test in XeF2 etcher

Al electrode Oxidized

wafer

dopedPoly-Si

32 equally spaced Al electrodes

Doped poly-Si disk (r = 3.5 cm)

Pads to connect via edge-board connector to DAQ

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loadingeffect

∆σs[

/Ω]

sensor wafer

time [s]

4 point probe

1cm1 inch, rotated 15° CCW

σs = 0.156 /Ω

exposed to XeF2

In-line Results: XeF2 etch• Absolute measurements not possible due to:

– unaccounted contact resistances– nonlinearities in DAQ– finite size of electrodes

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nanospec nanospec

In-line Results: Si wet etch∆ thickness after Tetch =45s ∆ thickness after Tetch =75s

EIT EIT

wet etch roughens surface

⇓∆telec > ∆tphys

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Plasma Induced Potential• Conductance of transistor channel

function of gate potential• Build resistive network of

transistors on wafer• Transistor gates exposed to plasma

• 4 nodes ⇒ 12 current patterns• network of transistors implemented

in Hspice

source drain

plasma

gate+ + + +

Vgs > Vt , σ > 0Vgs < Vt , σ ≈ 0

source drain

Iin

Iout •Hspice simulation to generate “measurements”•EIT algorithm capable to extract correct gate potentials !

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2003 Goals• Study sensitivity: what is optimal sensor layout (electrode

positioning, nominal conductivity, etc.) such that sensitivity in center of wafer is enhanced, by 9/30/2003.

• Demonstrate the feasibility of an EIT based sensor to measure plasma induced potential at wafer surface, by 9/30/2003.