September 2004OpenAccess GearDavid Papa1, Zhong Xiu2, Christoph Albrecht, Philip Chong, Andreas Kuehlmann3

Cadence Berkeley Labs1University of Michigan, 2Carnegie Mellon University, 3University of California at Berkeley

• Built on OpenAccess for integration into other tools, e.g. placement• Two modes: Full timing analysis and incremental timing analysis• Different models for wires: No wire delay, bounding box model;

can be extended easily to more accurate models• Library formats: Cadence .tlf and Synopsys .lib• Timing constraints: Subset of .sdc constraints• Standardized timing reports• Detailed documentation

Cell (DFFX1) {Cell (DFFX1) {… …… …pin(Q) { pin(Q) { … …… …timing() { timing() { related_pin : "CK"; related_pin : "CK"; timing_sense : non_unate; timing_sense : non_unate; timing_type : rising_edge; timing_type : rising_edge; cell_rise(7x7) { cell_rise(7x7) { index_1 (“… …"); index_1 (“… …"); index_2 (“… …"); index_2 (“… …"); values ( … …); values ( … …); } } }}}}

CELL(DFFX1CELL(DFFX1 … … … … TIMING_Model(7x7TIMING_Model(7x7 (Spline(Spline (LOAD_AXIS …)(LOAD_AXIS …) (INPUT_SLEW_AXIS …)(INPUT_SLEW_AXIS …) data(… …)data(… …) )) )) … … … …Path( CK => Q … …)Path( CK => Q … …)… …… …Setup( D => CK … …)Setup( D => CK … …)… …… …))

#SDC constraint file#SDC constraint filecreate_clock create_clock – –period 1 [get_ports {CK}]period 1 [get_ports {CK}]set_input_delay 0.04 set_input_delay 0.04 – –clock CK [all_inputs]clock CK [all_inputs]set_output_delay 0.02 set_output_delay 0.02 – –clock CK [all_outputs]clock CK [all_outputs]set_driving_cell set_driving_cell – –lib_cell INVX2 [get_ports {G*5}]lib_cell INVX2 [get_ports {G*5}]set_load 0.01 [get_ports {G2*}]set_load 0.01 [get_ports {G2*}]

.tlf .lib .sdc Documentation

Static Timing Analysis: OAGear Timer

BUF1BUF1

ANDAND

… …

Standard Cell Library

oaTerm oaTerm

oaGearTimerPointMaster (with arcs)oaGearTimerPointMaster (with arcs)

InstantiatedInstantiated

Inst1Inst1

Inst6Inst6

Inst5Inst5

Inst4Inst4

Inst3Inst3

Inst2Inst2

oaInstoaInst

oaInstTerm oaInstTerm oaGearTimerPointoaGearTimerPointoaTerm oaTerm

oaGearTimerPointoaGearTimerPointoaGearTimerExtDelayoaGearTimerExtDelay

oaNetoaNet

Design

The timing information is stored using the OpenAccess

extension mechanism (oaGearTimerPoint, …)

Incremental timing analysis• When a modification occurs:

– Mark the required arrival time of nodes in the fan-in cone invalid

– Mark the arrival time of nodes in the fan-out cone invalid

• Later if there is a query, update the timing information

Fanin coneFanin cone

Fanout coneFanout cone

ModificationModification

Query: update arrival time, required arrival time and slew rate

Benchmarks• OAGear provides two sets of benchmark designs:

– Open Benchmarks: ISCAS89 benchmark suite and a hypothetical 250nm standard cell library

– Restricted Benchmarks: http://crete.cadence.com/, Verilog files and scripts are available, Faraday benchmark suite and a 250nm GSC (Generic Standard Cell) library

• Necessary binary files to convert those designs into OpenAccess formats

• Aimed for researchers to test their timing driven placement algorithms and incremental placement algorithms

BENCHMARKSTimingLibrary

OpenAccessFormat

Benchmarks

GUI: Bazaar

• Easy to read and extend, built on Qt and OpenGL• In the style and spirit of the OpenAccess standard• Layout Editor displays design directly from database• Controller operates Capo API for on-demand placement• Schematic Editor displays design’s logical connectivity• Fast OpenGL rendering scales to very large designs• “oaRegionQuery” accesses only relevant portions of the

design

Introduction

• OpenAccess is a “community-source” industry-standard EDA database developed to help promote tool interoperability

• Tools using OpenAccess are becoming available in industry, but resources for academic research are lacking

• Our project: OpenAccess Gear (OAGear)– Release useful tools and libraries to enable research– Make OpenAccess a useful platform for academia– Provide common infrastructure for research and

benchmarking– Adopt an open source development model– Initiated and supported by Cadence Design Systems

Overview

• Current focus on four main components– GUI: Layout and Schematic Viewer– Static Timing Analysis– Generic Standard Cell Placement Interface: Capo API– Benchmarks in OpenAccess Format

Summary

• Planned Release Date: September 30, 2004• OAGear Home: http://oagear.sourceforge.net/• OpenAccess Home: http://openeda.si2.org/• Available as open source, free for any use

– Open development model maximizes exchange of ideas and software between universities

– Users encouraged to contribute bug reports, patches and functional components

• Ongoing development effort• Possible future components: synthesis, routing, extraction

GUI: Bazaar

• “Bazaar” = open market place where people bring their goods to sell

• Designed for easy to rework code and enhanced interoperability – Model-View-Controller design

pattern• Tool developers can bring their

work to our “Bazaar” to contribute and promote them

“Model-View-Controller” Design Pattern Applied to Bazaar

OpenAccess (MODEL)

Bazaar(VIEW) CONTROLLER

Generic Placement Interface + Capo API• Universal placer interface:

– place(oaLib,oaCell,oaView)

• Routines to: – Import OpenAccess Designs and build Capo internal

data structures– Run (potentially custom) Capo Placement Flows– Timing driven placement flows with prototypes

• “Strategy” design pattern, for placer interoperability– Pick and choose EDA algorithms – Compose new flows and combine tools in new ways

• previously too difficult!

• Future uses:– Designed to be extended for Incremental flows.– Contributions from other researchers

OpenAccess

Static Timing Analysis

PlaceBlock

Capo

RunTimer

WeightNets

OpenAccess

GUI

Benchmarks

Timer

PlacementAPI

Capo

Technical Capabilities

Design Overview

Static Timing Analysis: OAGear Timer