semicon/japan industry briefing december 5, 2012
TRANSCRIPT
SEMICON/JapanIndustry Briefing
December 5, 2012
Executive Summary
• The Program has achieved critical momentum
• Tools selected for program demonstrations– Broad coverage of tool set and Supplier base– Tool optimization added to program scope
• Coordinating across Industry on precompetitive opportunities
Global 450mm Consortium
• A public/private program based at the College of Nanoscale Science and Engineering in Albany, NY
• Driving effective industry 450mm development– Coordinate test wafer capability supporting development– Demonstrate unit process tool performance– Improve tools with Suppliers to ready for customer operations
• G450C Members– CNSE / Research Foundation– GLOBALFOUNDRIES– Intel– IBM– Samsung– TSMC
GM/VP and CoordinatorPaul Farrar, CNSE
G450C Program Organization
Director,Integration (Samsung)
Director, Program Coordination
(Intel)
CVD/PVD/ImplantEngineering Director
(IBM)
Co-directors,Fab Operations
(CNSE/TSMC)
VP/ GM, Internal / OperationsJohn Lin, TSMC
VP/GM, Industry / StrategyFrank Robertson, Intel
LithographyEngineering Director(GLOBALFOUNDRIES)
CMP/Thermal/CleansEngineering Director
(TSMC)
Etch EngineeringDirector
(Samsung)
• Industry consortium coordinated by not-for-profit entity• Leveraging New York State funding, matched by all industry participants• Broadly-shared management of Program execution• >60 staff on board now; >150 by 2014, with ~60 Supplier engineers on site
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Development and Technology Intercept Targets
------ 2010 2011 2012 2013 2014 2015 2016
Early Development of Silicon and factory integration / automation standards, interoperability test beds for component andstandards verification; early tool development
G450C Program
ISMI 32/22nm Equipment Performance Metrics
10nm and beyond
Tools for Consortium Demonstrations (unit process)
Ready for IC Makers
Early 450mm Development
Test Wafers to support development and demo
14nm G450C Demonstrations
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450mm and 300mm tools progress synchronously through technology generations
Full set of process and metrology, automation
Nominal “nm” = ITRS M1 Half Pitch
Supplier Tool DevelopmentTool Demo /Improvement
G450C TW
Cleans, Blanket Films, Etch, etc.
Bare Wafers
Imprint /Spacer doubling, 300mm Coupons 193i on 450mm
Metrology
Increasing scope and complexity of process / metro capability
Manufacturing Execution Systems, Engineering Data Collection and analysis tools, Virtual Fab logistics for globally-distributed tool set
Alpha Beta Pre-production
Wafer pool coordination for multiple use, re-use, reclaim
2011 2012 2013 2014
Test Wafer Support for Tool Development
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Baseline Report
EMA
Gauge Study PDC
MDC
DOE Marathon
Development
Supplier Testing
Demo Tool
Test Plan
Tool Improvements as Indicated by Pareto
Tool Ready for Customers
G450C Demo
Increasing tool maturity and data-based confidence
Demo Report
EMA Report Tech Transfer
Standardized methods and consistency across all tools
2012 2013 2014 2015 2016
Demonstrations Drive Tool Improvement
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450mm Equipment Development
Tool Selection Overview
• Immediate objective: – Select at least one Supplier for Priority 1 and 2 tools for
negotiation of Demo / full flow @ CNSE • Criteria:
– Technical and commercial scores from RFQ– Balance across competitive Supplier base– Benefit to all Members and NY State
• Process:– Research Foundation RFQ– Member selection teams used pre-agreed criteria– Management Council approved recommendation
Closing deals with selected Suppliers10
450mm Cleanroom in CNSE (NFX) Cleanroom ready by January 2013; First tools installed March 2013 450mm OHV is ready, could carry 300mm FOUP in 450mm inter-bay 4 stockers with 1000 bins ready in Feb 2013
G450C
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G450C Test Wafers/ Operations
Wafer Availability
• Initial order for 6000 sc-Si (SEMI M76)– Growing capability to meet 2013 need
• Initial order for 2000 cast wafers (SEMI M74)– Provision for wafer handling needs
• Bring up additional supply in 2013– > 15,000 wafers and progress to prime quality
(SEMI M1) needed next year– Exploring engagement with multiple Suppliers
Establish roadmaps for cost / quality learning13
Wafer Industry Support Model
• Suppliers providing tools for the program get access to test wafers at significant discount to individual purchase
• Program expansion:– Suppliers without tools in the program can also get
discounted cost if they return wafers and provide data– Suppliers may take advantage of program volume
aggregation to procure wafers at consortium cost• Wafer pool managed for budget, allocation to needs• Pass on our costs beyond program capabilities for TWs
Adjust for wafer costs, reuse/regen, scrap rates, etc.14
Wafer Cost Sharing
• To support 450mm development and maintain Consortium budget, wafer cost will be shared with industry
• G450C will be loaning wafers for a given duration, at a shared cost (wafers available for purchase at 100% of G450C cost)
• G450C cost share represents a considerable discount from independent small volume purchases
• Factors for cost share will include usage/needs, reuse/regen, wafer loan duration, scrap, etc.
• Test wafer process/metrology capability ‘Menu Card’ being developed for industry needs
For wafer request/loan discussion, more information available at: http://www.g450c.org/wafer-loan.aspx 15
Wafer Quality Continues to Improve
Most recent ~ 66 @ 38nm sensitivity
August 2012: ~5 defects/wafer
2011: ~ 175defects/wafer
2012: ~50defects/wafer
2010: > 3000defects/wafer
Defects per wafer reduced significantly(@ 90nm sensitivity)
Defects / Wafer
Year-to-year comparison using >90nm defect size recipeMigrating to 40nm and below
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Process Film Tool/service2012 4Q 2013 1Q 2013 2Q 2013 3Q 2013 4Q
10 11 12 1 2 3 4 5 6 7 8 9 10 11 12
FEOL
Oxide
Cleaning tool Supplier
★
Poly ★
SiN ★
PR ★
Wafer Quality Roadmap & Reclaim Capability
Supplier side G450C On-site ★
Wafer quality roadmap
M74 Spec
M76 Spec
2012 2013 2014 2015 2016
1H 2H 1H 2H 1H 2H 1H 2H 1H 2H
M62 Spec
M1 Spec
Q2, 2014
Q1, 2015
Wafers meet SEMI spec
•SFQR meet (~90% area)•Particle (~70% pass rate)
Q2, 2013
FEOL wafer reclaim capability
Mechanical Wafer
Test / Mon Wafer
Prime Wafer
Epi Wafer
Test Wafer Routes (Menu Card)
Route name Route Description5 Oxide film - thermal 110AA Oxide film - thermal 1000AB Oxide film - thermal 5000A4 Oxide film - PECVD 1000AD Implanted wafersE PR wafersF PR wafers + implantG PR wafersI patterned wafersJ Nitride film - LPCVD 1000AK Nitride film - LPCVD 2000AL Poly film (1000A)M Poly film (3000A)O Nitride film - PECVD 200AQ TiN film (1000A)V Bare wafersW Bare wafers Mechanical
Route name Route Description4a Oxide film - PECVD 1000AC Low-K filmN Ni filmP TiN film (600A)R W filmS TaN filmT Cu filmsU Al film
Vbe Bare wafers
Front End Metals
Metrology Readiness
• Metrology capability expanding to support virtual test wafer operations
Tool Type Forecasted Ops Ready In Japan
Forecasted Ops Ready in New York
Supplier Hosted Metro Site
Advanced Bare Wafer Inspect
Operational Operational
Ellipsometer/ Scatterometry
Operational 1st Tool Operational2nd Tool Ready December 2012
4 pt Probe Operational Operational
AFM January 2013 Operational
TXRF January 2013 Operational
Opaque Film Thickness
Operational Operational
Macro Inspection Operational Operational
Defect Review SEM March 2013 May 2013 April 2013
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G450C Operations - CNSE Cleanroom
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11 tools installed in NY cleanroom, 3 in progress
Existing space allows for 3-4
additional metrology tools
incoming 2H’12 / 1H’13
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On Site Equipment Progress - Films
PECVD Uniformity example
Thickness uniformity SiN: 5.06 % 1.46 % Ox: 14.5 % 1.62 %
Throughput Compatible to 300 mm
Q2, 2012
Q3, 2012
SiN
Ox
5.06 %
1.46 %
14.5 %
1.62 %
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Wet Clean and Wafer Recycling
Bar brush Recent optimization
Front side Back side
Recycled oxide wafer:
Wet Cleaning:Optimizing early tool
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On Site Equipment Progress: Defects
• Passed qualification (in July)– Current particle sensitivity 38nm – Continue improving to 30nm
Particle Inspection A: on site
Particle Inspection B: off site • To be moved in soon
– Bare Si wafer particle sensitivity demo < 30nm– Target sensitivity at ~ 25nm
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Summary and Opportunities – Test Wafer Operations
Summary• Silicon supply capability improving across the industry
• G450C operations have resulted in cleaner wafers• Proven logistics in place, continuous improvement underway• Processed wafer loans increasing• Multiple Wafer Carrier suppliers in place and progressing well• G450C expanding equipment base in existing clean room
Your Opportunities• Leverage G450C Wafer Bank to accelerate your equipment
development• Engage G450C for wafer loan requests via website
http://www.g450c.org/wafer-loan.aspx24
Lithography Update
G450C Lithography Tool Roadmap
2012 2013 2014 2015 2016
2H 1H 2H 1H 2H 1H 2H 1H 2H
Coupon + Imprint
193i patterning access at Supplier site Positive
450mm Imprint + Spacer
300mm Imprint
193i Coupon, EUV Coupon
Potential G450C tool @ CNSE
• Imprint solution before optical lithography available
– Imprint + Spacer extends resolution to 14-15 nm (2013 - 2014)
• Pull in early 193i tool to 2H14
• Expect 193i Litho full demo capability 2015 - 2016
Lithography Strategy
Working on an Industry solution to accelerate 450mm scanner development
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Imprint as Interim Patterning Measure
450 mm tool is completed, operational by end of 2012
Explore spacer process to extend ~20nm to 10 nm
Litho, Etch, Films engineering team developing templates and
processes to prepare patterned test wafers
Work with Suppliers to build up complete process
Coupons – 193i / EUVImprint
30nm 1:2 40nm 1:2
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300mm Nano Imprint Performance
Good CDU, LER; Profile OK, Rdl ~15nm
SiN & APF (amorphous carbon) etching
Good CDU, Line edge
Successfully etched SiN & APF
Poly Spacer etch on-going
Coating at Supplier site
Solving particle issues
Working on re-work issue
450mm Nano Imprint Status
450mm tool is ready in Nov, (Austin) –tuning process
Template design: 22nm ok, verify 14nm capability
Poly spacer for pitch doubling – on going
Negotiate 1st phase patterning wafer capacity in Austin
450mmDemonstration Test Methods
(DTM)
Equipment Performance Metrics (EPM)
• “1X nm Range” technology targeted for 2013-14 G450C demonstrations – “ITRS 14 nm Nominal”– Snapshot in continuum of technology progression– Performance of 450 mm and 300 mm tools advances in lock-
step
• Update Process (by end of 2012):– Suppliers propose competitive performance at ‘14 nm” without
revealing sources of guidance or disclosing customer IP – Consortium staff take best Supplier proposals for each tool type
to propose EPMs– Consult with Suppliers for aligned output– Validate EPMs meet Member Companies needs
• Implementation– Ensure Demo test plans allow for full range of tool performance– Report the data for each tool with comparison to Demo EPM
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Updated Equipment Performance Metrics
Attribute Units Metrics
Pulse width (measured at peak-50C) sec 1E-4 ~ 1E-1 (0.1msec to 100msec)
Ramp-up Speed (250 - 1350C) C/sec > 1E+4
Peak temperature Within Wafer uniformity (3σ )
C <10
Mean peak temperature Wafer to wafer uniformity (3σ )
C <5
Center-to-edge variation through ramp range C < 10
Ramp-down Speed (1350C to 650C) C/sec > 100
Overshoot (250C - 1350C) C < 2
Setting Time (250C - 1350C) to within 1% of set point
sec < 1E-5
Slip-free process at maximum temperature C 1300 (1350)
Residual oxygen concentration (400-1100C) ppm < 5
Defects, PWP On bare Si ≥ 30nm, mechanical transfer only #/cm2 < 0.0028
Defects, PWP Backside on Si ≥ 50 nm, mechanical transfer only
#/cm2 < 0.28
Defects, PWP On bare Si ≥ 26nm (with process)
#/cm2 < 0.007
Defects, PWP Backside on Si ≥ 50 nm (with process) #/cm2 < 0.28
14nm targets for demo
Agreed with all Suppliers
Publish update by EOY
Millisecond Anneal Example
Demonstration Test Methods (DTM) Overview
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• Equipment Maturity Assessment (EMA) includes a couple of dozen parameters with clear categorization of the tool characteristics based on defined criteria, as well as compliance with applicable standards; output is a report recommending pre-test actions and testing levels
• Test planning is based on the tool maturity, goals for reliability, throughput of the tool and confidence objectives, combining any Supplier pre-data with demo testing via Bayesian statistics
• Gauge Studies run for all metrology needed for the demo to ensure adequate Precision/Tolerance ratios• Mechanical Dry Cycle (MDC) - nominally 5000 cycles of the wafer movement functions without process for
reliability and mechanical handling defect data• Passive Data Collection (PDC) - a test of process stability on a baseline recipe for each application.• Initial data is analyzed and a Baseline Characterization Report issued; decisions are made about
subsequent testing or reversion to tool development to address any hurdles• Sensitivity Analysis - DOE optimization of the recipe(s) and RSM characterization of the process window(s)• Marathon - 24/7 manufacturing simulation to capture tool productivity and reliability performance using
E10 states over a significant period, running process with sample testing to capture rates/variability, defectivity and tool-specific performances like step coverage, gap fill, LER, etc..
• A final report is drafted, the Supplier has opportunity for comment, recommendations for tool improvement are made and demo is completed with web publication
DTM Components
Demonstration Test Methods (DTM)
Duration 2-6 months
Demonstration Test Methods (DTM)
Standardized Reports
Executive SummaryDemo Test Background• History and previous testing• EMA Report• Test PlanTest Results• Process Capability
Performance− Gauge study− PDC− Sensitivity Analysis (SA)− Marathon Test
• Equipment Performance− MDC− Marathon Test
• Others− CoO, Standards
compliance, software & user interface, factory integration
ConclusionsSupplier Input 38
Compliance with SEMI Standards Required(www.semi.org)
• SEMI E5: SECS II • SEMI E30, E30.1, E30.5: GEM ("Fully GEM Compliant" as well as GEM
Compliant per section 8) • SEMI E37: HSMS • SEMI E37.1: HSMS-SS • SEMI E39, E39.1: Object Services Standard: Concepts, Behavior and Services • SEMI E40, E40.1: Standard for Processing Management (PJM) • SEMI E87, E87.1: Specification for Carrier Management (CMS) • SEMI E84, E84.1: Specification for Enhanced Carrier Handoff Parallel I/O
Interface • SEMI E90, E90.1: Specification for Substrate Tracking (STS) • SEMI E94, E94.1: Specification for Control Job Management (CJM) Stream 7
Process Program Management for recipes (E5, E30)
Definition and measurement of equipment reliability, availability, and maintainability during program testing will conform to SEMI E10-0304
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Self-audit completed and findings released (all medium to high risk non-conformances are to be addressed):• S2-0200: Safety Guidelines for Semiconductor Manufacturing Equipment
including Operational Hazard Analysis covering tool installation, operation and maintenance (per S2-0200) completed for tool install operation / maintenance
• S8-0308: Safety guidelines for ergonomics engineering of semiconductor manufacturing equipment
• Environmental Characterization Data Summary Work Sheet 6 per International Semiconductor Manufacturing Initiative (ISMI) guideline #06124825A-ENG completed and provided electronically prior to shipment
100% Compliance to Safety/Ergo Requirements
It is an absolute requirement that all equipment must be safe to operate and maintain at any stage of maturity
Equipment spare parts and modules must either be small and light enough to handle safely during maintenance, and clearances adequate, or ergonomic
handling aids must be provided40
Further Standards-related Requirements
• Footprint, height and weight dimensions of the Equipment as well as the move-in packages must conform to SEMI E72 specifications
• The Equipment loadport must have a RF ID reader compatible with RFID tags (model numbers TIRIS multipage MicroTag RI-TRP-DR2B) on the FOUP per SEMI E99
• The system must have adequate PGV docking interface exclusion zone per SEMI E64-0600 modified as needed for the SEMI E154 450mm load port
• The Equipment configuration must have a minimum of one load port that confirms to latest revision of SEMI E154
• The Equipment load port must be capable of receiving 450mm FOUPs confirming to SEMI E158.
• The Equipment load port must be capable of receiving lots delivered by 450mm Personnel Guided Vehicles (PGVs)
G450C will require SEMI M74 Mechanical Wafer, M76 Developmental Test Wafer and M1 Prime Wafer Standards and use SEMI-compliant carriers for all
program test wafer pool /demo purposes41
Facilities-Related Standards
• The Equipment must comply with the current versions of the (U.S.) National Electric Code - NFPA 70 and Uniform Fire Code - NFPA 79
• The Equipment must be designed to SEMI F47 “Specification for Semiconductor Processing Equipment Voltage Sag Immunity”
• All Equipment and materials which will come into direct contact with the wafer or FOUP should be grounded per SEMI Spec E78-0706.
• All Equipment enclosures must have an IEC ingress protection rating of IP31 or better• SEMI E6-1296 facilities interface datasheets completed and provided electronically
prior to shipment
It is recommended that the 450mm Equipment is designed to EU regulatory requirements including, but not limited to, Machinery Directive 98/37/EC, Pressure Equipment Directive 97/23/EC, Electromagnetic Compatibility Directive 89/336/EEC, and Low Voltage Directive 73/23/EEC as applicable
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Industry Collaboration and Engagement
Core G450CProgram
Process & Metrology
Wafer Pool
Regional 450mm
Regional Tool Suppliersnot in G450C core program
Tool Suppliers w/G450C
Demos
Wafer Suppliers
Guidelines &Requirements
Global Supply Chain Ecosystem Example: G450C Linkages
Opportunities
Adjunct Tool Demos and CIP projects
EEMI 450
+ R&D entities: FhG IMEC …KSIA
I450Metro
• Component Suppliers• Infrastructure Providers
…
Standardization Opportunities
Guidelines
Global Standards
Compliance testing
Back End (Die Prep) WG
Standardization WG
Facilities Council
TBD: Harmonize microcontamination specs
G450C Groups
G450C ProgramActivities
Regional Cooperation
Equipment optimizationFacilities optimization
EHS optimization
46TBD: Metrology collaboration
Discussion this week with ESG-J
Precompetitive Cooperation
• Identified top facilities project objective with M+W• Identified top standardization focus areas with SEMI• Defined pilot project: tool installation at CNSE with
adaptor plate and consolidated points of connection• F450C membership defined and first meeting with
G450C rolled out project priorities toward proposals• Workshop planned with SEMI, F450C and G450C for
early 1Q13 to explore further work• 14nm EPM update with standards guidance based on
Supplier tool agreements to be published by end of year
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Top Areas for Precompetitive Cooperationwith SEMI and F450C (first targets)
• Top Standardization interest areas– Aisle space / width, ceiling height– General sizing/loading/dimensions– EMO interface, control architecture– Crane, gantry– Templates
• Top facilities project interest areas– Gas interface boxes, VMBs, cooling water manifolds, etc.– Minimize facilities POCs– Standard hookups for power, PCW, CDA, PV, GN2, exhaust, datacom– Improved AMC detection/response– Pumps and pump frames, etc.– He recycling (Backside cooling ), H2 recycling (EUV)
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TEL Facilities Cost Reductions in Albany
Page 50G450C
Summary
• G450C has launched with full industry momentum
• Significant progress towards the 450 mm transition is continuing in all areas of the supply chain
• Collaboration and synchronization remain critical for a cost effective and timely 450 mm transition
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Questions and Discussion
450 mm Reference Materials Location and Contact Information
• Guidelines and other public documents, including Wafer Loan Program Details, Demonstration Test Methods and Equipment Performance Metrics can be found at: http://g450c.org
• For further information or to engage in opportunities with the Global 450 mm Consortium program:
Dave Skilbred
G450C Program Coordination Director
518.441.7656
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