schematic,folsten mbp17 · 2018-09-13 · pg 71 conn pg 71 conn j4520 pg 17 (up to 12 devices) 4...

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TABLE_TABLEOFCONTENTS_HEAD TABLE_TABLEOFCONTENTS_HEAD


TABLE_TABLEOFCONTENTS_HEAD

APPLE INC.

6

DESIGNER

DESCRIPTION OF CHANGE

REV.

A

D

C

B

A

D

C

B

8 7 5 4 3 2 1

8 7 6 5 4 3 2 1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARYPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORAGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

TITLE

DRAWING NUMBER

SHT OF

METRIC

DRAFTER

ENG APPD

QA APPD

RELEASE

DESIGN CK

MFG APPD

SCALE

NONE

MATERIAL/FINISHNOTED ASAPPLICABLE

SIZE

DTHIRD ANGLE PROJECTION

DIMENSIONS ARE IN MILLIMETERS

XX

X.XX

X.XXX

DO NOT SCALE DRAWING

REV ZONE ECN

CKAPPD

DATE

ENGAPPD

DATE

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

ANGLES

SCHEMATIC,Folsten_MBP1706/15/09

4553 08/20/2008

YWU_K20Current & Voltage Sensing

4452 07/22/2008

BEN_K20K20 SMBUS CONNECTIONS

4351 05/28/2008

CHANG_K20LPC+SPI Debug Connector

4250 05/01/2008

M98_MLBSMC Support

4149 06/06/2008

T18_MLBSMC

4048 07/18/2008

CHANG_K20Front Flex Support

3946 07/14/2008

M98_MLBExternal USB Connectors

3845 05/01/2008

M98_MLBSATA Connectors

3743 07/14/2008

M98_MLBFireWire Ports

3642 05/28/2008

YWU_K20FireWire Port Power

3541 04/01/2008

M98_MLBFireWire LLC/PHY (FW643)

3439 07/15/2008

SUMA_K20Ethernet Connector

3338 07/15/2008

SUMA_K20Ethernet & AirPort Support

3237 07/22/2008

SUMA_K20Ethernet PHY (RTL8211CL)

3135 10/15/2008

BEN_K20ExpressCard Connector

3034 05/01/2008

M98_MLBRight Clutch Connector

2933 04/01/2008

M98_MLBDDR3 Support

2832 07/14/2008

BEN_K20DDR3 SO-DIMM Connector B

2731 06/10/2008

BEN_K20DDR3 SO-DIMM Connector A

2629 10/15/2008

BEN_K20FSB/DDR3/FRAMEBUF Vref Margining

2528 05/01/2008

M98_MLBSB Misc

2426 04/01/2008

M98_MLBMCP Graphics Support

2325 04/01/2008

M98_MLBMCP Standard Decoupling

2222 06/06/2008

T18_MLBMCP Power & Ground

2121 06/06/2008

T18_MLBMCP HDA & MISC

2020 06/06/2008

T18_MLBMCP SATA & USB

1919 06/06/2008

T18_MLBMCP PCI & LPC

1818 06/06/2008

T18_MLBMCP Ethernet & Graphics

1717 06/06/2008

T18_MLBMCP PCIe Interfaces

1616 06/06/2008

T18_MLBMCP Memory Misc

1515 06/06/2008

T18_MLBMCP Memory Interface

1414 06/06/2008

T18_MLBMCP CPU Interface

1313 04/01/2008

M98_MLBeXtended Debug Port(MiniXDP)

1212 04/01/2008

M98_MLBCPU Decoupling & VID

1111 04/01/2008

M98_MLBCPU Power & Ground

1010 04/01/2008

M98_MLBCPU FSB

99 09/24/2008

K20_MLBSignal Aliases

88 05/07/2008

RXU_K20Power Aliases

77 09/24/2008

K20_MLBFunctional / ICT Test

66 07/11/2008

BEN_K20JTAG Scan Chain

55 04/01/2008

K20A_MLBBOM Configuration

44 NA

NARevision History

33 07/24/2008

RXU_K20Power Block Diagram

22 04/01/2008

M98_MLBSystem Block Diagram

04/01/2008

MCP Constraints 1 M98_MLB90102

04/01/2008

Memory Constraints M98_MLB89101

04/01/2008

CPU/FSB Constraints M98_MLB88100

05/07/2008

Misc Power Supplies RXU_K208799

07/18/2008

LCD Backlight Support YLEE_K208698

03/19/2009

LCD BACKLIGHT DRIVER KIRAN_K208597

02/13/2008

Graphics MUX (GMUX) T18_MXMGMUX8496

05/21/2008

1.1V / 1V8 FB Power Supply RXU_K208395

09/24/2008

DisplayPort Connector K20_MLB8294

05/01/2008

Muxed Graphics Support M98_MLB8193

11/01/2007

GDDR3 Frame Buffer B (Top) M88_MLB8092

04/04/2008

GDDR3 Frame Buffer A (Top) M99_MLB7991

07/14/2008

LVDS Display Connector M98_MLB7890

05/21/2008

GPU (G96) CORE SUPPLY RXU_K207789

09/24/2008

NV G96 Video Interfaces K20_MLB7688

05/12/2008

G96 GPIOs & Straps M98_MLB7587

09/24/2008

NV G96 GPIO/MIO/MISC K20_MLB7486

04/01/2008

GDDR3 Frame Buffer B (Bottom) M98_MLB7385

04/01/2008

GDDR3 Frame Buffer A (Bottom) M98_MLB7284

09/24/2008

NV G96 FRAME BUFFER I/F K20_MLB7182

04/01/2008

NV G96 CORE/FB POWER M98_MLB7081

04/01/2008

NV G96 PCI-E M98_MLB6980

05/19/2008

Power FETs YMA_K206879

09/09/2008

Power Control YMA_K206778

05/21/2008

Misc Power Supplies RXU_K206677

05/21/2008

CPU VTT Power Supply RXU_K206576

05/21/2008

5V_S0 / MCP CORE REGULATOR RXU_K206475

05/21/2008

1.5V DDR3 Supply RXU_K206373

05/21/2008

5V / 3.3V Power Supply RXU_K206272

05/21/2008

IMVP6 CPU VCore Regulator RXU_K206171

05/21/2008

PBus Supply & Battery Charger RXU_K206070

05/21/2008

DC-In & Battery Connectors RXU_K205969

09/29/2008

AUDIO: JACK TRANSLATORS AUDIO_K205868

09/29/2008

AUDIO: JACKS AUDIO_K205767

09/29/2008

AUDIO:SPEAKER AMP AUDIO_K205666

09/29/2008

AUDIO: HEADPHONE AMP AUDIO_K205565

09/29/2008

AUDIO: LINE IN AUDIO_K205463

09/29/2008

AUDIO:CODEC AUDIO_K205362

05/01/2008

SPI ROM M98_MLB5261

06/17/2008

Sudden Motion Sensor (SMS) YWU_K205159

09/24/2008

WELLSPRING 2 K20_MLB5058

05/19/2008

WELLSPRING 1 YMA_K204957

04/01/2008

Fan Connectors M98_MLB4856

05/28/2008

Thermal Sensors YWU_K204755

PROJECT SPECIFIC CONNSN/A

N/A

123

98PCB Rule Definitions

04/01/2008

M98_MLB

109

97Project Specific Constraints

04/01/2008

M98_MLB

108

96GPU (G96) Constraints

05/01/2008

M98_MLB

107

95SMC Constraints

04/01/2008

M98_MLB

106

94FireWire Constraints

04/01/2008

M98_MLB

105

93Ethernet Constraints

04/01/2008

M98_MLB

104

92MCP Constraints 2

04/01/2008

M98_MLB

103

9111 04/01/2008

K20_MLBTable of Contents

Page(.csa) Date

SyncContents(.csa) Date

ContentsPage Sync08/12/2008

Current Sensing YWU_K204654

Date

ContentsPage(.csa)

Sync

Production Release 6/19/096/19/09738810B

1

051-8071

98

SCHEM,Folsten,MBP17

B

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1


II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART



DRAWING NUMBER

SHT OF

SIZE

D

J9400

DISPLAY PORT

J9000

CONN

LVDS

PG 71

CONN

PG 71

Conn

J4520

PG 17

(UP TO 12 DEVICES)

4

TMDS OUT

Line Out

2

CTRL

IR

J4710

CLK

SATA

(UP TO FOUR PORTS)

Conns

J6800,6801,6802,6803

PG 41

MCP79PG 19

PCI

PG 19

LPC

38

9

PG 40

SATA

U6301 U6500U6400

PG 59

PG 56PG 55

HEADPHONE

Audio

Audio

Codec

FSB

64-Bit

2 UDIMMs

XDP CONN

POWER SUPPLY

PG 28

J3400 U3900

PG 33

Conn

88E1116

PG 31

GB

E-NET

Amp

Speaker

Amps

PG 54

PG 53

U6200

J4720

PG 57

J4710

U4900

J6950

PG 12

U1000

U1300

J4510

U6600,6605,6610,6620

PG 40

J4700

PG 40

HD

E-NET

ODD

Conn

SYNTH

PG 39

U6100

J3900,4635,4655

EXTERNAL USB

PG 40

KEYBOARD TRACKPAD/

USB

PG 45 POWER SENSE

J5650,5600,5610,5611,5660,5720,5730,5750

PG 48,49

J4900

DC/BATT

PENRYN

2.X OR 3.X GHZ

INTEL CPU

SPI

PG 20

PG 18

MEMORY

MAIN

800/1067/1333 MHz

DDR2-800MHZDDR3-1067/1333MHZ

J2900

DIMM

PG 25,26

SPI

TEMP SENSOR

FAN CONN AND CONTROL

J5100

PG 43

SerFanADC

SMC

B,0

Prt

BSB

PWR

Misc

PG 14

Port80,serial

LPC Conn

GPIOs

SATA

1.05V/3GHZ.

1.05V/3GHZ.

RGB OUT

PG 38

PG 38

PG 13

FSB INTERFACE

PG 24

SMB

PG 20

PG 20

HDA

NVIDIA

PG 41

CAMERA

Connectors

PG 44

CONN

SMB

DIMM’s

10

56

7

Bluetooth

PG 52

Boot ROM

U1400

DVI OUT

PCI-E

PG 16

UP TO 20 LANES3

PG 17

LVDS OUT

DP OUT

HDMI OUT

RGMII

PG 18

AirPort

Mini PCI-E

U3700

Line In

Amp Amp

PG 60

PG 9

System Block DiagramSYNC_DATE=04/01/2008

B

2 98

051-8071

SYNC_MASTER=M98_MLB

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

PPVBAT_G3H_CHGR_R

VOUT1

MCPCORES0_PGOOD

FW_PORTPWR_EN&&(SMC_ADAPTER_EN||PM_SLP_S3_L)

Q4260

PPVOUT_S0_LCDBKLT

VIN

VOUT

PP1V2R1V05_S5

PP10V_FW

U7300TPS51116

VOUT2

PP3V3_S0

P3V3_ENET_PHY

U7760

(PAGE 66)

VOUT2

VOUT1

PPVCORE_S0_CPU

CPUVTTS0_EN

1.05V

(PAGE 65)

U7100

(PAGE 77)GPUVCORE_EN

SMC_CPU_HI_ISENSE

A

A

U7500

(PAGE 64)

PM_SLP_S3_L_R

(PAGE 61)SMC_MCP_CORE_ISENSE

P5V_RTS0_PGOOD

MCPCORES0_PGOOD

PP3V3_S5

P5V3V3_PGOOD

LTC3547

(PAGE 87)

VR_PWRGOOD_DELAY

SMC_CPU_VSENSE

SMC_MCP_DDR_ISENSE

A

PP1V8_GPUIFPX

(PAGE 66)

PP3V3_S3

R5413

5V

VLDOIN

J6900

IN

ADAPTER

AC

Q7056

VIN

VOUT1

VOUT2

V

VOUT1

PP5V_S0

VR_ON

PS_PWRGD

PPMCPDDR_ISNS

RSMRST_OUT(P15)ALL_SYS_PWRGD

U7880

P5V3V3_PGOOD

CPUVTTS0_PGOOD

TPS62202P1V8_S0GPU_EN

Q3810

Q7910

PP3V3_S5

VIN

GPUVCORE_PGOOD

U8900

PM_SLP_S3_L

P1V1GPU_PGOOD

(PAGE 84)

XP28

U9600

PB16BP1V1GPU_EN

GPUVCORE_EN

PM_ALL_GPU_PGOOD

EG_RAIL3_EN

A

R7505

S5

R5445

MCP_PS_PWRGD

MCPCORES0_EN

VOUT

SMC_GPU_VSENSE

A

Q5315 SMC_TPAD_RST_L

SMC_RESET_LSMC PWRGD

PPDCIN_G3H

PPBUS_G3H_VSENSE

V

D6905

VOUT

GPU VCORE

PPVCORE_S0_MCP

ISL9504B

VIN

CPU VCORE

RUN2

S5 PWRGD

PP3V3_S5

(PAGE 67)

TPS3808G

U7840

POK1

P3V3S5_EN

U9900

LTC3547RUN1

P1V05S0_EN

P1V2_S0_EN

RC

DELAY

RC

CPUVTTS0_EN

R7878

SLP_S3#(G17)

SLP_S5#(H17)

PM_SLP_S3_L_R

RSMRST_PWRGD

3.3V

EN1

EG_RAIL4_EN

EG_RAIL1_EN

EG_RAIL2_EN

RCSMC

(PAGE 25)

PP1V8R1V5_S3

R5388

LT3470A PP3V42_G3H

R7020

8A FUSE

SMC_RESET_L

PM_PWRBTN_L

VIN

VOUT

Q7930

Q7970

RSMRST_PWRGD

TRST = 200mS

(PAGE 67)

Q3840

(PAGE 62)

(PAGE 42)

PM_SLP_S3_L

PM_SLP_S4_L

5V

U7201

PGOOD1,2

LTC1872

U7790(PAGE 66)

P1V05_S5_PGOOD

ISL6269

DDRREG_EN

PM_G2_P1V05S5_EN

PB18A

PB17B

PL32A

POK2

1.8V(R/H)

EN2

P1V8_S0GPU_EN

P3V3GPU_EN

GMUX

PB17A

P60

U4900

(PAGE 42)SMC_PM_G2_EN

DELAY

RC

DELAY

MCP79

PM_SLP_RMGT_LSLP_RMGT#(J17)

R2870

MEM_VTT_ENPCI_RESET0#(R10)

U1400DELAY

RC

P5VS3_EN

PM_SLP_S4_L

PM_SLP_S3_L

PM_SLP_S4_L

P3V3GPU_EN

PP3V3_S0GPU

RST*

VCC

U7870

RESET*

PGOOD

(PAGE 66)

U7750

PPCPUVTT_S0

SMC_CPU_FSB_ISENSE

(PAGE 14~22)

(R/H)

TPS51220

CPU_PWRGD

CPU_RESET#

PWRGD_SB

PM_SYSRST_DEBOUNCE_L

FSB_CPURST_L

RSTBTN#

PM_SYSRST_L

IMVP_VR_ON

SYSRST(PA2)

IMVP_VR_ON(P16)

PWRBTN#

CPU_PWRGD

P17(BTN_OUT)

PM_RSMRST_L

99ms DLY

RSMRST_IN(P13)

VIN

RES*

PWR_BUTTON(P90)

VDD

LTC2909

PM_SLP_S4_L

PWRGD(P12)

MR*

P1V05_S5_PGOOD

SENSE

ADJ2

ADJ1

SMC

CPU

U1000

(PAGE 10,11)

RUN1

U4900

U2850

S3

EN

PWRGOOD

RESET*

U1400

V

EN

PP1V2R1V05_ENET

PM_SLP_RMGT_L

Q7953

P1V05S0_EN

VIN

VOUT1

1.103V(L/H)

EN1

(PAGE 14~22)

VIN

MCPDDR_EN

DELAY

RC

RC

DELAY

RC

DELAY

P1V8S0_EN

DELAY

RC

VOUT2

U9500

PGOODVR_ON

VIN

CPUVTTS0_PGOOD

U5001

VOUT

F7040

SMC_ONOFF_L

PPVCORE_GPU

SC417U5410SMC_GPU_ISENSE

VIN U2801 VOUT

MCP79

PGOOD

VIN

PGOOD

EN_PSV

ENABLE

PPBUS_G3H

F7041

VOUT2

U7600

VI

NCP303LSN

(PAGE 42)U5000

VIN

EN2

VOUT1

(L/H)

A

EN2

A

A

U6990

3.425V G3HOT

ISL6263C

(PAGE 59)

D6905

PPVIN_G3H_P3V42G3H

VIN

Q7055

U7000

PBUS SUPPLY/

(PAGE 60)

BATTERY CHARGER

ISL6258A

V

PP3V3_G3_RTC

MIC5232-2.8YD5

PP3V42_G3H

SLP_S3_L(P93)

SLP_S4_L(P94)

SLP_S5_L(P95)

SMC_ONOFF_L

P1V2_S0_EN

P5VS3_EN

P3V3S5_EN

(PAGE 83)

ISL6236

VOUT

VIN

1.05V AUXVOUT

DELAY

RC

DELAY

PM_G2_P1V05S5_EN

P2V5S0_EN

MCPCORES0_EN

1.5V

0.75V

(PAGE 63)

POK2

POK1ISL6236

EN1

2S4P

(6 TO 8.4V)

J6950

P1V8_S0GPU_EN

P1V1_GPU_EN

PP5V_S3

Q7901

PM_ALL_GPU_PGOOD

MEM_VTT_ENPP1V1_S0GPU

DDRREG_EN

PP0V9R0V75_S0_DDRVTT

PP1V2_S0

PP2V5_S0

PP1V8_S0

PP3V3_S5

P5V_RTS0_PGOOD

R7894

S0PGOOD_PWROK

PP3V3_S0

PP1V8R1V5_S0

PP1V05_S0PM_SLP_RMGT_L

PP1V05_S0

VOUT

(PAGE 85~86)

U9701ENA&&

LCD_BKLT_EN

BKLT_PLT_RST_L

APP001

PP1V8_S0GPU_ISNS

VOUT2

R6905

PM_ALL_GPU_PGOOD

P2V5S0_EN

RUN2

R0940

P1V0FW_EN

P1V8S0_EN U7700

PP1V0_FW

SMC_GPU_1V8_ISENSE

A

SMC_BATT_ISENSE

"Folsten" POWER SYSTEM ARCHITECTURE

U5303R7050

PPVBAT_G3H_CHGR_REG

MCPDDR_EN

PP1V8R1V5_S0

R7650

SMC_CPU_ISENSEU7100

IMVP_VR_ONSMC_MCP_VSENSE

MCP_CORE

CHGR_BGATE

SMC_DCIN_ISENSE

6A FUSEF6905

BATT_POS_GATE

PPVBATT_G3H_CONN

DCIN(16.5V)

Power Block Diagram

983

051-8071 B

SYNC_DATE=07/24/2008SYNC_MASTER=RXU_K20

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

03/31/09

03/27/09

03/24/09

03/30/09

04/09/09

csa.70: No stuff C7099 per radar# 6772695.

Changed CPU APNs for 2.8 and 3.06GHz CPUs.

04/29/09

Production Release Fab to rev A

Changed BOM and EEE codes for K20A.

csa.9: Added PBUS VS 5V voltage selection resistors for keyboard backlight driver.

csa.5: Changed K20A EFI ROM APN 341S2507 ( BOM change only )

csa.1: Changed rev to 1.0.0

csa.5: Changed the bom option to KBDLED_5V per radar# 6723272.

csa.90: Added 1000pF cap to the backlight power pin for EMI baseline noise.

03/25/09

csa.45: Connected =PP1V5_EXP_S0 to J4501.13 for SATA redriver on flex.

csa.5: Project copied from K20 mlb_pvt.

PVT:

05/05/09

Added 128S0264 (SANYO) as alternate to 128S0257 (KEMET ELEC) per Radar# 6656624.

06/15/09

Added 107S0136 (DALE/VISHAY) as alternate to 107S0132 (CYNTEC) per Radar# 6971400.

For U7871 P/N 353S2718 is made primary. P/N 353S2310 is added back as alternate.

For U6100 Locked Bootrom P/N 341S2506 replaces existing Unlock Bootrom P/N 341S2507.

SYNC_DATE=NA

B

984

Revision History

051-8071

SYNC_MASTER=NA

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

BOM OPTIONSBOM NAMEBOM NUMBERTABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

BOM OPTIONSBOM GROUPTABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL

TABLE_BOMGROUP_ITEM

TABLE_ALT_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM


PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM


TABLE_ALT_ITEM

Folsten BOM GROUPS

BOM Variants

Module Parts

Bar Code Labels / EEE #’s

Alternate Parts

VRAM8,VRAM_1024_SAMSUNGFB_1024_SAMSUNG

MAG LAYERS ALT TO MURATA155S0329155S0457 ALL

PCBA,BEST,2.8,512SAM_VRAM,K20A639-0172 K20A_COMMON,EEE_9EH,CPU_2_80GHZ,FB_512_SAMSUNG

GMUX_PROG,BOOTROM_PROG,SMC_PROG,TPAD_PROGK20A_PROGPARTS

VRAM4,VRAM_512_HYNIXFB_512_HYNIX

CRITICAL[EEE:9EH]LBL,P/N LABEL,PCB,28MM X 6 MM1826-4393 EEE_9EH

EEE_9EMCRITICALLBL,P/N LABEL,PCB,28MM X 6 MM1826-4393 [EEE:9EM]

1 U3700 CRITICAL338S0694 IC,RTL8251CA-VB-GR,GIGE TRANSCEIVER,48P LQFP

IC,ASSP,GPU,NV G96-GS,VLOWLKG,BGA969,LF CRITICAL338S0737 1 U8000

[EEE:9EL] CRITICAL1826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM EEE_9EL

VRAM_512_HYNIX333S0506 4 CRITICALU8400,U8450,U8500,U8550IC,SDRAM,GDDR3,32MX32,900MHZ,TIVA,HF

VRAM_1024_SAMSUNGCRITICAL8333S0481 U8400,U8450,U8500,U8550,U9100,U9150,U9200,U9250IC,SGRAM,GDDR3,32MX32,800MHZ,136 FBGA

CRITICAL333S0481 4 U8400,U8450,U8500,U8550 VRAM_512_SAMSUNGIC,SGRAM,GDDR3,32MX32,800MHZ,136 FBGA

138S0603 ALL138S0602 Murata alt to Samsung

LBL,P/N LABEL,PCB,28MM X 6 MM [EEE:9EK] CRITICAL1826-4393 EEE_9EK

VRAM4,VRAM_512_SAMSUNGFB_512_SAMSUNG

IC,SMC,DEVELOPMENT,K20 SMC_PROGU49001 CRITICAL341S2355

MCP_B03U1400 CRITICAL1338S0710 IC,MCP79XT-B3,35X35MM,BGA1437

1 CRITICALU1000 CPU_3_06GHZIC,PDC,SLGKH,PRQ,3.06,35W,1066,E0,6M,BGA337S3744

K20A_COMMON,EEE_9EK,CPU_3_06GHZ,FB_512_SAMSUNG639-0173 PCBA,BEST,3.06,512SAM_VRAM,K20A

639-0175 PCBA,BEST,3.06,512HYN_VRAM,K20A K20A_COMMON,EEE_9EM,CPU_3_06GHZ,FB_512_HYNIX

353S1294 ALL353S1681 TI alt to National

ALL104S0023 104S0018 Cyntec alt to sense resistor

ALL152S0684 152S0368 Maglayers alt to Dale/Vishay

ALL152S0476 Inductor alternate152S0276

CRITICAL337S3682 CPU_2_80GHZU10001 IC,PDC,SLGEM.PRQ,2.80,35W,1066,E0,6M,BGA

ALL104S0024 104S0017 Panasonic alt to FW resistor

ALL Macronix alt to SST341S2367 341S2366

ALL353S2310 INTERSIL.COMMON TO K24/K19353S2718

DALE/VISHAY ALT TO CYNTEC.107S0136 ALL107S0132

ALL128S0264 SANYO ALT TO KEMET ELEC.128S0257

ALL152S0796152S0915 MAG LAYERS ALT TO CYNTEC

MAG LAYERS ALT TO CYNTEC152S0518 ALL152S0896

ALL MAG LAYERS ALT TO VISHAY152S0421152S0684

157S0055 Delta alt to TDK Magnetics157S0058 ALL

FOXLINK ALT TO FOXCONN RCVRALL514-0608514-0613

ALL152S0876 Maglayer alt to Delta152S0782

FOXLINK ALT TO FOXCONN XCVRALL514-0607514-0612

BOM Configuration

5 98

B051-8071

SYNC_DATE=04/01/2008SYNC_MASTER=K20A_MLB

PCBA,BEST,2.8,512HYN_VRAM,K20A K20A_COMMON,EEE_9EL,CPU_2_80GHZ,FB_512_HYNIX639-0174

K20A_COMMON ALTERNATE,COMMON,K20A_COMMON1,K20A_COMMON2,K20A_DEBUG,K20A_PROGPARTS

K20A_COMMON2 BOOT_MODE_USER,GPUVID_1P00V,MUXGFX,DPMUX_EN_S0,DP_ESD,EG_PWRSEQ_GMUX,DP_CA_DET_EG_PLD,BKLT_PLL_NOT,GMUX_1V8

K20A_DEBUG SMC_DEBUG_YES,XDP,LPCPLUS_NOT,NO_VREFMRGN

K20A_COMMON1 ONEWIRE_PU,ISL6258,MEMRESET_HW,MEMRESET_MCP,MCP_B03,MCP_PROD,MCPSEQ_SMC,BMON_PROD,MCP_CS1_NO,FW_LVG_NEW,PROD_DIGSMS,TPDT_DEBOUNCE,KBDLED_5V

U4100 CRITICAL338S0654 IC,FW643-E,1394B PHY/OHCI LINK/PCI-E,121

SMC_BLANKU4900 CRITICAL338S0563 1 IC,SMC,HS8/2117,9MMX9MM,TLP

CRITICALIC,FLASH,SPI,32MBIT,3.3V,86MHZ,8-SOP BOOTROM_BLANK1 U6100335S0610

BOOTROM_PROGCRITICALU61001341S2506 IC,LOCKED EFI ROM,K20A

CRITICALIR,ENCORE II, CY7C63833-LFXC U48001341S2384

341S2383 1 U5701IC,PSOC +W/USB,56PIN,MLF,M98 TPAD_PROGCRITICAL

IN

B1

OE*

VCCB

B2

B3

B4

GND

A4

A3

A2

A1

VCCA

OUT

GND

VCC

NCNC

YA

NC NC

IN

IN

IN

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

GMUX CPLD Programming Port

1.05V TO 3.3V LEVEL TRANSLATOR (M98: ON ICT FIXTURE)

U9600

GPU

TCK

TMS

TDO

TDI

XDP connector

XDP connector

and/or level translator

To XDP connector

CPUU1000From XDP connector

U1400MCP

U8000

GMUX

or via level translator

From XDP connector

JTAG_MCP_TRST_LMAKE_BASE=TRUE

=PP3V3_S0_XDP

=PP1V05_S0_CPU

GPU_JTAG_TRST_L

GPU_JTAG_TCK

GPU_JTAG_TDI

JTAG_MCP_TMS

JTAG_MCP_TDI

JTAG_MCP_TCKMAKE_BASE=TRUE

JTAG_LVL_TRANS_EN_L

XDP_TCK

=PP3V3_S0_XDP

XDP_TRST_L

XDP_TMS

GPU_JTAG_TMS

JTAG_GMUX_TCK

JTAG_GMUX_TDO

XDP_TDO

MAKE_BASE=TRUE

JTAG_MCP_TDO

XDP_TDO_CONN

XDP_TDI

XDP_TCK

XDP_TMS

XDP_TRST_L

=PP3V3_GPU_VDD33 GPU_JTAG_TMS

JTAG_MCP_TDO_CONN

TP_GPU_JTAG_TDOMAKE_BASE=TRUE

GPU_JTAG_TDO

JTAG_GMUX_TDI

JTAG_GMUX_TMS

JTAG Scan Chain

SYNC_DATE=07/11/2008SYNC_MASTER=BEN_K20

6 98

B051-8071

13

6 10 13 88

10 13 88

6 10 13 88

2

1R060610K5%1/16WMF-LF402

21

R0605 PLACEMENT_NOTE=Place close to U8000

402

NOSTUFF

10K

1/16WMF-LF

5%

4

6

51

3

2

U0601

PLACEMENT_NOTE=Place close to U0600

SOT886

74LVC1G07

21

R0604 PLACEMENT_NOTE=Place near pin U1400.F19

XDP

402

5%

MF-LF1/16W

0

21

R0603 PLACEMENT_NOTE=Place near pin U1000.AB3

XDP

0

5%1/16WMF-LF402

6

5

4

3

2

1

8

7

J0600

M-RT-SM1909782

CRITICAL

GMUX_JTAG_CONN

13

2

1R0602NOSTUFF

402MF-LF

5%1/16W

0

2

1R0601

402MF-LF1/16W

10K5%

JTAG_ALLDEV

2

1 C0602JTAG_ALLDEV

0.1UF

402CERM10V20%

2

1 C06010.1UF

JTAG_ALLDEV

20%

402

10VCERM

11

1

12

6

7

8

9

10

5

4

3

2

U0600NLSV4T244

UQFN

JTAG_ALLDEV

6 10 13 88

13 21

6 8 13

8 10 11 12 13 61

74

74

74

13 21

13 21

13 21 6 10 13 88

6 8 13

6 10 13 88

6 10 13 88

6 74

84

9 84

10 88

21

8 74 75 6 74

74

9 84

9 84

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

NO_TEST

LVDS NO_TESTs

NC NO_TESTs

J5800 (IPD FLEX CONN)

FUNC_TEST

FUNC_TEST

6 TPs

NO_TEST

NO_TEST

J5650 (LEFT FAN CONN)

J6995 (BAT LED CONN)

J6950 (MAIN BATT CONN)

J6900 (DC POWER CONN)

FUNC_TEST

POWER RAILS

USB PORTS

J5713 (KEY BOARD CONN)

FUNC_TEST

3 TPs

NC NO_TESTs

NO_TEST

CPU FSB NO_TESTs

ICT Test Points

NO_TEST

J3500 (EXPRESS CARD CONN)

4 TPs

5 TPs

3 TPs

5 TPs

Functional Test Points

per Fan

J5502 (SENSOR CONN)

J5660 (RIGHT FAN CONN)

J6780 (MIC CONN)

J6782 (RIGHT & SUB SPEAKER)

J9000 (LVDS CONN)

J4500 (SATA ODD CONN)

J4501 (SATA HDD CONN)

J5815 (KBD BACKLIGHT CONN)

J4800 (FRONT CABLE CONN)

FB NO_TESTs

2 TP needed

J3401 (AIRPORT/BT/CAMERA CONN)

per Fan

J6781 (LEFT SPEAKER)

NC NO_TESTs

NO_TEST

TRUE WS_KBD16_NUM

TRUE WS_KBD14

WS_KBD12TRUE

TRUE USB_LT2_N

LVDS_EG_A_DATA_N<2>TRUE

LVDS_B_DATA_P<0>TRUE

TRUE LVDS_B_DATA_N<0>

SPIROM_USE_MLBTRUE

TRUE FSB_LOCK_L

USB2_EXCARD_CONN_NTRUE

TRUE PP3V3_S3_EXCARD_SWITCHTRUE PP3V3_S0_EXCARD_SWITCH

TRUE PCIE_WAKE_L

TP_PCI_CLK0

PP1V2R1V05_S5TRUE

MINI_RESET_CONN_LTRUE

LVDS_CONN_A_DATA_P<0>TRUE

TRUE PCIE_CLK100M_EXCARD_CONN_P

Z2_CS_LTRUE

TRUE Z2_DEBUG3

TRUE TPAD_GND_F

PP18V5_S3TRUE

PP3V3_S3_LDOTRUE

TRUE CONN_USB2_BT_N

PPCPUVTT_S0TRUE

PM_CLKRUN_LTRUE

LPC_AD<0..3>TRUE

SYS_LED_ANODE_RTRUE

TRUE MCPTHMSNS_D_P

PCIE_EXCARD_D2R_NTRUE

SATA_HDD_R2D_PTRUE

SATA_HDD_R2D_NTRUE

SATA_HDD_D2R_C_NTRUE

SATA_HDD_D2R_C_PTRUE

SMC_BIL_BUTTON_DB_LTRUE

TRUE SMBUS_SMC_BSA_SCLTRUE SMBUS_SMC_BSA_SDA

TRUE USB2_EXCARD_CONN_P

PP5V_S3_RTUSB_C_FTRUE

FSB_DINV_L<3..0>TRUE

TRUE SMBUS_SMC_A_S3_SCL

SMC_TMSTRUE

SPI_ALT_CLKTRUE

SMC_TCKTRUE

LPC_PWRDWN_LTRUE

LPC_SERIRQTRUE

SMC_TRST_LTRUE

SMC_TDOTRUE

TRUE PP3V3_S3

TRUE PP3V42_G3H

PP18V5_DCIN_FUSETRUE

ADAPTER_SENSETRUE

SMBUS_SMC_BSA_SCLTRUE

SMBUS_SMC_BSA_SDATRUE

SMC_BS_ALRT_LTRUE

PPVBAT_G3H_CONN_FTRUE

SMBUS_SMC_A_S3_SDATRUE

LVDS_CONN_B_DATA_N<0>TRUE

PP5V_SW_ODDTRUE

TRUE PP1V0_FW

PPVP_FWTRUE

TRUE PP1V2R1V05_ENET

SMBUS_SMC_A_S3_SCLTRUE

TRUE Z2_KEY_ACT_L

Z2_CLKINTRUE

TRUE PP1V8_S0GPU_ISNS_R

PSOC_F_CS_LTRUE

TRUE Z2_RESET

Z2_BOOT_CFG1TRUE

Z2_BOOST_ENTRUE

TRUE WS_KBD7

TRUE PP1V1_S0GPU

Z2_MISOTRUE

USB_CAMERA_CONN_NTRUE

CONN_USB2_BT_PTRUE

TRUE PCIE_EXCARD_R2D_N

TRUE MCPTHMSNS_D_N

PP1V8R1V5_S3TRUE

PCIE_CLK100M_MINI_CONN_PTRUE

TRUE PCIE_MINI_D2R_P

WS_KBD20TRUE

LPC_FRAME_LTRUE

LPC_CLK33M_LPCPLUSTRUE

TRUE WS_KBD21TRUE PCIE_MINI_R2D_N

TRUE WS_KBD15_CAP

PP5V_S3_RTUSB_A_FTRUE

PP1V5_S0_EXCARD_SWITCHTRUE

WS_KBD6TRUE

USB2_LT1_PTRUE

USB2_LT1_NTRUE

SYS_LED_ANODETRUE

NC_MEM_A_CLK4NTRUEMAKE_BASE=TRUE

NC_MEM_A_CLK4PTRUEMAKE_BASE=TRUENC_MEM_A_CLK5NTRUEMAKE_BASE=TRUE

TP_MEM_A_CLK5N

TP_MEM_A_CLK4P

TP_MEM_A_CLK3P

TP_MEM_A_CLK4N

NC_MEM_A_CLK5PTRUEMAKE_BASE=TRUE NC_MEM_A_CS_L<2>TRUEMAKE_BASE=TRUE

NC_MEM_A_CS_L<3>TRUEMAKE_BASE=TRUE

NC_MEM_A_ODT<3>TRUEMAKE_BASE=TRUE

NC_MEM_A_ODT<2>TRUEMAKE_BASE=TRUE

NC_MEM_B_A<15>TRUEMAKE_BASE=TRUE

NC_MEM_B_CLK2PTRUEMAKE_BASE=TRUE

NC_MEM_B_CKE<2>TRUEMAKE_BASE=TRUE

NC_MEM_B_CLK3NTRUEMAKE_BASE=TRUE

NC_MEM_B_CLK3PTRUEMAKE_BASE=TRUENC_MEM_B_CLK4NTRUEMAKE_BASE=TRUE

NC_MEM_B_CLK5NTRUEMAKE_BASE=TRUE


NC_MEM_B_CS_L<3>TRUEMAKE_BASE=TRUE

NC_MEM_B_CS_L<2>TRUEMAKE_BASE=TRUE


NC_MEM_B_ODT<3>TRUEMAKE_BASE=TRUE

NC_MEM_B_ODT<2>TRUEMAKE_BASE=TRUE

NC_MLB_RAM_SIZETRUEMAKE_BASE=TRUE

NC_MLB_RAM_VENDORTRUEMAKE_BASE=TRUE

NC_GPU_BUFRST_LTRUEMAKE_BASE=TRUE

TP_MEM_A_CLK5P

TP_MEM_A_CS_L<3>

TP_MEM_A_CS_L<2>

TP_MEM_B_A<15>

TP_MEM_B_CKE<2>

TP_MEM_B_CLK3N

TP_MEM_B_CLK3P

TP_MEM_B_CLK4N

TP_MEM_B_CLK4P

TP_MEM_B_CLK5P

TP_MEM_B_CS_L<2>

TP_MEM_B_CS_L<3>

TP_MEM_B_ODT<2>

TP_MLB_RAM_SIZE

TP_MLB_RAM_VENDOR

NC_GPU_GSTATE<0>TRUEMAKE_BASE=TRUE

NC_LVDS_EG_B_CLK_NTRUEMAKE_BASE=TRUE

NC_LPC_DRQ0_LTRUE

MAKE_BASE=TRUE

NC_GPU_VCORE_VID3TRUEMAKE_BASE=TRUE

NC_LVDS_EG_B_CLK_PTRUEMAKE_BASE=TRUE

NC_LVDS_EG_BKL_PWMTRUEMAKE_BASE=TRUE

NC_LVDS_IG_BKL_PWMTRUEMAKE_BASE=TRUE

NC_LVDS_IG_B_CLKPTRUE

MAKE_BASE=TRUE

NC_LVDS_IG_B_CLKNTRUEMAKE_BASE=TRUE

NC_MCP_GPIO_18TRUEMAKE_BASE=TRUE

NC_MCP_BUF_SIO_CLKTRUEMAKE_BASE=TRUE

TP_LVDS_EG_B_CLK_N

TP_LVDS_EG_B_CLK_P

TP_LVDS_EG_BKL_PWM

TP_LVDS_IG_B_CLKN

TP_LVDS_IG_B_CLKP

TP_LVDS_IG_BKL_PWM

TP_MCP_KBDRSTIN_L

DEBUG_RESET_LTRUE

TP_ENET_PWRDWN_L

TP_FW643_TDI

TRUEMAKE_BASE=TRUE

NC_CPU_PECI_MCP

MAKE_BASE=TRUETRUE NC_ENET_PWRDWN_LMAKE_BASE=TRUETRUE NC_ENET_INTR_L

TRUE SPI_ALT_MOSI

PP3V42_G3HTRUE

TRUE FSB_DSTB_L_P<3..0>

SPI_ALT_MISOTRUE

WS_KBD9TRUE

TRUE WS_KBD2TRUE WS_KBD1

TRUE FSB_DBSY_L

FSB_D_L<63..0>TRUE

TRUE FSB_ADSTB_L<1..0>

TRUE SMC_MD1FSB_DSTB_L_N<3..0>TRUE

TRUE FSB_DRDY_L

FSB_A_L<31..3>TRUE

TRUE FSB_HIT_L

SMC_TX_LTRUE

TP_PCI_C_BE_L<3..0>

NC_PCI_GNT0_LMAKE_BASE=TRUE

TRUE

NC_PCI_GNT1_LMAKE_BASE=TRUETRUETP_PCI_GNT1_L

NC_PCI_INTW_LTRUEMAKE_BASE=TRUE

TP_PCI_INTX_L

TP_PCI_INTY_L

NC_PCI_PARMAKE_BASE=TRUETRUE

NC_PCI_IRDY_LMAKE_BASE=TRUETRUETP_PCI_IRDY_L

NC_PCI_PERR_LMAKE_BASE=TRUETRUETP_PCI_PERR_L

NC_PCI_RESET1_LMAKE_BASE=TRUETRUETP_PCI_RESET1_L

NC_PCI_SERR_LMAKE_BASE=TRUETRUE

NC_PCI_STOP_LMAKE_BASE=TRUETRUETP_PCI_STOP_L

NC_PCI_TRDY_LMAKE_BASE=TRUETRUETP_PCI_TRDY_L

NC_PCIE_CLK100M_PE4PMAKE_BASE=TRUETRUE

NC_PCIE_CLK100M_PE5NMAKE_BASE=TRUETRUETP_PCIE_CLK100M_PE5N

NC_PCIE_CLK100M_PE5PMAKE_BASE=TRUETRUE

NC_PCIE_PE4_D2RNMAKE_BASE=TRUETRUETP_PCIE_PE4_D2RN

NC_PCIE_CLK100M_PE6PMAKE_BASE=TRUE

TRUETP_PCIE_CLK100M_PE6P

NC_PCIE_CLK100M_PE6NMAKE_BASE=TRUETRUE

NC_PCIE_PE4_D2RPMAKE_BASE=TRUETRUE

NC_PE4_CLKREQ_LMAKE_BASE=TRUETRUE

NC_PEX_CLKREQ_LMAKE_BASE=TRUETRUE

NC_PSOC_P1_3MAKE_BASE=TRUETRUE

NC_SATA_C_D2RNMAKE_BASE=TRUETRUE

NC_SATA_C_D2RPMAKE_BASE=TRUETRUE

NC_SATA_C_R2D_CNMAKE_BASE=TRUETRUE

NC_SATA_D_D2RPMAKE_BASE=TRUETRUE

NC_SATA_D_D2RNMAKE_BASE=TRUETRUE

NC_SATA_C_R2D_CPMAKE_BASE=TRUETRUE

NC_SATA_D_R2D_CNMAKE_BASE=TRUETRUE

NC_SATA_D_R2D_CPMAKE_BASE=TRUETRUE

NC_SATA_E_D2RNMAKE_BASE=TRUE

TRUE

NC_SATA_E_D2RPMAKE_BASE=TRUETRUE

NC_SATA_E_R2D_CNMAKE_BASE=TRUE

TRUE

TP_SATA_E_R2D_CP

NC_SATA_F_R2D_CPMAKE_BASE=TRUETRUE

NC_SATA_F_R2D_CNMAKE_BASE=TRUETRUE

NC_SATA_F_D2RPMAKE_BASE=TRUE

TRUE

NC_SB_A20GATEMAKE_BASE=TRUETRUE

NC_SMC_P41MAKE_BASE=TRUETRUE

NC_USB_10PMAKE_BASE=TRUETRUE

NC_USB_11NMAKE_BASE=TRUETRUE

NC_USB_11PMAKE_BASE=TRUE

TRUE

NC_USB_EXTDNMAKE_BASE=TRUETRUE

NC_USB_EXTDPMAKE_BASE=TRUETRUE

NC_USB_MININMAKE_BASE=TRUE

TRUE

NC_XDP_OBSDATA_B2MAKE_BASE=TRUE

TRUETP_XDP_OBSDATA_B2

NC_XDP_OBSDATA_B3MAKE_BASE=TRUETRUETP_XDP_OBSDATA_B3

NC_USB_MINIPMAKE_BASE=TRUETRUE

TRUE NC_SMC_FAN_3_CTL

TRUE NC_SMC_FAN_2_CTL

TRUE NC_FW2_TPBP

NC_FW2_TPBNTRUE

TRUE NC_FW2_TPBIAS

TRUE NC_FW0_TPBP

NC_FW2_TPANTRUE

NC_FW0_TPBNTRUE

TRUE NC_ESTARLDO_EN

TRUE NC_ALS_GAIN

LVDS_CONN_A_DATA_N<0>TRUE

TRUE PP5V_WLAN

SPKRAMP_LFE_OUT_PTRUE

BI_MIC_LOTRUE

PCIE_CLK100M_MINI_CONN_NTRUE

MINI_CLKREQ_Q_LTRUE

TRUE PCIE_WAKE_L

PP5V_S3_BTCAMERA_FTRUE

TP_PCI_INTW_L

SPKRAMP_R1_OUT_PTRUE

LED_RETURN_5TRUE

SMBUS_SMC_A_S3_SDATRUE

TRUE USB_CAMERA_CONN_P

TRUE NC_FW2_TPAP

TRUE NC_FW0_TPAP

MAKE_BASE=TRUETRUE NC_CPU_TEST3

MAKE_BASE=TRUETRUE NC_FW643_AVREG

MAKE_BASE=TRUETRUE NC_FW643_TDI

MAKE_BASE=TRUETRUE NC_MEM_A_A<15>

MAKE_BASE=TRUETRUE NC_MEM_A_CKE<2>

MAKE_BASE=TRUETRUE NC_MEM_A_CKE<3>

TRUE NC_MEM_A_CLK2NMAKE_BASE=TRUE

NC_MEM_A_CLK3PTRUEMAKE_BASE=TRUE

NC_MEM_A_CLK3NTRUEMAKE_BASE=TRUE

TRUEMAKE_BASE=TRUE

NC_MEM_A_CLK2PTP_MEM_A_CLK2P

TP_MEM_A_CKE<2>

WS_KBD10TRUE

WS_KBD8TRUE

TRUE WS_KBD4TRUE WS_KBD3

TRUE WS_KBD5

TRUE SMBUS_MCP_0_CLK

SMBUS_MCP_0_DATATRUE

TRUE EXCARD_CPUSB_L

TRUE EXCARD_CPPE_LTRUE EXCARD_CLKREQ_CONN_L

PCIE_EXCARD_D2R_PTRUE

TRUE PCIE_EXCARD_R2D_P

TRUE PCIE_CLK100M_EXCARD_CONN_N

WS_KBD13TRUE

TRUE WS_KBD11

TRUE PPBUS_CPU_IMVP_ISNS

TRUEPM_SLP_S3_L

PPBUS_G3HTRUE

PP1V8_S0TRUE

PP1V05_S0TRUE

TRUE PPMCPDDR_ISNS

TRUE PP3V42_G3H

LVDS_B_CLK_PTRUE

LVDS_A_DATA_N<0>TRUE

PP1V8R1V5_S0TRUE

TRUE PP0V9R0V75_S0_DDRVTT

TRUE PP3V3_S0GPU

TRUE =PP5V_S0_FAN_LT

FAN_LT_PWMTRUE

TRUE FAN_LT_TACH

TRUE FAN_RT_PWM

TRUE FAN_RT_TACH

BI_MIC_SHIELDTRUE

BI_MIC_HITRUE

TRUE SPKRAMP_L1_OUT_N

TRUE SPKRAMP_L2_OUT_P

TRUE SPKRAMP_LFE_OUT_N

TRUE SPKRAMP_R1_OUT_N

SPKRAMP_R2_OUT_PTRUE

SPKRAMP_R2_OUT_NTRUE

LVDS_DDC_DATATRUE





LVDS_CONN_A_CLK_F_PTRUE

LVDS_CONN_A_CLK_F_NTRUE

LVDS_CONN_B_DATA_P<0>TRUE





LVDS_CONN_B_CLK_F_PTRUE

LVDS_CONN_B_CLK_F_NTRUE

LED_RETURN_1TRUE

LED_RETURN_2TRUE

LED_RETURN_3TRUE

LED_RETURN_4TRUE

LED_RETURN_6TRUE

SMC_ODD_DETECTTRUE

SATA_ODD_D2R_C_PTRUE

SATA_ODD_D2R_C_NTRUE

SATA_ODD_R2D_PTRUE

SATA_ODD_R2D_NTRUE

PP5V_S0_HDD_FLTTRUE

KBDLED_ANODETRUE

SMC_KDBLED_PRESENT_LTRUE

PSOC_SCLKTRUE

PSOC_MOSITRUE

PSOC_MISOTRUE

PICKB_LTRUE

PP3V3_ENET_PHYTRUETP_PCIE_CLK100M_PE5P

TP_PCIE_CLK100M_PE6N

TP_PCIE_PE4_D2RP

TP_PE4_CLKREQ_L

TP_PEX_CLKREQ_L

TP_PSOC_P1_3

TP_SATA_C_R2D_CN

TP_SATA_C_R2D_CP

TP_SATA_D_D2RN

TP_SATA_D_D2RP

TP_SATA_D_R2D_CN

TP_SATA_D_R2D_CP

TP_SATA_E_D2RN

TP_SATA_E_D2RP

TP_SATA_E_R2D_CN

TP_SATA_F_D2RN

TP_SATA_F_R2D_CP

TP_USB_10P

TP_USB_11N

TP_USB_EXTDN

TP_USB_MINIP

TP_USB_MININ

TP_USB_EXTDP

TP_USB_11P

TP_SMC_P41

TP_SB_A20GATE

TP_SATA_F_R2D_CN

TP_SATA_F_D2RP

SMC_NMITRUE

SMC_TDITRUE

TRUE SPI_ALT_CS_L

WS_KBD19TRUE

TRUE PM_SYSRST_L

SMC_RX_LTRUE

USB_LT2_PTRUE

TRUE USB_LT3_N

TRUE WS_KBD17

WS_KBD18TRUE

SMC_RESET_LTRUE

TRUE BKL_SCL

BKL_SDATRUE

TRUE ISSP_SCLK_P1_1

TRUE ISSP_SDATA_P1_0

TRUE LPCPLUS_GPIO

TRUE SMC_ONOFF_L

PP3V42_G3H_LIDSWITCH_RTRUE

TRUE SMC_LID_RLCD_BKLT_PWMTRUE

TRUE PP1V8_GPUIFPX

TP_SATA_C_D2RN

TP_SATA_C_D2RP

TP_PCIE_CLK100M_PE4P

TP_PCI_SERR_L

TP_PCI_PAR

TP_PCI_INTZ_L

TP_PCI_GNT0_L

TP_PCI_AD<31..8>

LVDS_A_DATA_P<0>TRUE

FSB_HITM_LTRUE

TRUE BKL_FB

TRUE PP5V_S3_RTUSB_B_F

LVDS_DDC_CLKTRUE

TRUE PPVOUT_S0_LCDBKLT

=PP3V3_S0_DDC_LCDTRUE

TRUE PP3V3_SW_LCDTRUE BKL_SYNC

TRUE PLT_RESET_SWITCH_L

PP3V3_S3TRUE

PP1V2_S0TRUE

PP2V5_S0TRUE

PP3V3_S0TRUE

TRUE PP3V3_S5TRUE PPVCORE_S0_MCP

PPVCORE_S0_CPUTRUE

TRUE PP5V_S0

PP5V_S3TRUE

TRUE PPVCORE_GPUTRUE PP1V8_S0GPU_ISNS

PPVTTDDR_S3TRUE

PPMCPDDR_ISNSTRUE

PPVCORE_S0_MCPTRUE

PPDCIN_G3HTRUE

PP18V5_S3TRUE

TRUE PP3V3_S5_AVREF_SMC

NC_SATA_E_R2D_CPMAKE_BASE=TRUE

TRUE

NC_SATA_F_D2RNMAKE_BASE=TRUE

TRUE

TP_MCP_SATALED_L NC_MCP_SATALED_LTRUEMAKE_BASE=TRUE

NC_MCP_KBDRSTIN_LTRUEMAKE_BASE=TRUE

TP_MCP_GPIO_18

TP_MCP_BUF_SIO_CLK

TP_GPU_MIOA_DE

TP_GPU_MIOA_D<9..0>

TP_GPU_GSTATE<1>

TP_GPU_GSTATE<0>

TP_GPU_BUFRST_L

TP_MEM_B_ODT<3>

TP_MEM_B_CLK5N

TP_MEM_B_CLK2P

TP_MEM_A_ODT<3>

TP_MEM_A_ODT<2>

TP_MEM_A_CLK3N

TP_MEM_A_CLK2N

TP_MEM_A_CKE<3>

TP_MEM_A_A<15>

TP_FW643_AVREG

TP_ENET_INTR_L

TP_CPU_TEST3

TP_CPU_PECI_MCP

FB_B_MA<11>TRUE

FB_B_CS0_LTRUE

TRUE FB_B_CAS_LTRUE FB_B_BA<1>TRUE FB_B_DQ<63..0>TRUE FB_A_DQ<63..0>

TRUE BKL_GD

BKL_SWTRUE

BKLT_ENTRUE

TRUE IR_RX_OUT

PP5V_S3_IR_RTRUE

USB_LT3_PTRUE

TRUE SPKRAMP_L2_OUT_N

SPKRAMP_L1_OUT_PTRUE

TRUE PCIE_MINI_D2R_N

PCIE_MINI_R2D_PTRUE

TRUE WS_KBD22

TRUE WS_KBD23

WS_KBD_ONOFF_LTRUE

WS_LEFT_SHIFT_KBDTRUE

WS_LEFT_OPTION_KBDTRUE

WS_CONTROL_KBDTRUE

TP_PCI_FRAME_L

TP_PCI_DEVSEL_L

NC_PCI_CLK1TRUEMAKE_BASE=TRUE

NC_PCI_CLK0MAKE_BASE=TRUETRUE

NC_PCI_C_BE_L<3..0>MAKE_BASE=TRUETRUE

NC_PCI_AD<31..8>MAKE_BASE=TRUETRUE

NC_PCI_DEVSEL_LMAKE_BASE=TRUETRUE

NC_PCI_FRAME_LMAKE_BASE=TRUETRUE

MAKE_BASE=TRUETRUE NC_PCI_INTX_L

NC_PCI_INTY_LMAKE_BASE=TRUETRUE

NC_PCI_INTZ_LMAKE_BASE=TRUETRUE

TP_LPC_DRQ0_L

TP_GPU_VCORE_VID3

TP_GPU_PGOOD_OUT_L NC_GPU_PGOOD_OUT_LTRUEMAKE_BASE=TRUE

NC_GPU_MIOA_DEMAKE_BASE=TRUETRUE

NC_GPU_MIOA_D<9..0>TRUEMAKE_BASE=TRUE

NC_GPU_GSTATE<1>TRUEMAKE_BASE=TRUE

TRUE FSB_REQ_L<4..0>

TP_PCI_CLK1

FSB_ADS_LTRUE

NC_SMC_FAN_2_TACHTRUE

NC_SMC_FAN_3_TACHTRUE

TRUE GND

TRUE GND

TRUE GND

TRUE GND

TRUE GND

TRUE GND

TRUE GND

TRUE GND

GNDTRUE

TRUE GND

TRUE GND

TRUE GND

TRUE GND

GNDTRUE

7 98

B051-8071

Functional / ICT TestSYNC_MASTER=K20_MLB SYNC_DATE=09/24/2008

I998

I997

I996

I995

I994

I993

I992

I991

I990

I989

I988

I987

I986

I985

I982

I981

I774

I772

I771

I770

I769

I768

I767

I766

I765

I764

I763

I762

I761

I756

I752

I751

I744

I743

I742

I741

I740

I739

I738

I737

I736

I735

I734

I733

I732

I731

I730

I729

I728

I727

I726

I725

I724

I723

I722

I720

I714

I709

I640

I639

I638

I637

I636

I627

I626

I625

I624

I623

I622

I621

I620

I618

I617

I616

I615

I614

I613

I612

I611

I610

I608

I607

I606

I605

I604

I603

I602

I600

I559

I558

I557

I1297

I1296

I1294

I1293

I1292

I1291

I1290

I1288

I1286

I1285

I1284

I1283

I1282

I1281

I1280

I1277

I1276

I1275

I1274

I1273

I1161

I1160

I1159

I1157

I1156

I1155

I1154

I1152

I1151

I1150

I1149

I1148

I1146

I1145

I1143

I1142

I1141

I1140

I1137

I1136

I1135

I1134

I1132

I1131

I1130

I1129

I1128

I1127

I1126

I1125

I1124

I1123

I1122

I1121

I1120

I1119

I1118

I1117

I1116

I1115

I1114

I1113

I1112

I1111

I1110

I1109

I1108

I1107

I1106

I1105

I1104

I1103

I1102

I1101

I1100

I1099

I1098

I1097

I1096

I1095

I1094

I1093

I1092

I1091

I1090

I1089

I1088

I1087

I1086

I1085

I1084

I1083

I1082

I1081

I1080

I1079

I1078

I1077

I1076

I1075

I1074

I1073

I1072

I1071

I1070

I1069

I1068

I1067

I1066

I1065

I1064

I1063

I1062

I1061

I1060

I1059

I1058

I1057

I1056

I1055

I1054

I1053

I1052

I1051

I1050

I1048

I1047

I1046

I1044

I1043

I1042

I1040

I1039

I1038

I1035

I1034

I1033

I1032

I1031

I1029

I1028

I1027

I1026

I1025

I1024

I1022

I1021

I1020

I1019

I1018

I1017

I1016

I1015

I1014

I1013

I1012

I1011

I1010

I1009

I1008

I1007

I1006

I1005

I1004

I1003

I1002

I1001

I1000

49

49

49

39 96

76 84 95

81 84 95

81 84 95

43

10 14 88

31 96

31

31

7 17 30 31

19

8

30

78 81 95

31 96

49 50

49 50

50

7 50

50

30 96

8

19 41 43

19 41 43 84 91

40

47 96

17 31 90

38 90

38 90

38 90

38 90

42 59

7 44 94

7 44 94

31 96

98

10 14 88

7 44 94

41 42 43

43

41 42 43

19 41 43

19 41 43

41 43

41 42 43

7 8

7 8 42

59

59

7 44 94

7 44 94

41 42 59

59

7 44 94

78 81 95

38

8

8

8

7 44 94

49 50

49 50

8

49 50

49 50

49 50

50

49

8

49 50

30 96

30 96

31 90

47 96

8

30 96

17 30 90

49

19 41 43 84 91

25 43 91

49 30 90

49

39

31

49

39 96

39 96

40 42

16

16

16

16

16

16

16

9

16

16

16

16

16

16

16

16

16

21

21

75

75

75

9

9

9

21

25 43

18

35

43

7 8 42

10 14 88

43

49

49

49

10 14 88

10 14 88

10 14 88

41 43 10 14 88

10 14 88

10 14 88

10 14 88

39 41 42 43

19

19

19

19

19

19

19

19

19

17

17

17

20

13

13

42

42

37

37

37

37

37

37

42

42

78 81 95

30

56 57 96

57 58

30 96

30

7 17 30 31

30

19

56 57 96

78 85

7 44 94

30 96

37

37

15

16

49

49

49

49

49

13 21 44 91

13 21 44 91

31

31

31

17 31 90

31 90

31 96

49

49

8

67 82 84 21 33 36 41

8 45

8

8

7 8

7 8 42

81 84 95

81 84 95

8

8

8

8 48

48

48

48

48

57 58

57 58

56 57 96

56 57 96

56 57 96

56 57 96

56 57 96

56 57 96

78 81

78 81 95

78 81 95

78 81 95

78 81 95

78 95

78 95

78 81 95

78 81 95

78 81 95

78 81 95

78 81 95

78 95

78 95

78 85

78 85

78 85

78 85

78 85

38 41

38 90

38 90

38 90

38 90

38

50

50

49 50

49 50

49 50

49 50

8 17

17

17

17

69

49

20

20

20

20

20

20

20

20

20

20

20

20

20

9

9

9

9

20

42

21

20

20

41 43

41 42 43

43

49

25 41

39 41 42 43

39 96

96 98

49

49

41 42 43

49

49

18 43

41 42 49

40

40 84 85

8

20

20

17

19

19

19

19

19

81 84 95

10 14 88

39

78 81

78 85

8 75 78

78

78 85

31

7 8

8

8

8 9 96

8 96

7 8

8

8

8

8

8

8

7 8

7 8

8

7 50

41 42

20

17

21

75

75

75

75

74

16

16

15

16

16

16

15

16

9

35

18

10

9

71 73 80 95

71 73 95

71 73 80 95

71 73 80 95

71 73 80 95

71 72 79 95

85

40

40

96 98

56 57 96

56 57 96

17 30 90

30 90

49

49

49

49

49

49

19

19

19

75

74

10 14 88

19

10 14 88

42

42

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

"FW" (FireWire) Rails

500 mA max supply

"GPU" Rails

OR 0.75V

ENET Rails

190 mA

1.8V/DDR 1.5V Rails

5V Rails

Chipset "VCore" Rails

3.3V-2.5V Rails

(1.1V for A01)

1182 mA

4500 mA

139 mA/ 0 mA

105 mA/241 mA

1034 mA

5300 mA

241 mA max load

130 mA

500 mA

4771 mA

"G3Hot" (Always-Present) Rails

=PP3V3_S0_FET

=PP3V3_S0_LPCPLUS

=PP3V3_S0_SMBUS_SMC_B_S0

=PP3V3_S3_EXCARD

=PP3V3_S3_SMBUS_SMC_MGMT

=PP3V3_S3_VREFMRGN

=PP3V3_S3_MCP_GPIO

=PP3V3_S3_WLAN

PP3V3_S3

MIN_NECK_WIDTH=0.25 mmVOLTAGE=3.3V

MIN_LINE_WIDTH=0.5 mm

MAKE_BASE=TRUE

=PP3V3_FW_LATEVG

=PP3V3_S5_P1V05ENETFET

=PP3V3_S3_GMUX

=PP3V3_S3_BT

MIN_NECK_WIDTH=0.25 MMMIN_LINE_WIDTH=0.6 MM

VOLTAGE=18.5VMAKE_BASE=TRUE

PPDCIN_G3H

=PPVIN_S5_CPU_IMVP

=PP3V3_S3_FET

=PP3V3_S3_TPAD

=PP3V3_S3_P1V8S0

=PP3V3_S3_SMBUS_SMC_A_S3

=PP3V3_S3_SMS

=PP3V3_S3_SMS

=PP3V3_S3_P1V5EXPS0

=PPDCIN_S5_CHGR

=PP5V_S3_BTCAMERA

=PP5V_S3_SYSLED

=PP2V5_S0_REG

=PP3V3_S0_REMTHMSNS

=PP3V3_S0_EXCARD

=PP3V3_S0_VMON

=PP3V3_S0_ODD

=PP3V3_S0_XDP

=PP3V3_S0_MCPCOREISNS

=PP3V3_S0_XDP

=PP3V3_S0_IMVP

=PP3V3_S5_MCP

=PP3V3_S5_P1V05FET

=PP3V3_S5_PWRCTL

=PP3V3_GPU_P3V3GPUFET

=PP3V3_S3_P3V3S3FET

=PP1V05_S0_MCP_PEX_DVDD

=PP3V3_S0_SMC

=PP1V0_FW_REG

=PP3V3_S0_FAN_LT

MAKE_BASE=TRUEVOLTAGE=3.3V

MIN_LINE_WIDTH=0.3 MMPP3V3_S0

MIN_NECK_WIDTH=0.20MM

=PP5V_S3_DDRREG

=PP3V42_G3H_CPUCOREISNS

=PP3V42_G3H_TPAD

=PP3V3_S0_SMBUS_MCP_0

=PP3V3_S0_DPMUX

MIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.25 MMVOLTAGE=6V

PPBUS_CPU_IMVP_ISNS

MAKE_BASE=TRUE

=PP3V3_S0_GPUTHMSNS

=PP3V3_S0_PWRCTL

=PP3V3_S0_DDC_LCD

=PPSPD_S0_MEM_A

=PP3V3_S0_GMUX

=PP3V3_S0_HDCPROM

=PP3V3R1V5_S0_MCP_HDA

=PP3V3_S0_MCP_PLL_UF

=PP3V3_S0_MCP_VPLL_UF

=PP3V3_S0_MCP_DAC_UF

=PP3V3_S0_MCP

=PP3V3_S0_AUDIO

=PP3V3_S5_MCP_GPIO

=PP3V3_S0_LVDSDDCMUX

=PP3V42_G3H_SMCUSBMUX

=PP3V42_G3H_SMBUS_SMC_BSA

=PPVP_FW_PHY_CPS_FET=PPVP_FW_PORT1

=PPVCORE_S0_CPU_REG

PP1V0_FW



=PP1V0_FW_FWPHY

=PPBOOST_FW_FWPWRSW_F

=PP3V3_GPU_MIO

=PP3V3_GPU_LVDS_DDC

=PP1V1_GPU_PEX_IOVDDQ

=PP1V1_GPU_PEX_PLLXVDD

=PP1V1_GPU_PLLVDD

=PP1V1_GPU_H_PLLVDD

=PP1V1_GPU_VID_PLLVDD

=PP1V1_GPU_FBPLLAVDD

=PP1V1_GPU_IFPCD_IOVDD

MAKE_BASE=TRUE

PP1V8_GPUIFPX


VOLTAGE=1.8V


MAKE_BASE=TRUE

PP1V8_S0GPU_ISNS_R

VOLTAGE=1.25V


MAKE_BASE=TRUE

PP1V8_S0GPU_ISNS

VOLTAGE=1.8V

=PPVCORE_GPU_REG

=PP18V5_DCIN_CONN

=PPMCPCORE_S0_REG =PP1V2_S0_REG


MAKE_BASE=TRUE

VOLTAGE=1.1V

PP1V1_S0GPU

=PP1V8_GPUIFPX_REG

=PP1V8_GPU_IFPX

=PP1V1_S0GPU_REG

=PP1V1_GPU_PEX_IOVDD

=PP1V8_GPU_FB_VDDQ

=PP1V8_GPU_FBIO

=PP3V3_GPU_P1V8S0

=PP1V8_GPU_FB_VDD

=PP1V8_GPU_FBVDDQ

=PP1V8_S0GPU_ISNS

=PP3V3_ENET_MCP_RMGT

=PP3V3_GPU_PWRCTL

=PP3V3_GPU_VCORELOGIC

=PP3V3_S0GPU_FET

=PP1V05_ENET_FET

=PP3V3_ENET_FET

=PP3V3_ENET_PHY

=PP1V05_ENET_PHY


=PP1V05_ENET_MCP_PLL_MAC


MAKE_BASE=TRUE

PP3V3_ENET_PHY

VOLTAGE=3.3V

PP1V2R1V05_ENETMIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MM


=PPVCORE_S0_MCP

=PP3V3_GPU_VDD33

MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.6 MMPPVCORE_GPU


=PPVCORE_GPU

=PP1V8_S0GPU_ISNS_R

=PP1V8_GPU_REG


PP1V2_S0


=PP2V5_S0_GMUX

=PP1V2_S0_GMUX

=PPVTT_S0_VTTCLAMP

=PP0V75_S0_MEM_VTT_B

=PP0V75_S0_MEM_VTT_A

=PPVTT_S3_DDR_BUF

=PPVTT_S0_DDR_LDO

MAKE_BASE=TRUE

PP0V9R0V75_S0_DDRVTTMIN_LINE_WIDTH=2 mmMIN_NECK_WIDTH=0.2 mmVOLTAGE=0.9V


PPVTTDDR_S3


=PPVIN_PFWBOOST

=PFWBOOST_REG

=PPBOOST_S5_FW_FET

MAKE_BASE=TRUEVOLTAGE=10VMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.4 MMPPVP_FW

MAKE_BASE=TRUEVOLTAGE=10VMIN_NECK_WIDTH=0.25 MMMIN_LINE_WIDTH=0.4 MMPP10V_FW

VOLTAGE=6VMAKE_BASE=TRUE

MIN_NECK_WIDTH=0.25 MMMIN_LINE_WIDTH=0.4 MMPPBUS_FW_FWBOOST

MIN_NECK_WIDTH=0.25 MMMIN_LINE_WIDTH=0.6 MMPPVCORE_S0_CPU



PP2V5_S0


=PP3V42_G3H_BATT

=PPVIN_S5_SMCVREF

=PP3V42_G3H_REG

=PP3V42_G3H_CHGR

=PP3V3_S5_LPCPLUS

MIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.3 MM

MAKE_BASE=TRUE

PP3V3_S0GPU

VOLTAGE=3.3V

=PP3V42_G3H_LIDSWITCH

=PP5V_S3_REG


=PP5V_S3_MCPDDRFET

=PP3V3_S5_RTC_D

=PP3V42_G3H_BMON_ISNS

VOLTAGE=1.05V

PPVCORE_S0_MCP

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6 MM

MIN_NECK_WIDTH=0.2 MM

=PP5V_S3_VTTCLAMP

=PP5V_S3_TPAD

=PPSPD_S0_MEM_B

=PPVOUT_FW_FWPWRSW

=PPVCORE_S0_CPU

=PP3V3_FW_LATEVG_ACTIVE

=PP3V3_S5_MCPPWRGD

=PP3V3_S0_MCPDDRISNS

=PP3V3_S5_DP_PORT_PWR


=PP3V3_S0_MCP_GPIO

=PP3V3_S0_P1V2P2V5

=PP3V3_S0_DPCONN

=PP3V3_S5_MEMRESET

MIN_LINE_WIDTH=0.6 MMMIN_NECK_WIDTH=0.2 MM

PPMCPDDR_ISNS

VOLTAGE=1.5V

MAKE_BASE=TRUE

=PP1V05_S0_MCP_PEX_DVDD0

=PP1V05_S0_MCP_PEX_AVDD0



PP1V2R1V05_S5


PPCPUVTT_S0MIN_LINE_WIDTH=0.6 MM


=PP1V5_S0_MEM_A

=PPMCPDDR_ISNS

=PP1V5_S0_MEM_B

VOLTAGE=1.05V

MIN_NECK_WIDTH=0.2 MMMAKE_BASE=TRUE MIN_LINE_WIDTH=0.6 MM

PP1V05_S0_MCP_PLL_UF



=PP1V05_S0_MCP_SATA_DVDD0=PP1V05_S0_MCP_SATA_DVDD

MAKE_BASE=TRUE

PP1V05_S0_MCP_PEX_AVDD

=PP1V05_S0_MCP_SATA_AVDD0MAKE_BASE=TRUE

PP1V05_S0_MCP_SATA_AVDD

=PP1V05_S5_MCP

=PP1V05_S5_MCP_VDD_AUXC

=PP1V05_ENET_P1V05ENETFET

=PP1V05_S5_P1V05S0FET

=PPCPUVTT_S0_REG

=PP1V05_S0_CPU

=PP1V05_S0_SMC_LS

=PP1V05_S0_MCP_FSB

VOLTAGE=1.5V

PP1V5_EXP_S0

MAKE_BASE=TRUE


=PP1V5_S0_EXCARD


=PP1V05_S0_MCP_PLL_PEX_UF

=PP1V05_S0_VMON

=PP1V05_S0_MCP_HDMI_VDD

=PP1V05_S0_MCP_SATA_DVDD

=PP1V05_S0_MCP_PEX_DVDD

=PP1V05_S0_MCP_AVDD_UF


MIN_NECK_WIDTH=0.2 MMVOLTAGE=1.05VMAKE_BASE=TRUE

PP1V05_S0

=PP3V3_S0_GPU1V8ISNS

=PP3V3_S0_FAN_RT

=PP3V3_S0_CPUTHMSNS

=PP3V3_S0_BATTCHARGERTMPSNSR

=PP1V05_S0_FET

=PP1V5_EXP_S0

=PP3V3_S5_ROM

=PP3V3_S0_P3V3S0FET

=PP3V3_S0_LCD

=PP3V3_S5_REG


PP1V8R1V5_S3MIN_LINE_WIDTH=0.6 MM


PP1V8R1V5_S0

VOLTAGE=1.5V

MIN_LINE_WIDTH=0.6 MMMIN_NECK_WIDTH=0.2MM

MAKE_BASE=TRUE

=PP1V8R1V5_S0_MCP_FET

=PPDDR_S3_REG

=PPVIN_S0_DDRREG_LDO

=PP1V5_S3_MEM_A

=PP1V5_S3_MEM_B

=PP1V5_S3_MEMRESET

=PP1V5_S0_CPU

=PPMCPDDR_ISNS_R

=PP1V8R1V5_S0_FET

=PP1V5_S0_VMON

=PP1V8_S0_MCP_PLL_VLDO

=PP3V3R1V8_S0_MCP_IFP_VDD

=PP1V8_S0_REG

=PP1V8R1V5_S0_MCP_MEM


PP1V8_S0

MAKE_BASE=TRUE


VOLTAGE=1.8V

=PPVIN_S5_CPU_IMVP_ISNS


MAKE_BASE=TRUE

PP3V42_G3H

VOLTAGE=3.42VMIN_NECK_WIDTH=0.2 MM

=PP3V42_G3H_PWRCTL

=PP3V3_S5_SMC

=PP3V3_FW_P1V0FW

=PP3V3_FW_FWPHY

=PP3V3_S0_TPAD=PP3V3_GPU_SMBUS_SMC_0_S0


=PPVIN_S0_CPUVTTS0

=PPBUS_G3H PP3V3_S5MIN_LINE_WIDTH=0.6 MM


MAKE_BASE=TRUE

=PPVIN_S5_P5VP3V3

=PPBUS_S0_LCDBKLT

=PPVIN_GPU_GPUVCORE

=PPVIN_S5_CPU_IMVP_ISNS_R

=PPVIN_S5_BKL

=PPVIN_S5_FWPWRSW

=PPVIN_S0_P5VRTS0_MCPCORE

=PPVIN_S0GPU_P1V8P1V1

=PPVBAT_G3H_P3V42G3H

MAKE_BASE=TRUE

PPBUS_G3HMIN_LINE_WIDTH=0.4 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=6V

=PPVIN_S0_P1V05S5

=PPVIN_S3_DDRREG

=PP5V_S0_ODD

=PP5V_S3_AUDIO_PWR

=PP5V_S3_P1V05S0FET

=PP5V_S3_RTUSB

=PP5V_S3_GPUVCORE

MIN_LINE_WIDTH=0.5 mmPP5V_S3

MIN_NECK_WIDTH=0.25 mm

MAKE_BASE=TRUEVOLTAGE=5V

=PP5V_S0_REG

=PP5V_S0_HDD

=PP5V_S0_LPCPLUS

=PPVIN_PP5V_KBDLED

=PP5V_S0_CPUVTTS0

=PP5V_S0_CPU_IMVP

=PP5V_S0_FAN_RT

MAKE_BASE=TRUE


PP5V_S0

=PP5V_S0_FAN_LT

=PP5V_S3_IR

=PP5V_S3_WLAN

=PP5V_S0GPU_P1V1P1V8_GPU

=PPVIN_PBUS_KBDLED

Power AliasesSYNC_MASTER=RXU_K20

B

988

SYNC_DATE=05/07/2008

051-8071

68

43

44

31

44

26

21

30

7

37

33

84

30

7

61

68

49

66

44

8 51

8 51

66

60

30

42

87

47

31

67

38

6 8 13

46

6 8 13

61

22 23

68

67

68

68

8 23

42

66

48

7 9 96

63

45

49

44

81

7

47

67

7 75 78

27

84

24

21 23

23

24

24

21 22 23

53 57 58

18 20

81

39

44

37

37

61

7

35

36

74 75

81

69

69

74

74

74

71

76

7

7

7

45 77

59

64 87

7

66

76

83

69

9 72 73 79 80

71

66

72 73 79 80

70

46

18 23

67

77

68

33

33

32

32

18 23

23

7

7

22 23 45

6 74 75

7

70

46

83

7

84

84

68

28

27

26 63

63 7

7

66

66

36 7

7

7

59

42

59

60

43

7

40

62

44

68

25

45

7

68

50

28

36

11 12 45

36

25

46

82

33

18 19 21

87

82

29

7

17

17

7

7

27

46

28

17

17

20 8 23

23

20 23

66

22 23

33

68

65

6 10 11 12 13 61

42

9 14 22 23

31

23 66

23

67

18 24

8 23

8 23

23

7

46

48

47

47

66 68

38 66

43 52

68

78

62

7

7

68

63

63

27

28

29

11 12

46

68

67

66

18 24

66

16 23

7

45

7 42

67

41 42 51

66

35 37

50

44

66

65

60 7 96

62

86

77

45

36

64

83

59

7 45

66

63

38

9

68

39 98

77

7

64

38

43

9

65

61

48

7

7 48

40

30

83

9

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

TM Hole

Right CPU

Extra FSB Pull-upsExist in MRB but not Intel designs. Here for CYA.

Thermal Module Holes

Bosses for Flex Protector Bracket

Frame Holes

ETHERNET ALIASES

Top GPU Right

MCP79 PCIe PRSNT# Straps

Bottom Left GPU

GMUX ALIASESAUDIO ALIASES

CPU signals

TM HoleGPU signals

TM Hole

Left CPU

TM Hole

If found to be necessary, will move to page14.csa

Digital Ground

=PPVIN_PBUS_KBDLED

PP3V3_S0


VOLTAGE=8.4VMIN_NECK_WIDTH=0.25 mm

MAKE_BASE=TRUE

PP5VR8V4_KBDLED

=PPVIN_PP5V_KBDLED

GND_CHASSIS_CLUTCH

GND_CHASSIS_DIMM

GND_CHASSIS_LVDS

GND_CHASSIS_TPAD

GND_CHASSIS_RIGHTHS

VR_PWRGD_CLKEN_L

CPU_INTR

FSB_BREQ0_L

MAKE_BASE=TRUE

GPU_FB_A_VREF_DIV

MAKE_BASE=TRUE

GPU_FB_B_VREF_DIV

=PP1V05_S0_MCP_FSB

=PPVIN_S0_KBDLED

VOLTAGE=5VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mmPP5V_S3_AUDIO_AMP

MAKE_BASE=TRUE

AUD_IPHS_SWITCH_EN

IG_LCD_PWR_EN

IG_BKLT_EN

MCP_SPKR

=DVI_HPD_GMUX_INT

GMUX_JTAG_TDO

TP_LVDS_IG_BKL_PWMMAKE_BASE=TRUE

MAKE_BASE=TRUEGMUX_INT

MAKE_BASE=TRUELVDS_IG_PANEL_PWR

TP_LVDS_IG_B_CLKNMAKE_BASE=TRUE

=MCP_HDMI_HPD

=PP1V05_S0_MCP_SATA_AVDD1

=PP1V05_S0_MCP_SATA_DVDD1

CPU_DPRSTP_L

GND_BATT_CHGND

LVDS_MUX_SEL_EG

GPU_RESET_L

LVDS_IG_BKL_ONMAKE_BASE=TRUE

MAKE_BASE=TRUE

TP_LVDS_MUX_SEL_EG

ALL_EG_PGOOD

SMC_MCP_SAFE_MODE

PM_SLP_RMGT_LMAKE_BASE=TRUE

DP_IG_ML_P<3>MAKE_BASE=TRUE

=PP5V_S3_AUDIO_PWR

=P3V3ENET_EN

=P1V5_EXP_S0_EN

MAKE_BASE=TRUEMCP_MII_PD =MCP_MII_RXER

=PP1V8_GPU_FB_VDDQ

MAKE_BASE=TRUEJTAG_GMUX_TDO

MAKE_BASE=TRUE

PM_ALL_GPU_PGOOD

DP_IG_HPDMAKE_BASE=TRUE

GMUX_JTAG_TDI

=PP1V8_GPU_FB_VREF_B

=MCP_HDMI_DDC_DATA

HDA_BITCLKMAKE_BASE=TRUE

MAKE_BASE=TRUE

NC_LVDS_IG_B_DATAN<3>NO_TEST=TRUE

LVDS_IG_B_DATA_N<3>

LVDS_IG_B_DATA_P<3>

NC_LVDS_IG_A_DATAN<3>NO_TEST=TRUEMAKE_BASE=TRUE

LVDS_IG_A_DATA_N<3>

NC_LVDS_IG_A_DATAP<3>NO_TEST=TRUEMAKE_BASE=TRUE

LVDS_IG_A_DATA_P<3>

LVDS_IG_B_CLK_N

TP_LVDS_IG_B_CLKPMAKE_BASE=TRUE

LVDS_IG_B_CLK_P

MAKE_BASE=TRUETP_CPU_PECI_MCP CPU_PECI_MCP

TP_MEM_B_A<15>MAKE_BASE=TRUE

MEM_B_A<15>

TP_MEM_A_A<15>MAKE_BASE=TRUE

MEM_A_A<15>

MAKE_BASE=TRUETP_IMVP6_CLKEN_L

=SPI_CS1_R_L_USE_MLB

MAKE_BASE=TRUE

MEM_VTT_EN =DDRVTT_EN

MAKE_BASE=TRUE

CPU_BSEL<0..2> =MCP_BSEL<0..2>

CPU_VID<0..6>MAKE_BASE=TRUE

IMVP6_VID<0..6>

=RTL8211_REGOUT NC_RTL8211_REGOUTMAKE_BASE=TRUE

=RTL8211_ENSWREG

=PP3V3_ENET_PHY_VDDREG

=PP1V8_GPU_FB_VREF_A

TP_USB_EXTDPMAKE_BASE=TRUE


PP5V_S3_AUDIOMIN_LINE_WIDTH=0.5 mm

VOLTAGE=5V

USB_EXTD_P

USB_EXTD_N

MAKE_BASE=TRUETP_USB_MINIP

MAKE_BASE=TRUETP_USB_EXTDN

USB_MINI_P

USB_MINI_NTP_USB_MININMAKE_BASE=TRUE

=PEG_D2R_P<0..15>PEG_D2R_P<0..15>MAKE_BASE=TRUE

=PEG_D2R_N<0..15>PEG_D2R_N<0..15>MAKE_BASE=TRUE

=PEG_R2D_C_P<0..15>

=PEG_R2D_C_N<0..15>MAKE_BASE=TRUE

PEG_R2D_C_N<0..15>

LVDS_BKL_ONMAKE_BASE=TRUE

LCD_BKLT_EN

=MCP_HDMI_TXC_P

=MCP_HDMI_TXC_N

MAKE_BASE=TRUE

DP_IG_ML_N<2..0>

MAKE_BASE=TRUE

DP_IG_DDC_DATA

=MCP_MII_CRS

=MCP_MII_COL

EG_CLKREQ_OUT_L

PCIE_FW_PRSNT_LMAKE_BASE=TRUE

MAKE_BASE=TRUE

TP_SPI_CS1_R_L_USE_MLB

MAKE_BASE=TRUE

TP_PP3V3_ENET_PHY_VDDREG

=P1V05ENET_EN

PEG_PRSNT_LMAKE_BASE=TRUE

=MCP_HDMI_TXD_P<0..2>

=MCP_HDMI_DDC_CLK

MAKE_BASE=TRUE

NC_LVDS_IG_B_DATAP<3>NO_TEST=TRUE

LVDS_IG_BKL_PWM

CPU_NMI

FSB_CPURST_L

HDA_BIT_CLK

=MCP_HDMI_TXD_N<0..2>

DP_IG_ML_P<2..0>MAKE_BASE=TRUE

DP_IG_ML_N<3>MAKE_BASE=TRUE

MAKE_BASE=TRUE

EG_RESET_L

JTAG_GMUX_TDIMAKE_BASE=TRUE

MAKE_BASE=TRUE

DP_IG_DDC_CLK

PEG_R2D_C_P<0..15>MAKE_BASE=TRUE

GMUX_JTAG_TMSJTAG_GMUX_TMSMAKE_BASE=TRUE

GND_CHASSIS_USB

GND_CHASSIS_SATA

GNDMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MMVOLTAGE=0V

Signal Aliases

9 98

B051-8071

SYNC_MASTER=K20_MLB SYNC_DATE=09/24/2008

21

R0998KBDLED_PBUS

5%

MF-LF

0

1/10W

603

21

R0999KBDLED_5V

603

1/10W5%

MF-LF

0

1

ZT09703R2P5

1

ZT09403R2P5

1

ZT09653R2P5

1

SH0934SM

2.0DIA-TALL-EMI-MLB-M97-M98

1

SH0935SM


SH09332.0DIA-TALL-EMI-MLB-M97-M98

SM

1

SH0932SM


1


SM

1

SH0930SM


1


SM

1

ZT09153R2P5

1


SM

1

ZT09584.0OD1.65H-M1.6X0.35

1

ZT09574.0OD1.65H-M1.6X0.35

1

SH0923SM

1.4DIA-SHORT-EMI-MLB-M97-M98

1


SM

1

SH0921SM


1

SH09201.4DIA-SHORT-EMI-MLB-M97-M98

SM

1


SM

1

SH0916SM


1


SM

1

SH0919SM


88 61 14 10

2

1R0950

402MF-LF

220

NO STUFF

5%1/16W

1

SH0902SM


1


SM

1

SH0900SM


1

SH0911SM


1

SH0914SM


1


SM

1


SM

1


SM

1

ZT09713R2P5

1

ZT09323R2P5

21

R0903

402

5%1/16WMF-LF

0

1

ZT0931STDOFF-4.0OD3.0H-SM

1

ZT0934STDOFF-4.0OD3.0H-SM

2

1R0990NO STUFF

402

1%

MF-LF1/16W

150

2

1R0980

402

1%

MF-LF1/16W

150

NO STUFF

2

1R0970

MF-LF402

5%1/16W

NO STUFF

200

2

1R0960

MF-LF402

5%1/16W

NO STUFF

62

88 14 10

88 14 13 10

88 14 10

88 14 10

ZT0930STDOFF-4.5OD.98H-1.1-3.48-TH

21

R0927NO STUFF

MF-LF

5%1/16W

402

0

84

17

21

R0926

1/16W5%

MF-LF

0

402

1

ZT0991STDOFF-4.5OD.98H-1.1-3.48-TH

1

ZT0988STDOFF-4.5OD.98H-1.1-3.48-TH

1

ZT0989STDOFF-4.5OD.98H-1.1-3.48-TH

1

ZT09603R2P5

1

ZT09453R2P5

ZT0987STDOFF-4.5OD.98H-1.1-3.48-TH

ZT0986STDOFF-4.5OD.98H-1.1-3.48-TH

ZT0985STDOFF-4.5OD.98H-1.1-3.48-TH

ZT0984STDOFF-4.5OD.98H-1.1-3.48-TH

ZT0983STDOFF-4.5OD.98H-1.1-3.48-TH

ZT0982STDOFF-4.5OD.98H-1.1-3.48-TH

ZT0981STDOFF-4.5OD.98H-1.1-3.48-TH

21

R0901

1%

MF-LF

10

1/16W

402

21

R0900

1/16WMF-LF

1%

402

10

2 1

XW0901

SM

2 1

XW0900SM

21

R0902

402MF-LF1/16W5%

10K

17 21

R09250

MF-LF1/16W5%

402

2

1R0930

1/16W

402

5%

MF-LF

47K

ZT0980STDOFF-4.5OD.98H-1.1-3.48-TH

8

96 8 7

8

61

26

26

23 22 14 8

50

56

58 19

84

84

21

18

17

7

84

18

7

18

20

20

60 59

84

69

18

84

41

21

90 81

8

33

66

18

80 79 73 72 8

84 6

67

81

19

73

18

53

90 18

90 18

90 18

90 18

90 18

7 90 18

7 14

7 28

7 27

43 21

25 68 63

88 10 14

88 11 88 61

32

32

32

72

7

55 53

91 20

91 20

7

7

91 20

91 20 7

17 90 69

17 90 69

17

17 90 69

86 84

18

18

90 81

81 75

18

18

33

18

18

18

91 21

18

90 81

90 81

84

84 6

81 75

90 69

19 84 6

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

IN

OUT

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

IN

IN

IN

IN

IN

IN

IN

OUT

BI

BI

BI

BI

LOCK*

INIT*

A20M*

A6*

A3*

A4*

A14*

A16*

REQ0*

REQ1*

REQ2*

REQ3*

REQ4*

BCLK1

BCLK0

THERMTRIP*

THERMDA

PROCHOT*

DBR*

TRST*

TMS

TDO

TDI

TCK

PREQ*

PRDY*

BPM3*

BPM2*

BPM1*

BPM0*

HITM*

HIT*

TRDY*

RS2*

RS1*

RS0*

RESET*

IERR*

BR0*

DBSY*

DRDY*

DEFER*

BNR*

RSVD4

RSVD3

RSVD2

RSVD1

RSVD0

SMI*

LINT1

LINT0

STPCLK*

FERR*

ADSTB1*

A35*

A34*

A33*

A32*

A31*

A30*

A29*

A28*

A19*

A18*

A17*

ADSTB0*

A13*

A12*

BPRI*

A20*

A21*

A22*

A23*

A24*

A26*

A27*

A9*

A8*

A7*

A11*

A25*

THERMDC

IGNNE*

ADS*

A10*

A15*

A5*

RSVD5

RSVD6

RSVD7

RSVD8

1 OF 4

CONTROL

THERMAL

XDP/ITP SIGNALS

H CLK

ADDR GROUP1

ICH

RESERVED

ADDR GROUP0

TEST7

TEST6

DSTBP1*

DINV1*

D31*

D30*

D25*

D11*

D12*

D13*

D14*

DSTBP0*

DINV0*

D9*

D8*

D7*

D6*

D19*

D18*

D0* D32*

D1*

D2*

D5*

D16*

D20*

D21*

D22*

D23*

D24*

D26*

D27*

D28*

D29*

DSTBN1*

GTLREF

TEST3

TEST4

TEST5

BSEL0

BSEL1

BSEL2

D33*

D34*

D35*

D36*

D37*

D38*

D39*

D40*

D41*

D42*

D43*

D44*

D45*

D46*

D47*

DSTBN2*

DSTBP2*

DINV2*

D48*

D49*

D50*

D51*

D52*

D53*

D54*

D55*

D56*

D57*

D58*

D59*

D60*

D61*

D62*

D63*

DSTBN3*

DSTBP3*

DINV3*

COMP0

COMP1

COMP2

COMP3

DPRSTP*

DPSLP*

DPWR*

PWRGOOD

SLP*

PSI*

D17*

D4*

D3*

DSTBN0*

D15*

D10*

TEST2

TEST1

2 OF 4

DATA GRP 3

DATA GRP 2

MISC

DATA GRP 0

DATA GRP 1

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

LAYOUT NOTE:

MAKE TRACE LENGTH SHORTER THAN 0.5".

COMP0,2 CONNECT WITH ZO=27.4OHM,

MAKE TRACE LENGTH SHORTER THAN 0.5".

COMP1,3 CONNECT WITH ZO=55OHM,

PM_THRMTRIP#

SHOULD CONNECT TO ICH AND

GMCH WITHOUT T (NO STUB)

0.1" AWAY

PLACE TESTPOINT ON

FSB_IERR_L WITH A GND

0.5" MAX LENGTH FOR CPU_GTLREF

REFERENCED TO GND

PLACE C1000 CLOSE TO CPU_TEST4

PIN. MAKE SURE CPU_TEST4 IS

FSB_DSTB_L_N<3>

CPU_COMP<3>

CPU_COMP<0>

CPU_COMP<1>

CPU_COMP<2>CPU_TEST2

XDP_TMS

=PP1V05_S0_CPU

XDP_TDO

XDP_TDI

XDP_TCK

XDP_TRST_L

=PP1V05_S0_CPU

=PP1V05_S0_CPU

=PP1V05_S0_CPU

TP_CPU_RSVD8

TP_CPU_RSVD7

TP_CPU_RSVD6

TP_CPU_RSVD5

FSB_A_L<5>

FSB_A_L<15>

FSB_A_L<10>

FSB_ADS_L

CPU_IGNNE_L

CPU_THERMD_N

FSB_A_L<11>

FSB_A_L<7>

FSB_A_L<8>

FSB_A_L<9>

FSB_A_L<27>

FSB_A_L<26>

FSB_A_L<24>

FSB_A_L<23>

FSB_A_L<22>

FSB_A_L<21>

FSB_A_L<20>

FSB_BPRI_L

FSB_A_L<12>

FSB_A_L<13>

FSB_ADSTB_L<0>

FSB_A_L<17>

FSB_A_L<19>

FSB_A_L<28>

FSB_A_L<29>

FSB_A_L<30>

FSB_A_L<31>

FSB_A_L<32>

FSB_A_L<33>

FSB_A_L<34>

FSB_A_L<35>

FSB_ADSTB_L<1>

CPU_FERR_L

CPU_STPCLK_L

CPU_INTR

CPU_NMI

CPU_SMI_L

TP_CPU_RSVD0

TP_CPU_RSVD1

TP_CPU_RSVD2

TP_CPU_RSVD3

TP_CPU_RSVD4

FSB_BNR_L

FSB_DEFER_L

FSB_DRDY_L

FSB_DBSY_L

FSB_BREQ0_L

CPU_IERR_L

FSB_CPURST_L

FSB_RS_L<0>

FSB_RS_L<1>

FSB_RS_L<2>

FSB_TRDY_L

FSB_HIT_L

FSB_HITM_L

XDP_BPM_L<0>

XDP_BPM_L<1>

XDP_BPM_L<2>

XDP_BPM_L<3>

XDP_BPM_L<4>

XDP_BPM_L<5>

XDP_TCK

XDP_TDI

XDP_TDO

XDP_TMS

XDP_TRST_L

XDP_DBRESET_L

CPU_PROCHOT_L

CPU_THERMD_P

PM_THRMTRIP_L

FSB_CLK_CPU_P

FSB_CLK_CPU_N

FSB_REQ_L<4>

FSB_REQ_L<3>

FSB_REQ_L<2>

FSB_REQ_L<0>

FSB_A_L<4>

FSB_A_L<3>

FSB_A_L<6>

CPU_A20M_L

CPU_INIT_L

FSB_LOCK_L

FSB_REQ_L<1>

CPU_TEST1

FSB_D_L<10>

FSB_D_L<15>

FSB_DSTB_L_N<0>

FSB_D_L<3>

FSB_D_L<4>

FSB_D_L<17>

CPU_PSI_L

FSB_CPUSLP_L

CPU_PWRGD

FSB_DPWR_L

CPU_DPSLP_L

CPU_DPRSTP_L

FSB_DINV_L<3>

FSB_DSTB_L_P<3>

FSB_D_L<63>

FSB_D_L<62>

FSB_D_L<61>

FSB_D_L<60>

FSB_D_L<59>

FSB_D_L<58>

FSB_D_L<57>

FSB_D_L<56>

FSB_D_L<55>

FSB_D_L<54>

FSB_D_L<53>

FSB_D_L<52>

FSB_D_L<51>

FSB_D_L<50>

FSB_D_L<49>

FSB_D_L<48>

FSB_DINV_L<2>

FSB_DSTB_L_P<2>

FSB_DSTB_L_N<2>

FSB_D_L<47>

FSB_D_L<46>

FSB_D_L<45>

FSB_D_L<44>

FSB_D_L<43>

FSB_D_L<42>

FSB_D_L<41>

FSB_D_L<40>

FSB_D_L<39>

FSB_D_L<38>

FSB_D_L<37>

FSB_D_L<36>

FSB_D_L<35>

FSB_D_L<34>

FSB_D_L<33>

CPU_BSEL<2>

CPU_BSEL<1>

CPU_BSEL<0>

TP_CPU_TEST5

CPU_TEST4

TP_CPU_TEST3

CPU_GTLREF

FSB_DSTB_L_N<1>

FSB_D_L<29>

FSB_D_L<28>

FSB_D_L<27>

FSB_D_L<26>

FSB_D_L<24>

FSB_D_L<23>

FSB_D_L<22>

FSB_D_L<21>

FSB_D_L<20>

FSB_D_L<16>

FSB_D_L<5>

FSB_D_L<2>

FSB_D_L<1>

FSB_D_L<32>FSB_D_L<0>

FSB_D_L<18>

FSB_D_L<19>

FSB_D_L<6>

FSB_D_L<7>

FSB_D_L<8>

FSB_D_L<9>

FSB_DINV_L<0>

FSB_DSTB_L_P<0>

FSB_D_L<14>

FSB_D_L<13>

FSB_D_L<12>

FSB_D_L<11>

FSB_D_L<25>

FSB_D_L<30>

FSB_D_L<31>

FSB_DINV_L<1>

FSB_DSTB_L_P<1>

TP_CPU_TEST7

TP_CPU_TEST6

FSB_A_L<25>

FSB_A_L<18>

FSB_A_L<16>

FSB_A_L<14>

CPU FSB

10

B051-8071

98

SYNC_MASTER=M98_MLB SYNC_DATE=04/01/2008

C3

A26

AF1

AF26

C24

D25

C23

D7

D6

AE6

AD26

AF24

AA26

M26

H26

AE25

Y26

L26

J26

D24

B5

E5

AC20

U22

N24

H25

G24

K24

E23

AC23

AF22

AD23

AC22

E25

AD21

AE21

AC25

AF23

AE22

AD20

AC26

AB21

AB22

AA21

G25

AD24

AE24

AB25

AA24

AA23

W25

W24

Y23

W22

Y25

F23

U23

U25

T22

V23

V26

V24

AB24

Y22

N25

T25

G22

L25

R24

T24

P22

P23

P25

M23

L22

M24

L23

E26

R23

P26

K25

N22

H23

K22

F26

H22

J23

J24

F24

E22

Y1

AA1

U26

R26

C21

B23

B22

U1000

OMIT

PENRYNFCBGA

AB6

G2

AB5

C7

B25

A24

AB3

AA6

AC5

D5

A3

D3

D22

D2

F6

B2

V3

T2

N5

M4

G3

F4

F3

C1

L1

J3

K2

H2

K3

D21

AC1

AC2

H4

B4

C6

B3

C4

D20

E4

G6

A5

F21

H5

E1

C20

F1

G5

AC4

AD1

AD3

AD4

E2

A21

A22

V1

M1

H1

J1

N2

M3

K5

L4

L5

AA3

AB2

AA4

W3

V4

U2

J4

Y4

W5

W2

T3

T5

R4

U1

Y5

U4

A6

W6

R3

U5

Y2

R1

P1

P4

L2

P2

P5

N3

U1000

OMIT

PENRYNFCBGA

21

R1024

MF-LF1/16W1%

402

PLACEMENT_NOTE=Place R1024 near ITP connector (if present)

54.9

2

1 C1000

402

16V10%0.1uF

NOSTUFF

X5R

2

1R1012

402MF-LF

NOSTUFF

5%1/16W

1K

21

R1023

1%

MF-LF1/16W

402

649

14 88

14 88

14 88

14 88

21

R1022

1%

54.9

MF-LF1/16W

402

21

R1021

1%

MF-LF1/16W

54.9

402

21

R102054.9

1/16WMF-LF

1%

402

2

1R1003

402

54.9

MF-LF

1%1/16W

2

1R1007

402

NOSTUFF

1K

MF-LF

5%1/16W

21

R1030

NOSTUFF

5%

MF-LF1/16W

0

402

14 88

14 88

14 88

9 14 88

9 14 88

14 88

14 88

14 88

14 88

47 96

6 10 13 88

6 10 13 88

6 10 13 88

6 10 13 88

14 88

14 88

14 88

14 88

9 13 14 88

14 88

14 42 88

47 96

14 42 61 88

13 25

6 10 88

13 88

13 88

13 88

13 88

13 88

13 88

7 14 88

7 14 88

7 14 88

9 14 88

7 14 88

7 14 88

14 88

14 88

14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

9 88

9 88

9 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

13 14 88

61

14 88

14 88

14 88

9 14 61 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

7 14 88

21

R1016

1/16WMF-LF

1%

27.4

40221

R101754.9

1/16WMF-LF

1%

40221

R1018

1%

MF-LF1/16W

27.4

40221

R1019

1/16WMF-LF

1%

54.9

4022

1R1006

402

1/16W

2.0K

MF-LF

1%

2

1R1005

402

1K

MF-LF

1%1/16W

2

1R1004

MF-LF402

1/16W5%68

2

1R1002

402MF-LF

54.9

1/16W1%

88

88

88

88

6 10 13 88

6 8 10 11 12 13 61

6 10 88

6 10 13 88

6 10 13 88

6 10 13 88

6 8 10 11 12 13 61

6 8 10 11 12 13 61

6 8 10 11 12 13 61

88

7

26 88

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

VCC

VCCP

VCCA

VID0

VID1

VID2

VID3

VID4

VID5

VID6

VCCSENSE

VSSSENSE

VCC

3 OF 4

VSS VSS

4 OF 4

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

TBD A (Enhanced Deeper Sleep)

17.0 A (Design Target)

Ultra Low Voltage:Standard Voltage:


27.4 A (Auto-Halt/Stop-Grant HFM)

TBD A (Deep Sleep SuperLFM)

TBD A (Deep Sleep HFM)

TBD A (Deep Sleep LFM)

TBD A (Deeper Sleep)

TBD A (Enhanced Deeper Sleep)

TBD A (Auto-Halt/Stop-Grant HFM)

TBD A (Auto-Halt/Stop-Grant SuperLFM)

TBD A (Deep Sleep HFM)

21.0 A (HFM)

TBD A (Sleep HFM)

9.4 A (Enhanced Deeper Sleep)

11.5 A (Deeper Sleep)

25.0 A (Deep Sleep HFM)

27.4 A (Sleep HFM)

25.5 A (SuperLFM)

TBD A (Sleep LFM)

TBD A (Auto-Halt/Stop-Grant LFM)

Current numbers from Merom for Santa Rosa EMTS, doc #22221.

TBD A (LFM)

TBD A (HFM)

TBD A (Auto-Halt/Stop-Grant HFM)

TBD A (Sleep HFM)

TBD A (Deeper Sleep)

TBD A (Sleep SuperLFM)

TBD A (SuperLFM)

18.7 A (LFM)


Low Voltage:

(CPU INTERNAL PLL POWER 1.5V)

(CPU IO POWER 1.05V)

130 mA

(CPU CORE POWER)

41.0 A (HFM)

16.8 A (Sleep SuperLFM)

16.0 A (Deep Sleep SuperLFM)

4500 mA (before VCC stable)

2500 mA (after VCC stable)

30.4 A (LFM)

17.0 A (Auto-Halt/Stop-Grant SuperLFM)

=PPVCORE_S0_CPU

=PP1V05_S0_CPU

=PP1V5_S0_CPU

CPU_VID<0>

CPU_VID<1>

CPU_VID<2>

CPU_VID<3>

CPU_VID<4>

CPU_VID<5>

CPU_VID<6>

CPU_VCCSENSE_P

CPU_VCCSENSE_N

=PPVCORE_S0_CPU

SYNC_DATE=04/01/2008SYNC_MASTER=M98_MLB

CPU Power & Ground

051-8071 B

11 98

V25

V22

V5

V2

U24

U21

U6

U3

T26

T23B8

T4

T1

R25

R22

R5

R2

P24

P21

P6

P3

B6

N26

N23

N4

N1

M25

M22

M5

M2

L24

L21

AF2

L6

L3

K26

K23

K4

K1

J25

J22

J5

J2

A23

H24

H21

H6

H3

G26

G23

G1

G4

F25

F22

A19

F2

F19

F16

F13

F11

F8

F5

E24

E21

E19

A16

E16

E14

E11

E8

E6

E3

D26

D23

D19

D16

A14

D13

D11

D8

D4

D1

C25

C22

C2

C19

C16

A11

C14

C11

C8

B1 AF25

A25

AF21

C5

AF19

AF16

AF13

AF11

AF8

AF6

A2

AE26

AE23

AE19

B24

AE16

AE14

AE11

AE8

AE4

AE1

AD25

AD22

AD19

AD16

B21

AD13

AD11

AD8

AD5

AD2

AC24

AC21

AC19

AC16

AC14

B19

AC11

AC8

AC6

AC3

AB26

AB23

AB19

AB16

AB13

AB11

B16

AB8

AB4

AB1

AA25

AA22

AA19

AA16

AA14

AA11

AA8

B13

AA5

AA2

Y24

Y21

Y6

Y3

W26

W23

W4

W1

B11

A8

A4

U1000

OMIT

PENRYNFCBGA

AE7

AE2

AF3

AE3

AF4

AE5

AF5

AD6

AF7

N6

N21

M21

K21

J21

M6

K6

J6

W21

V21

T6

T21

R6

R21

V6

G21

C26

B26

AF20

AF18

AF17

AF15

AF14

AF12

AF10

AF9

AE20

AE18

B7

AE17

AE15

AE13

AE12

AE10

AE9

AD18

AD17

AD15

AD14

A20

AD12

AD10

AD9

AD7

AC18

AC17

AC15

AC13

AC12

AC9

A18

AC7

AB7

AB20

AB18

AB17

AB15

AB14

AB12

AB10

AC10

A17

AB9

AA20

AA18

AA17

AA15

AA13

AA12

AA10

AA9

AA7

A15

F20

F18

F17

F15

F14

F12

F10

F9

F7

E20

A13

E18

E17

E15

E13

E12

E10

E9

E7

D18

D17

A12

D15

D14

D12

D10

D9

C18

C17

C15

C13

C12

A10

C10

C9

B20

B18

B17

B15

B14

B12

B10

B9

A9

A7

U1000

OMIT

PENRYNFCBGA

2

1R1100

MF-LF402

PLACEMENT_NOTE=Place within 1 inch of CPU, no stub.

1/16W1%100

61 88

61 88

9 88

2

1R1101

PLACEMENT_NOTE=Place within 1 inch of CPU, no stub.

MF-LF402

1001%1/16W

9 88

9 88

9 88

9 88

9 88

9 88

8 11 12 45

6 8 10 12 13 61

8 12

8 11 12 45

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

VCCP (CPU I/O) DECOUPLING

1x 470uF, 6x 0.1uF 0402

4x 330uF, 20x 22uF 0805

CPU VCORE HF AND BULK DECOUPLING

1x 10uF, 1x 0.01uF

VCCA (CPU AVdd) DECOUPLING

WF: Consider sharing bulk cap with NB Vtt?

=PPVCORE_S0_CPU

=PP1V5_S0_CPU

=PP1V05_S0_CPU

CPU Decoupling & VIDSYNC_MASTER=M98_MLB

9812

B


051-8071

32

1C1253

PLACEMENT_NOTE=Place in CPU center cavity.

20%

D2T-SM2POLY-TANT

CRITICAL

330UF

2.0V32

1C1252

20%

POLY-TANT

CRITICAL

330UF

2.0V


D2T-SM2

32

1C1251

20%

D2T-SM2POLY-TANT


CRITICAL

330UF

2.0V32

1C1250

20%

D2T-SM2POLY-TANT

2.0V

330UF

CRITICAL


2

1C1280

X5R6.3V20%

10uF

603

2

1 C1281

PLACEMENT_NOTE=Place near CPU pin B26.

CERM402

16V10%0.01UF

2

1 C1218

20%22UF

6.3V

CRITICAL

603X5R-CERM

2

1 C1241

20%

CERM402

0.1UF

10V2

1 C1240

20%

CERM402

0.1UF

10V2

1 C1239

20%

CERM402

0.1UF

10V2

1 C1238

20%

CERM402

0.1UF

10V2

1 C1237

20%

CERM402

0.1UF

10V

2

1 C121722UF20%

CRITICAL

603X5R-CERM6.3V

2

1 C121522UF

X5R-CERM

20%6.3V

CRITICAL

603

2

1 C1209

X5R-CERM

22UF

6.3V

CRITICAL

20%

603

2

1 C1205

20%6.3V

603X5R-CERM

22UF

CRITICAL

2

1 C1236

20%0.1UF

CERM402

10V

2

1 C1210

X5R-CERM

CRITICAL

6.3V20%22UF

603

2

1 C1200

X5R-CERM603

CRITICAL

6.3V20%22UF

2

1 C1219

X5R-CERM

22UF20%6.3V

CRITICAL

603

2

1 C1211

20%22UF

6.3VX5R-CERM

CRITICAL

603

2

1 C1212

X5R-CERM

20%22UF

6.3V

CRITICAL

603

2

1 C121322UF

X5R-CERM6.3V20%

603

CRITICAL

2

1 C1201

6.3V

CRITICAL

22UF20%

603X5R-CERM 2

1 C1202

X5R-CERM

20%22UF

6.3V

CRITICAL

603

2

1 C1207

X5R-CERM

20%22UF

6.3V

CRITICAL

603

2

1 C120322UF

X5R-CERM6.3V20%

CRITICAL

603

2

1 C1208

X5R-CERM

20%22UF

6.3V

CRITICAL

603

2

1 C1214

X5R-CERM

20%6.3V

CRITICAL

603

22UF

2

1 C1216CRITICAL

X5R-CERM6.3V20%22UF

603

2

1 C1204

20%22UF

6.3V

CRITICAL

603X5R-CERM

32

1C1235CRITICAL

2.5V

D2T

20%470UF

POLY

2

1 C1206

X5R-CERM

20%22UF

6.3V

CRITICAL

603

8 11 45

8 11

6 8 10 11 13 61

IN

BI

BI

BI

BI

OUT

IN

BI

IN

IN

IN

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

OUT

IN

IN

IN

IN

OUT

OUT

OUT

OUT

NC

IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

MCP79-specific pinout

Use with 920-0620 adapter board to support CPU, MCP debugging.

OBSFN_A0

OBSFN_A1

OBSDATA_A0

OBSDATA_A2

OBSFN_B1

OBSDATA_B0

OBSDATA_B1 OBSDATA_D1

OBSDATA_D2

OBSDATA_D3

ITPCLK/HOOK4

ITPCLK#/HOOK5

998-1571

Direction of XDP module

OBSFN_C1

OBSDATA_C2

OBSFN_B0

NOTE: XDP_DBRESET_L must be pulled-up to 3.3V.

XDP_PRESENT#

OBSDATA_B3

OBSFN_D1

PWRGD/HOOK0

OBSDATA_B2

TCK1

OBSDATA_D0

TMS

HOOK1

HOOK2

HOOK3

TRSTn

SDA

SCL

OBSFN_D0

RESET#/HOOK6

TDI

TDO

VCC_OBS_AB

NOTE: This is not the standard XDP pinout.

on even-numbered side of J1300

Please avoid any obstructions

DBR#/HOOK7

VCC_OBS_CD

Mini-XDP Connector

OBSDATA_C3

OBSDATA_C1

OBSDATA_C0

OBSFN_C0

OBSDATA_A1

OBSDATA_A3

TCK0

TP_XDP_OBSFN_B0

XDP_BPM_L<3>

=PP3V3_S0_XDP

=PP1V05_S0_CPU

TP_XDP_OBSDATA_B2

MCP_DEBUG<2>

JTAG_MCP_TDI

MCP_DEBUG<4>

MCP_DEBUG<6>

MCP_DEBUG<7>

XDP_CPURST_L

XDP_DBRESET_L

MCP_DEBUG<0>

XDP_TCK

SMBUS_MCP_0_DATA

SMBUS_MCP_0_CLK

JTAG_MCP_TCK

PM_LATRIGGER_L

XDP_OBS20

TP_XDP_OBSDATA_B3

XDP_PWRGD

TP_XDP_OBSDATA_B0

TP_XDP_OBSDATA_B1

TP_XDP_OBSFN_B1

XDP_BPM_L<0>

XDP_BPM_L<1>

XDP_BPM_L<2>

XDP_BPM_L<4>

XDP_BPM_L<5> JTAG_MCP_TDO_CONN

JTAG_MCP_TRST_L

MCP_DEBUG<1>

MCP_DEBUG<3>

JTAG_MCP_TMS

MCP_DEBUG<5>

FSB_CLK_ITP_P

FSB_CLK_ITP_N

XDP_TDI

XDP_TRST_L

XDP_TDO_CONN

XDP_TMS

CPU_PWRGD

FSB_CPURST_L


051-8071

SYNC_MASTER=M98_MLB

13

B

98

eXtended Debug Port(MiniXDP)

9

8 7

60

6

59

58 57

56 55

54 53

52 51

50

5

49

48 47

46 45

44 43

42 41

40

4

39

38 37

36 35

34 33

32 31

30

3

29

28 27

26 25

24 23

22 21

20

2

19

18 17

16 15

14 13

12 11

10

1

J1300

F-ST-SM

LTH-030-01-G-D-NOPEGS

CRITICALXDP_CONN

19

10 25

6 10 88

6 10 88

6 10 88

6

14 88

14 88

6

6 21

19 91

19 91

19 91

19 91

19 91

19 91

19 91

19 91

6 21

6 21

6 21

10 88

10 88

10 88

10 88

21

R1303

XDP

402MF-LF1/16W5%

1K

PLACEMENT_NOTE=Place close to CPU to minimize stub.

9 10 14 88

6 10 88

10 88

10 88

2

1 C1301

X5R

10%0.1uF

XDP

16V

402

2

1C1300

402

0.1uF

XDP

16V10%

X5R

2

1R131554.9

MF-LF1/16W

1%

402

XDP

7 21 44 91

7 21 44 91

21

R13991K

402MF-LF

XDP

5%1/16W

10 14 88

6 8

6 8 10 11 12 61

7

88

7

IN

IN

IN

IN

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

BI

BI

CPU_BR0#

CPU_BNR#

BCLK_OUT_NB_N

CPU_BR1#

CPU_REQ4#

CPU_ADS#

CPU_A27#

CPU_A26#

CPU_A25#

CPU_A34#

CPU_D62#

CPU_D61#

CPU_D60#

CPU_A28#

CPU_A29#

CPU_A30#

CPU_A31#

CPU_A32#

CPU_A22#

CPU_A23#

CPU_A24#

CPU_REQ3#

CPU_REQ2#

CPU_DBI3#

CPU_D14#

CPU_D13#

CPU_D12#

CPU_D11#

CPU_D10#

CPU_DPWR#

CPU_RS1#

BCLK_VML_COMP_GND

CPU_COMP_VCC

CPU_TRDY#

CPU_PROCHOT#

CPU_BSEL0

CPU_RS2#

CPU_BSEL1

BCLK_IN_P

BCLK_OUT_CPU_N

CPU_PWRGD

CPU_DSTBP0#

CPU_DSTBP1#

CPU_DBI1#

CPU_DBI0#

CPU_DSTBN1#

CPU_DSTBN0#

CPU_DBI2#

CPU_DSTBP2#

CPU_DSTBN2#

CPU_DSTBP3#

CPU_A4#

CPU_DSTBN3#

CPU_A3#

CPU_A5#

CPU_A9#

CPU_A8#

CPU_A6#

CPU_A7#

CPU_A12#

CPU_A14#

CPU_A13#

CPU_A11#

CPU_A15#

CPU_A16#

CPU_A19#

CPU_A17#

CPU_A18#

CPU_A20#

CPU_A21#

CPU_A35#

CPU_A33#

CPU_ADSTB0#

CPU_REQ0#

CPU_LOCK#

CPU_HIT#

CPU_HITM#

CPU_FERR#

CPU_THERMTRIP#

CPU_PECI

CPU_COMP_GND

CPU_D0#

CPU_D1#

CPU_D3#

CPU_D2#

CPU_D4#

CPU_D5#

CPU_D6#

CPU_D8#

CPU_D7#

CPU_D9#

CPU_D15#

CPU_D17#

CPU_D18#

CPU_D16#

CPU_D19#

CPU_D20#

CPU_D21#

CPU_D23#

CPU_D22#

CPU_D24#

CPU_D25#

CPU_D26#

CPU_D27#

CPU_D28#

CPU_D29#

CPU_D30#

CPU_D31#

CPU_D32#

CPU_D33#

CPU_D34#

CPU_D35#

CPU_D36#

CPU_D38#

CPU_D37#

CPU_D39#

CPU_D40#

CPU_D41#

CPU_D43#

CPU_D42#

CPU_D44#

CPU_D45#

CPU_D46#

CPU_D47#

CPU_D52#

CPU_D53#

CPU_D54#

CPU_D55#

CPU_D56#

CPU_D57#

CPU_D58#

CPU_D59#

CPU_D63#

CPU_BPRI#

CPU_DEFER#

BCLK_OUT_CPU_P

BCLK_OUT_ITP_P

BCLK_OUT_ITP_N

BCLK_OUT_NB_P

BCLK_IN_N

CPU_A20M#

CPU_NMI

CPU_INTR

CPU_SMI#

CPU_RESET#

CPU_SLP#

CPU_DPSLP#

CPU_STPCLK#

CPU_DPRSTP#

CPU_D51#

CPU_D50#

CPU_D49#

CPU_D48#

CPU_ADSTB1#

CPU_IGNNE#

CPU_INIT#

BCLK_VML_COMP_VDD

CPU_RS0#

+V_DLL_DLCELL_AVDD

+V_PLL_MCLK

+V_PLL_FSB

+V_PLL_CPU

CPU_A10#

CPU_BSEL2

CPU_DBSY#

CPU_DRDY#

CPU_REQ1#

FSB

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

Loop-back clock for delay matching.

(MCP_BSEL<2>)

(MCP_BSEL<1>)

(MCP_BSEL<0>)

20 mA

29 mA

15 mA

206 mA270 mA (A01)

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

=MCP_BSEL<1>

=MCP_BSEL<0>

=MCP_BSEL<2>

=PP1V05_S0_MCP_FSB

FSB_BREQ1_L

FSB_ADS_L

FSB_BREQ0_L

CPU_FERR_L

FSB_RS_L<0>

FSB_BNR_L

FSB_DRDY_L

FSB_DBSY_L

FSB_A_L<33>

FSB_A_L<34>

FSB_A_L<25>

FSB_A_L<10>

FSB_D_L<7>

FSB_D_L<14>

PP1V05_S0_MCP_PLL_FSB =PP1V05_S0_MCP_FSB

FSB_DSTB_L_P<0>

FSB_DSTB_L_N<0>

FSB_DINV_L<0>

FSB_DSTB_L_P<1>

FSB_DSTB_L_N<1>

FSB_DINV_L<1>

FSB_DSTB_L_P<2>

FSB_DSTB_L_N<2>

FSB_DINV_L<2>

FSB_DSTB_L_P<3>

FSB_DSTB_L_N<3>

FSB_DINV_L<3>

FSB_A_L<3>

FSB_A_L<4>

FSB_A_L<5>

FSB_A_L<6>

FSB_A_L<7>

FSB_A_L<8>

FSB_A_L<9>

FSB_A_L<11>

FSB_A_L<12>

FSB_A_L<13>

FSB_A_L<14>

FSB_A_L<15>

FSB_A_L<16>

FSB_A_L<17>

FSB_A_L<18>

FSB_A_L<19>

FSB_A_L<20>

FSB_A_L<21>

FSB_A_L<22>

FSB_A_L<23>

FSB_A_L<24>

FSB_A_L<26>

FSB_A_L<27>

FSB_A_L<28>

FSB_A_L<29>

FSB_A_L<30>

FSB_A_L<31>

FSB_A_L<32>

FSB_A_L<35>

FSB_ADSTB_L<0>

FSB_ADSTB_L<1>

FSB_REQ_L<0>

FSB_REQ_L<1>

FSB_REQ_L<2>

FSB_REQ_L<3>

FSB_REQ_L<4>

FSB_HIT_L

FSB_HITM_L

FSB_LOCK_L

FSB_TRDY_L

CPU_PECI_MCP

CPU_PROCHOT_L

FSB_RS_L<1>

FSB_RS_L<2>

MCP_BCLK_VML_COMP_VDD

MCP_CPU_COMP_VCC

MCP_CPU_COMP_GND

FSB_D_L<0>

FSB_D_L<1>

FSB_D_L<2>

FSB_D_L<3>

FSB_D_L<4>

FSB_D_L<5>

FSB_D_L<6>

FSB_D_L<8>

FSB_D_L<9>

FSB_D_L<10>

FSB_D_L<11>

FSB_D_L<12>

FSB_D_L<15>

FSB_D_L<16>

FSB_D_L<17>

FSB_D_L<18>

FSB_D_L<19>

FSB_D_L<20>

FSB_D_L<21>

FSB_D_L<22>

FSB_D_L<23>

FSB_D_L<24>

FSB_D_L<25>

FSB_D_L<26>

FSB_D_L<27>

FSB_D_L<28>

FSB_D_L<29>

FSB_D_L<30>

FSB_D_L<31>

FSB_D_L<32>

FSB_D_L<33>

FSB_D_L<34>

FSB_D_L<35>

FSB_D_L<36>

FSB_D_L<37>

FSB_D_L<39>

FSB_D_L<40>

FSB_D_L<41>

FSB_D_L<42>

FSB_D_L<44>

FSB_D_L<46>

FSB_D_L<47>

FSB_D_L<48>

FSB_D_L<49>

FSB_D_L<50>

FSB_D_L<51>

FSB_D_L<52>

FSB_D_L<53>

FSB_D_L<54>

FSB_D_L<55>

FSB_D_L<56>

FSB_D_L<57>

FSB_D_L<58>

FSB_D_L<59>

FSB_D_L<60>

FSB_D_L<61>

FSB_D_L<62>

FSB_D_L<63>

FSB_BPRI_L

FSB_DEFER_L

FSB_CLK_CPU_P

FSB_CLK_CPU_N

FSB_CLK_ITP_P

FSB_CLK_ITP_N

FSB_CLK_MCP_N

FSB_CLK_MCP_P

CPU_A20M_L

CPU_IGNNE_L

CPU_INIT_L

CPU_INTR

CPU_NMI

CPU_SMI_L

CPU_PWRGD

FSB_CPURST_L

FSB_CPUSLP_L

CPU_STPCLK_L

CPU_DPRSTP_L

FSB_D_L<45>

FSB_D_L<43>

FSB_D_L<38>

CPU_DPSLP_L

FSB_DPWR_L

MCP_BCLK_VML_COMP_GND

FSB_D_L<13>

PM_THRMTRIP_L

B


MCP CPU Interface

051-8071

9814

SYNC_MASTER=T18_MLB

2

1R1416

1/16W

402MF-LF

625%

AH27

AG28

AH28

AG27

AE41

AG43

AG42

AH41

AM33

AC42

AB41

AC41

H38

AC35

AC33

AC39

AA33

AC38

AH43

AJ41

E41

AG41

AC43

AF42

AH42

AH39

AD40

AB42

AH40

M39

N37

W39

T40

M41

L36

W37

U40

AD41

AM32

AN33

AN32

AA40

AD39

J41

N35

V35

V41

U41

P42

Y42

M43

H39

J40

K41

Y41

H42

H43

L41

H41

K42

H40

M40

N40

N41

P41

V42

M42

L42

J37

J38

J39

N38

N36

L38

L39

L37

Y39

R38

R37

R39

P35

R35

R34

N33

N34

U37

R33

W41

W38

U34

U33

U35

U36

U38

AA35

AA38

AA34

AA36

Y40

W34

W33

AA37

W35

T43

R41

T41

T42

T39

R42

W42

Y43

AM43

AM42

F42

D42

F41

AL32

AE40

AA41

AD43

AK35

AE36

AD42

AB35

AE35

AE37

AC37

AE34

AE38

AN35

AR39

AN34

AL35

AL38

AJ34

AC34

AN37

AL34

AL37

AJ38

AJ36

AJ37

AJ35

AN36

AJ33

AF41

AL33

AG33

AL39

AN38

AG34

AG38

AG37

AE33

AG39

AG35

AF35

AM39

AM40

AL41

AK42

AL43

AL42

G42

G41

AJ40

AK41

U1400

OMIT

MCP79-TOPO-B

(1 OF 11)

BGA

2

1R1440NO STUFF

150

1/16W

402MF-LF

5%

2

1R1410

1/16W

402MF-LF

54.91%

2

1R1415

1/16W

402MF-LF

625%

2

1R14201K5%

402MF-LF

NO STUFF

1/16W

2

1R14211K

NO STUFF

402MF-LF

5%1/16W

2

1R1422NO STUFF

1K

402

5%1/16WMF-LF

2

1R143549.9

1/16W1%

402MF-LF

2

1R143049.9

MF-LF402

1%1/16W

2

1R1431

1/16W1%

402MF-LF

49.9

2

1R143649.9

1/16W1%

402MF-LF

10 88

10 88

10 42 88

10 42 61 88

9

9 10 61 88

10 88

10 88

10 88

10 88

10 13 88

10 88

9 10 88

9 10 88

10 88

10 88

10 88

10 88

10 88

13 88

13 88

10 88

10 88

10 88

10 88

10 88

10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

9 10 88

10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

10 88

10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

7 10 88

9 10 13 88

10 88

9

9

9

8 9 14 22 23

88

23 8 9 14 22 23

88

88

88

88

88

88

0A

MEMORY

MEMORY PARTITION 0

CONTROL

MCKE0A_1

MCKE0A_0

MODT0A_1

MODT0A_0

MCS0A_0#

MCS0A_1#

MCLK0A_0_N

MCLK0A_0_P

MCLK0A_1_N

MCLK0A_2_N

MCLK0A_1_P

MCLK0A_2_P

MA0_0

MA0_1

MA0_2

MA0_3

MA0_4

MA0_5

MA0_6

MA0_8

MA0_7

MA0_9

MA0_10

MA0_11

MA0_13

MA0_12

MA0_14

MBA0_2

MBA0_0

MBA0_1

MWE0#

MCAS0#

MRAS0#

MDQS0_0_P

MDQS0_0_N

MDQS0_1_P

MDQS0_2_N

MDQS0_1_N

MDQS0_2_P

MDQS0_3_N

MDQS0_4_P

MDQS0_3_P

MDQS0_4_N

MDQS0_5_N

MDQS0_5_P

MDQS0_6_N

MDQS0_6_P

MDQS0_7_N

MDQS0_7_P

MDQM0_2

MDQM0_1

MDQM0_0

MDQM0_3

MDQM0_4

MDQ0_0

MDQM0_7

MDQM0_5

MDQM0_6

MDQ0_1

MDQ0_4

MDQ0_3

MDQ0_2

MDQ0_5

MDQ0_6

MDQ0_9

MDQ0_8

MDQ0_7

MDQ0_10

MDQ0_11

MDQ0_15

MDQ0_14

MDQ0_13

MDQ0_12

MDQ0_16

MDQ0_21

MDQ0_20

MDQ0_18

MDQ0_19

MDQ0_17

MDQ0_25

MDQ0_24

MDQ0_23

MDQ0_22

MDQ0_26

MDQ0_29

MDQ0_28

MDQ0_27

MDQ0_30

MDQ0_31

MDQ0_35

MDQ0_34

MDQ0_32

MDQ0_36

MDQ0_33

MDQ0_41

MDQ0_37

MDQ0_38

MDQ0_40

MDQ0_39

MDQ0_42

MDQ0_47

MDQ0_46

MDQ0_43

MDQ0_45

MDQ0_44

MDQ0_51

MDQ0_50

MDQ0_49

MDQ0_52

MDQ0_48

MDQ0_55

MDQ0_54

MDQ0_53

MDQ0_56

MDQ0_57

MDQ0_61

MDQ0_60

MDQ0_58

MDQ0_59

MDQ0_62

MDQ0_63

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

MEMORYCONTROL

1A

MEMORY PARTITION 1

MDQ1_63

MDQ1_60

MDQ1_59

MDQ1_62

MDQ1_58

MDQ1_61

MDQ1_57

MDQ1_53

MDQ1_56

MDQ1_55

MDQ1_54

MDQ1_52

MDQ1_49

MDQ1_51

MDQ1_50

MDQ1_48

MDQ1_47

MDQ1_46

MDQ1_43

MDQ1_44

MDQ1_45

MDQ1_42

MDQ1_41

MDQ1_37

MDQ1_38

MDQ1_39

MDQ1_36

MDQ1_35

MDQ1_32

MDQ1_33

MDQ1_34

MDQ1_31

MDQ1_30

MDQ1_27

MDQ1_28

MDQ1_29

MDQ1_22

MDQ1_26

MDQ1_25

MDQ1_24

MDQ1_23

MDQ1_17

MDQ1_19

MDQ1_20

MDQ1_18

MDQ1_21

MDQ1_16

MDQ1_12

MDQ1_13

MDQ1_14

MDQ1_15

MDQ1_11

MDQ1_10

MDQ1_7

MDQ1_8

MDQ1_9

MDQ1_3

MDQ1_6

MDQ1_2

MDQ1_4

MDQ1_5

MDQ1_1

MDQM1_6

MDQM1_5

MDQ1_0

MDQM1_7

MDQM1_4

MDQM1_3

MDQM1_0

MDQM1_1

MDQM1_2

MDQ1_40

MDQS1_7_P

MDQS1_6_N

MDQS1_6_P

MDQS1_7_N

MDQS1_5_N

MDQS1_5_P

MDQS1_4_P

MDQS1_3_P

MDQS1_4_N

MDQS1_2_P

MDQS1_3_N

MDQS1_1_P

MDQS1_2_N

MDQS1_1_N

MDQS1_0_P

MDQS1_0_N

MRAS1#

MCAS1#

MWE1#

MBA1_2

MBA1_1

MBA1_0

MA1_14

MA1_13

MA1_12

MA1_11

MA1_10

MA1_9

MA1_8

MA1_7

MA1_6

MA1_5

MA1_4

MA1_3

MA1_2

MA1_1

MA1_0

MCLK1A_2_P

MCLK1A_1_P

MCLK1A_2_N

MCLK1A_0_P

MCLK1A_1_N

MCS1A_1#

MCS1A_0#

MCLK1A_0_N

MODT1A_1

MODT1A_0

MCKE1A_0

MCKE1A_1

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

MEM_A_DQS_P<7>

MEM_A_DQS_N<7>

MEM_A_DQS_P<6>

MEM_A_DQS_N<6>

MEM_A_DQS_P<5>

MEM_A_DQS_N<5>

MEM_A_DQS_P<4>

MEM_A_DQS_N<4>

MEM_A_DQS_P<3>

MEM_A_DQS_N<3>

MEM_A_DQS_P<2>

MEM_A_DQS_N<2>

MEM_A_DQS_P<1>

MEM_A_DQS_N<1>

MEM_A_DQS_P<0>

MEM_A_DQS_N<0>

MEM_A_RAS_L

MEM_A_CAS_L

MEM_A_WE_L

MEM_A_BA<2>

MEM_A_BA<1>

MEM_A_BA<0>

MEM_A_A<14>

MEM_A_A<13>

MEM_A_A<12>

MEM_A_A<11>

MEM_A_A<10>

MEM_A_A<9>

MEM_A_A<8>

MEM_A_A<7>

MEM_A_A<6>

MEM_A_A<5>

MEM_A_A<4>

MEM_A_A<3>

MEM_A_A<2>

MEM_A_A<1>

MEM_A_A<0>

TP_MEM_A_CLK2P

TP_MEM_A_CLK2N

MEM_A_CLK_P<1>

MEM_A_CLK_N<1>

MEM_A_CLK_P<0>

MEM_A_CLK_N<0>

MEM_A_CS_L<1>

MEM_A_CS_L<0>

MEM_A_ODT<1>

MEM_A_ODT<0>

MEM_A_CKE<1>

MEM_A_CKE<0>

MEM_B_DQS_P<7>

MEM_B_DQS_N<7>

MEM_B_DQS_P<6>

MEM_B_DQS_N<6>

MEM_B_DQS_P<5>

MEM_B_DQS_N<5>

MEM_B_DQS_P<4>

MEM_B_DQS_N<4>

MEM_B_DQS_P<3>

MEM_B_DQS_N<3>

MEM_B_DQS_P<2>

MEM_B_DQS_N<2>

MEM_B_DQS_P<1>

MEM_B_DQS_N<1>

MEM_B_DQS_P<0>

MEM_B_DQS_N<0>

MEM_B_RAS_L

MEM_B_CAS_L

MEM_B_WE_L

MEM_B_BA<2>

MEM_B_BA<1>

MEM_B_BA<0>

MEM_B_A<14>

MEM_B_A<13>

MEM_B_A<12>

MEM_B_A<11>

MEM_B_A<10>

MEM_B_A<9>

MEM_B_A<8>

MEM_B_A<7>

MEM_B_A<6>

MEM_B_A<5>

MEM_B_A<4>

MEM_B_A<3>

MEM_B_A<2>

MEM_B_A<1>

MEM_B_A<0>

TP_MEM_B_CLK2P

TP_MEM_B_CLK2N

MEM_B_CLK_P<1>

MEM_B_CLK_N<1>

MEM_B_CLK_P<0>

MEM_B_CLK_N<0>

MEM_B_CS_L<1>

MEM_B_CS_L<0>

MEM_B_ODT<1>

MEM_B_ODT<0>

MEM_B_CKE<1>

MEM_B_CKE<0>

MEM_A_DQ<63>

MEM_A_DQ<62>

MEM_A_DQ<61>

MEM_A_DQ<60>

MEM_A_DQ<59>

MEM_A_DQ<58>

MEM_A_DQ<57>

MEM_A_DQ<56>

MEM_A_DQ<55>

MEM_A_DQ<54>

MEM_A_DQ<53>

MEM_A_DQ<52>

MEM_A_DQ<51>

MEM_A_DQ<50>

MEM_A_DQ<49>

MEM_A_DQ<48>

MEM_A_DQ<47>

MEM_A_DQ<46>

MEM_A_DQ<45>

MEM_A_DQ<44>

MEM_A_DQ<43>

MEM_A_DQ<42>

MEM_A_DQ<41>

MEM_A_DQ<40>

MEM_A_DQ<39>

MEM_A_DQ<38>

MEM_A_DQ<37>

MEM_A_DQ<36>

MEM_A_DQ<35>

MEM_A_DQ<34>

MEM_A_DQ<33>

MEM_A_DQ<32>

MEM_A_DQ<31>

MEM_A_DQ<30>

MEM_A_DQ<29>

MEM_A_DQ<28>

MEM_A_DQ<27>

MEM_A_DQ<26>

MEM_A_DQ<25>

MEM_A_DQ<24>

MEM_A_DQ<23>

MEM_A_DQ<22>

MEM_A_DQ<21>

MEM_A_DQ<20>

MEM_A_DQ<19>

MEM_A_DQ<18>

MEM_A_DQ<17>

MEM_A_DQ<16>

MEM_A_DQ<15>

MEM_A_DQ<14>

MEM_A_DQ<13>

MEM_A_DQ<12>

MEM_A_DQ<11>

MEM_A_DQ<10>

MEM_A_DQ<9>

MEM_A_DQ<8>

MEM_A_DQ<7>

MEM_A_DQ<6>

MEM_A_DQ<5>

MEM_A_DQ<4>

MEM_A_DQ<3>

MEM_A_DQ<2>

MEM_A_DQ<1>

MEM_A_DQ<0>

MEM_A_DM<7>

MEM_A_DM<6>

MEM_A_DM<5>

MEM_A_DM<4>

MEM_A_DM<3>

MEM_A_DM<2>

MEM_A_DM<1>

MEM_A_DM<0>

MEM_B_DQ<63>

MEM_B_DQ<62>

MEM_B_DQ<61>

MEM_B_DQ<60>

MEM_B_DQ<59>

MEM_B_DQ<58>

MEM_B_DQ<57>

MEM_B_DQ<56>

MEM_B_DQ<55>

MEM_B_DQ<54>

MEM_B_DQ<53>

MEM_B_DQ<52>

MEM_B_DQ<51>

MEM_B_DQ<50>

MEM_B_DQ<49>

MEM_B_DQ<48>

MEM_B_DQ<47>

MEM_B_DQ<46>

MEM_B_DQ<45>

MEM_B_DQ<44>

MEM_B_DQ<43>

MEM_B_DQ<42>

MEM_B_DQ<41>

MEM_B_DQ<40>

MEM_B_DQ<39>

MEM_B_DQ<38>

MEM_B_DQ<37>

MEM_B_DQ<36>

MEM_B_DQ<35>

MEM_B_DQ<34>

MEM_B_DQ<33>

MEM_B_DQ<32>

MEM_B_DQ<31>

MEM_B_DQ<30>

MEM_B_DQ<29>

MEM_B_DQ<28>

MEM_B_DQ<27>

MEM_B_DQ<26>

MEM_B_DQ<25>

MEM_B_DQ<24>

MEM_B_DQ<23>

MEM_B_DQ<22>

MEM_B_DQ<21>

MEM_B_DQ<20>

MEM_B_DQ<19>

MEM_B_DQ<18>

MEM_B_DQ<17>

MEM_B_DQ<16>

MEM_B_DQ<15>

MEM_B_DQ<14>

MEM_B_DQ<13>

MEM_B_DQ<12>

MEM_B_DQ<11>

MEM_B_DQ<10>

MEM_B_DQ<9>

MEM_B_DQ<8>

MEM_B_DQ<7>

MEM_B_DQ<6>

MEM_B_DQ<5>

MEM_B_DQ<4>

MEM_B_DQ<3>

MEM_B_DQ<2>

MEM_B_DQ<1>

MEM_B_DQ<0>

MEM_B_DM<7>

MEM_B_DM<6>

MEM_B_DM<5>

MEM_B_DM<4>

MEM_B_DM<3>

MEM_B_DM<2>

MEM_B_DM<1>

MEM_B_DM<0>

98

051-8071 B

15

SYNC_MASTER=T18_MLB SYNC_DATE=06/06/2008

MCP Memory Interface

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

BA16

AW16

BB13

AY15

AT2

AT1

AY2

AY1

BB6

BA6

BA10

AY11

BB33

BA33

BB37

BA37

BA43

AY42

AT42

AT43

AT5

BA2

AY7

BA11

BB34

BB38

AY43

AR42

AW42

AW41

AT40

AT4

AT3

AV2

AV3

AT41

AR4

AR3

AU2

AU3

AY4

AY3

BB3

BC3

AW4

AW3

AP41

BA3

BB2

BB5

BA5

BA8

BC8

BB4

BC4

BA7

AY8

AN40

BA9

BB10

BB12

AW12

BB8

BB9

AY12

BA12

BC32

AW32

AU40

BA35

AY36

BA32

BB32

BA34

AY35

BC36

AW36

BA39

AY40

AU41

BA36

BB36

BA38

AY39

BB40

AW40

AV42

AV41

BA40

BC40

AR41

AP42

BB14

BB16

BA42

BB42

BB22

BA22

BA19

AY19

AY31

BB30

BA15

BB29

BB18

BB17

BB28

AY28

BA28

AY27

BA27

BA26

BB26

BA25

BA29

BA14

AW28

BC28

BA17

BB25

BA18

U1400

BGA

MCP79-TOPO-B

OMIT

(3 OF 11)

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

28 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

27 89

AR17

AV17

AP15

AV15

AL10

AL11

AR8

AR9

AW7

AW8

AP13

AR13

AV25

AW25

AU30

AU29

AT35

AU35

AU39

AT39

AN5

AU5

AR10

AN13

AN27

AW29

AV35

AR34

AT37

AU37

AW39

AL8

AL9

AP9

AN9

AV39

AL6

AL7

AN6

AN7

AR6

AR7

AV6

AW5

AN10

AR5

AR37

AU6

AV5

AU7

AU8

AW9

AP11

AW6

AY5

AU9

AV9

AR38

AU11

AV11

AV13

AW13

AR11

AT11

AR14

AU13

AR26

AU25

AV38

AT27

AU27

AP25

AR25

AP27

AR27

AP29

AR29

AP31

AR31

AW38

AV27

AN29

AV29

AN31

AU31

AR33

AV37

AW37

AT31

AV31

AR35

AP35

AT15

AR18

AW33

AV33

BA24

AY24

BB20

BC20

AU23

AT23

AP17

AP23

AP19

AW17

AV21

AR22

AU21

AP21

AR21

AN21

AV19

AU19

AR23

AU15

AN23

AW21

AN19

AT19

AR19

U1400

BGA

MCP79-TOPO-B

OMIT

(2 OF 11)

7

7

7

MCLK1B_2_P

MCLK1B_1_N

MCLK1B_0_P

MCLK1B_1_P

MCLK1B_2_N

MCS1B_1#

MCS1B_0#

MCLK1B_0_N

MODT1B_0

MCKE1B_1

MCKE1B_0

MODT1B_1

MRESET0#

GND55

GND56

GND57

GND58

GND60

GND59

GND61

GND62

GND63

GND64

GND52

GND53

GND54

GND51

GND49

GND50

GND48

GND47

GND46

GND44

GND45

GND43

GND42

GND41

GND39

GND40

GND38

GND37

GND36

GND35

GND33

GND34

GND32

GND31

GND30

GND28

GND29

GND27

GND26

GND25

GND24

GND18

GND19

GND17

GND16

GND15

GND13

GND14

GND10

GND12

GND11

GND8

GND9

GND7

GND6

GND5

GND2

GND3

GND4

GND1

MEM_COMP_VDD

MEM_COMP_GND

MODT0B_0

MODT0B_1

MCKE0B_1

MCKE0B_0

MCLK0B_0_N

MCS0B_0#

MCS0B_1#

MCLK0B_2_N

MCLK0B_1_P

MCLK0B_0_P

MCLK0B_1_N

MCLK0B_2_P

+V_PLL_XREF_XS

+V_PLL_CORE

+V_VPLL

+VDD_MEM1

+VDD_MEM2

+VDD_MEM3

+VDD_MEM4

+VDD_MEM5

+VDD_MEM6

+VDD_MEM7

+VDD_MEM8

+VDD_MEM9

+VDD_MEM10

+VDD_MEM11

+VDD_MEM14

+VDD_MEM15

+VDD_MEM16

+VDD_MEM17

+VDD_MEM18

+VDD_MEM19

+VDD_MEM20

+VDD_MEM22

+VDD_MEM21

+VDD_MEM23

+VDD_MEM24

+VDD_MEM25

+VDD_MEM26

+VDD_MEM30

+VDD_MEM27

+VDD_MEM29

+VDD_MEM31

+VDD_MEM32

+VDD_MEM33

+VDD_MEM34

+VDD_MEM38

+VDD_MEM39

+VDD_MEM40

+VDD_MEM41

+VDD_MEM43

+VDD_MEM44

+VDD_MEM45

+VDD_MEM42

+V_PLL_DP

+VDD_MEM13

+VDD_MEM12

+VDD_MEM28

+VDD_MEM37

+VDD_MEM36

+VDD_MEM35

GND21

GND20

GND22

GND23

MEMORY CONTROL 0B

MEMORY CONTROL 1B

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

4771 mA (A01, DDR3)

17 mA

12 mA


19 mA

TP or NC for DDR2.39 mA

87 mA (A01)

MCP_MEM_COMP_VDD


TP_MEM_B_ODT<3>

TP_MEM_B_ODT<2>

TP_MEM_B_CS_L<3>

TP_MEM_B_CLK3N

TP_MEM_B_CLK3P

TP_MEM_B_CLK4N

TP_MEM_B_CLK4P

TP_MEM_B_CLK5N

TP_MEM_B_CLK5P

PP1V05_S0_MCP_PLL_CORE

TP_MEM_A_CS_L<3>

TP_MEM_A_CS_L<2>

TP_MEM_A_CLK3N

TP_MEM_A_CLK4P

TP_MEM_A_CLK5N

TP_MEM_A_CLK5P

TP_MEM_A_CKE<3>

TP_MEM_A_CKE<2>

TP_MEM_A_ODT<3>

TP_MEM_A_ODT<2>

TP_MEM_A_CLK3P

TP_MEM_A_CLK4N

MCP_MEM_COMP_GND =PP1V8R1V5_S0_MCP_MEM

MCP_MEM_RESET_L

TP_MEM_B_CS_L<2>

TP_MEM_B_CKE<2>

TP_MEM_B_CKE<3>

MCP Memory Misc

16 98

B051-8071

SYNC_DATE=06/06/2008SYNC_MASTER=T18_MLB

29

BC29

AN16

AM29

AM27

AM25

AM31

AL30

BC25

AW24

AW19

AY26

AM23

AY25

AU18

AM15

AY18

AY17

AV20

BC17

AW27

AU22

AU20

AM21

AV24

AY29

AT21

AU24

AN18

AU16

AP18

AP22

AW15

AR24

AM19

AR20

AR16

AV16

AP24

AP20

AN22

AP16

AT17

AN24

AN20

AM17

T28

T27

U28

U27AY32

BC13

AY16

AN15

AN17

AN41

AM41

BA13

BC16

AR15

AU17

BA41

BB41

AY23

BA23

BA20

AY20

AU33

AU34

BB24

BC24

BA21

BB21

BA31

BA30

AN25

AV23

W5

V34

V10

U22

U20

U18

T9

T7

T6

T38

T37

T35

T34

T33

T26

T24

AK11

T20

T18

T10

R5

R43

R40

R36

P7

P40

P4

P37

P34

P33

P10

N8

N39

M9

M7

M6

M5

M38

K7

H31

G32

G30

F24

D34

BC9

AY9

BC21

F28

AU10

AR36

AP30

AT25

AP12

AM28

AK7

AH35

AG24

AF24

AE20

AD22

AB7

AB22

AA39

AA22

U1400

(4 OF 11)

MCP79-TOPO-B

OMIT

BGA

2

1R1611

MF-LF402

1%1/16W

40.2

2

1R1610

1%40.2

1/16W

402MF-LF

89

8 16 23

7

7

7

7

7

7

7

7

7

23

7

7

7

7

7

7

7

7

7

7

7

7

89 8 16 23

7

7

PE0_RX0_P

PE0_RX2_N

+AVDD0_PEX11

+AVDD0_PEX7

+AVDD0_PEX8

+AVDD1_PEX3

+AVDD1_PEX2

+AVDD1_PEX1

+AVDD0_PEX13

+AVDD0_PEX12

+AVDD0_PEX10

+AVDD0_PEX9

+AVDD0_PEX6

+AVDD0_PEX5

+AVDD0_PEX4

+AVDD0_PEX3

+AVDD0_PEX2

+AVDD0_PEX1

+V_PLL_PEX

+DVDD1_PEX2

+DVDD1_PEX1

+DVDD0_PEX8

+DVDD0_PEX7

+DVDD0_PEX6

+DVDD0_PEX5

+DVDD0_PEX4

+DVDD0_PEX3

+DVDD0_PEX2

+DVDD0_PEX1

PE0_RX0_N

PE0_RX2_P

PE0_RX4_P

PE0_RX6_P

PEB_PRSNT#

PE1_TX3_N

PE1_TX3_P

PE1_TX2_N

PE1_TX1_N

PE1_TX2_P

PE1_TX0_N

PE1_TX1_P

PE6_REFCLK_N

PEX_RST0#

PE1_TX0_P

PE5_REFCLK_N

PE5_REFCLK_P

PE6_REFCLK_P

PE4_REFCLK_N

PE4_REFCLK_P

PE3_REFCLK_N

PE2_REFCLK_N

PE1_REFCLK_N

PE2_REFCLK_P

PE0_REFCLK_N

PE0_REFCLK_P

PE1_REFCLK_P

PE0_TX15_N

PE0_TX14_N

PE0_TX15_P

PE0_TX13_N

PE0_TX14_P

PE0_TX12_N

PE0_TX12_P

PE0_TX13_P

PE0_TX11_N

PE0_TX11_P

PE0_TX10_N

PE0_TX9_N

PE0_TX10_P

PE0_TX8_N

PE0_TX8_P

PE0_TX9_P

PE0_TX7_N

PE0_TX7_P

PE0_TX6_N

PE0_TX5_N

PE0_TX6_P

PE0_TX4_N

PE0_TX5_P

PE0_TX3_N

PE0_TX3_P

PE0_TX4_P

PE0_TX2_N

PE0_TX2_P

PE0_TX0_N

PE0_TX1_N

PE0_TX1_P

PE0_TX0_P

PEX_CLK_COMP

PE1_RX3_N

PE1_RX3_P

PE1_RX2_N

PE1_RX0_N

PE1_RX1_P

PE1_RX2_P

PE1_RX1_N

PE_WAKE#

PE1_RX0_P

PE0_PRSNT_16#

PE0_RX13_N

PE0_RX14_P

PE0_RX15_P

PE0_RX14_N

PE0_RX15_N

PE0_RX12_P

PE0_RX11_P

PE0_RX13_P

PE0_RX11_N

PE0_RX12_N

PE0_RX10_N

PE0_RX8_P

PE0_RX9_P

PE0_RX10_P

PE0_RX8_N

PE0_RX9_N

PE0_RX5_N

PE0_RX7_P

PE0_RX6_N

PE0_RX7_N

PE0_RX3_P

PE0_RX5_P

PE0_RX3_N

PE0_RX4_N

PE0_RX1_P

PE0_RX1_N

PEC_PRSNT#

PEC_CLKREQ#/GPIO_50

PE3_REFCLK_PPED_CLKREQ#/GPIO_51

PED_PRSNT#

PEB_CLKREQ#/GPIO_49

PEE_CLKREQ#/GPIO_16

PEE_PRSNT#/GPIO_46

PEF_CLKREQ#/GPIO_17

PEF_PRSNT#/GPIO_47

PEG_CLKREQ#/GPIO_18

PEG_PRSNT#/GPIO_48

PCI EXPRESS

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

IN

IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

Int PU

If PE0 interface is not used, ground DVDD0_PEX and AVDD0_PEX.

If PE1 interface is not used, ground DVDD1_PEX and AVDD1_PEX.

Int PU (S5)

57 mA (A01, DVDD0 & 1) 206 mA (A01, AVDD0 & 1)

Int PU


84 mA (A01)

Int PUInt PU

Int PU

Int PU

Int PU

Int PU

Int PU

Int PU

Int PU

Int PU

Int PU

Minimum 1.025V for Gen2 support Minimum 1.025V for Gen2 support

PCIE_FW_PRSNT_L

PCIE_MINI_D2R_P

PCIE_FW_D2R_P

PCIE_FW_D2R_N

PCIE_EXCARD_D2R_P

PCIE_EXCARD_D2R_N


TP_MCP_GPIO_18

MINI_CLKREQ_L




=PEG_D2R_P<0>

=PEG_D2R_N<2>

PP1V05_S0_MCP_PLL_PEX

=PEG_D2R_N<0>

=PEG_D2R_P<2>

=PEG_D2R_P<4>

=PEG_D2R_P<6>

PCIE_MINI_PRSNT_L

TP_PCIE_PE4_R2D_CN

TP_PCIE_PE4_R2D_CP

PCIE_EXCARD_R2D_C_N

PCIE_FW_R2D_C_N

PCIE_EXCARD_R2D_C_P

PCIE_MINI_R2D_C_N

PCIE_FW_R2D_C_P


PCIE_RESET_L

PCIE_MINI_R2D_C_P






PCIE_CLK100M_EXCARD_N

PCIE_CLK100M_FW_N

PCIE_CLK100M_MINI_N

PCIE_CLK100M_FW_P

PEG_CLK100M_N

PEG_CLK100M_P

PCIE_CLK100M_MINI_P

=PEG_R2D_C_N<15>

=PEG_R2D_C_N<14>

=PEG_R2D_C_P<15>

=PEG_R2D_C_N<13>

=PEG_R2D_C_P<14>

=PEG_R2D_C_N<12>

=PEG_R2D_C_P<12>

=PEG_R2D_C_P<13>

=PEG_R2D_C_N<11>

=PEG_R2D_C_P<11>

=PEG_R2D_C_N<10>

=PEG_R2D_C_N<9>

=PEG_R2D_C_P<10>

=PEG_R2D_C_N<8>

=PEG_R2D_C_P<8>

=PEG_R2D_C_P<9>

=PEG_R2D_C_N<7>

=PEG_R2D_C_P<7>

=PEG_R2D_C_N<6>

=PEG_R2D_C_N<5>

=PEG_R2D_C_P<6>

=PEG_R2D_C_N<4>

=PEG_R2D_C_P<5>

=PEG_R2D_C_N<3>

=PEG_R2D_C_P<3>

=PEG_R2D_C_P<4>

=PEG_R2D_C_N<2>

=PEG_R2D_C_P<2>

=PEG_R2D_C_N<0>

=PEG_R2D_C_N<1>

=PEG_R2D_C_P<1>

=PEG_R2D_C_P<0>

MCP_PEX_CLK_COMP

TP_PCIE_PE4_D2RN

TP_PCIE_PE4_D2RP

PCIE_MINI_D2R_N

PCIE_WAKE_L

PEG_PRSNT_L

=PEG_D2R_N<13>

=PEG_D2R_P<14>

=PEG_D2R_P<15>

=PEG_D2R_P<12>

=PEG_D2R_P<11>

=PEG_D2R_P<13>

=PEG_D2R_N<11>

=PEG_D2R_N<12>

=PEG_D2R_N<10>

=PEG_D2R_P<8>

=PEG_D2R_P<9>

=PEG_D2R_P<10>

=PEG_D2R_N<8>

=PEG_D2R_N<9>

=PEG_D2R_N<5>

=PEG_D2R_P<7>

=PEG_D2R_N<6>

=PEG_D2R_N<7>

=PEG_D2R_P<3>

=PEG_D2R_P<5>

=PEG_D2R_N<3>

=PEG_D2R_N<4>

=PEG_D2R_P<1>

=PEG_D2R_N<1>

FW_CLKREQ_L

PCIE_CLK100M_EXCARD_PEXCARD_CLKREQ_L

GMUX_JTAG_TCK_L

=PEG_D2R_N<14>

=PEG_D2R_N<15>

GMUX_JTAG_TDO

TP_PE4_PRSNT_L

PCIE_EXCARD_PRSNT_L

TP_PE4_CLKREQ_L

AUD_IP_PERIPHERAL_DET

SYNC_MASTER=T18_MLB

MCP PCIe Interfaces

17 98

B051-8071


58

9

84

25

2

1R17102.37K

402MF-LF

1%1/16W

NO STUFF

PLACEMENT_NOTE=Place within 12.7mm of U1400

9

31 90

31 90

30 90

30 90

31 90

31 90

35 90

35 90

35 90

35 90

30 90

30 90

31

31

30

30

7 31 90

7 31 90

35 90

35 90

7 30 31

35

9

7 30 90

7 30 90

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

69 90

69 90

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

K11

A11

M19

M17

M18

M16

L18

L16

B10

M15

C10

E8

D9

D5

F17

N14

M14

L14

K14

J13

H13

G13

F13

J11

J10

B6

C6

A7

B7

B8

A8

D8

C8

H7

G7

F9

E9

H9

G9

K9

J9

G11

F11

H3

H2

G3

H4

F3

F4

E2

F2

D2

E1

C1

D1

B3

B2

A4

A3

C4

B4

M2

M1

M4

M3

L4

L3

K2

K3

J2

J3

H1

J1

C5

D4

L11

L10

J5

J4

J7

J6

G5

H5

C3

D3

E4

E3

E5

F5

E6

F6

D7

C7

N5

N4

N7

N6

N9

P9

N11

N10

L7

L6

L9

L8

F7

E7

E11

D11C9

T16

U19

T19

U16

W18

W17

W16

V19

U17

W19

T17

P13

N13

M13

U12

T12

N12

R12

P12

M12

AB12

AA12

W12

V12

AD12

AC12

Y12

U1400MCP79-TOPO-B

(5 OF 11)

OMIT

BGA

8

7

8

8

8

23

7

7

7

7

7

90

7

7

7

IN

BI

OUT

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

OUT

IN

IN

IN

GPIO_7/NFERR*/IGPU_GPIO_7

+V_DUAL_MACPLL

+VDD_HDMI

+V_PLL_HDMI

+V_PLL_IFPAB

+VDD_IFPB

+VDD_IFPA

+V_TV_DAC

+V_RGB_DAC

+V_DUAL_RMGT2

MII_COMP_GND

MII_COMP_VDD

LCD_PANEL_PWR/GPIO_58

LCD_BKL_ON/GPIO_59

LCD_BKL_CTL/GPIO_57

XTALOUT_TV

GPIO_6/FERR*/IGPU_GPIO_6

HDMI_TXC_P/ML0_LANE3_P

HDMI_TXC_N/ML0_LANE3_N

HDMI_TXD0_P/ML0_LANE2_P

HDMI_TXD0_N/ML0_LANE2_N





HPLUG_DET2/GPIO_22

IFPA_TXC_N

XTALIN_TV

DDC_DATA2/GPIO_24

DDC_CLK2/GPIO_23

RGB_DAC_RSET

RGB_DAC_VREF

TV_DAC_VREF

DP_AUX_CH0_P

DP_AUX_CH0_N

HPLUG_DET3

HDMI_RSET

HDMI_VPROBE

RGMII_MDIO

BUF_25MHZ

DDC_DATA0

DDC_CLK0

RGB_DAC_RED

RGB_DAC_GREEN

RGB_DAC_BLUE

RGB_DAC_HSYNC

RGB_DAC_VSYNC

TV_DAC_RED

TV_DAC_GREEN

IFPA_TXC_P

IFPA_TXD0_P

IFPA_TXD0_N

IFPA_TXD2_P

IFPA_TXD1_P

IFPA_TXD1_N

IFPA_TXD3_P

IFPA_TXD2_N

IFPB_TXC_P

IFPB_TXC_N

IFPB_TXD5_P

IFPB_TXD4_P

IFPB_TXD4_N

IFPB_TXD6_P

IFPB_TXD5_N

IFPB_TXD6_N

IFPB_TXD7_P

IFPB_TXD7_N

DDC_DATA3

DDC_CLK3

IFPAB_RSET

IFPAB_VPROBE

TV_DAC_RSET

RGMII_RXD0

RGMII_INTR/GPIO_35

RGMII_RXD3

RGMII_RXCTL/MII_RXDV

RGMII_RXC/MII_RXCLK

RGMII_RXD2

RGMII_RXD1

MII_RESET#

RGMII_MDC

RGMII_PWRDWN/GPIO_37

MII_RXER/GPIO_36

MII_COL/GPIO_20/MSMB_DATA

MII_CRS/GPIO_21/MSMB_CLK

TV_DAC_BLUE

TV_DAC_HSYNC/GPIO_44

TV_DAC_VSYNC/GPIO_45

+V_DUAL_RMGT1

MII_VREF

RGMII_TXCTL/MII_TXEN

RGMII_TXC/MII_TXCLK

RGMII_TXD3

RGMII_TXD2

RGMII_TXD1

RGMII_TXD0

+3.3V_DUAL_RMGT1

+3.3V_DUAL_RMGT2

IFPA_TXD3_N

LAN

DACS

FLAT PANEL

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

OUT

BI

OUT

OUT

OUT

OUT

OUT

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

In MCP79 these pins have undocumented internal

GPIOs 57-59 (if LCD panel is used):

by default, pull-downs (1K or stronger) must be used.

pull-ups (~10K to 3.3V S0). To ensure pins are low

Alias to GMUX_INT for systems with GMUX.

Alias to HPLUG_DET2 for other systems.

Pull-down (20k) required in all cases.

=DVI_HPD_GMUX_INT:

Alias to DVI_HPD for systems using IFP for DVI.

(See below)

(See below)

NOTE: 1K pull-down required on DP_IG_AUX_CH_N if DP is used.

NOTE: 20K pull-down required on DP_HPD_DET.

level-shifters.

NOTE: HDMI port requires level-shifting. IFP interface can

be used to provide HDMI or dual-channel TMDS without

Interface Mode

DP_IG_ML_P/N<0>

DP_IG_DDC_DATA

DP_IG_HPD

DP_IG_AUX_CH_P/N

NOTE: 1M pull-down required on DP_IG_CA_DET if DP not used.

Dual-channel TMDS: Power +VDD_IFPx at 3.3V

131 mA (A01)

83 mA (A01)

MII, RGMII products will enable

WF: IFP is capable of LVDS (1.8V) or TMDS (3.3V), need aliases

RGB DAC Disable:

TV / Component


LVDS: Power +VDD_IFPx at 1.8V

95 mA (A01)

16 mA (A01)

8 mA

8 mA

DP_IG_AUX_CH_P/N

=MCP_HDMI_HPD TMDS_IG_HPD

=MCP_HDMI_DDC_DATA

=MCP_HDMI_TXD_P/N<2>


=MCP_HDMI_DDC_CLK

MCP Signal


=MCP_HDMI_TXC_P/N

TMDS/HDMI

TMDS_IG_TXC_P/N

TMDS_IG_TXD_P/N<0>

TMDS_IG_DDC_CLK

TMDS_IG_TXD_P/N<1>

TMDS_IG_TXD_P/N<2>

TMDS_IG_DDC_DATA

TP_DP_IG_AUX_CHP/N

DP_IG_DDC_CLK

DP_IG_ML_P/N<2>

DP_IG_ML_P/N<1>

DP_IG_ML_P/N<3>

DisplayPort

5 mA (A01)

RGB ONLY

avoids a leakage issue since

feature via software. This

NOTE: All Apple products set strap to

Network Interface Select

Interface

RGMII

MII 0

1

ENET_TXD<0>

DDC_CLK0/DDC_DATA0 pull-ups still required.

Okay to float all TV_DAC signals.

TV DAC Disable:

Y / Y

DDC_CLK0/DDC_DATA0 pull-ups still required.

Okay to float all RGB_DAC signals.

Okay to float XTALIN_TV and XTALOUT_TV.

103 mA

103 mA

206 mA (A01)

Comp / Pb

MCP79 requires a S5 pull-up.

C / Pr

190 mA (A01, 1.8V)

=MCP_HDMI_TXD_N<0>

=MCP_HDMI_TXC_N

=MCP_HDMI_TXD_P<0>

=MCP_HDMI_TXD_P<1>

=MCP_HDMI_TXD_N<1>

=MCP_HDMI_TXD_P<2>

LVDS_IG_A_CLK_N

LVDS_IG_A_DATA_N<3>

MCP_HDMI_RSET

MCP_HDMI_VPROBE

DP_IG_CA_DET

PP1V05_ENET_MCP_PLL_MAC


PP3V3_S0_MCP_VPLL


PP3V3_S0_MCP_DAC

MCP_MII_COMP_GND

MCP_MII_COMP_VDD

LVDS_IG_PANEL_PWR

LVDS_IG_BKL_ON

=MCP_HDMI_TXC_P

=MCP_HDMI_TXD_N<2>

MCP_CLK27M_XTALIN

LVDS_IG_DDC_DATA

LVDS_IG_DDC_CLK

MCP_TV_DAC_VREF

DP_IG_AUX_CH_P

DP_IG_AUX_CH_N

=MCP_HDMI_HPD

ENET_MDIO

MCP_CLK25M_BUF0_R

MCP_DDC_DATA0

MCP_DDC_CLK0

TP_MCP_RGB_RED

TP_MCP_RGB_GREEN

TP_MCP_RGB_BLUE

TP_MCP_RGB_HSYNC

TP_MCP_RGB_VSYNC

CRT_IG_R_C_PR

CRT_IG_G_Y_Y

LVDS_IG_A_CLK_P

LVDS_IG_A_DATA_P<0>

LVDS_IG_A_DATA_N<0>

LVDS_IG_A_DATA_P<2>

LVDS_IG_A_DATA_P<1>

LVDS_IG_A_DATA_N<1>

LVDS_IG_A_DATA_P<3>

LVDS_IG_A_DATA_N<2>

LVDS_IG_B_CLK_P

LVDS_IG_B_CLK_N

LVDS_IG_B_DATA_P<1>

LVDS_IG_B_DATA_P<0>

LVDS_IG_B_DATA_N<0>

LVDS_IG_B_DATA_P<2>

LVDS_IG_B_DATA_N<1>

LVDS_IG_B_DATA_N<2>

LVDS_IG_B_DATA_P<3>

LVDS_IG_B_DATA_N<3>

=MCP_HDMI_DDC_DATA

=MCP_HDMI_DDC_CLK

MCP_IFPAB_RSET

MCP_IFPAB_VPROBE

MCP_TV_DAC_RSET

ENET_RXD<0>

TP_ENET_INTR_L

ENET_RXD<3>

ENET_RX_CTRL

ENET_CLK125M_RXCLK

ENET_RXD<2>

ENET_RXD<1>

ENET_RESET_L

ENET_MDC

TP_ENET_PWRDWN_L

=MCP_MII_RXER

=MCP_MII_COL

=MCP_MII_CRS

CRT_IG_B_COMP_PB

CRT_IG_HSYNC

CRT_IG_VSYNC

MCP_MII_VREF

ENET_TX_CTRL

ENET_CLK125M_TXCLK

ENET_TXD<3>

ENET_TXD<2>

ENET_TXD<1>

ENET_TXD<0>


=PP3V3_S0_MCP_GPIO


=PP3V3_S5_MCP_GPIO


LPCPLUS_GPIO

TP_MCP_RGB_DAC_VREF

TP_MCP_RGB_DAC_RSET

MCP_CLK27M_XTALOUT

LVDS_IG_BKL_PWM

=DVI_HPD_GMUX_INT

18 98

B051-8071


MCP Ethernet & Graphics

32 92

32 92

32 92

24 90

32 92

24 90

9

9

81

81

9 90

9 90

84 90

84 90

84 90

32 92

84 90

84 90

84 90

9 90

9 90

9 90

9 90

84 90

84 90

84 90

32 92

84 90

84 90

84 90

84 90

84 90

32 92

2

1R1820

5%47K

402MF-LF1/16W

7 43

2

1R1860

402MF-LF

5%1/16W

100K

2

1R1861

402

5%100K

1/16WMF-LF

2

1R185010K

402

1/16W5%

MF-LF

D38

C38

C37

A35

E36

A36

D36

B36

C36

D25

C25

C24

B24

C26

D24

A24

E24

B23

C23

C22

A23

G23

C21

D21

J22

A41

B38

C39

B39

A40

A39

B40

M26

M27

T25

K32

J32

M28

M29

V23

U23

T23

K24

J24

E28

F23

J23

B22

C27

B27

B26

F40

E37

G39

N30

M30

L30

K30

L29

K29

J29

H29

L31

K31

G31

E32

B34

C34

D33

C33

D32

C32

B32

A32

B35

C35

F31

C31

J30

J33

H33

F33

G33

G35

F35

D35

E35

J31

B15

E16

D43

C43

E31

B30

A31

D31

C30

B31

E23

U1400

(6 OF 11)

BGA

MCP79-TOPO-B

OMIT

9

9

9

24

24

81

2

1R1811

1/16WMF-LF

49.9

402

1%

2

1R1810

1%1/16WMF-LF402

49.9

24 90

24 90

24 90

24 90

24 90

24 90

24 90

9

9

81 90

81 90

9

9

9

9

9

9

9

9

9

9

9

24 90

24 90

32 92

32 92

32 92

32 92

32 92

32 92

32 92

33 92

32 92

23

23

8 24

24

8 24

24

92

92

24

24

24

24

24

7

7

8 18 23

8 19 21

8 18 23

8 20

8 23

24

24

OUT

OUT

BI

BI

BI

BILPC

PCI

GND

PCI_INTW#

PCI_INTX#

PCI_INTY#

PCI_INTZ#

GND65

LPC_DRQ1#/GPIO_19

LPC_PWRDWN#/GPIO_54/EXT_NMI#

PCI_TRDY#

LPC_DRQ0#

LPC_SERIRQ

PCI_AD4

PCI_AD0

PCI_AD3

PCI_AD2

PCI_AD1

PCI_AD5

PCI_AD6

PCI_AD9

PCI_AD8

PCI_AD7

PCI_AD10

PCI_AD11

PCI_AD14

PCI_AD13

PCI_AD12

PCI_AD15

PCI_AD16

PCI_AD17

PCI_AD20

PCI_AD19

PCI_AD18

PCI_AD21

PCI_AD22

PCI_AD25

PCI_AD23

PCI_AD26

PCI_AD29

PCI_AD31

GND66

GND67

GND69

GND68

GND70

GND71

GND72

GND74

GND73

GND75

GND76

GND77

GND79

GND78

GND80

GND81

GND84

GND83

GND82

GND85

GND86

GND87

GND89

GND88

GND90

GND91

GND92

GND94

GND93

GND95

GND96

GND97

PCI_GNT0#

PCI_CBE2#

PCI_CBE0#

PCI_CBE3#

PCI_IRDY#

PCI_FRAME#

PCI_DEVSEL#

PCI_PAR

PCI_SERR#

PCI_STOP#

PCI_RESET0#

PCI_RESET1#

PCI_CLK2

PCI_CLK1

PCI_CLK0

PCI_CLKIN

LPC_FRAME#

LPC_AD1

LPC_AD0

LPC_RESET0#

LPC_CLK0

LPC_AD3

LPC_AD2

GND99

GND98

GND100

GND102

GND101

GND104

GND103

GND105

GND106

GND107

GND109

GND108

GND110

GND111

GND112

GND115

GND114

GND113

GND116

GND117

GND120

GND119

GND118

GND121

GND122

GND123

GND125

GND124

GND126

GND127

GND128

GND130

GND129

PCI_AD30

PCI_AD27

PCI_AD24

PCI_CLKRUN#/GPIO_42

PCI_AD28

PCI_GNT2#/GPIO_41/RS232_DTR#

PCI_GNT3#/GPIO_39/RS232_RTS#

PCI_GNT4#/GPIO_53/RS232_SOUT#

PCI_GNT1#/FANCTL2

PCI_CBE1#

PCI_PERR#/GPIO_43/RS232_DCD#

PCI_REQ3#/GPIO_38/RS232_CTS#

PCI_REQ4#/GPIO_52/RS232_SIN#

PCI_PME#/GPIO_30

PCI_REQ2#/GPIO_40/RS232_DSR#

PCI_REQ0#

PCI_REQ1#/FANRPM2

IN

BI OUT

OUT

OUT

OUT

IN

IN

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

Int PU (S5)

Int PU

Int PU

Int PU

Strap for Boot ROM Selection (See HDA_SDOUT)

CRTMUX_SEL_TV_L

PCI_REQ1_L

PCI_REQ0_L

MCP_RS232_SOUT_L

LPC_AD<1>

LPC_AD<3>

LPC_AD<2>

LPC_FRAME_L

LPC_AD<0>

TP_PCI_GNT0_L

TP_PCI_GNT1_L

MCP_RS232_SOUT_L

TP_PCI_C_BE_L<0>

TP_PCI_C_BE_L<1>

TP_PCI_C_BE_L<2>

TP_PCI_C_BE_L<3>

TP_PCI_DEVSEL_L

TP_PCI_FRAME_L

TP_PCI_IRDY_L

TP_PCI_PAR

TP_PCI_SERR_L

TP_PCI_STOP_L

PM_LATRIGGER_L

TP_PCI_RESET1_L

TP_PCI_CLK0

LPC_AD_R<0>

LPC_AD_R<1>

LPC_AD_R<2>

LPC_AD_R<3>

LPC_CLK33M_SMC_R

LPC_FRAME_R_L

LPC_RESET_L

LPC_PWRDWN_L

PCI_CLK33M_MCP_R

TP_PCI_CLK1

PCI_CLK33M_MCP

MEM_VTT_EN_R

TP_PCI_PERR_LTP_PCI_AD<9>

TP_PCI_AD<11>

TP_PCI_AD<10>

TP_PCI_AD<8>

PCI_REQ1_L

PCI_REQ0_L

TP_PCI_AD<15>

TP_PCI_INTY_L

TP_PCI_TRDY_L

TP_PCI_INTW_L

TP_PCI_AD<31>

TP_PCI_AD<30>

TP_PCI_AD<29>

TP_PCI_AD<28>

TP_PCI_AD<27>

TP_PCI_AD<26>

TP_PCI_AD<25>

TP_PCI_AD<24>

TP_PCI_AD<23>

TP_PCI_AD<22>

TP_PCI_AD<21>

TP_PCI_AD<20>

TP_PCI_AD<19>

TP_PCI_AD<18>

TP_PCI_AD<17>

TP_PCI_AD<16>

TP_PCI_AD<14>

TP_PCI_AD<13>

TP_PCI_AD<12>

CRTMUX_SEL_TV_L

AUD_IPHS_SWITCH_EN

MCP_RS232_SIN_L

MCP_DEBUG<0>

MCP_DEBUG<1>

MCP_DEBUG<2>

MCP_DEBUG<3>

MCP_DEBUG<4>

MCP_DEBUG<5>

MCP_DEBUG<6>

MCP_DEBUG<7>

MCP_RS232_SIN_L

=PP3V3_S0_MCP_GPIO

PM_CLKRUN_L

LPC_SERIRQ

TP_LPC_DRQ0_L

FW_PME_L

TP_PCI_INTZ_L

TP_PCI_INTX_L

GMUX_JTAG_TMS

GMUX_JTAG_TDI

051-8071 B

9819

MCP PCI & LPCSYNC_DATE=06/06/2008SYNC_MASTER=T18_MLB

9

9

9 58

13 91

13 91

13 91

13 91

13 91

13 91

13 91

13 91

13

19

19

35

25

21R1953402MF-LF1/16W5%

22

21R1952 225% 1/16W MF-LF 402

21R19515% 1/16W MF-LF

22402

21R19505% 1/16W MF-LF

22402

21R19601/16W MF-LF 402

225%

2

1R1961

MF-LF402

1/16W5%10K

19

21R1992 8.2K5% 1/16W MF-LF 402

21R1994402MF-LF1/16W5%

8.2K

21R1990402MF-LF1/16W5%

8.2K

21R1991402MF-LF1/16W5%

8.2K

21R1989402MF-LF1/16W5%

8.2K

2

1R1910

PLACEMENT_NOTE=Place close to pin R8

MF-LF402

1/16W5%22

7 41 43

25 91 7 41 43

7 41 43

Y3

Y2

AA7

R11

R10

T4

U9

T3

V9

T2

T1

AB9

Y1

AA10

N1

N2

N3

P2

P3

U11

R4

U10

R3

Y4

AA9

AD11

R9

R8

R7

R6

W10

AA11

AA6

AA3

AA2

AC8

AC7

AB2

AC6

AB3

U7

T5

AE11

U6

U1

U5

U2

W11

U3

W9

V2

W8

V3

AC4

W7

W4

W6

W3

Y5

AA5

AA1

AC11

AC10

AC9

AE10

AC3

AE6

AE5

AE12

AD4

AE2

AE1

AE9

AD5

AD1

AD2

AD3

Y27

Y26

Y25

Y24

Y22

Y20

Y19

Y18

Y17

Y16

W43

W40

W36

W24

W22

W20

V7

V40

V4

V37

V33

V28

V27

V26

V24

V22

V20

V18

V17

V16

U8

U4

U39

U26

U24

AD34

AD33

AD28

AD27

AD26

AD25

AD24

AD20

AD19

AD18

AD17

AD16

AC5

AB33

AC40

AC36

AC22

AB40

AB4

AB37

AB34

AB28

AB27

AB26

AB25

AB24

AB23

AB21

AB20

H34

AB18

U1400

BGA

(7 OF 11)

MCP79-TOPO-B

OMIT

7 41 43 84 91

7 41 43 84 91

7 41 43 84 91

7 41 43 84 91

25 84 91

7 41 43 84 91

19

19 91

19 91

19

7

7

7

7

7

7

7

7

7

7

7

7

7

7

43

91

7

91

7 7

7

7

7

19 91

19 91

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

19

8 18 21

7

7

7

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

IN

SATA_B0_RX_N

SATA_A0_RX_P

SATA_A1_TX_P

GND160

GND158

GND159

GND157

GND156

GND155

GND153

GND154

GND152

GND151

GND150

GND148

GND149

GND147

GND146

GND145

GND143

GND144

GND142

GND141

GND140

GND139

GND136

GND133

GND134

GND132

GND131

USB_RBIAS_GND

USB11_N

USB11_P

USB10_N

USB10_P

USB9_N

USB9_P

USB7_N

USB8_N

USB8_P

USB7_P

USB6_N

USB6_P

USB5_N

USB4_N

USB4_P

USB5_P

USB2_N

USB2_P

USB0_N

USB1_N

USB1_P

USB0_P

SATA_TERMP

SATA_LED#

SATA_C1_RX_N

SATA_C1_RX_P

SATA_C0_TX_P

SATA_B1_RX_N

SATA_B1_RX_P

SATA_B1_TX_N

SATA_B1_TX_P

SATA_B0_TX_N

SATA_B0_RX_P

SATA_B0_TX_P

SATA_A1_RX_N

SATA_A1_RX_P

SATA_A1_TX_N

SATA_A0_TX_P

GND138

GND137

GND135

USB3_P

USB3_N

USB_OC0#/GPIO_25

USB_OC1#/GPIO_26

USB_OC2#/GPIO_27/MGPIO

USB_OC3#/GPIO_28/MGPIO

SATA_A0_RX_N

SATA_A0_TX_N

SATA_C1_TX_N

SATA_C1_TX_P

SATA_C0_RX_P

SATA_C0_RX_N

SATA_C0_TX_N

+V_PLL_USB

+V_PLL_SATA

+DVDD0_SATA1

+DVDD0_SATA2

+DVDD0_SATA3

+DVDD0_SATA4

+DVDD1_SATA2

+AVDD0_SATA1

+AVDD0_SATA2

+AVDD0_SATA3

+AVDD0_SATA4

+AVDD0_SATA5

+AVDD0_SATA6

+AVDD0_SATA7

+AVDD0_SATA8

+AVDD0_SATA9

+AVDD1_SATA1

+AVDD1_SATA2

+AVDD1_SATA3

+AVDD1_SATA4

+DVDD1_SATA1

SATA

USB

OUT

OUT

IN

IN

OUT

OUT

IN

IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

If all SATA_Ax & Bx pins are not used, ground DVDD0_SATA and AVDD0_SATA.

127 mA (A01, AVDD0 & 1)


Geyser Trackpad/Keyboard

AirPort (PCIe Mini-Card)

External D

External A

Camera

Bluetooth

IR

External B

External C

19 mA (A01)

Minimum 1.025V for Gen2 support

ExpressCard

43 mA (A01, DVDD0 & 1)

84 mA (A01)

If all SATA_Cx pins are not used, ground DVDD1_SATA and AVDD1_SATA.

Minimum 1.025V for Gen2 support



SATA_ODD_D2R_P

SATA_ODD_D2R_N

SATA_ODD_R2D_C_N

SATA_ODD_R2D_C_P

SATA_HDD_D2R_N

SATA_HDD_D2R_P

SATA_HDD_R2D_C_N

SATA_HDD_R2D_C_P

TP_SATA_C_D2RP

TP_SATA_C_D2RN

PP1V05_S0_MCP_PLL_SATA

USB_EXTA_OC_L

TP_USB_11N

TP_USB_11P

TP_USB_10P

USB_EXTC_N

USB_EXCARD_N

USB_EXTB_N

USB_EXTB_P

USB_BT_N

USB_BT_P

USB_TPAD_N

USB_TPAD_P

USB_IR_N

USB_IR_P

USB_CAMERA_N

USB_CAMERA_P

USB_EXTD_N

USB_EXTD_P

USB_MINI_N

USB_EXTA_N

USB_EXTA_P

MCP_SATA_TERMP

TP_SATA_F_D2RP

TP_SATA_F_D2RN

TP_SATA_F_R2D_CN

TP_SATA_E_D2RN

TP_SATA_D_R2D_CN

TP_SATA_C_R2D_CN

TP_SATA_C_R2D_CP

TP_MCP_SATALED_L

TP_SATA_D_D2RN

TP_SATA_E_R2D_CP

TP_SATA_E_R2D_CN

TP_SATA_E_D2RP

USB_EXTC_P

USB_EXCARD_P

TP_SATA_D_D2RP



TP_SATA_F_R2D_CP

TP_SATA_D_R2D_CP

USB_EXTB_OC_L

PP3V3_S0_MCP_PLL_USB

MCP_USB_RBIAS_GND

EXCARD_OC_L

TP_USB_10N

USB_EXTC_OC_L

=PP3V3_S5_MCP_GPIO

USB_MINI_P

SYNC_MASTER=T18_MLB

MCP SATA & USB

051-8071 B

9820


38 90

38 90

38 90

38 90

38 90

38 90

38 90

38 90

A27

H21

J21

K21

L21

H25

J25

K25

L25

D27

E27

F27

G27

J26

J27

K27

L27

F29

G29

A28

B28

C28

D28

K23

L23

F25

G25

C29

D29

AE3

E12

AP3

AP2

AN2

AN3

AN1

AM1

AM3

AM2

AM4

AL3

AK3

AL4

AK2

AJ3

AJ1

AJ2

AJ11

AJ10

AK9

AJ9

AJ7

AJ6

AJ4

AJ5

L28

AE16

AH19

AH17

AG19

AG17

AG16

AF19

AM14

AM13

AL14

AN14

AL13

AN12

AM12

AM11

AL12

AK13

AK12

AN11

AJ12

AH24

AH22

AH20

AH18

AG40

AG36

AG26

AG22

AG20

AG18

AF40

AF37

AF34

AF33

AF28

AF27

AF26

AF22

AF20

AF18

AF17

AF16

AD6

AE4

AE39

AE24

AE22

AD38

AD37

AD35

U1400

(8 OF 11)

MCP79-TOPO-B

OMIT

BGA

2

1R2050

402

1/16WMF-LF

5%8.2K

2

1R2051

5%8.2K

1/16W

402MF-LF

2

1R2052

402

1/16WMF-LF

5%8.2K

2

1R2053

5%8.2K

MF-LF1/16W

402

2

1R2060806

MF-LF

1%1/16W

402

2

1R2010

MF-LF

1%1/16W

402

2.49K

31 42

98

39

39

91 96 98

91 96 98

31 91

31 91

39 91

39 91

30 91

30 91

49 91

49 91

40 91

40 91

30 91

30 91

9 91

9 91

9 91

9 91

39 91

39 91

9

8

7

7

23

7

7

7

90

7

7

7

7

7

7

7

7

7

7

7

7

7

9

8

7

7

23

91

8 18

OUT

OUT

OUT

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

OUT

OUT

OUT

OUT

IN

OUT

IN

IN

OUT

IN

IN

IN

IN

OUT

HDA_SDATA_IN2_GPIO_3/PS2_KB_DATA

SLP_S3*

HDA_DOCK_EN*_GPIO_4/PS2_MS_CLK

SLP_RMGT*

HDA_BITCLK

HDA_SDATA_OUT

THERM_DIODE_N

THERM_DIODE_P

HDA_RESET*

HDA_PULLDN_COMP

HDA_SDATA_IN1_GPIO_2/PS2_KB_CLK

MCP_VID2/GPIO_15

MCP_VID1/GPIO_14

MCP_VID0/GPIO_13

EXT_SMI/GPIO_32*

FANCTL1/GPIO_62

FANRPM1/GPIO_63

FANCTL0/GPIO_61

FANRPM0/GPIO_60

SIO_PME*

KBRDRSTIN*

PKG_TEST

TEST_MODE_EN

BUF_SIO_CLK

CPUVDD_EN

SMB_DATA0

SMB_CLK0

SPKR

HDA_SYNC

XTALIN_RTC

XTALOUT

XTALOUT_RTC

JTAG_TRST*

XTALIN

JTAG_TCK

JTAG_TMS

CPU_VLD

JTAG_TDI

JTAG_TDO

RTC_RST*

PS_PWRGD

PWRGD_SB

INTRUDER*

LID*

LLB*

PWRBTN*

RSTBTN*

CPU_DPRSLPVR

SLP_S5*

HDA_SDATA_IN0

SMB_CLK1/MSMB_CLK

SMB_DATA1/MSMB_DATA

SMB_ALERT*/GPIO_64

SPI_CS0/GPIO_10

SPI_CLK/GPIO_11

SPI_DI/GPIO_8

SPI_DO/GPIO_9

SUS_CLK/GPIO_34

+V_DUAL_HDA1

+V_DUAL_HDA2

HDA_DOCK_RST*_GPIO_5/PS2_MS_DATA

GPIO_1/PWRDN_OK/SPI_CS1

A20GATE

GPIO_12_SUS_STAT_ACCLMTR_EXT_TRIG_L

+V_PLL_SP_SPREF

+V_PLL_NV_H

MISC

HDA

OUT

IN

IN OUT

IN

IN

OUT

IN

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

(MGPIO2)

(MGPIO3)

Int PU (S5)

Int PU (S5)

17 mA

20 mA37 mA (A01)

7 mA (A01)


HDA Output CapsFor EMI Reduction on HDA interface

PCI

not use LPC for BootROM override.

LPC_FRAME# high for SPI1 ROM override.

SPI0 = SPI_CS0_L, SPI1 = SPI_CS1_L

Int PU

Int PU (S5)

Int PU

Int PU

25 MHz

42 MHz 0

LPC ROMs. So Apple designs will

0

1

HDA_SYNC

24 MHz

0

1

1

0

SPI_CLKSPI_DO

0

1

1

14.31818 MHz

BUF_SIO_CLK Frequency

Frequency

31 MHz

NOTE: Straps not provided on this page.

1 MHz

SPI Frequency Select

Frequency

NOTE: MCP79 does not support FWH, only

LPC

SPI0

SPI1

I/F HDA_SDOUT

BIOS Boot Select

R1961 and R2160 selects SPI0 ROM by

default, LPC+ debug card pulls

1

1

0

0

LPC_FRAME#

0

1

0

1

Int PU

Int PD

Int PD

Int PD

Int PU (S5)

NOTE: MCP79 rev A01 does not support

SPI1 option. Rev B01 will.

Int PU

Int PU (S5)

(MXM_OK for MXM systems)

SAFE mode: For ROMSIP

recovery

USER mode: Normal

Connects to SMC for

automatic recovery.

SMC_IG_THROTTLE_L

TP_MCP_BUF_SIO_CLK

ARB_DETECT


MCP_GPIO_4

AP_PWR_EN

=PP3V3_S3_MCP_GPIO

AUD_I2C_INT_L

MCP_GPIO_4

MCP_CPU_VLD

MCP_VID<0>

PM_DPRSLPVR

HDA_SDIN0

MCP_CPUVDD_EN

MCP_VID<0>

MCP_THMDIODE_P

SMBUS_MCP_1_CLK

TP_MCP_LID_L

PM_PWRBTN_L

RTC_RST_L

MCP_PS_PWRGD

JTAG_MCP_TDI

JTAG_MCP_TDO

SMBUS_MCP_1_DATA

AP_PWR_EN

MCP_VID<2>

SMBUS_MCP_0_DATA

PM_BATLOW_L

HDA_SDOUT_R

HDA_BIT_CLK_R


SPI_CLK_R

SMC_RUNTIME_SCI_L

MCP_VID<1>

PM_SLP_RMGT_L

TP_SB_A20GATE

MCP_HDA_PULLDN_COMP

PP1V05_S0_MCP_PLL_NV

SPI_CS0_R_L

RTC_CLK32K_XTALOUT

RTC_CLK32K_XTALIN

MCP_CLK25M_XTALOUT

MCP_CLK25M_XTALIN

JTAG_MCP_TCK

PM_CLK32K_SUSCLK_R

SPI_MISO

SPI_MOSI_R

SMBUS_MCP_0_CLK

MCP_THMDIODE_N

PM_SYSRST_DEBOUNCE_L

TP_MCP_KBDRSTIN_L

HDA_RST_L

HDA_BIT_CLK

HDA_SDOUT

PP3V3_G3_RTC


HDA_SYNC_R

HDA_SDOUT_R

HDA_RST_R_L

HDA_BIT_CLK_R

MCP_VID<2>

MCP_VID<1>

JTAG_MCP_TMS

MCP_TEST_MODE_EN

JTAG_MCP_TRST_L

PM_RSMRST_L

SM_INTRUDER_L

ARB_DETECT

HDA_SYNC

HDA_RST_R_L

ODD_PWR_EN_L

MEM_EVENT_L

SMC_WAKE_SCI_L

=PP3V3_S0_MCP_GPIO

MEM_EVENT_L

SMC_IG_THROTTLE_L

SMC_ADAPTER_EN

TP_MLB_RAM_VENDOR

TP_MLB_RAM_SIZE

HDA_SYNC_R

AUD_I2C_INT_L

PM_SLP_S3_L

PM_SLP_S4_L

=PP3V3_S0_MCP

MCP_SPKR

MCP HDA & MISCSYNC_DATE=06/06/2008SYNC_MASTER=T18_MLB

21 98

B051-8071

43 91

43 91

43 91

25

41

41

25

25

25

25

25

21 42

9

2

1R214010K5%

MF-LF1/16W

4022

1R2143

MF-LF402

1/16W5%10K

1

2R2154

1/16WMF-LF

5%100K

402

2

1R2151

402MF-LF

5%1/16W

100K

2

1R2155

402

1/16W

22K5%

MF-LF

2

1R215622K5%

MF-LF1/16W

4022

1R215722K5%

MF-LF1/16W

402

2

1R2141

402

1/16WMF-LF

5%10K

2

1R214210K5%1/16W

402MF-LF

2

1R2147

402

1/16WMF-LF

5%100K

21 27 28 41

33 36 41 42

25 25

21 58

38

B19

B16

A19

A16

B11

C11

K22

B18

C13

B14

C15

C14

D13

F21

K19

G21

L19

M23

H17

G17

J17

C19

C20

D16

D20

C16

E20

L22

AE17

AE18

K16

J16

M21

M20

L20

M24

M25

L13

J18

J19

F19

E19

G19

B20

L15

F15

J15

J14

G15

K15

A15

L17

K17

E15

L24

L26

D12

B12

C12

A12

C18

D17C17

M22

AE7

K13

U1400

BGA

(9 OF 11)

MCP79-TOPO-B

OMIT

2

1C2172

50V

10PF5%

402CERM2

1C2170

50V

10PF5%

402CERM

2

1 C2173

50V

10PF5%

402CERM2

1 C217110PF

50V5%

402CERM

6

6 13

6 13

6 13

6 13

2

1R2150

402

1/16WMF-LF

5%10K

2

1R211049.9

MF-LF1/16W1%

402

9 43

21

R2172

402

5%

22

1/16WMF-LF

2

1R2181

5%10K

402MF-LF

BOOT_MODE_USER

1/16W

2

1R2180

5%10K

MF-LF

BOOT_MODE_SAFE

402

1/16W

2

1R2160

MF-LF

8.2K5%1/16W

402

2

1R2163

402

5%10K

MF-LF1/16W

21

R2173

5%

22

MF-LF1/16W

402

21

R2171

MF-LF

5%1/16W

402

22

21

R2170

MF-LF402

5%

22

1/16W

41

41

25 91

2

1R21901K

MF-LF

1%1/16W

402

2

1R2120

1%49.9K

MF-LF402

1/16W

2

1R2121

MF-LF1/16W1%

402

49.9K

53 91

53 91

53 91

9 91

53 91

41

61 88

9

47 96

21 30 33

21 64

21 64

47 96

21 64

44 91

7 13 44 91

44 91

7 13 44 91

39 41 42 67

7 33 36 41 67 82 84

43 91

7

21

8 21 23

21

21 30 33

8

21 58

21

21 64

21 91

21 91

7

91

23

7

22 25

8 21 23

21 91

21 91

21 91

21 91

21 64

21 64

21

21 91

8 18 19

21 27 28 41

21 42

7

7

21 91

8 22 23

GND

GND161

GND165

GND166

GND164

GND163

GND162

GND167

GND168

GND171

GND170

GND169

GND172

GND173

GND176

GND175

GND174

GND177

GND178

GND181

GND180

GND179

GND182

GND183

GND184

GND187

GND186

GND185

GND188

GND189

GND192

GND191

GND190

GND193

GND194

GND197

GND196

GND195

GND198

GND202

GND201

GND200

GND199

GND203

GND206

GND207

GND205

GND204

GND208

GND212

GND211

GND210

GND209

GND213

GND214

GND217

GND216

GND215

GND218

GND219

GND222

GND221

GND220

GND223

GND224

GND225

GND228

GND227

GND226

GND229

GND230

GND233

GND232

GND231

GND234

GND235

GND238

GND237

GND236

GND239

GND240

GND243

GND242

GND241

GND244

GND248

GND247

GND246

GND245

GND249

GND252

GND251

GND250 GND342

GND341

GND343

GND340

GND339

GND338

GND337

GND336

GND335

GND334

GND333

GND331

GND332

GND330

GND329

GND328

GND326

GND327

GND325

GND324

GND323

GND321

GND322

GND320

GND319

GND318

GND316

GND317

GND315

GND314

GND313

GND311

GND310

GND312

GND309

GND308

GND305

GND306

GND307

GND304

GND303

GND301

GND300

GND302

GND299

GND298

GND296

GND295

GND297

GND294

GND293

GND292

GND291

GND290

GND289

GND288

GND287

GND285

GND286

GND284

GND283

GND282

GND280

GND281

GND279

GND278

GND277

GND275

GND276

GND274

GND273

GND272

GND270

GND269

GND271

GND268

GND267

GND264

GND265

GND266

GND263

GND262

GND259

GND260

GND261

GND258

GND257

GND255

GND254

GND256

GND253

+VTT_CPUCLK

+VDD_CORE42

+3.3V_DUAL_USB2

+VTT_CPU17

+VTT_CPU16

+VTT_CPU15

+VTT_CPU14

+VTT_CPU13

+VTT_CPU12

+VTT_CPU11

+VTT_CPU10

+VTT_CPU1

+VDD_CORE7

+VDD_CORE1

+VDD_CORE2

+VDD_CORE3

+VDD_CORE4

+VDD_CORE5

+VDD_CORE6

+VDD_CORE13

+VDD_CORE14

+VDD_CORE15

+VDD_CORE16

+VDD_CORE17

+VDD_CORE18

+VDD_CORE19

+VDD_CORE21

+VDD_CORE22

+VDD_CORE23

+VDD_CORE24

+VDD_CORE25

+VDD_CORE26

+VDD_CORE27

+VDD_CORE28

+VDD_CORE29

+VDD_CORE30

+VDD_CORE32

+VDD_CORE33

+VDD_CORE34

+VDD_CORE35

+VDD_CORE36

+VDD_CORE37

+VDD_CORE39

+VDD_CORE40

+VDD_CORE41

+VDD_CORE47

+VDD_CORE48

+VDD_CORE49

+VDD_CORE50

+VDD_CORE51

+VDD_CORE52

+VDD_CORE53

+VDD_CORE54

+VTT_CPU51

+VTT_CPU50

+VTT_CPU47

+VTT_CPU46

+VTT_CPU45

+VTT_CPU43

+VTT_CPU42

+VTT_CPU41

+VTT_CPU40

+VTT_CPU39

+VTT_CPU38

+VTT_CPU37

+VTT_CPU36

+VTT_CPU35

+VTT_CPU34

+VTT_CPU32

+VTT_CPU31

+VTT_CPU30

+VTT_CPU29

+VTT_CPU28

+VTT_CPU26

+VTT_CPU25

+VTT_CPU24

+VTT_CPU23

+VTT_CPU22

+VTT_CPU21

+VTT_CPU20

+VTT_CPU19

+VTT_CPU18

+VTT_CPU9

+VTT_CPU8

+VTT_CPU7

+VTT_CPU6

+VTT_CPU5

+VTT_CPU4

+VTT_CPU3

+VDD_CORE38

+VTT_CPU33

+VTT_CPU27

+VDD_CORE55

+VDD_CORE56

+VDD_CORE57

+VDD_CORE58

+VDD_CORE59

+VDD_CORE60

+VDD_CORE61

+VDD_CORE62

+VDD_CORE63

+VDD_CORE64

+VDD_CORE65

+VDD_CORE66

+VDD_CORE67

+VDD_CORE68

+VDD_CORE69

+VDD_CORE70

+VDD_CORE71

+VDD_CORE72

+VDD_CORE73

+VDD_CORE74

+VDD_CORE75

+VDD_CORE76

+VDD_CORE77

+VDD_CORE78

+VDD_CORE79

+VDD_CORE80

+VDD_CORE81

+VBAT

+3.3V_1

+3.3V_8

+3.3V_DUAL1

+3.3V_DUAL2

+3.3V_DUAL3

+3.3V_DUAL4

+3.3V_DUAL_USB1

+3.3V_DUAL_USB3

+3.3V_DUAL_USB4

+VDD_AUXC1

+VDD_AUXC3

+VDD_AUXC2

+VDD_CORE43

+VTT_CPU2

+VDD_CORE46

+VDD_CORE45

+VDD_CORE44

+VTT_CPU52

+VDD_CORE31

+VTT_CPU49

+VTT_CPU48

+VTT_CPU44

+3.3V_7

+3.3V_6

+3.3V_5

+3.3V_4

+3.3V_3

+3.3V_2

+VDD_CORE20

+VDD_CORE12

+VDD_CORE11

+VDD_CORE10

+VDD_CORE9

+VDD_CORE8

POWER

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

1182 mA (A01)

450 mA (A01)

266 mA (A01)16 mA

10 uA (G3)


80 uA (S0)

23065 mA (A01, 1.2V)

16996 mA (A01, 1.0V)

250 mA

1139 mA

43 mA

105 mA (A01)

=PP3V3_S5_MCP

=PP1V05_S5_MCP_VDD_AUXC

=PP3V3_S0_MCP

PP3V3_G3_RTC

=PPVCORE_S0_MCP =PP1V05_S0_MCP_FSB


051-8071 B

9822

MCP Power & Ground

AG32

W32

V32

U32

T32

AA32

Y32

P32

N32

N31

M33

M32

M31

L34

L33

L32

K35

K34

K33

J36

J35

J34

H37

H35

G38

G37

G36

F39

F38

F37

E40

E39

E38

D41

D40

D39

C42

C41

C40

B42

B41

AC32

AB32

AL31

AD32

AK32

AK31

AJ32

AH32

AE32

AF32

P31

R32

AA16

AF12

W25

Y23

W23

W21

AA24

AH9

AH7

AH6

AH5

AH4

AH3

AH21

Y21

AH25

W28

AA23

AH2

W26

AH11

AH10

AH1

AG9

AG8

AG5

AG7

AG6

AA21

AG4

AG3

AG25

AG23

AG21

AG12

AG11

AG10

AA20

AF9

AH23

AF7

AF4

AF3

AF25

AF23

AF21

AF2

AH12

AA19

AF11

AF10

AE28

AE27

AE26

AE25

AE23

AE21

AE19

U25

AA18

V25

W27

AD23

AD21

AC28

AC27

AC26

AC25

AC24

AC23

AA17

AC21

AC20

AC19

AC18

AC17

AC16

AA28

AA27

AA26

AA25

V21

U21

T21

A20

K28

J28

H27

G26

K20

J20

H19

G18

Y9

AA8

AB11

Y10

AD9

AB10

AE8

AD10

U1400

(10 OF 11)

BGA

MCP79-TOPO-B

OMIT

T22

AH16

Y11

V11

T11

Y6

P11

AY13

AB19

AA4

M11

AD7

AN26

AB16

AB17

Y38

Y37

Y35

Y34

Y33

Y28

M37

M35

M34

M10

L5

L43

L40

AU1

K8

K40

K4

K37

K26

K18

K12

K10

J8

J12

G40

AN8

H23

AW35

H15

H11

G8

G6

G43

G4

G34

AW20

G24

G22

BC12

G16

G14

G12

G10

F8

F32

F16

F12

E33

E29

E25

E21

E17

E13

D6

D37

D30

D26

D23

D22

D19

D18

D15

D14

D10

C2

BC5

AY14

BC41

BC37

BC33

L35

AY6

AW31

BA4

BA1

AV40

AY41

AY38

AY37

AY34

AY33

AY30

AV12

AY10

AW43

AR43

G20

AW11

AV7

AV4

AV36

AV32

AV28

F20

G28

AU4

AU38

AU36

AR30

AU32

AP33

AU28

AU12

L12

AY22

AY21

AT9

AT7

AT6

AT33

AT29

AT13

AR12

AT10

AR40

AR32

AR28

AW23

AP7

AP40

AP4

AP37

AP36

AP34

AP32

AP28

AU14

AP14

AU26

AP10

Y7

AN4

AN39

AN30

AN28

AP26

AM9

AM7

AM6

AM5

AM38

AM37

AM35

AM34

AM30

AM26

AM24

AM22

AM20

AM18

AM16

AM10

AL5

AL40

AL36

AK40

AK4

AK37

AK34

AK33

AK10

AJ8

AJ39

AH38

AH37

AH34

AH33

AH26

U1400

BGA

OMIT

MCP79-TOPO-B

(11 OF 11)

8 23

8 23

8 21 23

21 25

8 23 45 8 9 14 23

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

Apple: 1x 2.2uF 0402 (2.2 uF)

4771 mA (A01, DDR3)

NV: 1x 4.7uF 0603, 4x 0.1uF 0402 (5.1 uF)

Apple: 4x 2.2uF 0402 (8.8 uF)

Apple: 4x 4.7uF 0402, 4x 1uF 0402, 6x 0.1uF 0402 (23.4 uF)

5 mA (A01)

MCP SATA (DVDD) Power

1182 mA (A01)

7 mA (A01)

19 mA (A01)

333 mA (A01)

MCP Core Power

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)

MCP 3.3V Power

MCP Memory Power

MCP FSB (VTT) Power

Apple: 1x 2.2uF 0402 (2.2 uF)

NV: 1x 10uF 0805, 1x 4.7uF 0402, 2x 0.1uF 0402 (14.9 uF)

Apple: 7x 2.2uF 0402 (15.4 uF)

Apple: 5x 2.2uF 0402 (11 uF)

NV: 1x 10uF 0805, 1x 4.7uF 0402, 2x 1uF 0402, 2x 0.1uF 0402 (16.9 uF)

MCP 1.05V AUX Power

MCP 3.3V/1.5V HDA Power

266 mA (A01)

MCP 3.3V AUX/USB Power

Apple: 1x 2.2uF 0402 (2.2 uF)

MCP79 Ethernet VRef

MCP 3.3V Ethernet Power

23065 mA (A01, 1.2V)

16996 mA (A01, 1.0V)

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)

MCP PCIE (DVDD) Power

105 mA (A01) 131 mA (A01)

83 mA (A01)

84 mA (A01)

87 mA (A01)

37 mA (A01)

NV: 1x 10uF 0805, 1x 4.7uF 0402, 2x 0.1uF 0402 (14.9 uF)

206 mA (A01)

127 mA (A01)

43 mA (A01)57 mA (A01)

450 mA (A01) 19 mA (A01)

(No IG vs. EG data)

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)


5 mA (A01)

Apple: 1x 2.2uF 0402 (2.2 uF)

MCP 1.05V RMGT Power

NV: 1x 10uF 0805, 2x 4.7uF 0402, 3x 1uF 0402, 9x 0.1uF 0402 (23.3 uF)

Apple: 2x 2.2uF 0402 (4.4 uF)

270 mA (A01)

84 mA (A01)

562 mA (A01)

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)

=PP3V3_S5_MCP

PP1V05_ENET_MCP_PLL_MACMIN_LINE_WIDTH=0.4 MM


=PP3V3_S0_MCP



PP1V05_S0_MCP_PLL_NV

VOLTAGE=1.05V

PP1V05_S0_MCP_PLL_CORE

VOLTAGE=1.05V


VOLTAGE=1.05V

PP1V05_S0_MCP_PEX_AVDD


PP3V3_S0_MCP_PLL_USB

VOLTAGE=3.3VMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM


VOLTAGE=1.05V

PP1V05_S0_MCP_PLL_SATA

=PP1V05_ENET_MCP_PLL_MAC


MCP_MII_VREF


=PP1V05_S0_MCP_FSB

=PP1V05_S5_MCP_VDD_AUXC =PP1V05_ENET_MCP_RMGT


=PPVCORE_S0_MCP


=PP1V05_S0_MCP_SATA_DVDD=PP1V05_S0_MCP_PEX_DVDD

VOLTAGE=1.05V

PP1V05_S0_MCP_SATA_AVDD


PP1V05_S0_MCP_PLL_FSB

VOLTAGE=1.05VMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.4 MM

MIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MMVOLTAGE=1.05V

PP1V05_S0_MCP_PLL_PEX

=PP1V05_S0_MCP_PLL_PEX_UF


=PP1V05_S0_MCP_AVDD_UF


MCP Standard Decoupling

23

B051-8071

98

2

1C25034.7UF

4V20%

X5R402

21

R25800.2

1%1/6WMF

402-HF

2

1 C2581

603X5R16V10%2.2UF

2

1C2528

20%4.7uF

4VX5R402

2

1 C2529

CERM

20%0.1uF

402

10V

2

1 C2596

CERM

20%2.2UF

402-LF

6.3V

2

1 C2587

20%

CERM

2.2UF

402-LF

6.3V

2

1 C2585

20%

CERM

2.2UF

402-LF

6.3V

2

1 C2583

CERM

20%2.2UF

402-LF

6.3V

2

1 C25190.1uF

CERM

20%

402

10V2

1 C25180.1uF20%

CERM402

10V2

1 C2521

CERM

20%0.1uF

402

10V

18

2

1R2591

MF-LF

1%1/16W

1.47K

402

2

1 C25910.1UF

CERM

20%

402

10V

2

1R25901.47K

1/16W1%

MF-LF402

21

L259530-OHM-1.7A

0402

2

1C2595

20%4.7UF

4VX5R402

2

1 C2590

CERM

0.1UF20%

402

10V2

1 C2589

CERM

20%2.2UF

402-LF

6.3V

2

1 C2560

6.3V

2.2UF20%

402-LFCERM

2

1 C2525

CERM

20%0.1uF

402

10V2

1 C2526

CERM

20%0.1uF

402

10V

2

1C25014.7UF

4V20%

X5R402

2

1C25004.7UF

4V20%

X5R402

21

L2555

0402

30-OHM-1.7A

21

L2586

0402

30-OHM-1.7A

21

L258830-OHM-1.7A

0402

21

L258430-OHM-1.7A

0402

21

L258230-OHM-1.7A

0402

21

L257530-OHM-5A

0603

21

L2570

0603

30-OHM-5A

2

1C2580

402X5R4V

20%4.7UF

2

1 C2564

CERM402-LF

20%2.2UF

6.3V

2

1 C2562

6.3V

2.2UF20%

402-LFCERM

2

1C2540

20%4.7UF

4VX5R402

2

1 C25410.1UF

CERM

20%

402

10V2

1 C2542

20%

CERM

0.1UF

402

10V2

1 C25430.1UF20%

CERM402

10V2

1 C25440.1UF20%

CERM402

10V2

1 C25450.1UF20%

CERM402

10V2

1 C25460.1UF20%

CERM402

10V2

1 C25470.1UF20%

CERM402

10V2

1 C25480.1UF20%

CERM402

10V2

1 C25490.1UF20%

CERM402

10V

2

1 C2550

6.3V

2.2UF20%

402-LFCERM 2

1 C25512.2UF

6.3V20%

402-LFCERM 2

1 C2552

6.3V

2.2UF20%

402-LFCERM 2

1 C25532.2UF

6.3V20%

402-LFCERM

2

1 C2575

6.3V

2.2UF20%

402-LFCERM 2

1 C2576

CERM402-LF

20%2.2UF

6.3V

2

1 C2573

6.3V

2.2UF20%

402-LFCERM 2

1 C2574

6.3V

2.2UF20%

402-LFCERM2

1 C2570

6.3V

2.2UF20%

402-LFCERM2

1C2520

4V

4.7UF20%

X5R402

2

1 C2571

6.3V

2.2UF20%

402-LFCERM 2

1 C2572

6.3V

2.2UF20%

402-LFCERM2

1C25154.7UF

4V20%

X5R402

2

1 C2516

X5R402-1

1UF10%10V

2

1 C2517

X5R402-1

1UF10%10V

2

1 C2530

6.3V

2.2UF20%

402-LFCERM 2

1 C2531

20%2.2UF

6.3V

402-LFCERM 2

1 C2532

6.3V

2.2UF20%

402-LFCERM 2

1 C2533

6.3V

2.2UF20%

402-LFCERM 2

1 C25342.2UF

6.3V20%

402-LFCERM 2

1 C2535

6.3V

2.2UF20%

402-LFCERM 2

1 C2536

6.3V

2.2UF20%

402-LFCERM

2

1 C25120.1UF

CERM

20%

402

10V2

1 C25130.1UF

CERM

20%

402

10V2

1 C25080.1UF

CERM

20%

402

10V2

1 C25090.1UF

CERM

20%

402

10V2

1 C25100.1UF

CERM

20%

402

10V2

1 C25110.1UF

CERM

20%

402

10V2

1 C2504

X5R402-1

1UF10%10V

2

1 C2505

X5R402-1

1UF10%10V

2

1 C2506

X5R402-1

1UF10%10V

2

1 C2507

X5R402-1

1UF10%10V

2

1C25024.7UF

4V20%

X5R402

2

1 C2555

CERM402-LF

20%2.2UF

6.3V

2

1C2586

4V

4.7UF20%

X5R402

2

1C25844.7UF

20%4V

X5R402

2

1C2588

20%4.7UF

4VX5R402

2

1C2582

4V

4.7UF20%

X5R402

8 22

18

8 21 22

8 16

21

16

8

20 20

8

8 18 23

8 21

8 9 14 22

8 22 8 18

8

8 22 45

8 18 23

8 8

8

14

17

8

8 66

8

A2A1 SCLA0

VCC

SDA

WPGND

IN

BI

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

WF: Open question on which packge option(s) nVidia can support.

206 mA (A01)

HDCP ROM

NV: 1x 4.7uF 0603, 2x 0.1uF 0402 (4.9 uF)

206 mA (A01)

Apple: 2x 2.2uF 0402 (4.4 uF)

16 mA (A01)

WF: Checklist says 0-ohm resistor placeholder for ferrite bead.

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)

Apple: ???

16 mA (A01)

95 mA (A01)

Apple: 1x 2.2uF 0402 (2.2 uF)

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)

Current numbers from email Xiaowei Lin provided 11/12/2007 3:22pm (no official document number).

190 mA (A01, 1.8V)

WF: Checklist says 0-ohm resistor placeholder for ferrite bead.

=PP3V3_S0_HDCPROM

PP3V3_S0_MCP_DACMIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MMVOLTAGE=3.3V

VOLTAGE=3.3V


PP3V3_S0_MCP_VPLL

MCP_CLK27M_XTALOUTNO_TEST=TRUE

MAKE_BASE=TRUENC_MCP_CLK27M_XTALOUT

MCP_IFPAB_VPROBE

MCP_IFPAB_RSET

TP_MCP_RGB_GREEN

TP_MCP_RGB_HSYNC

TP_MCP_RGB_RED

TP_MCP_RGB_VSYNC

TP_MCP_RGB_BLUE

NC_MCP_RGB_REDNO_TEST=TRUE

MAKE_BASE=TRUE

CRT_IG_R_C_PR

TP_MCP_RGB_DAC_RSET

NO_TEST=TRUEMAKE_BASE=TRUENC_CRT_IG_HSYNCCRT_IG_HSYNC

NO_TEST=TRUEMAKE_BASE=TRUENC_CRT_IG_B_COMP_PBCRT_IG_B_COMP_PB

NO_TEST=TRUEMAKE_BASE=TRUENC_CRT_IG_G_Y_YCRT_IG_G_Y_Y


=I2C_HDCPROM_SDA

=I2C_HDCPROM_SCL

NO_TEST=TRUEMAKE_BASE=TRUE

NC_MCP_CLK27M_XTALIN

NO_TEST=TRUEMAKE_BASE=TRUENC_MCP_TV_DAC_VREF

NO_TEST=TRUE

NC_MCP_TV_DAC_RSETMAKE_BASE=TRUE

NO_TEST=TRUE

NC_MCP_RGB_DAC_VREFMAKE_BASE=TRUE

NO_TEST=TRUE

NC_MCP_RGB_DAC_RSETMAKE_BASE=TRUE

NO_TEST=TRUE

NC_CRT_IG_VSYNCMAKE_BASE=TRUE

CRT_IG_VSYNC

TP_MCP_RGB_DAC_VREF

MCP_TV_DAC_RSET

MCP_TV_DAC_VREF

MCP_CLK27M_XTALIN

NC_MCP_RGB_GREENNO_TEST=TRUE

MAKE_BASE=TRUE

NC_MCP_RGB_VSYNCNO_TEST=TRUE

MAKE_BASE=TRUE

NC_CRT_IG_R_C_PRNO_TEST=TRUE

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_MCP_RGB_HSYNCMAKE_BASE=TRUE

NO_TEST=TRUE

NC_MCP_RGB_BLUEMAKE_BASE=TRUE

=PP3V3_S0_MCP_DAC_UF

HDCPROM_WP

=PP3V3_S0_MCP_VPLL_UF


MCP_HDMI_VPROBE

MCP_HDMI_RSET

MCP Graphics SupportSYNC_DATE=04/01/2008SYNC_MASTER=M98_MLB

24 98

B051-8071

2

1 C2610

CERM402-LF

20%2.2UF

6.3V

2

1R2620

402

1/16W1%1K

MF-LF

2

1R265105%1/16WMF-LF402

44

44

2

1R269010K

MF-LF

5%1/16W

402

NO STUFF

2

1C2690

402

10V

0.1UF20%

CERM

NO STUFF

7

8

5

6

4

3

2

1

U2695SOIC

AT24C08

NO STUFF

2

1 C2616

6.3V

402-LF

2.2UF20%

CERM

2

1 C2641

20%

CERM

2.2UF

402-LF

6.3V

21

L264030-OHM-1.7A

0402

2

1C2640

CERM

4.7UF

6.3V20%

603

2

1C2615

20%4.7UF

4V

402X5R

2

1C2630

20%

402CERM

NO STUFF

10V

0.1UF

2

1R2630NO STUFF

402

1K1%1/16WMF-LF

2

1C2620NO STUFF

20%

402CERM10V

0.1UF

21

L265030-OHM-1.7A

0402

NO STUFF

2

1 C2650

6.3V

2.2UF20%

402-LFCERM

NO STUFF

8

18

18

18

18 90

18 90

18

18

18

18

18

18 90

18

18 90

18 90

18 90

8 18

18 90

18

18 90

18 90

18

8

8

8 18

18 90

18 90

IN OUT

IN OUT

OUT

IN

OUT

IN

IN

IN

OUT

OUTIN

NCNC

OUT

OUTIN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

OUT

OUTY

B

A

VIN

GND

VOUTEN

NC

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

RTC Power Sources

MCP S0 PWRGD & CPU_VLD

SMC 99ms delay from ALL_SYS_PWRGD to IMVP_VR_ON plus IMVP6 delay for

MCP 25MHz Crystal

results in earlier ROMSIP and MCP FSB I/O interface initialization.

MCPSEQ_MIX is cross between MLB and internal power sequencing, which

MCPSEQ_SMC represents MCP79 ’MLB’ power sequencing connections,

VR_PWRGOOD_DELAY should guarantee CPU_VLD does not go high before

PCIE Reset (Unbuffered)

Platform Reset Connections

LPC Reset (Unbuffered)

10K pull-up to 3.3V S0 inside MCP

Reset Button

CPUVDD_EN (which is 40-100ms after PS_PWRGD assertion).

NOTE: If CPU_VLD deasserts during S0 MCP79 will take system to S5 immediately.

but results in MCP79 ROMSIP sequence happening after CPU powers up.

RTC Crystal

=PP3V3_S5_RTC_D

=PP3V3_S5_MCPPWRGD

VOLTAGE=3.3V

MIN_LINE_WIDTH=0.3 mmMIN_NECK_WIDTH=0.2 mm

PP3V3_G3_RTC

RTC_CLK32K_XTALIN

VR_PWRGOOD_DELAY

ALL_SYS_PWRGD

MCP_CLK25M_XTALOUT

MCP_CLK25M_XTALIN

RTC_CLK32K_XTALOUT_R

MCP_CLK25M_XTALOUT_R

PP3V3_G3_SUPERCAP

MCP_PS_PWRGD

MCP_CPU_VLD

MCP_CPUVDD_EN

=GMUX_PCIE_RESET_L

GMUX_PCIE_RESET_LMAKE_BASE=TRUE

PM_CLK32K_SUSCLK_R

MEM_VTT_EN_R

LPC_CLK33M_SMC_R

PCA9557D_RESET_L

FW_RESET_L

BKLT_PLT_RST_L

EXCARD_RESET_L

MINI_RESET_L

MEM_VTT_EN

LPC_CLK33M_GMUX

PM_CLK32K_SUSCLK

LPC_CLK33M_SMC

LPC_CLK33M_LPCPLUS

SMC_LRESET_L

DEBUG_RESET_LLPC_RESET_L

PM_SYSRST_L

PM_SYSRST_DEBOUNCE_LXDP_DBRESET_L

S0_AND_IMVP_PGOOD

PCIE_RESET_L

RTC_CLK32K_XTALOUT

RTC_DISCHARGE_R


SB Misc

98

B

25

051-8071

21

R2803

MF-LF

5%

0

1/16W

402

2

1R2800SUPERCAP_YES

402MF-LF1/16W5%100

2

1 C2800

CRITICALSUPERCAP_YES

3.3V

SMXHHG

0.08F2%

2

1C28011UF

CERM402

10%6.3V

2 1

R2802NO STUFF

1.0M

603MF-LF1/10W5%

2

1R2801

MF-LF1/16W

402

5%10

NO STUFF

5

1

4

2

3

U2801

RTC_PS_YES

CRITICAL

MIC5232-2.8YD5TSOT-23-5

2

1C2802

402X5R

10V10%1UF

NO STUFF

4

5

3

1

2

U2850

TC7SZ08AFEAPE

MCPSEQ_SMC

SOT665

21

R2852

MCPSEQ_MIX

402

0

1/16W5%

MF-LF

21 21

R2853

MCPSEQ_SMC

402

0

1/16W5%

MF-LF

21

21

R2850

MCPSEQ_SMC

5%

MF-LF1/16W

0

402


2

1 C28500.1UF

402CERM10V

MCPSEQ_SMC

20%

21

R2851

MCPSEQ_MIX

MF-LF

5%1/16W

0

402

41 67 84

61

21

84

84 21

R2827


5%1/16W

402MF-LF

33

21

R2894

MF-LF

5%

402

0

1/16W

30

31 21

R28950

5%1/16WMF-LF402

86 21

R28930

5%1/16WMF-LF402

26 21

R2891

402MF-LF1/16W5%

0

41

Y2810

CRITICAL

7X1.5X1.4-SM32.768K

41 91

7 43 91

7 41

19 21

R2870

MF-LF1/16W5%

402

339

21

R2892

402

0

5%1/16WMF-LF

35

2

1 C2899NO STUFF

1UF10%

X5R10V

402

21

R2899

402

33

MF-LF

5%1/16W

21 91 21

R282922

1/16W5%

MF-LF402


41 91

21

21

2

1R2816

NO STUFF

MF-LF402

1/16W5%1M

21

R2815

MF-LF

0

1/16W5%

402 31

42

Y2815

SM-3.2X2.5MM25.0000M

CRITICAL

21

C2816

402CERM

5%

12pF

50V

21

C2815

50V5%

CERM402

12pF

19 91 21

R2825

402


1/16WMF-LF

33

5%

21

R2826

402

1/16WMF-LF

5%

33


17

21

21

41

7 43

2

1R2897

SILK_PART=FP SYS RESET

OMIT

05%

1/16WMF-LF402

21

R28900

5%1/16W

402MF-LF

21

R2881

402


MF-LF1/16W5%

33

21

R2883

402

1/16W5%

MF-LF

33


21

R2896

XDP

1/16WMF-LF

5%

0

402

19 84 91

2

1R2811

NO STUFF

10M

402

5%

MF-LF1/16W

21

R2810

402

1/16W

0

5%

MF-LF

21

C281112pF

402CERM50V5%

21

C2810

50V

12pF

402CERM

5%

21 10 13

8

8

21 22

OUT

OUT

OUT

V-

V+

V-

V+

V-

V+

V-

V+

V-

V+

V-

V+

RESET*

A0

A1

A2

SCL

SDA

P0

P1

P2

P5

P6

P7

P3

P4

THRM

VCC

GNDPAD

NC

NC

IN

IN

BI

VDD

VOUTD

VOUTC

VOUTB

VOUTASCL

SDA

A0

A1

GND

IN

BI

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D


- =I2C_PCA9557D_SDA

ADDR=0x98(WR)/0x99(RD)

Signal aliases required by this page:

Power aliases required by this page:

Page Notes

ADDR=0x30(WR)/0x31(RD)

Required zero ohm resistors when no VREF margining circuit stuffed

DAC channel A B A B C D

Min DAC code 0x00 0x00 0x00 0x00 0x00 0x00

Max DAC code 0x87 0x87 0x87 0x87 0x55 0xFF

Max sink I -3.75 mA -3.75 mA -3.75 mA -3.75 mA -0.91 mA -59.04 mA

Max source I 5 mA 5 mA 5 mA 5 mA 0.52 mA 51.15 mA

Min Vref 0.375 V 0.375 V 0.375 V 0.375 V 0.091 V 1.042 V

Vref Stepping 6.5 mV 6.5 mV 6.5 mV 6.5 mV 11.2 mV 1.5 mV

Place close to J3200.1

MEM B VREF CA FRAME BUFFER VREFCPU FSB VREF

Place close to U8400, U8450

Place close to U8500, U8550

Place close to U1000.AD26

10mA max load



VREFMRGN(per DAC LSB)

MEM A VREF DQ MEM A VREF CA MEM B VREF DQ

SO-DIMM A and SO-DIMM B Vref settings should be margined separately

(i.e. not simultaneously) due to current limitation of TPS51116 regulator.

Max Vref 1.250 V 1.250 V 1.250 V 1.250 V 1.044 V 1.426 V

Nominal Vref 0.75 V 0.75 V 0.75 V 0.75 V 0.70 V 1.248 V


- =PPVTT_S3_DDR_BUF

- =PP3V3_S3_VREFMRGN

- =PP3V3_S5_VREFMRGN

- =I2C_VREFDACS_SCL

NO_VREFMRGN

- =I2C_VREFDACS_SDA

- =I2C_PCA9557D_SCL

BOM options provided by this page:

=PP3V3_S3_VREFMRGN

PP3V3_S3_VREFMRGN_CTRL

VREFMRGN_FRAMEBUF_EN

PCA9557D_RESET_L

=I2C_PCA9557D_SCL

=I2C_PCA9557D_SDA

=I2C_VREFDACS_SCL

=I2C_VREFDACS_SDA

VREFMRGN_CPUFSB

GPU_FB_A_VREF_DIV

GPU_FB_B_VREF_DIV

CPU_GTLREF

VREFMRGN_CA_SODIMMB_EN

VREFMRGN_DQ_SODIMMA_EN

VREFMRGN_CPUFSB_EN

VREFMRGN_DQ_SODIMMB_EN

VREFMRGN_DQ_SODIMMB_BUF

VREFMRGN_DQ_SODIMMB_EN

VREFMRGN_CA_SODIMMA_BUF

VREFMRGN_CA_SODIMMA_EN

VREFMRGN_DQ_SODIMM

VREFMRGN_DQ_SODIMMA_BUF

VREFMRGN_DQ_SODIMMA_EN

VREFMRGN_CA_SODIMM

VREFMRGN_CA_SODIMMB_EN

VREFMRGN_FRAMEBUF_BUF

VREFMRGN_FRAMEBUF_EN

VREFMRGN_CPUFSB_BUF

VREFMRGN_CPUFSB_EN

VREFMRGN_CA_SODIMMB_BUF

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.3 mm

PP0V75_S3_MEM_VREFDQ_A


PP0V75_S3_MEM_VREFDQ_B


PP0V75_S3_MEM_VREFCA_A



PP0V75_S3_MEM_VREFCA_B

=PPVTT_S3_DDR_BUF

VREFMRGN_FRAMEBUF

VREFMRGN_CA_SODIMMA_EN

PP3V3_S3_VREFMRGN_DAC

RES,MTL FILM,0,5%,0402,SM,LF R2903 CRITICAL NO_VREFMRGN1116S0004

RES,MTL FILM,0,5%,0402,SM,LF CRITICAL1 R2905 NO_VREFMRGN116S0004

FSB/DDR3/FRAMEBUF Vref Margining

SYNC_MASTER=BEN_K20

051-8071 B

9826


CRITICAL1 R2911 NO_VREFMRGN116S0004 RES,MTL FILM,0,5%,0402,SM,LF

1 R2909 CRITICAL NO_VREFMRGN116S0004 RES,MTL FILM,0,5%,0402,SM,LF

2

1 C2903

CERM

0.1UF

VREFMRGN

402

20%10V

2

1 C2905

20%

CERM402

10V

0.1UF

VREFMRGN

2

1 C2900VREFMRGN

2.2UF

CERM402-LF

6.3V20%

2

1 C2901

20%10V

402

VREFMRGN

0.1UF

CERM

44

44

5

4

2

1

8

7

6

3

10

9

U2900

DAC5574

MSOP

VREFMRGN

44

44

25

21

R2908

5%

402

1/16W

100K

MF-LF

VREFMRGN

21

R2912

402

100

MF-LF

1%

VREFMRGN

1/16W

2

1 C2904VREFMRGN

402

0.1UF20%

CERM10V

16

17

2

1

15

14

13

12

11

10

9

7

6

8

5

4

3

U2901

CRITICAL

PCA9557

VREFMRGN

QFN

21

R2907

MF-LF

VREFMRGN

402

1/16W

100K5%

21

R2910

402MF-LF1/16W1%

100

VREFMRGN

21

R2906

MF-LF

VREFMRGN

402

1%1/16W

100

21

R2904

402

100

1%1/16WMF-LF

VREFMRGN

21

R2901100K

1/16W5%

VREFMRGN

MF-LF402

21

R2902

5%100K

1/16WMF-LF

402

VREFMRGN

21

R2919OMIT

402

NONE

NONENONE

SHORT

21

R2918OMIT

SHORT

402NONENONENONE

21

R2911 VREFMRGN

1%

200

1/16WMF-LF402

21

R2909

402MF-LF1/16W

200

1%

VREFMRGN

21

R2905 VREFMRGN

1%

200

1/16WMF-LF402

B4

B1

C4

C1

C2

C3

U2904UCSP

MAX4253

VREFMRGN

B4

B1

A4

A1

A2

A3

U2904UCSP

VREFMRGN

MAX4253

B4

B1

C4

C1

C2

C3

U2903UCSP

MAX4253

VREFMRGN

B4

B1

A4

A1

A2

A3

U2902UCSP

VREFMRGN

MAX4253

B4

B1

A4

A1

A2

A3

U2903UCSP

VREFMRGN

MAX4253

B4

B1

C4

C1

C2

C3

U2902UCSP

MAX4253

VREFMRGN

21

R2917

MF-LF1/16W

402

49.9

1%

VREFMRGN

9

21

R2915

MF-LF1/16W

5%VREFMRGN

402

100K

21

R2903 VREFMRGN

1%

200

1/16WMF-LF402

21

R2913

5%VREFMRGN

MF-LF402

1/16W

100K

21

R2914100

402

1%

VREFMRGN

1/16WMF-LF

2

1 C2902VREFMRGN

0.1UF20%

CERM402

10V

10 88

21

R2916

1/16WMF-LF

VREFMRGN

1%

49.9

402

9

8

26

26

26

26

26

26

26

26

26

26

26

27

28

27

28

8 63

26

A6

A7

A11

A5

DQ33

VDD

A10/AP

VDD

VSS

SA1

VTT

VSS

DQS4*

DQS4

VSS

DQ35

VSS

CK0*

SA0

VSS

DQ58

DQ59

DM7

VSS

DQ57

DQ56

DQ50

DQ51

VSS

DQS6*

DQS6

VSS

DQ49

DQ48

DQ43

VSS

DM5

VSS

DQ42

SDA

SCL

VTT

VSS

EVENT*

DQ62

VSS

DQ63

DQS7*

DQS7

DQ60

DQ61

VSS

VSS

DQ55

DQ54

DM6

VSS

DQ53

VSS

DQ52

DQ47

VSS

DQS5

VSS

DQ46

DQ41

VSS

DQ40

DQ34

VSS

DQ32

TEST

VDD

VDD

S1*

A13

CAS*

WE*

BA0

VDD

VDD

CK0

A1

A3

VDD

VDD

A8

A9

A12/BC*

VDD

BA2

NC

VDD

CKE0

VSS

DQS5*

VSS

DQ44

DQ45

DQ39

DQ38

VSS

VSS

DM4

VSS

DQ37

DQ36

VREFCA

VDD

ODT1

NC

S0*

ODT0

BA1

RAS*

VDD

CK1*

VDD

VDD

A0

CK1

A2

VDD

A4

VDD

VDD

A14

A15

CKE1

VDD

VSS

VDDSPD

KEY

(SYMBOL 2 OF 2)

BI

BIBI

BI

IN

BI

BI

BI

BI

BI

BI

IN

BI

IN

BI

BI

BI

IN

BI

BI

BI

BI

BI

BI

BI

BI

DQ16

DM3

DQ26

DQ27

DQ4

DQ31

DQ30

DQS3

DQS3*

DQ29

DQ28

DQ23

DQ22

DM2

DQ21

DQ20

DQ15

DQ14

RESET*

DM1

DQ13

DQ12

DQ7

DQ6

DQS0

DQS0*

DQ5

DQ24

DQ25

DQ19

DQ18

DQS2

DQS2*

DQ17

DQ11

DQ10

DQS1

DQS1*

DQ8

DQ9

DM0

DQ0

DQ1

VREFDQ

DQ3

DQ2

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

KEY

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

(SYMBOL 1 OF 2)

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

BI

BI

IN

BI

BI

IN

BI

BI

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

BI

BI

BI

BI

BI

BI

BI

BI

OUT

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

BI

BI

BI

BI

BI

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

BI

BI

BI

BI

NC

NC

NC

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

516-0201

516-0201


- =PP1V5_S3_MEM_A

- =I2C_SODIMMA_SCL

- =PP0V75_S0_MEM_VTT_A


- =I2C_SODIMMA_SDA

(NONE)

"Factory" (top) slot

DDR3 PLANE STITCHING CAPS (SPACE EVENLY ACROSS PLANE SPLIT)


- =PPSPD_S0_MEM_A (2.5 - 3.3V)

- =PP1V5_S0_MEM_A

SPD ADDR=0xA0(WR)/0xA1(RD)

Page Notes

MEM_A_DQ<43>

MEM_A_DQS_P<5>

MEM_A_DQS_N<5>

=PP1V5_S3_MEM_A

MEM_A_A<6>

MEM_A_A<7>

MEM_A_A<11>

MEM_A_A<5>

MEM_A_DQ<32>

MEM_A_A<10>

MEM_A_SA<1>

=PP0V75_S0_MEM_VTT_A

MEM_A_DQS_N<4>

MEM_A_DQS_P<4>

MEM_A_DQ<35>

MEM_A_CLK_N<0>

MEM_A_SA<0>

MEM_A_DQ<58>

MEM_A_DQ<59>

MEM_A_DM<7>

MEM_A_DQ<60>

MEM_A_DQ<61>

MEM_A_DQ<55>

MEM_A_DQ<54>

MEM_A_DQS_N<6>

MEM_A_DQS_P<6>

MEM_A_DQ<51>

MEM_A_DQ<52>

MEM_A_DQ<42>

MEM_A_DM<5>

MEM_A_DQ<45>

=I2C_SODIMMA_SDA

=I2C_SODIMMA_SCL

MEM_EVENT_L

MEM_A_DQ<62>

MEM_A_DQ<63>

MEM_A_DQS_N<7>

MEM_A_DQS_P<7>

MEM_A_DQ<57>

MEM_A_DQ<56>

MEM_A_DQ<49>

MEM_A_DQ<50>

MEM_A_DM<6>

MEM_A_DQ<53>

MEM_A_DQ<48>

MEM_A_DQ<46>

MEM_A_DQ<41>

MEM_A_DQ<44>

MEM_A_DQ<34>

MEM_A_DQ<33>

MEM_A_CS_L<1>

MEM_A_A<13>

MEM_A_CAS_L

MEM_A_WE_L

MEM_A_BA<0>

MEM_A_CLK_P<0>

MEM_A_A<1>

MEM_A_A<3>

MEM_A_A<8>

MEM_A_A<9>

MEM_A_A<12>

MEM_A_BA<2>

MEM_A_CKE<0>

MEM_A_DQ<47>

MEM_A_DQ<40>

MEM_A_DQ<39>

MEM_A_DQ<38>

MEM_A_DM<4>

MEM_A_DQ<37>

MEM_A_DQ<36>

PP0V75_S3_MEM_VREFCA_A

MEM_A_ODT<1>

MEM_A_CS_L<0>

MEM_A_ODT<0>

MEM_A_BA<1>

MEM_A_RAS_L

MEM_A_CLK_N<1>

MEM_A_A<0>

MEM_A_CLK_P<1>

MEM_A_A<2>

MEM_A_A<4>

MEM_A_A<14>

MEM_A_A<15>

MEM_A_CKE<1>

=PPSPD_S0_MEM_A

MEM_A_DQ<16>

MEM_A_DM<3>

MEM_A_DQ<27>

MEM_A_DQ<25>

MEM_A_DQ<4>

MEM_A_DQ<31>

MEM_A_DQ<26>

MEM_A_DQS_P<3>

MEM_A_DQS_N<3>

MEM_A_DQ<28>

MEM_A_DQ<29>

MEM_A_DQ<22>

MEM_A_DQ<17>

MEM_A_DM<2>

MEM_A_DQ<20>

MEM_A_DQ<21>

MEM_A_DQ<10>

MEM_A_DQ<15>

MEM_RESET_L

MEM_A_DM<1>

MEM_A_DQ<12>

MEM_A_DQ<8>

MEM_A_DQ<7>

MEM_A_DQ<6>

MEM_A_DQS_P<0>

MEM_A_DQS_N<0>

MEM_A_DQ<5>

MEM_A_DQ<24>

MEM_A_DQ<30>

MEM_A_DQ<19>

MEM_A_DQ<23>

MEM_A_DQS_P<2>

MEM_A_DQS_N<2>

MEM_A_DQ<18>

MEM_A_DQ<14>

MEM_A_DQ<11>

MEM_A_DQS_P<1>

MEM_A_DQS_N<1>

MEM_A_DQ<9>

MEM_A_DQ<13>

MEM_A_DM<0>

MEM_A_DQ<0>

MEM_A_DQ<1>

PP0V75_S3_MEM_VREFDQ_A

MEM_A_DQ<2>

MEM_A_DQ<3>

=PP1V5_S0_MEM_A

SYNC_MASTER=BEN_K20 SYNC_DATE=06/10/2008

DDR3 SO-DIMM Connector A

051-8071 B

9827

2

1 C3123

10V

0.1UF20%

402CERM2

1 C3122

10V

0.1UF20%

402CERM2

1 C3121

10V

0.1UF20%

402CERM2

1 C3120

10V20%

402CERM

0.1UF

2

1 C3119

10V

0.1UF20%

402CERM2

1 C3118

10V

0.1UF20%

402CERM2

1 C3117

10V

0.1UF20%

402CERM2

1 C3116

10V

0.1UF20%

402CERM2

1 C31150.1UF20%

402CERM10V

2

1 C3114

10V

0.1UF

402CERM

20%

2

1 C3113

CERM402

0.1UF

10V20%

2

1 C3112

CERM

0.1UF20%10V

402

2

1 C31110.1UF

402CERM10V20%

2

1 C3110

CERM402

10V20%0.1UF

2

1 C3101

6.3V

10UF

X5R603

20%

2

1 C310010UF20%

X5R6.3V

603

2

1 C31402.2UF20%

CERM

402-LF

6.3V

2

1

R314010K

MF-LF

1/16W

5%

4022

1

R314110K5%

402

1/16W

MF-LF

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

44

44

21 28 41

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

2

1 C3135

402-LF

20%

6.3V

2.2UF

CERM2

1 C3136

10V

20%

402

CERM

0.1UF

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

9

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

2625

2019

1413

9

7271

6665

61

60

8

55

54

49

48

4443

3837

3231

3

21

30

62

64

45

47

27

29

10

12

23

21

18

16

6

4

70

68

17

58

56

69

67

59

57

52

50

42

40

15

53

51

41

39

36

34

24

22

35

33

7

5

63

46

28

11 J3100

CRITICAL

DDR3-SODIMM-DUAL-M97-3

F-RT-THB

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

28 29

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

2

1 C3130

6.3V

CERM

402-LF

20%

2.2UF

2

1 C31310.1UF

CERM

402

20%

10V

15 89

15 89

113

204203

196195

190189

185

184

179

178

173

172

168167

162161

156155

151

150

145

144

139

138

134133

128127

126

199

10099

9493

8887

8281

124123

118117

112111

106105

7675

125

200

202201

197

121

114

110

120

116

122

77

198

186

188

169

171

152

154

135

137

194

192

182

180

193

191

183

181

176

174

166

164

177

175

165

163

160

158

148

146

159

157

149

147

142

140

132

130

143

141

131

129

187

170

153

136

7473

104

102

103

101

115

79

108

109

85

89

86

90

91 92

95 96

78

80

119

83 84

107

97 98

J3100

DDR3-SODIMM-DUAL-M97-3

F-RT-THB

8

8

26

8

26

8

IN

BI

BI

BI

OUT

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

BI

BI

BI

BI

BI

IN

BI

BI

BI

BI

BI

BI

BI

BI

IN

BI

BI

BI

BI

BI

BI

NC

IN

VDD

A1

A3

VDD

A5

A8

VDD

A9

VDD

A12/BC*

VSS

DQ42

DQ43

DQ48

DQ49

VSS

VSS

DQ41

DQS4*

DM5

VDD

CKE1

A15

A14

VDD

A11

A7

A6

VDD

A4

A2

CK1

A0

VDD

VDD

CK1*

VDD

RAS*

BA1

ODT0

S0*

NC

ODT1

VDD

VREFCA

VDD

DQ36

DQ37

VSS

DM4

VSS

VSS

DQ38

DQ39

DQ45

DQ44

VSS

DQS5*

VSS

CKE0

VDD

NC

BA2

CK0

VDD

BA0

WE*

A13

S1*

VDD

VDD

TEST

DQ33

DQ32

VSS

DQ34

DQ40

VSS

DQ46

VSS

DQS5

VSS

DQ47

DQ52

VSS

DQ53

VSS

DM6

DQ54

DQ55

VSS

VSS

DQ61

DQ60

DQS7

DQS7*

DQ63

VSS

DQ62

EVENT*

VSS

VTT

SCL

SDA

VSS

DQS6

DQS6*

VSS

DQ51

DQ50

A10/AP

VDD

CK0*

DQ35

VSS

DQS4

VSS

CAS*

VDD

DM7

VSS

DQ56

MTG PINMTG PIN

MTG PIN MTG PIN

MTG PIN MTG PIN

MTG PIN

VSS

DQ57

VTT

SA1

SA0

DQ58

VSS

DQ59

VSS

VDDSPD

MTG PINMTG PINS

KEY

(2 OF 2)

BI

BI

BI

BI

BI

BI

IN

BI

IN

BI

BI

BI

BI

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

DQ2

DQ3

VREFDQ

DQ1

DQ0

DM0

DQ9

DQ8

DQS1*

DQS1

DQ10

DQ11

DQ17

DQS2*

DQS2

DQ18

DQ19

DQ25

DQ24

DQ5

DQS0*

DQS0

DQ6

DQ7

DQ12

DQ13

DM1

RESET*

DQ14

DQ15

DQ20

DQ21

DM2

DQ22

DQ23

DQ28

DQ29

DQS3*

DQS3

DQ30

DQ31

DQ4

DQ27

DQ26

DM3

DQ16

(1 OF 2)

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

KEY

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSIN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

BI

BI

IN

BI

BI

IN

BI

BI

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

BI

BI

BI

BI

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

"Expansion" (bottom) slot

516s0706

516s0706

SPD ADDR=0xA2(WR)/0xA3(RD)

Page Notes


- =I2C_SODIMMB_SCL

- =I2C_SODIMMB_SDA

- =PPSPD_S0_MEM_B (2.5 - 3.3V)

DDR3 PLANE STITCHING CAPS (SPACE EVENLY ACROSS PLANE SPLIT)



(NONE)

- =PP0V75_S0_MEM_VTT_B

- =PP1V5_S3_MEM_B

- =PP1V5_S0_MEM_B

=PPSPD_S0_MEM_B

MEM_B_SA<0>

MEM_B_A<10>

=PP1V5_S3_MEM_B

=PP0V75_S0_MEM_VTT_B

=PP1V5_S0_MEM_B

MEM_B_DQ<59>

MEM_B_DQ<63>

MEM_B_SA<1>

MEM_B_DQ<57>

MEM_B_DQ<56>

MEM_B_DM<7>

MEM_B_CAS_L

MEM_B_DQS_P<4>

MEM_B_DQ<35>

MEM_B_CLK_N<0>

MEM_B_DQ<52>

MEM_B_DQ<51>

MEM_B_DQS_N<6>

MEM_B_DQS_P<6>

=I2C_SODIMMB_SDA

=I2C_SODIMMB_SCL

MEM_EVENT_L

MEM_B_DQ<58>

MEM_B_DQ<62>

MEM_B_DQS_N<7>

MEM_B_DQS_P<7>

MEM_B_DQ<60>

MEM_B_DQ<61>

MEM_B_DQ<50>

MEM_B_DQ<53>

MEM_B_DM<6>

MEM_B_DQ<54>

MEM_B_DQ<48>

MEM_B_DQ<46>

MEM_B_DQS_P<5>

MEM_B_DQ<47>

MEM_B_DQ<41>

MEM_B_DQ<34>

MEM_B_DQ<32>

MEM_B_DQ<37>

MEM_B_CS_L<1>

MEM_B_A<13>

MEM_B_WE_L

MEM_B_BA<0>

MEM_B_CLK_P<0>

MEM_B_DQS_N<5>

MEM_B_DQ<44>

MEM_B_DQ<45>

MEM_B_DQ<39>

MEM_B_DQ<38>

MEM_B_DM<4>

MEM_B_DQ<36>

MEM_B_DQ<33>

MEM_B_ODT<1>

MEM_B_CS_L<0>

MEM_B_ODT<0>

MEM_B_BA<1>

MEM_B_CLK_N<1>

MEM_B_A<0>

MEM_B_CLK_P<1>

MEM_B_A<2>

MEM_B_A<4>

MEM_B_A<6>

MEM_B_A<7>

MEM_B_A<11>

MEM_B_A<14>

MEM_B_A<15>

MEM_B_CKE<1>

MEM_B_DM<5>

MEM_B_DQS_N<4>

MEM_B_DQ<40>

MEM_B_DQ<49>

MEM_B_DQ<55>

MEM_B_DQ<42>

MEM_B_DQ<43>

MEM_B_A<12>

MEM_B_A<8>

MEM_B_A<5>

MEM_B_A<3>

MEM_B_A<1>

MEM_B_DQ<9>

MEM_B_DM<2>

MEM_B_DQ<18>

MEM_B_DQ<22>

MEM_B_DQ<4>

MEM_B_DQ<23>

MEM_B_DQ<19>

MEM_B_DQS_P<2>

MEM_B_DQS_N<2>

MEM_B_DQ<16>

MEM_B_DQ<20>

MEM_B_DQ<11>

MEM_B_DQ<14>

MEM_B_DM<1>

MEM_B_DQ<12>

MEM_B_DQ<13>

MEM_B_DQ<27>

MEM_B_DQ<26>

MEM_RESET_L

MEM_B_DM<3>

MEM_B_DQ<25>

MEM_B_DQ<29>

MEM_B_DQ<7>

MEM_B_DQ<6>

MEM_B_DQS_P<0>

MEM_B_DQS_N<0>

MEM_B_DQ<5>

MEM_B_DQ<21>

MEM_B_DQ<17>

MEM_B_DQ<10>

MEM_B_DQ<15>

MEM_B_DQS_P<1>

MEM_B_DQS_N<1>

MEM_B_DQ<8>

MEM_B_DQ<30>

MEM_B_DQ<31>

MEM_B_DQS_P<3>

MEM_B_DQS_N<3>

MEM_B_DQ<28>

MEM_B_DQ<24>

MEM_B_DM<0>

MEM_B_DQ<0>

MEM_B_DQ<1>

PP0V75_S3_MEM_VREFDQ_B

MEM_B_DQ<3>

MEM_B_DQ<2>

MEM_B_RAS_L

MEM_B_CKE<0>

PP0V75_S3_MEM_VREFCA_B

MEM_B_A<9>

MEM_B_BA<2>

SYNC_MASTER=BEN_K20

28 98

B051-8071


DDR3 SO-DIMM Connector B

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

2

1 C32352.2UF

6.3V

CERM

20%

402-LF

2

1 C3236

CERM

0.1UF20%

402

10V

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

9

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

2625

2019

1413

9

7271

6665

61

60

8

55

54

49

48

4443

3837

3231

3

21

30

62

64

45

47

27

29

10

12

23

21

18

16

6

4

70

68

17

58

56

69

67

59

57

52

50

42

40

15

53

51

41

39

36

34

24

22

35

33

7

5

63

46

28

11 J3200F-RT-BGA3

CRITICAL

DDR3-SODIMM

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

27 29

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

113

204203

212211

210209

208207

206205

196195

190189

185

184

179

178

173

172

168167

162161

156155

151

150

145

144

139

138

134133

128127

126

199

10099

9493

8887

8281

124123

118117

112111

106105

7675

125

200

202201

197

121

114

110

120

116

122

77

198

186

188

169

171

152

154

135

137

194

192

182

180

193

191

183

181

176

174

166

164

177

175

165

163

160

158

148

146

159

157

149

147

142

140

132

130

143

141

131

129

187

170

153

136

7473

104

102

103

101

115

79

108

109

85

89

86

90

91 92

95 96

78

80

119

83 84

107

97 98

J3200

DDR3-SODIMM

F-RT-BGA3

15 89

15 89

2

1 C3223

CERM402

20%0.1UF

10V2

1 C3222

CERM402

20%0.1UF

10V2

1 C3221

CERM402

20%0.1UF

10V2

1 C32200.1UF

CERM402

20%10V

2

1 C3219

CERM402

20%0.1UF

10V2

1 C3218

CERM402

20%0.1UF

10V2

1 C3217

CERM402

20%0.1UF

10V2

1 C3216

CERM402

20%0.1UF

10V2

1 C3215

10VCERM402

20%0.1UF

2

1 C3214

20%

CERM402

0.1UF

10V

15 89

2

1 C3213

20%10V

0.1UF

402CERM2

1 C3212

402

10V20%0.1UF

CERM2

1 C3211

20%10VCERM402

0.1UF

2

1 C32100.1UF20%10V

402CERM

2

1 C3201

20%

603X5R

10UF

6.3V2

1 C3200

603

6.3VX5R

20%10UF

2

1 C3240

20%

CERM

402-LF

6.3V

2.2UF

2

1

R324010K5%

1/16W

MF-LF

402

2

1

R324110K

1/16W

MF-LF

5%

402

2

1 C3230

CERM

402-LF

6.3V

20%

2.2UF

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

15 89

2

1 C3231

10V

20%

402

CERM

0.1UF

44

44

21 27 41

15 89

15 89

15 89

15 89

8

8

8

8

26

26

IN

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

3.3V input must be stable before

MCP79 cannot control this signal directly since it must be high in sleep and MCP MEM rails are not powered in sleep.

DDR3 RESET Support

before 1.5V starts to rise to

avoid glitch on MEM_RESET_L.

MCP_MEM_RESET_L

=PP1V5_S3_MEMRESET

MEM_RESET

MEM_RESET_RC_L

MEM_RESET_L

=PP3V3_S5_MEMRESET

DDR3 SupportSYNC_DATE=04/01/2008SYNC_MASTER=M98_MLB

29 98

B051-8071

2

1R3301

5%20K

MEMRESET_HW

1/16WMF-LF402

27 28

1

6

2Q3305

MEMRESET_HW

SOT-363-LFMMDT3904-X-G

2

1R330520K

402

1/16W5%

MEMRESET_HW

MF-LF

4

3

5Q3305MMDT3904-X-G

MEMRESET_HW

SOT-363-LF

2

1R3309MEMRESET_MCP

MF-LF

5%1/16W

0

402

16

2

1R3300

5%10K

MEMRESET_HW

1/16WMF-LF402

2

1 C3300

CERM

20%0.1UF

MEMRESET_HW

402

10V

2

1R3310

1/16W5%

MF-LF

1K

402

8

8

OUT

S

G

D

IN

IN

BI

NC

IN

IN

IN

IN

OUT

OUT

BI

BI

OUT

OUT

Y

B

A

IN

NC

NC

SYM_VER-1

SYM_VER-1

SYM_VER-1

D

S G

D

S G

OUT

OUT

IN

D

GS

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

AIRPORT

206 mA nominal max

1000 mA peak 750 mA nominal max

BLUETOOTH

275 mA peak

CHANNEL

518S0610

ALSCAMERA

RDS(ON)

MOSFET

LOADING 0.8 A (EDP)

26 mOhm @4.5V

P-TYPE

FDC606P

5V S3 WLAN FET

WLAN_SMIT_RC_FET

PM_WLAN_EN_L

PP5V_WLAN_F

USB_CAMERA_CONN_N

I2C_ALS_SDA

PP5V_WLAN

VOLTAGE=5VMIN_NECK_WIDTH=0.5 mmMIN_LINE_WIDTH=1 mm

PCIE_MINI_D2R_N

WLAN_SMIT_RC

=PP3V3_S3_WLAN

CONN_USB2_BT_N

USB_BT_N

USB_BT_P

PP3V3_S3_BT_FMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=3.3V

PCIE_CLK100M_MINI_CONN_P

AP_PWR_EN

PCIE_MINI_R2D_C_N

VOLTAGE=5V


PP5V_S3_BTCAMERA_F

USB_CAMERA_CONN_P

I2C_ALS_SCL

PCIE_MINI_R2D_N

CONN_USB2_BT_P

MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=3.3V

=PP3V3_S3_BT

VOLTAGE=5VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm=PP5V_S3_BTCAMERA

USB_CAMERA_P

WLAN_SMIT_BUF

MINI_RESET_L

PCIE_CLK100M_MINI_P

PCIE_CLK100M_MINI_N

MINI_CLKREQ_L

PCIE_MINI_R2D_C_P

USB_CAMERA_N

PCIE_MINI_PRSNT_L

MINI_RESET_CONN_L

PCIE_CLK100M_MINI_CONN_N

PCIE_MINI_R2D_P

PCIE_MINI_D2R_P

MINI_CLKREQ_Q_LPCIE_WAKE_L

VOLTAGE=5VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm

=PP5V_S3_WLANMIN_LINE_WIDTH=1 mmMIN_NECK_WIDTH=0.5 mmVOLTAGE=5V

PP5V_WLAN_F PP5V_WLAN_RMIN_LINE_WIDTH=1 mmMIN_NECK_WIDTH=0.5 mmVOLTAGE=5V

P5VWLAN_SS

Right Clutch Connector

30 98

B051-8071


2

1C34220.1uF

10V20%

CERM402

PLACEMENT_NOTE=Place close to J3401.

2

1R345110K5%

402MF-LF1/16W

21

R3450100K

MF-LF402

5%1/16W

2

1C3451

10%

402X5R16V

0.033UF

21

C3450

402

10%16VX5R

0.1UF

21

R3455

402

1

1/16W5%

MF-LF

2 1

3

Q3402SSM3K15FVSOD-VESM-HF

21

R3404

MF-LF1/10W

0

5%

603

2

1C34620.1uF

10V20%

402CERM

2 1

L3406

FERR-120-OHM-1.5A0402-LF

21 33

17

17

45

3 Q3401

SOT563SSM6N15FEAPE

12

6 Q3401SSM6N15FEAPESOT563

4 3

21

L3403


90-OHMDLP0NS

4 3

21

L3402DLP0NS90-OHM


4 3

21

L340190-OHM-100MA

DLP11S


2

1C3453

10%6.3V

1UF

CERM402 2

1R3454

402MF-LF

5%1/16W

62K

2

1R3453

5%33K

1/16WMF-LF402

2

1 C3420

20%

X5R

10UF

805

10V

PLACEMENT_NOTE=Place close to Q3450.

4

5

13

2

U340274LVC1G17DRL

SOT-553

25

4

5

3

1

2

U3401

TC7SZ08AFEAPESOT665

7 17 90

7 17 90

20 91

20 91

2

1C3421

CERM10V20%

402

PLACEMENT_NOTE=Place close to Q3450.

0.1uF

20 91

20 91

17 90

17 90

21C3431


10% 16V X5R

0.1uF402

17 90

17 90

21

C3430402X5R10%

0.1uF16V


2

1C3452

CERM402

20%10V

0.1uF

2 1

L3404FERR-120-OHM-1.5A

0402-LF

44

44

33

2 1

L3405

0402-LFFERR-120-OHM-1.5A

9

8

7

6

5

4

32

31

30

3

29

28

27

26

25

24

23

22

21

20

2

19

18

17

16

15

14

13

12

11

10

1

J3401

CRITICAL

F-RT-SM

20347-325E-12

4

3

65

21

Q3450FDC606P_G

SOT-6

7 17 31

30

7 96

7

8

7 96

7 96

7

7 96

7 90

7 96

8

8

7

7 96

7 90

7

8 30

NCNC

NC

NCNC

OUT

IN

IN

IN

SYM_VER-1

SYM_VER-1

BI

BI

IN

IN

IN

IN

OUTOUT

OUT

NCNC

BIBI

THRML_PAD

RCLKEN

GNDNC4

NC3

NC2

NC1

VOUT1P5

CPPE*

PERST*

NC0

OC*

SYSRST*

STBY*

AUXOUT

VOUT3P3

VIN1P5

VIN3P3

CPUSB*

SHDN*

AUXIN

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

518S0647

INPUT DECOUPLING

OUTPUT DECOUPLING

EXPRESSCARD/34 FLEX CONNECTOR

PP3V3_S0_EXCARD_SWITCH

MIN_NECK_WIDTH=0.2mm

VOLTAGE=3.3VMIN_LINE_WIDTH=.6mm


MIN_LINE_WIDTH=.3mm

VOLTAGE=3.3V


EXCARD_OC_L

EXCARD_CPPE_L


MIN_LINE_WIDTH=.6mm

VOLTAGE=1.5VPP1V5_S0_EXCARD_SWITCH

EXCARD_RCLKEN

USB2_EXCARD_CONN_N

EXCARD_CPUSB_L


PCIE_WAKE_L


=SMBUS_EXCARD_SCL

USB2_EXCARD_CONN_P

PLT_RESET_SWITCH_LPP3V3_S0_EXCARD_SWITCH

PCIE_CLK100M_EXCARD_CONN_N

EXCARD_CLKREQ_CONN_L


=SMBUS_EXCARD_SDA

PCIE_EXCARD_R2D_PPCIE_EXCARD_R2D_N

EXCARD_CPPE_L

PCIE_CLK100M_EXCARD_CONN_P

PCIE_EXCARD_D2R_PPCIE_EXCARD_D2R_N

PCIE_CLK100M_EXCARD_N PCIE_CLK100M_EXCARD_CONN_N

PCIE_CLK100M_EXCARD_CONN_P

PCIE_EXCARD_R2D_N

PCIE_EXCARD_R2D_C_P

=PP3V3_S3_EXCARD

=PP1V5_S0_EXCARD

EXCARD_CLKREQ_CONN

EXCARD_RCLKEN

EXCARD_CLKREQ_LSMC_EXCARD_CP

EXCARD_CPPE_L

EXCARD_CPUSB_L

EXCARD_CPPE_L PCIE_EXCARD_PRSNT_L

EXCARD_SHDN_L_R

=PP3V3_S3_EXCARD

EXCARD_RESET_L

TP_EXCARD_STBY_L

EXCARD_CPUSB_L

=PP3V3_S0_EXCARD

PLT_RESET_SWITCH_L

EXCARD_CLKREQ_CONN_L


PCIE_CLK100M_EXCARD_P

PCIE_EXCARD_R2D_C_N

PCIE_EXCARD_R2D_P

USB2_EXCARD_CONN_PUSB_EXCARD_P

USB_EXCARD_N USB2_EXCARD_CONN_N

SMC_EXCARD_PWR_EN

=PP1V5_S0_EXCARD

PP1V5_S0_EXCARD_R

PP3V3_S0_EXCARD_R

PP3V3_S3_EXCARD_R

=PP3V3_S0_EXCARD

=PP3V3_S3_EXCARD

B

31

SYNC_MASTER=BEN_K20 SYNC_DATE=10/15/2008

ExpressCard Connector

98

051-8071

5

4

1

2

3

U3560

SC70-574HC1G00GWDG

41 42

2

1 C350410uF

X5R603

20%6.3V

C2

A2

C1

B1

U3561

BGA

SN74LVC1G04YZPR

2

1 C35010.1uF

16VX5R

10%

402

21R3500402

0MF-LF

5%1/16W

2

1C3560

10V20%

402CERM

0.1uF

2

1R3561

1/16W1%

MF-LF

100K

402

2

1C3550

10V20%

402

0.1uF

CERM

2

1 C3530

10V20%

402CERM

0.1uF

2

1 C3531

6.3V20%

603

10uF

X5R

2

1 C3534

10V20%

402CERM

0.1uF

2

1 C3535

6.3V20%

603X5R

10uF

3

11

2

12

21

6

1

20

18

8

19

16

14

13

5

4

7

9

10

1517

U3500

QFNTPS2231

CRITICAL

21

R3502OMIT

402

NONENONE

SHORT

NONE

21

R3503OMIT

NONE

402

NONE

SHORT

NONE

21

R3504OMIT

NONE

SHORT

NONE

402NONE

98

76

54

3

29

28

2726

2524

2322

2120

2

1918

1716

1514

1312

1110

1

J3500F-RT-SM

502250-8627

CRITICAL

21R35011/16W402MF-LF

0 5%

5

4

1

2

3

U3551

SC70-574HC1G00GWDG

44 44

7 17 30

7 17 90

2

1 C3500

CERM402

20%10V

0.1uF

7 17 90

17 90

17 90

17 90

17 90

20 91

20 91

21

C357010%

PLACEMENT_NOTE=Place close to J3500

X5R 40216V

0.1uF

4 3

21

L350390-OHM-100MA

DLP11S


21C3571


0.1uF10% 16V X5R 402

2

1 C350310uF

6.3VX5R603

20%

4 3

21

L3502


90-OHMDLP0NS

2

1 C35020.1uF

X5R402

10%16V

20 42

25

41

17

2

1 C3505

X5R603

20%10uF

6.3V

7 31

7 31

7 31

7 31 31

7 31 96

7 31

7 31

7 31

7 31 96

7 31 7 31

7 31 96

7 31

7 31

7 31 90 7 31 90

7 31

7 31 96 7 31 96

7 31 96

7 31 90

8 31

8 31

31

7 31

7 31

7 31 17

8 31

7 31

8 31

7 31

7 31

7 31

7 31 90

7 31 96

7 31 96

8 31

8 31

8 31

TXD[2]

TXCTL

AVDD33

FB12

DVDD12

AVDD12

RXC

MDIO

GND

TXD[3]

RXD[0]

MDI+[0]

CKXTAL1

CKXTAL2

CLK125

RSET

PHYRSTB*

MDC

RXCTL

MDI-[2]

MDI+[2]

MDI+[3]

MDI+[1]

MDI-[1]

ENSWREG

TXD[1]

TXD[0]

RXD[3]/AN1

RXD[1]/TXDLY

TXC

MDI-[3]

LED1/PHYAD1

LED2/RXDLY

LED0/PHYAD0

RXD[2]/AN0

MDI-[0]

REGOUT

VDDREG

DVDD33

REFERENCE

RGMII/MII

MEDIA DEPENDENT

MANAGEMENT

CLOCK

RESET

LED

IN

IN

IN

IN

IN

IN

BI

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

WF: Marvell numbers, update for Realtek

PLACE R3796 CLOSE TO U1400, PIN D24

Alias to =PP3V3_ENET_PHY for internal switcher.

(19mA typ - Energy Detect)

(43mA typ - 1000base-T)

If internal switcher is used, must place inductor within 5mm

of U3700, and 1x 22uF & 1x 0.1uF caps within 5mm of inductor.

NOTE: VDDREG rise time must be >1ms to avoid damage to switcher.

1x 0.1uF caps within 5mm of U3700 pins 44 & 45.

If internal switcher is used, must place 1x 22uF &

Configuration Settings:

PHYAD = 01 (PHY Address 00001)

AN[1:0] = 11 (Full auto-negotiation)

TXDLY = 0 (No TXCLK Delay)

RXDLY = 0 (RXCLK transitions with data)

WF: Marvell numbers, update for Realtek

(221mA typ - 1000base-T)

( 7mA typ - Energy Detect)

If internal switcher is not used, VDDREG and REGOUT can float.

Alias to GND for external 1.05V supply.

per RealTek request.

C3790 reserved for EMI

C3790 should be placed close to U3700.19

ENET_CLK125M_TXCLK_R

ENET_RESET_L

TP_RTL8211_CKXTAL2

ENET_MDIO

ENET_MDC

ENET_TX_CTRL

ENET_TXD<3>

=PP3V3_ENET_PHY_VDDREG

ENET_RXD_R<2>

ENET_RXD_R<0>

ENET_CLK125M_TXCLK

ENET_RX_CTRL

ENET_RXD<3>

ENET_RXD<2>

ENET_RXD<1>

ENET_RXD<0>

ENET_CLK125M_RXCLK

MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.6 MMPP1V05_ENET_PHYAVDD

VOLTAGE=1.05V

=PP1V05_ENET_PHY

ENET_RXD_R<3>

MIN_NECK_WIDTH=0.2 MMVOLTAGE=3.3V

MIN_LINE_WIDTH=0.6 MMPP3V3_ENET_PHYAVDD

ENET_MDI_P<1>

ENET_MDI_N<2>

ENET_MDI_P<0>

ENET_MDI_N<0>

=RTL8211_REGOUT

RTL8211_CLK25M_CKXTAL1

ENET_TXD<2>

=RTL8211_ENSWREG

=PP3V3_ENET_PHY

ENET_RXD_R<1>

RTL8211_RXDLY

RTL8211_PHYAD1

ENET_MDI_N<3>

ENET_MDI_P<3>

ENET_MDI_P<2>

ENET_MDI_N<1>

ENET_RXCTL_R

RTL8211_PHYAD0

ENET_CLK125M_RXCLK_R

ENET_TXD<0>

ENET_TXD<1>

RTL8211_PHYRST_L

RTL8211_CLK125

RTL8211_RSET

051-8071

9832

B

SYNC_MASTER=SUMA_K20

Ethernet PHY (RTL8211CL)SYNC_DATE=07/22/2008

2

1R3731

402

5%22

1/16WMF-LF

2

1 C37250.1UF

402

NO STUFF

10VCERM

20%

21

R37240

5%1/16W402MF-LF

2

1R3725

5%

402

1/16W

4.7K

MF-LF

NO STUFF

18 92 21

R379622

5%1/16W

MF-LF402

2

1C3790NO STUFF

10PF

CERM402

50V5%

2

1C3714

16V

0.1UF

X5R402

10%

2

1C3710

10%

402X5R16V

0.1UF

2

1C3711

402

10%

X5R16V

0.1UF

2

1

L3715CRITICAL


2

1C3716

10%

402X5R

0.1UF

16V2

1C3715

10%

402X5R16V

0.1UF

2

1R3751

402

1/16W5%4.7K

MF-LF

2

1R3750

402MF-LF

4.7K5%

1/16W

2

1R3757

1/16W5%

MF-LF

4.7K

402

2

1R3752

1/16W

4.7K5%

MF-LF402

9

2

1R3756

1/16W5%

MF-LF

4.7K

4022

1R3755

1/16W5%

MF-LF

4.7K

402

18 92

18 92

18 92

18 92

18 92

18 92

21R3795402

22MF-LF1/16W5%

21R37945% 1/16W MF-LF

22402

21R37935% 1/16W MF-LF

22402

21R3792 225% 1/16W MF-LF 402

21R3791 225% 1/16W MF-LF 402

21R3790402

221/16W5% MF-LF

34 92

34 92

34 92

34 92

34 92

34 92

34 92

34 92

33 92

18 92

18 92

18 92

18 92

18 92

18 92

18 92

18 92

2

1 C3702

10%

402X5R16V

0.1UF

2

1 C3701

10%

402X5R

0.1UF

16V2

1 C3700

10%

402X5R16V

0.1UF

2

1 C3706

10%

402X5R16V

0.1UF

45

44

26

25

24

23

27

22

18

17

16

14

13

19

46

48

29

31

11

12

8

9

4

5

1

2

30

38

35

34

47

33

207

3

39

37

21

15

36

28

32

43

42

41

6 40

10

U3700

OMIT

CRITICAL

RTL8211CLGRTQFP

2

1 C37050.1UF

16VX5R402

10%

2

1

L3705


CRITICAL

2

1R3720

5%1/16WMF-LF

10K

402

2

1R37302.49K

1%

402

1/16WMF-LF

9

92

92

8

92

9

8

92

92

G

DS

IN OUT

OUT

D

SG

IN

D

S G

IN

IN

D

SG

D

SG

D

S

G

D

SG

IN

D

SG

IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

RTL8211 25MHz ClockNOTE: MCP79 can provide 25MHz clock, but clock runs whenever RMGT rails are powered.

Designs must ensure PHY is powered whenever RMGT rails are, or use separate crystal.

Recommend aliasing PM_SLP_RMGT_L and

WLAN Enable Generation

=P3V3ENET_EN. Nets separated on

MOBILE:

ARB for alternate power options.

Rds(on) = 90mOhm max

I(max) = 1.7A (85C)

@ 2.5V Vgs:

1.8V Vgs

Recommend aliasing PM_SLP_RMGT_L and

ARB for alternate power options.

Non-ARB:

Pull-up is with power FET.

"WLAN" = ("S3" && "AP_PWR_EN" && ("AC" || "S0"))

3.3V ENET FET

1.05V ENET FET

NOTE: S3 term is guaranteed by S3 pull-up on open-drain AP_PWR_EN signal.

=P1V05ENET_EN. Nets separated on


=PP3V3_S5_P3V3ENETFET =PP3V3_ENET_FET

P3V3ENET_SS

=P3V3ENET_EN

RTL8211_CLK25M_CKXTAL1MCP_CLK25M_BUF0_R

P3V3ENET_EN_L

=PP1V05_ENET_P1V05ENETFET

=P1V05ENET_EN

AC_OR_S0_L

PM_WLAN_EN_L

PM_SLP_S3_L

SMC_ADAPTER_EN

AP_PWR_EN

=PP1V05_ENET_FET

P1V05ENET_EN_L_RC

P1V05ENET_EN_L

P1V05ENET_SS

SYNC_DATE=07/15/2008SYNC_MASTER=SUMA_K20

33 98

B051-8071

Ethernet & AirPort Support

21

R3840100K

MF-LF1/16W5%

402

21

R384110K

1%

MF-LF402

1/16W

9

45

3Q3841

SOT563SSM6N15FEAPE

9

45

3Q3801SSM6N15FEAPE

SOT563

2

1R3800

5%10K

1/16W

402MF-LF

2

1

3

Q3840

CRITICAL

SOT23

SI2312BDS

2

1R3842

MF-LF402

1/16W1%

69.8K

12

6Q3841

SOT563SSM6N15FEAPE

12

6Q3805

SOT563SSM6N15FEAPE

7 21 36 41 67 82 84

21 30

12


21 36 41 42

45

3Q3805

SOT563SSM6N15FEAPE

30

2

1C3840

10VCERM

20%0.1UF

402

2

1 C3841

CERM402

10%16V

0.01UF

32 92 21

R3895


1/16W5%

MF-LF

22

402

18 92

21

R3810

402

100K

1/16WMF-LF

5%

2

1 C3811

16VX5R402

10%0.033UF

2 1

C38100.01UF

402

16VCERM

10%

2

1

3

Q3810NTR4101P

CRITICAL

SOT-23-HF

8

8 8

8

8

BI

RX

TX

BIRX

TX

BI

BI

BI

BI

BI

BI


APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D



(NONE)


Page Notes

Place one of 0.1uf cap close to each centertap pin of transformer

sides of the board

(NONE)

Transformers should bemirrored on opposite

(NONE)

ENETCONN_P<2>

ENETCONN_P<3>

ENETCONN_P<1>

ENETCONN_N<2>

ENET_CTAP1

ENET_MDI_N<0>

ENET_MDI_N<1> ENETCONN_N<1>

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mmENET_BOB_SMITH_CAP

ENET_CTAP2

ENET_CTAP3

ENET_MDI_P<0>

ENET_MDI_N<2>

ENET_MDI_P<1>

ENET_MDI_P<2>

ENET_MDI_P<3>

ENET_MDI_N<3>

ENETCONN_P<0>

ENETCONN_N<3>

ENET_CTAP0

ENETCONN_N<0>

ENETCONN_CTAP

B

34

051-8071

98

Ethernet ConnectorSYNC_MASTER=SUMA_K20 SYNC_DATE=07/15/2008

J3900CONN,RJ45,HB,10/100TX514-0636 1 CRITICAL

32 92

32 92

32 92

32 92

32 92

2

1 C3911

PLACEMENT_NOTE=Place on MDI lines so there are no stubs all 8 caps.

10PF

CERM

5%50V

402-1

32 92

2

1 C3920

CERM


10PF5%50V

402-1

2

1 C3921


10PF

CERM

5%50V

402-1

2

1 C3930


10PF

CERM

5%50V

402-1

2

1 C3931


402-1

10PF

CERM

5%50V

2

1 C3940


10PF

CERM

5%50V

402-1

2

1 C3941


10PF

CERM

5%50V

402-1

2

1 C3910

402-1


10PF50V5%

CERM

9

8

7

6

5

4

3

2

12

11

10

1

J3900

OMIT

F-RT-THRJ45-M97-2

CRITICAL

2

1 C3900

16V10%

402X5R

0.1UF

9

8

76

5

4

3

2

12

11

10

1T3901

SM

TLA-6T213HF

CRITICAL

2

1 C3902

16V10%

402X5R

0.1UF

2

1 C3904

16V10%

402X5R

0.1UF

2

1 C39060.1UF10%16V

402X5R

32 92

21

C3908

2KV10%

1206CERM

1000PF

CRITICAL

2

1R3903

1/16W5%

402MF-LF

75

2

1R3902

1/16W5%

402MF-LF

75

2

1R3901

1/16W5%

402MF-LF

75

2

1R3900

1/16W5%

402MF-LF

75

9

8

76

5

4

3

2

12

11

10

1T3900

TLA-6T213HF

SM

CRITICAL

32 92

96

96

96

96

96

96

96

96

DS2

ATBUSH

ATBUSN

VP25

OCR_CTL_V10

VAUX_DETECT

TMS

TCK

REFCLKN

PCIE_TXD0P

TRST*

ATBUSB

TDI

DS1

TPA0N

TPA0P

AVREG

CE

CLKREQN

FW_RESET*

FW620*

JASI_EN

MODE_A

NAND_TREE

OCR_CTL_V12

PCIE_RXD0N

PCIE_RXD0P

PCIE_TXD0N

PERST*

R0

REFCLKP

REGCLT

REXT

SCIFCLK

SCIFDAIN

SCIFDOUT

SCIFMC

SCL

SDA

SE

SM

TDO

TPA1N

TPA2N

TPA2P

TPB0N

TPB0P

TPB1N

TPB1P

TPB2N

TPB2P

TPBIAS0

TPBIAS1

TPBIAS2

TPCPS

VAUX_DISABLE

VBUF

VDDH VP VREG_PWR

WAKE*

XI

XO

DS0

TPA1P

VDD33VDD10

VREG_VSSVSS

SERIAL EEPROM

MISCELLANEOUS

CONTROLLER

POWER MANAGEMENT

TEST CONTROLLER

PCI EXPRESS PHY

CHIP RESET

SCIF

1394 PHY

NCNCNC

NC

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

NCNC

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

NT-15 (IPD)

(IPD) NT-11

(IPU) NT-8

(IPD)

(IPD)

138 mA7 mA I/O

114 mA FireWire PHY

0 mA VReg PWR

17 mA PCIe SerDes25 mA PCIe SerDes

110 mA Digital Core

135 mA

NT-1 (IPU)

NT-3 (IPU)

NT-4 (IPU)

(OD)

NT-2 (IPU)

NT-16 (IPD)

NT-7

NT-6

NT-17

NT-5

NT-14 (IPD)NT-OUT

(Reserved)

NT-9

(IPD)

(IPD) NT-19

(IPD) NT-20

(IPU)

(IPD) NT-21

(IPU)

FIXME!!! - TYPO IN SYMBOL REGCTL

NT-13

NT-12 (IPD)

(IPD) NT-18

NT-10 (IPD)

NOTE: NT-xx notes show

NAND tree order.

TP_FW643_SCIFMC

=PP1V0_FW_FWPHY

=PP3V3_FW_FWPHY

FW_CLK24P576M_XO

FW_CLK24P576M_XI

FW643_REGCTL

TP_FW643_OCR10_CTL

TP_FW643_TCK

PCIE_CLK100M_FW_N

TP_FW643_TDI

TP_FW643_AVREG

TP_FW643_CE

TP_FW643_FW620_L

TP_FW643_JASI_EN

TP_FW643_MODE_A

TP_FW643_NAND_TREE

FW_RESET_L

PCIE_CLK100M_FW_P

TP_FW643_SCIFCLK

TP_FW643_SCIFDAIN

TP_FW643_SCIFDOUT

TP_FW643_SDA

TP_FW643_SE

TP_FW643_SM

TP_FW643_TDO

TP_FW643_VBUF

FW_PME_L

FW_P1_TPA_P

FW_P1_TPA_N

FW_P2_TPA_N

FW_P2_TPA_P

FW_P0_TPB_N

FW_P1_TPB_N

FW_P1_TPB_P

FW_P2_TPB_N

FW_P2_TPB_P

FW_P0_TPBIAS

FW_CLK24P576M_XO_R

FW643_R0

FW643_REXT

=FW_PHY_DS2

=FW_PHY_DS0

=PP3V3_FW_FWPHY

=FW_PHY_DS1

FW_P0_TPB_P

FW_P0_TPA_P

FW_P0_TPA_N

PCIE_FW_R2D_C_N

PCIE_FW_R2D_N

PCIE_FW_R2D_C_P

PCIE_FW_R2D_P

PCIE_FW_D2R_NPCIE_FW_D2R_C_N

PCIE_FW_D2R_P

PCIE_FW_D2R_C_P

VOLTAGE=3.3V


PP3V3_FW_FWPHY_VDDA


MIN_LINE_WIDTH=0.4 MMPP1V0_FW_FWPHY_AVDD

FW643_PU_RST_L

FW643_TPCPS

=PPVP_FW_PHY_CPS

VOLTAGE=3.3V


PP3V3_FW_FWPHY_VP25

TP_FW643_TMS

FW643_TRST_L

FW643_VAUX_DETECT

TP_FW643_VAUX_ENABLE

FW_CLKREQ_L

FW643_SCL

FW_P2_TPBIAS

FW_P1_TPBIAS

FireWire LLC/PHY (FW643)SYNC_MASTER=M98_MLB

35 98

B051-8071


31

42

Y4150CRITICAL

SM-3.2X2.5MM24.576MHZ

21

L4110120-OHM-0.3A-EMI

0402-LF

25

21

L4135

0402-LF

120-OHM-0.3A-EMI

21

L4130120-OHM-0.3A-EMI

0402-LF

37

37

37

37

37

37 93

37 93

37 93

37 93

37

37

37 93

37 93

37 93

37 93

37

37

37

2

1R4161

402

1/16W1%

MF-LF

2.94K

17

19

17 90

17 90

17 90

17 90

17 90

17 90

2

1 C4140

10%1UF

402

6.3VCERM

2

1 C4111

10%1UF

402

6.3VCERM

2

1C4141

10V

402

0.1UF

CERM

20%

2

1C4124

10%1UF

402

6.3VCERM2

1C4123

10%1UF

402

6.3VCERM2

1C4122

10%1UF

402

6.3VCERM2

1C4121

10%1UF

402

6.3VCERM2

1C4120

10%1UF

402

6.3VCERM

2

1 C4106

10%1UF

402

6.3VCERM2

1 C4105

10%1UF

402

6.3VCERM

2

1 C4110

10%1UF

402

6.3VCERM

2

1 C4104

10%1UF

402

6.3VCERM

2

1C4136

10%1UF

402

6.3VCERM2

1C4135

10%1UF

402

6.3VCERM

2

1 C4103

10%1UF

402

6.3VCERM2

1 C4102

10%1UF

402

6.3VCERM

2

1C4132

10%1UF

402

6.3VCERM

2

1 C4101

10%1UF

402

6.3VCERM2

1 C4100

10%1UF

402

6.3VCERM

2

1C4131

10%1UF

402

6.3VCERM2

1C4130

10%1UF

402

6.3VCERM

21C4170 10%

402X5R

16V

PLACEMENT_NOTE=Place C4170 close to U1400

0.1UF

21C4171 10%

402X5R

16V


0.1UF

2

1R4166

402

1/16W5%

MF-LF

10K

21C4175 10%

402X5R

16V


0.1UF

21C4176 10%

402X5R

16V


0.1UF

2

1R4165

402

10K

MF-LF

5%1/16W

FW643_LDO

2

1R4164

402

1/16W5%

MF-LF

10K

2

1R4163

402

1/16W5%

MF-LF

10K

21

R4150

402

1/16W1%

MF-LF

412

2

1R4160

402

1/16WMF-LF

1%200K

21

C4150

402CERM

22PF

5%50V

21

C4151

402

50V5%

22PF

CERM

F13

G13

C2

F6

F4

E9

E5

E4

D10

K10

K6

L7

K9

K8

D9

K7

K5

K4

J10

J9

J5

J4

H10

H8

H7

D7

H6

H4

G10

G8

G7

G6

G4

F10

F8

F7

D4

B2

L12

K12

L9

L6

L10

L5

D8

D6

D5

A12

M2

L11

L3

J1

G12

F1

C12

C1

L1

K2

H12

H2

E10

E2

C13

B12

N11

N3

M12

B1

A1

H13

D2

E1

N1

B10

A2

C3

B7

A4

B4

A6

B6

A9

B9

A3

B3

A5

B5

A8

B8

M3

M1

N2

M4

N13

M13

M11

N12

F2

H1

G1

G2

L8

D13

N10

N9

B11

N4

N6

N5

N7

N8

J13

J12

K1

J2

D1

K13

D12

E13

E12

F12

L2

L13

A10

A11

A13

B13

U4100CRITICAL

OMIT

FW643

BGA

2

1R4162

402

470K

MF-LF

5%1/16W

2

1 C4162

10%

402

6.3V

0.33UF

CERM-X5R

2

1R4170

402MF-LF1/16W1%191

8

8 35 37

7

7

8 35 37

90

90

90

90

37

V-

V+

D

SGIN

IN

D

SG

G

P-CHN

S D

G

D

S

N-CHN

D

SG

D

SG

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

Page NotesPower aliases required by this page:



- =PP3V3_FW_LATEVG_ACTIVE

- FW_PORT_FAULT_PU

Late-VG Event Detection

FWLATEVG_3V_REF Hysteresis:

2.95V when port power is on

FireWire Port Power Switch

Enables port power when machine

is running or on AC.

2.81V on late Vg event and port power is off

(NONE)

is running or on AC.

Enables port power when machine

- =PPVP_FW_SUMNODE (power passthru summation node)

- =PPBUS_S5_FWPWRSW (system supply for bus power)

=PPVIN_S5_FWPWRSW

=PPVIN_S5_FWPWRSW

=PP3V3_FW_LATEVG_ACTIVE

LATEVG_EVENT_L

PP2V4_FW_LATEVG

FWLATEGV_3V_REF

P2V4_FWLATEVG_RC

=PPVOUT_FW_FWPWRSW

SMC_ADAPTER_EN

PPVIN_S5_FWPWRSW_FET

FW_PORTPWR_EN_R

FW_PORTPWR_EN_FET

FWPWR_EN_L_DIV

FWPWR_EN_L

FW_PORTPWR_EN

FW_PORTPWR_EN

PP10V_FW_D


=PPBOOST_S5_FW_FET=PPBOOST_FW_FWPWRSW_F

PM_SLP_S3_L

FW_PORTPWR_EN_L

PPVIN_S5_FWPWRSW_R

B051-8071

36 98

FireWire Port PowerSYNC_MASTER=YWU_K20 SYNC_DATE=05/28/2008

2

1R4264

1/16WMF-LF402

5%0

FW_LVG_NEW

2

1R426510K

402

FW_LVG_NEW

5%

MF-LF1/16W

2

1R4266

MF-LF402

5%1/16W

10K

FW_LVG_NEW

45

3Q4263SSM6N15FEAPE

SOT563

12

6Q4263

SOT563SSM6N15FEAPE

1

2

6

Q4262

FW_LVG_NEW

SOT-963NTUD3127CXXG

4

5

3

Q4262

NTUD3127CXXGSOT-963

FW_LVG_NEW

2

1C4263

10V20%

402X5R-CERM

2.2UF

NO STUFF

2

1R4263

1/16WMF-LF402

10K5%

FW_LVG_NEW

21

R426210

5%

402MF-LF1/16W

FW_LVG_NEW

21

F42601.5A-24V

1812L15024HF

CRITICAL

12

6Q4261

SOT563SSM6N15FEAPE

3

2

1

D4260CRITICAL

PWRDI5

PDS540XF

7 21 33 41 67 82 84

21 33 41 42

2

1R4261

5%330K

1/16W

402MF-LF

45

3Q4261

SOT563SSM6N15FEAPE

2

1R4260

MF-LF

5%

402

470K

1/16W2

1C42600.01uF

402

20%16V

CERM

3

2

1

4

8

7

6

5

Q4260CRITICAL

NDS9407SOI-HF

2 1

D4219

MBR0540XXH

SOD-123

2

1R421380.6K

MF-LF402

1%1/16W

2

1R421210K

MF-LF1/16W1%

402

2

1C4211

402CERM

5%50V

100pF

2

1R4211

1/16W5%

402

10K

MF-LF

2

5

1

3

4U4210LMC7211SM-HF

21

R4210

402

1/16W

200K

1%

MF-LF

2

1 C4210

402

0.1UF

CERM10V20%

2

1 C4219

10V10%

603CERM-X5R

0.33UF

2

1R4219

MF-LF402

5%1/16W

2.0M

8 36

8 36

8

37

8

36

36

8 8

SC/NC

TPA+ TPA(R)

VG

VPTPB+

TPB(R)TPB-

TPA-

CHASSISGND

S

G

D

(SYM-VER2)

G

S (SYM-VER1)

D

NC

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

(GND_FW_PORT1_VG)

beta-only device, there is no DC path

ground for speed signaling and connection

BREF should be hard-connected to logic

between them (to avoid ground offset issue)

When a bilingual device is connected to a

AREF needs to be isolated from all

local grounds per 1394b spec

TerminationPlace close to FireWire PHY

TI PHYs require 1uF even though

FW spec calls out 0.33uF

TPB<R>

TPB-

Note: Trace PPVP_FW_PORT1 must handle up to 5A

- Port "1" Bilingual (1394B)

appropriate connectors and/or to

properly terminate unused signals.

constrained on this page. It is

provide the appropriate constraints

Configures PHY for:

"Snapback" & "Late VG" Protection

FireWire PHY Config Straps

- 1-port Portable Power Class (0)

for snap-back diodes

PP2V4_FWLATEVG needs to be biased

to at least 2.1V for FW signal integrity

and should be biased to 2.4V for margin

assumed that FireWire PHY page will

to apply to entire TPA/TPB XNets.

- =PP3V3_FW_LATEVG

514S0605

NOTE: FireWire TPA/TPB pairs are NOT

Cable Power

(FW_PORT1_BREF)

ESD and late-VG rail

(Common to all ports)

(NONE)

FireWire Design Guide (FWDG 0.6, 5/14/03)

1394b implementation based on Apple


TPB+

VP

NC

VG

TPA-

TPA<R>

TPA+

INPUT

(NONE)

the necessary aliases to map the

NOTE: This page is expected to contain


- =GND_CHASSIS_FW_EMI_R

- =PPVP_FW_PORT1

Late-VG Protection Power

R4390 should be 390 Ohms max for a 3.3V rail

FireWire TPA/TPB pairs to their

- =GND_CHASSIS_FW_PORT1


Page Notes

OUTPUT

BILINGUAL

PORT 1

FW_PORT1_TPB_P

FW_PORT1_TPA_N

FW_PORT1_AREF

FW_PORT1_TPA_P

FW_PORT1_TPB_N

PPVP_FW_PORT1_F

MIN_NECK_WIDTH=0.25 mmVOLTAGE=33V


CPS_EN_L_DIV

PP2V4_FW_LATEVG

MAKE_BASE=TRUENC_FW0_TPBN

FW_P0_TPA_P

=PPVP_FW_PHY_CPS

CPS_EN_L

=PP3V3_FW_FWPHY

=PPVP_FW_PHY_CPS_FET

FW_P1_TPA_N

MAKE_BASE=TRUENC_FW2_TPBPFW_P2_TPB_P

NC_FW2_TPBN MAKE_BASE=TRUE

FW_P2_TPA_N

MAKE_BASE=TRUENC_FW0_TPBP

=PP3V3_FW_FWPHY

=FW_PHY_DS0

=FW_PHY_DS1

=FW_PHY_DS2MAKE_BASE=TRUEFWPHY_DS0

FWPHY_DS2MAKE_BASE=TRUE

MAKE_BASE=TRUEFWPHY_DS1

FW_P1_TPA_P

=PPVP_FW_PORT1

=PP3V3_FW_LATEVG

FW_P1_TPB_N

FW_PORT1_TPB_C

PP2V4_FW_LATEVG



MAKE_BASE=TRUEFW_PORT1_TPB_N

MAKE_BASE=TRUEFW_PORT1_TPA_P

FW_PORT1_TPA_NMAKE_BASE=TRUE

FW_P0_TPB_P

FW_P1_TPB_P

FW_P2_TPB_N

FW_P0_TPB_N

MAKE_BASE=TRUENC_FW2_TPBIASMAKE_BASE=TRUENC_FW0_TPBIAS

NC_FW0_TPAP MAKE_BASE=TRUE

MAKE_BASE=TRUENC_FW2_TPAN

FW_P2_TPA_P

FW_P0_TPA_N

FW_P2_TPBIAS

FW_P0_TPBIAS

MAKE_BASE=TRUENC_FW0_TPAN

MAKE_BASE=TRUENC_FW2_TPAP

FW_PORT1_TPB_PMAKE_BASE=TRUE

FW_P1_TPBIAS


PPVP_FW_CPSMIN_LINE_WIDTH=0.4 MM

VOLTAGE=10V

MAKE_BASE=TRUE


FireWire Ports

051-8071 B

37 98

2

1R4311470K

1/16W5%

402MF-LF

2

1R4312330K

1/16WMF-LF

402

5%

1

2

6

Q4300BSS8402DWSOT-363

4

5

3

Q4300

BSS8402DW

SOT-363

2

1R4380

402

10K

1/16WMF-LF

1%

2

1R4382

402

1/16W1%

MF-LF

10K

2

1R4381

MF-LF402

1%1/16W

10K

9

8

7

6

5

4

3

2

13

12

11

10

1

J4310CRITICAL

F-RT-TH1394B-M97

3

1

D4390

CRITICAL

SOT23

MMBZ5227BLT1H

21

R4390

1/16W1%

402MF-LF

332

2

1C43120.01uF

50V10%

X7R402

2

1C43130.01uF

50V10%

402X7R

3

5

4

DP4311BAV99DW-X-G

SOT-363

6

2

1

DP4311

SOT-363BAV99DW-X-G

3

5

4

DP4310BAV99DW-X-G

SOT-363

2

1C4311

10%50V

0.01uF

402X7R

6

2

1

DP4310

SOT-363BAV99DW-X-G

2

1C43100.01uF

50V10%

402X7R

21

L4310FERR-250-OHM

SM

CRITICAL

2

1 C4314

50VX7R

10%0.01UF

402

2

1R4319

1/16WMF-LF402

5%1M

2

1C4319

50V10%

603-1X7R

0.1uF

PLACEMENT_NOTE=Place C4319 close to connector pin 5.

2

1R4360

1/16W1%

MF-LF402

56.2

SIGNAL_MODEL=EMPTY

2

1 C43600.33UF

CERM-X5R6.3V10%

402

2

1R4361

1%56.2

MF-LF1/16W

402

SIGNAL_MODEL=EMPTY

2

1 C4364220pF

CERM402

5%25V

2

1R4362SIGNAL_MODEL=EMPTY

1%1/16WMF-LF402

56.2

2

1R4364

MF-LF402

1/16W1%

4.99K

2

1R4363

SIGNAL_MODEL=EMPTY

56.2

MF-LF402

1%1/16W

37

37

37

37

36 37

7

35 93

35

8 35 37

8

35 93

7 35

7

35

7

8 35 37

35

35

35

35 93

8

8

35 93

36 37

37

37

37

35 93

35 93

35

35 93

7

7

7

35

35 93

35

35

7

37

35

OUT

IN

SYM_VER-1

SYM_VER-1

OUT

OUT

IN

IN

D

SG

D

SG

S

G

D

SYM_VER-1

SYM_VER-1

OUT

OUT

IN

IN

NC

NC

NC

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

ODD Power Control

NOTE: 3.3V must be S0 if 5V is S3 or S5 to

ensure the drive is unpowered in S3/S5.

516S0617

Indicates disc presence

SATA ODD Port

SATA HDD Port

516S0350

PLACEMENT_NOTE=Place C4515 next to C4516

PLACEMENT_NOTE=Place C4511 next to C4510

PLACEMENT_NOTE=Place C4510 close to MCP79

PLACEMENT_NOTE=Place C4516 close to J4501

PLACEMENT_NOTE=PLACE FL4502 CLOSE TO J4501

PLACEMENT_NOTE=PLACE C4502 CLOSE TO J4501

PLACEMENT_NOTE=Place FL4501 close to J4501


PLACEMENT_NOTE=PLACE L4500 CLOSE TO J4501

=PP1V5_EXP_S0

PP5V_S0_HDD_FLT

=PP3V3_S0_ODD

=PP5V_S0_ODD

=PP5V_S0_HDD

SATA_HDD_D2R_UF_P

SATA_HDD_D2R_UF_N

SATA_HDD_R2D_UF_P SATA_HDD_R2D_C_P

SATA_HDD_R2D_UF_N SATA_HDD_R2D_C_N

SATA_HDD_D2R_C_P

SATA_HDD_D2R_C_N

SATA_HDD_D2R_N

SATA_HDD_D2R_P

SATA_HDD_R2D_P

SATA_HDD_R2D_N

SMC_ODD_DETECT

=PP3V3_S0_ODD

PP5V_SW_ODDMIN_LINE_WIDTH=0.6mmMIN_NECK_WIDTH=0.4mmVOLTAGE=5V

ODD_PWR_EN

ODD_PWR_EN_LS5V_L

SATA_ODD_R2D_N

SATA_ODD_D2R_N

ODD_PWR_SS

SATA_ODD_R2D_UF_P SATA_ODD_R2D_C_P

SATA_ODD_R2D_C_N

SATA_ODD_D2R_UF_N

SATA_ODD_D2R_UF_P

ODD_PWR_EN_L

SATA_ODD_R2D_P

SATA_ODD_R2D_UF_N

SATA_ODD_D2R_P

SATA_ODD_D2R_C_P

SATA_ODD_D2R_C_N

051-8071 B

9838

SATA ConnectorsSYNC_MASTER=M98_MLB SYNC_DATE=05/01/2008

9

87

65

43

2

1615

1413

1211

10

1

J4501CRITICAL

M-ST-SMQT500166-L020

21C4515402CERM10% 16V0.01UF

21C4511

0.01UF 16V10% CERM 402

21C4510402CERM10% 16V0.01UF

21C4516CERM 4020.01UF 16V10%

90 20

90 20

90 20

90 20

4 3

21

FL4502DLP11S

CRITICAL

90-OHM-100MA

2

1 C4502

CERM

20%0.1UF

10V

402

43

2 1

FL4501

CRITICAL

90-OHM-100MADLP11S

2

1 C45010.1UF

402

20%

CERM10V

21

L4500FERR-70-OHM-4A

CRITICAL

0603

21C4525402CERM10% 16V0.01UF

PLACEMENT_NOTE=PLACE C4525 NEXT TO C4526

21C4526


0.01UF 16V10% CERM 402

21 C4520

PLACEMENT_NOTE=PLACE C4520 CLOSE TO MCP79

0.01UF 16V10% CERM 402

21 C4521

PLACEMENT_NOTE=PLACE C4521 NEXT TO C4520

CERM10% 16V0.01UF 402

4

3

65

21

Q4590

CRITICAL

FDC606P_GSOT-6

21

C45960.01UF

402CERM

10%16V

2

1 C4595

10V

0.068UF

CERM402

10%

21

R4595

MF-LF1/16W5%

100K

402

2

1R4596

MF-LF402

100K

1/16W5%

12

6Q4596SSM6N15FEAPE

SOT5632

1R4597

402

100K

MF-LF1/16W

5%

45

3Q4596SSM6N15FEAPE

SOT563

90 20

90 20

90 20

90 20

4 3

21

FL4525


90-OHM-100MADLP11S

CRITICAL

43

2 1

FL4520


DLP11S90-OHM-100MA

CRITICAL

21

9

8 7

6 5

4 3

2

16 15

14 13

12 11

10

1

J4500CRITICAL

M-ST-SM-LF55560-0168

2

1R4590

402

5%1/16WMF-LF

33K

41 7

66 8

7

38 8

8

8

96

96

96

96

90 7

90 7

90 7

90 7

38 8

7

90 7

96

96

96

90 7

96

90 7

90 7

OUT

BI

BI

SYM_VER-1

IN

OUT

IN

SYM_VER-1

BI

BI

OUT

IO

IO

NC

GND

VBUS

NC

IO

IO

NC

GND

VBUS

NC

OUT2

TPADGND

OUT1

OC1*

EN2

EN1

OC2*

IN

VCC

GND

SELOE*

D+

D-

Y+

Y-

M+

M-


APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

Place L4600 and L4605 at connector pin

We can add protection to 5V if we want, but leaving NC for now

SEL=1 Choose USB

Port Power Switch

USB/SMC Debug Mux

Left USB Port B

Left USB Port A

SEL=0 Choose SMC

USB_EXTB_N

USB2_EXTA_MUXED_P

USB_LT2_P

USB_LT2_N

MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.375 mmVOLTAGE=5V

PP5V_S3_RTUSB_B_ILIM

USB2_EXTA_MUXED_N

=PP5V_S3_RTUSB

VOLTAGE=5V


PP5V_S3_RTUSB_B_F

PP5V_S3_RTUSB_A_FMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.375 mmVOLTAGE=5V

USB2_LT1_N

USB2_LT1_P

USB_EXTB_OC_L

USB_EXTA_N

USB_EXTA_P

SMC_RX_L

SMC_TX_L

=PP3V42_G3H_SMCUSBMUX

USB_PWR_EN

PM_SLP_S4_L

USB_EXTB_P

PP5V_S3_RTUSB_A_ILIMMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.375 mmVOLTAGE=5VUSB_EXTA_OC_L

USB_DEBUGPRT_EN_L

SYNC_MASTER=M98_MLB

External USB Connectors

051-8071 B

9839


2 J4600, J4610CONN,RCPT,USB,HB,4P514-0638 CRITICAL

1

2

9

108

5

4

3

7

6

U4650

TQFN

SMC_DEBUG_YES

CRITICAL

SIGNAL_MODEL=USB_MUX

PI3USB102ZLE

2

1C4692

10%10V

402X5R

0.47UF

2

1R4690

402

1/16W

5.1K

MF-LF

5%

9

6

7

5

8

2

1

4

3

Q4690

CRITICAL

MSOP

TPS2064DGN

8

7

6

5

4

3

2

1

J4610

OMIT

F-RT-TH-M97-3USB

CRITICAL

8

7

6

5

4

3

2

1

J4600

OMIT

USB

CRITICAL

F-RT-TH-M97-3

2

1C4690

603

10UF

X5R

20%6.3V

6

32 45

1

D4610

SLP1210N6

RCLAMP0502N

CRITICAL

6

32 45

1

D4600RCLAMP0502N

CRITICAL

SLP1210N6

20

20 91

20 91

2

1 C4616

CASE-B2-SM

6.3VPOLY-TANT

100UF

CRITICAL

20%2

1C4617

6.3VX5R

10UF

603

20%

4 3

21

L461090-OHM-100MA

CRITICAL

DLP11S

21

L4615CRITICAL

0603

FERR-220-OHM-2.5A

2

1 C4615

402CERM16V

0.01uF20%

2

1C4605

16V

402

0.01uF

CERM

20%

21

R4652

SMC_DEBUG_NO

0

402

5%1/16WMF-LF

21

R4651

402

5%

0

MF-LF1/16W

SMC_DEBUG_NO

41

7 41 42 43

7 41 42 43

4 3

21

L4600DLP11S

CRITICAL

90-OHM-100MA

2

1R4650

1/16WMF-LF

5%10K

4022

1C4650

CERM402

10V

0.1UF

SMC_DEBUG_YES

20%

20 91

20 91

20

2

1 C46910.1UF

402CERM10V20%

2

1C469510UF

20%

603X5R

6.3V2

1 C4696

CASE-B2-SMPOLY-TANT

100UF20%

CRITICAL

6.3V

21

L4605

0603

FERR-220-OHM-2.5A

CRITICAL

96

7 96

7 96

96

8 98

7

7

7 96

7 96

8

21 41 42 67

BI

BI

VCC

P1.0/D+

P1.1/D-

P1.2/VREG

P1.3/SSEL

P1.4/SCLK

P1.5/SMOSI

P1.6/SMISO

P0.0

P0.1

INT0/P0.2

INT1/P0.3

TIO1/P0.6

NC

TIO0/P0.5

INT2/P0.4

VSSPADTHRML

IN

NCNCNCNC

NCNCNCNCNCNCNCNC

NCNCNCNCNC

NC

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

518S0692

P/N 338S0633

DIFFERENTIAL_PAIR=USB2_IRUSB_IR_N

IR_RX_OUT_RC IR_RX_OUT

IR_VREF_FILTER

USB_IR_PDIFFERENTIAL_PAIR=USB2_IR

PP5V_S3_IR_R

SMC_LID_R

IR_RX_OUT

PP3V42_G3H_LIDSWITCH_R

=PP3V42_G3H_LIDSWITCH

SYS_LED_ANODE_R

=PP5V_S3_IR

SMC_LID

SYS_LED_ANODE

=PP5V_S3_IR PP5V_S3_IR_USB

Front Flex Support

051-8071 B

9840

SYNC_DATE=07/18/2008SYNC_MASTER=CHANG_K20

21

R4801OMIT

402

NONE

NONENONE

SHORT

21

R4808

PLACE R4808 NEAR J4800

5%1/16W

MF-LF

402

4.721

R4807

402

MF-LF

1/16W

100

5%


2

1 C4808

PLACE C4808 NEAR J4800

402CERM

0.001UF

50V10%

21

R480610

5%4021/16W

MF-LF


21

R4805

5%

10

4021/16W

MF-LF


2

1 C4807PLACE C4807 NEAR J4800

402CERM

0.001UF

50V10%

2

1 C4806PLACE C4806 NEAR J4800

402

0.1UF

16V10%

X7R-CERM2

1 C4805 PLACE C4805 NEAR J4800

16V

402

0.1UF

X7R-CERM

10%

6

5

4

3

2

1

J4800F-RT-SM

CRITICAL

FF18-6A-R11AD-B-3H

7 40 21

R4800

402

1/16W

100

5%

MF-LF

2

1 C4804

CERM

0.001UF

50V

402

10%

2

1 C48010.1UF

402

16V10%

X7R-CERM

11

14

1

2

25

19

18

17

16

15

13

12

6

7

24

23

22

21

20

10

9

8

3

4

5

U4800QFN

CRITICALOMIT

CY7C63803-LQXC

2

1 C4803

402-1

1UF10%10VX5R

20 91

20 91

7

7

7 40

7

8

7

8 40

41 42 49

7 42

8 40

IN

IN

IN

OUT

OUT

OUT

IN

IN

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

OUT

BI

IN

IN

OUT

BI

OUT

IN

IN

OUT

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

IN

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

IN

IN

OUT

ININ

BI

BI

OUT

IN

OUT

OUT

NC

OUT

OUT

OUTNC

NCNCNC

NC

NC

NC

NCNC

NCNCNC

NC

NC

NC

NC

NC

NCNC

NCNC

NC

NCNC

IN

OUT

OUT

OUT

OUT

P13

P14

P15

P16 P66

P10

P11

P12

P17

P20

P21

P22

P23

P24

P25

P26

P27

P30

P31

P32

P33

P34

P36

P37

P40

P41

P42

P43

P44

P45

P46

P47

P50

P51

P52

P60

P61

P62

P63

P64

P65

P67

P70

P71

P72

P73

P74

P75

P76

P77

P80

P81

P84

P85

P86

P90

P91

P92

P93

P94

P95

P96

P97

P35

P83

P82

(1 OF 3)

PA5

PA4

PA0

PA1

PA2

PA3

PA6

PA7

PB0

PB1

PB2

PB3

PB4

PB5

PB6

PB7

PC0

PC1

PC2

PC3

PC4

PC5

PC6

PC7

PD0

PD1

PD2

PD3

PD4

PD5

PD6

PD7

PE0

PE1

PE2

PE3

PE4

PF0

PF1

PF2

PF3

PF4

PF5

PF6

PF7

PG0

PG1

PG2

PG3

PG4

PG5

PG6

PG7

PH0

PH1

PH2

PH3

PH4

PH5

(2 OF 3)

RES*

NMI

VSS

VCLVCC

NC

MD2

MD1

ETRST

AVSS

AVREFAVCC

EXTAL

XTAL

(3 OF 3)

BI

BI

BI

BI

IN

IN

IN

OUT

BI

IN

IN

IN

IN

BI

BI

IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

NOTE: Unused pins have "SMC_Pxx" names. Unused

(OC)

(OC)

NOTE: P94 and P95 are shorted, P95 could be spare.

If SMS interrupt is not used, pull up to SMC rail.

NOTE: SMS Interrupt can be active high or low, rename net accordingly.

pins designed as outputs can be left floating,

(OC)

(OC)

(OC)

(OC)

(OC)

(OC)

(OC)

(OC)

(OC)

(OC)

(See below)

SMC_PB3:

SMC_IG_THROTTLE_L for MG systems.

Otherwise, TP/NC okay (was ISENSE_CAL_EN)

those designated as inputs require pull-ups.

(OC)

(OC)

(OC)

(OC)

(DEBUG_SW_1)

(DEBUG_SW_2)

SMC_RESET_L

SMC_NMI

SMC_VCL

=PP3V3_S5_SMC

SMC_KBC_MDE

SMC_MD1

SMC_TRST_L

GND_SMC_AVSS

PP3V3_S5_AVREF_SMC

PP3V3_S5_SMC_AVCC

VOLTAGE=3.3V


SMC_EXTAL

SMC_XTAL

SMC_PA5

MEM_EVENT_L

SMC_PA0

SMC_PA1

PM_SYSRST_L

USB_DEBUGPRT_EN_L

SYS_ONEWIRE

PM_BATLOW_L

SMC_RUNTIME_SCI_L

SMC_ODD_DETECT

SMC_PB3

SMC_EXCARD_CP

SMC_EXCARD_OC_L

SMC_GFX_OVERTEMP_L

SMC_FAN_0_CTL

SMC_FAN_1_CTL

SMC_FAN_2_CTL

SMC_FAN_3_CTL

SMC_FAN_0_TACH

SMC_FAN_1_TACH

SMC_FAN_2_TACH

SMC_FAN_3_TACH

SMS_X_AXIS

SMS_Y_AXIS

SMS_Z_AXIS

SMC_ANALOG_ID

SMC_NB_CORE_ISENSE

SMC_NB_DDR_ISENSE

ALS_LEFT

ALS_RIGHT

SMC_CASE_OPEN

SMC_TCK

SMC_TDI

SMC_TDO

SMC_TMS

SMC_SYS_LED

SMC_LID

SMC_MCP_SAFE_MODE

=SMC_SMS_INT

SMB_BSA_DATA

SMB_BSA_CLK

SMB_A_S3_DATA

SMB_A_S3_CLK

SMB_B_S0_DATA

SMB_B_S0_CLK

SMC_PROCHOT

SMC_THRMTRIP

SMC_PH2

ALS_GAIN

RSMRST_PWRGD

PM_RSMRST_L

IMVP_VR_ON SMC_PROCHOT_3_3_L

SMC_EXCARD_PWR_EN

SMC_RSTGATE_L

ALL_SYS_PWRGD

PM_PWRBTN_L

ESTARLDO_EN

SMC_P24

SMC_P26

LPC_AD<0>

LPC_AD<1>

LPC_AD<2>

LPC_AD<3>

LPC_FRAME_L

LPC_CLK33M_SMC

LPC_SERIRQ

SMC_P41

SMB_MGMT_DATA

SMS_ONOFF_L

SMC_GFX_THROTTLE_L

SMC_SYS_KBDLED

SMC_TX_L

SMC_RX_L

SMB_0_S0_CLK

SMC_PM_G2_EN

SMC_ADAPTER_EN

SMC_BIL_BUTTON_L

SMC_CPU_ISENSE

SMC_CPU_VSENSE

SMC_GPU_ISENSE

SMC_GPU_VSENSE

SMC_DCIN_ISENSE

SMC_PBUS_VSENSE

SMC_BATT_ISENSE

SMC_NB_MISC_ISENSE

SMC_WAKE_SCI_L

SMC_TX_L

SMC_RX_L

SMB_MGMT_CLK

SMC_ONOFF_L

SMC_BC_ACOK

SMC_BS_ALRT_L

PM_SLP_S3_L

PM_SLP_S4_L

PM_SLP_S5_L

PM_CLK32K_SUSCLK

SMB_0_S0_DATA

SMC_LRESET_L

LPC_PWRDWN_L

PM_CLKRUN_L


051-8071 B

9841

SMC

42

44

44

25 91

42

21 39 42 67

7 21 33 36 67 82 84

44

50

25 91

25

7 19 43 84 91

7 19 43 84 91

7 19 43 84 91

7 19 43 84 91

7 19 43 84 91

A3

C5

B11

F10

L3

D2

E1

H10

M1

B1

D3

E3

E5

H1

D1

A2

H3

L9

L11

M12

U4900LGA-HF

OMIT

H8S2117

C4

B3

A4

J2

F2

E2

L6

M7

N6

K6

K7

K8

N7

M8

M4

L4

N4

M5

L5

M6

N5

K5

K4

J1

K2

J3

K1

L7

K9

N8

M9

L8

K10

N9

M10

J13

H11

G12

G10

H13

F12

G13

G11

A11

C11

B10

C10

A10

B9

C9

B8

L2

K3

L1

N2

M2

M3

N1

N3U4900LGA-HF

OMIT

H8S2117

F1

F4

G4

H4

G1

H2

G3

J4

C6

B5

A6

D5

C7

B6

A7

L12

N13

M13

N12

N11

L10

M11

N10

H12

J11

J10

K13

J12

K11

K12

L13

E4

F3

G2

C3

C1

B2

C2

A1

B4

A5

D4

D6

D7

D8

A8

B7

C8

D9

A9

E10

F13

E12

E13

F11

D12

E11

D13

D10

C12

C13

D11

B13

A12

A13

B12U4900LGA-HF

OMIT

H8S211731

9

42

42

42

21 33 36 42

51

75

7 19 43

21

7 43

7 25

21 27 28

7 19 43

75 42

7 39 41 42 43

7 39 41 42 43

42

42

42

42

44

44

44

44

44

44

40 42 49

7 42 43

7 42 43

7 42 43

42

7 42 43

42

42

42

51

42

51

51

48

48

42

42

42

42

48

48

42

21

31 42

7 38

21

42 59

39

2

1R4998

402

1/16W5%

MF-LF

10K

2

1R4903

402

1/16W5%

MF-LF

0

NO STUFF

2

1R4902

402

10K

MF-LF

5%1/16W

2

1R4901

402

1/16W5%10K

MF-LF

7 43

7 43

2

1R4909

402

1/16W5%

MF-LF

10K

44

67

7 39 41 42 43

7 39 41 42 43

42 59

7 42 59

42

45

45

45

45

46

45

45

2

1 C4906

10V

402

0.1UF

CERM

20%

42

25 67 84

67

21

2

1 C4905

10V

402

0.1UF

CERM

20%

61

21

2 1

XW4900SM

2

1 C4904

10V

402

0.1UF

CERM

20%

21

R4999

402MF-LF

5%1/16W

4.7

PLACEMENT_NOTE=Place R4999 close to U4900 pins N14,N15

2

1C4920

10V

402

PLACEMENT_NOTE=Place C4920 close to U4900 pins N14,N15

0.1UF

CERM

20%

2

1 C4903

10V

402

0.1UF

CERM

20%

2

1C4907

10%

402CERM-X5R

0.47UF

PLACEMENT_NOTE=Place C4907 close to U4900 pin F1

6.3V

7 42 49

7 42 43

7 19 43

2

1C490222UF

805CERM

20%6.3V

8 42 51

42 45 46

7 42

42

42

42

42

42

42

42

42

42

42

D

S G

CD

GNDNC

OUTIN

OUT

IN

OUT

BI

OUT

IN

D

S G

GND

OUTIN

OUT IN

IN

OUT

02

D

SG

D

SG

NC

NC

NC

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

TABLE_ALT_ITEM

PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:

TABLE_ALT_HEAD

SMC Reset "Button" / Brownout Detect

PLACE R5015,R5001 ON BOTTOM SIDE

Debug Power "Button"

SMC FSB to 3.3V Level Shifting

TO SMC

TO CPU

SMC Crystal Circuit

SMC AVREF Supply

System (Sleep) LED Circuit

NC_SMC_FAN_3_TACHMAKE_BASE=TRUE

SMC_FAN_3_CTL

SMC_FAN_2_CTL

SMC_FAN_2_TACH

SMC_FAN_3_TACH

ESTARLDO_EN

SMC_BC_ACOKMAKE_BASE=TRUE

MAKE_BASE=TRUE

NC_SMC_FAN_3_CTL

CPU_PROCHOT_L

MAKE_BASE=TRUE

SMC_MCP_DDR_ISENSE

SMC_CPU_FSB_ISENSE

MAKE_BASE=TRUE

SMC_GPU_1V8_ISENSE

MAKE_BASE=TRUE

SMC_NB_DDR_ISENSE

SMC_NB_MISC_ISENSE

=PP3V3_S5_SMC

SMC_P24

SMC_P26

SMC_P41

ALS_GAIN

SMC_PB3

SMC_BMON_MUX_SELMAKE_BASE=TRUE

TP_SMC_P41MAKE_BASE=TRUE

=PP5V_S3_SYSLED

SYS_LED_L_VDIV

SMC_SYS_LED

SYS_LED_L

=CHGR_ACOK

PP3V42_G3H

SMC_BIL_BUTTON_DB_L

SMC_TPAD_RST_L

SMC_ONOFF_L SMC_ANALOG_ID

NC_ESTARLDO_ENMAKE_BASE=TRUE

SMC_PA1

=PP1V05_S0_SMC_LS

=PP3V3_S0_SMC

PM_SLP_S4_L

SMC_PA0

SMC_ONOFF_L

SMC_LID

SMC_THRMTRIP

CPU_PROCHOT_L_R

SMC_PROCHOT_3_3_L

CPU_PROCHOT_BUF

SMC_PROCHOT

SMC_CASE_OPEN

SMC_EXCARD_CP

=PP3V3_S5_SMC

SMC_ADAPTER_EN

=PP3V3_S0_SMC

SYS_LED_ILIM

SYS_LED_ANODE

NC_SMC_FAN_2_TACHMAKE_BASE=TRUE

ALS_LEFTMAKE_BASE=TRUE

SMC_MCP_VSENSE

ALS_RIGHTMAKE_BASE=TRUE

SMC_CPU_HI_ISENSE

MAKE_BASE=TRUE

SMC_IG_THROTTLE_L

NC_ALS_GAINMAKE_BASE=TRUE

TP_SMC_P24MAKE_BASE=TRUE

SMC_EXTAL

=SMC_SMS_INT

SMC_ONOFF_L

SMC_XTAL_R

SMC_BIL_BUTTON_L

SMC_XTAL

VOLTAGE=3.3V

PP3V3_S5_AVREF_SMCMIN_LINE_WIDTH=0.4 mmMIN_NECK_WIDTH=0.2 mm

PM_THRMTRIP_L

EXCARD_OC_L

SMC_NB_CORE_ISENSE SMC_MCP_CORE_ISENSE

MAKE_BASE=TRUE

TP_SMC_RSTGATE_LMAKE_BASE=TRUE

SMC_PA5

PM_SLP_S5_L

SMC_RX_L

SMC_TX_L

SMC_PH2

SYS_ONEWIRE

SMC_BS_ALRT_L

SMC_TMS

SMC_TDO

SMC_TDI

SMC_TCK

SMC_BIL_BUTTON_L

SMC_BC_ACOK

SMC_RSTGATE_L

SMC_EXCARD_OC_L

SMS_INT_LMAKE_BASE=TRUE

MAKE_BASE=TRUE

NC_SMC_FAN_2_CTL

SMC_RESET_LSMC_MANUAL_RST_L

=PP3V3_S5_SMC


GND_SMC_AVSS

VOLTAGE=0V


=PPVIN_S5_SMCVREF

SMC_TPAD_RST

353S1912 Intersil ISL60002-33ALL353S1381

B

9842


051-8071

SMC Support

SYNC_MASTER=M98_MLB

2

1C5001

10%16VCERM402

0.01UF

7 41 42 49

21

R5051

MF-LF5%

4021/16W10K

2

1 C5050

402X5R16V10%0.1UF

2

1 C5051

402

25VX7R

10%0.01UF

4

5

13

2

U5050SOT-553

74LVC1G17DRL

12

6Q5032SSM6N15FEAPE

SOT563

45

3Q5032

SOT563SSM6N15FEAPE

4

5

3

2

1

U5001SN74LVC1G02

SOT553-5

21R50875% 1/16W 402MF-LF

470K

4

3

5Q5060

SOT563-HF

BC847BV-X-F

21

C5010

402

50VCERM

5%

15pF

21

C5011

402

5%50VCERM

15pF2

1Y5010

5X3.2-SM20.00MHZ

CRITICAL

21

R5010

5%

0

402MF-LF1/16W

21R50811/16W MF-LF 4025%

10K

7 40

2

3

1 Q5030

SOD2SA2154MFV-YAE

CRITICAL

2

1R5031

1%

402

1/16W

523

MF-LF

2

1R5030

1%20

402MF-LF1/16W

2

1R5032

1%1/16W

402MF-LF

1.47K

41

21R50891/16W MF-LF 402

10K5%

2

1R5000

1/16W

5%

1K

402MF-LF

20 31 41

21

3

VR5020REF3333SOT23-3

CRITICAL

21R5092 100K

MF-LF5% 1/16W 402

21R5091 100K

1/16W5% MF-LF 402

12

6 Q5059

SOT563SSM6N15FEAPE

41

41

10 14 61 88

2

1

R5060470

402

MF-LF

1/16W

5%

21

R5062

1/16W

402

3.3K

5%

MF-LF

2

1

R5061

MF-LF

1/16W

5%

402

3.3K

1

6

2Q5060

SOT563-HF

BC847BV-X-F

2

1R5015

1/10W

0

MF-LF

5%

OMIT

603

SILK_PART=PWR_BTN

2

1R5001

SILK_PART=SMC_RST

603

MF-LF

05%1/10W

OMIT

10 14 88

41

7 41 43

21R50905%

100K

402MF-LF1/16W

1

4 2

3

5

U5000SOT23-5-HF

CRITICAL

NCP303LSN

21R50885% 1/16W

10K

402MF-LF

21R50865% 402MF-LF1/16W

10K

21R5085402MF-LF1/16W5%

10K

21R5080 10K

5% 402MF-LF1/16W

21R5079 10K

5% 1/16W MF-LF 402

21R5078 10K

1/16W5% MF-LF 402

21R5077MF-LF5% 1/16W

10K

402

21R5076MF-LF5% 1/16W

100K

402

21R5075 2.0K

MF-LF5% 1/16W 402

ONEWIRE_PU

21R50745% MF-LF1/16W 402

100K

21R5073MF-LF5% 1/16W 402

10K

21R50724021/16W MF-LF5%

10K

21R50714021/16W5% MF-LF

100K

21R5070402MF-LF5% 1/16W

10K

21

R5095

MF-LF

5%

402

1/16W

0

2

1C5025

603

20%6.3V

10uF

X5R

2

1 C5026

16V10%

402

0.01UF

CERM

2

1 C5020

6.3V

402

10%0.47UF

CERM-X5R

45

3 Q5059

SOT563SSM6N15FEAPE

2

1C5000

402

CERM

20%0.1uF

10V

7

41

41

41

41

41

41 42 59

7

46

46

46

41

41

8 41 42 51

41

41

41

41

41

45

7

8

60

7 8

7 59

49

7 41 42 49 41

7

41

8

8 42

21 39 41 67

41

7 41 42 49

40 41 49

41

31 41

8 41 42 51

21 33 36 41

8 42

7

41 45

41 45

21

7

41

41

41 42

41

7 41

41 46

41

41

7 39 41 43

7 39 41 43

41

41 59

7 41 59

7 41 43

7 41 43

7 41 43

7 41 43

41 42

41 42 59

41

51

7

8 41 42 51

41 45 46

8

IN OUT

IN

IN

OUT

IN

OUT

VCC

GND

SEL OE*

D+

D-

Y+

Y-

M+

M-

VCC

GND

SEL OE*

D+

D-

Y+

Y-

M+

M-

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

IN

IN

IN

OUT

OUT

OUT

OUT

GS D

IN

OUT

IN

OUT

OUT

IN

OUT

IN

BI

BI

OUT

IN

OUT

OUT

IN

BI

IN

IN

OUT

BI

BI

IN

OUT

BI

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

MUX SEL CONTROLLED BY FRANKCARD SWITCH ONCE CS1 IS SUPPORTED IN MCP

SEL LOW OUTPUTS TO M (FRANKCARD ROM)SEL HIGH OUTPUTS TO D (ON BOARD ROM)

SPI MUX BYPASS

Alternate SPI ROM Support

Pull-up on debug card

516S0573

From Frank Card

To Frank Card

MCP79 REV A01 REQUIRES EXTERNAL MUX, REV B01 STILL DOES NOT SUPPORT INTERNAL MUX

MCP SPI Override Options

NOT SUPPORTED IN REV A01 OR B01 MCP79 SILICON

LPC+SPI Connector

MCP79 Internal SPI MUX Support

SPI_CLK_RSPI_MOSI_R

=PP3V3_S5_ROM

SPI_MOSI_MUX

SPI_MISO_MUX

SPI_CLK_MUX

SPI_MISO

SPI_CLK_R

SPI_MOSI_R

SPI_CS0_R_LSPI_MISO

=PP3V3_S5_LPCPLUS

=PP3V3_S5_LPCPLUS

SPI_ALT_CS_L_MUX

SPI_MLB_CS_L_MUX

SPI_ALT_MISO

SPI_ALT_CLKSPI_ALT_MOSI

SPI_MOSI_MUXSPI_CLK_MUX

SPI_MISO_MUX

SPI_MLB_CS_L

=PP3V3_S5_ROM

SPI_ALT_CS_L

SMC_MD1SMC_TX_L

=PP5V_S0_LPCPLUS

LPCPLUS_GPIO

SMC_NMISMC_RX_L

SPIROM_USE_MLB

MAKE_BASE=TRUESPI_CS1_R_L_USE_MLB

=PP3V3_S5_LPCPLUS

=PP3V3_S0_LPCPLUS

LPC_FRAME_R_L

LPC_FRAME_PU

SMC_TMSDEBUG_RESET_L

SMC_TRST_LSMC_TDO

LPC_AD<1>LPC_AD<0>

SPI_ALT_MOSI

PM_CLKRUN_LLPC_FRAME_LSPI_ALT_MISO

=PP3V3_S5_LPCPLUS

SMC_RESET_L

LPC_AD<2>LPC_CLK33M_LPCPLUS

LPC_AD<3>

SPIROM_USE_MLBSPI_ALT_CLKSPI_ALT_CS_LLPC_SERIRQLPC_PWRDWN_LSMC_TDISMC_TCK


SPIROM_USE_MLB

LPC+SPI Debug Connector

B

9843

051-8071

SYNC_DATE=05/28/2008SYNC_MASTER=CHANG_K20

21

R5156LPCPLUS_NOT

402

1/16W5%

MF-LF

0

9 21

19

21

R5158LPCPLUS_NOT

402

1/16W5%

MF-LF

0

7 25 91

7 19 41 84 91

7 19 41 84 91

7 43

7 43

7 43

7 19 41

7 19 41

7 41 42

7 41 42

21 43 91

7 41 42

9

87

65

4

3433

3231

30

3

29

2827

2625

2423

2221

20

2

19

1817

1615

1413

1211

10

1

J510055909-0374

CRITICALLPCPLUS

M-ST-SM

7 19 41 84 91

7 19 41 84 91

7 43

7 43

7 19 41 84 91

7 19 41

7 41 42

2

1R5191

1/16WMF-LF

5%10K

402

7 41

2

1R5141

MCP_CS1_YES

MF-LF402

5%1/16W

470

2

1

3

Q5140

MCP_CS1_YES

SOD-VESM-HF

SSM3J16FV

2

1R5140

1/16W5%

402MF-LF

100K

21

R5142MCP_CS1_NO

0

402

1/16W5% PLACEMENT_NOTE=Place near J5100

MF-LF

7 41

7 39 41 42

7 18

21

R5147MCP_CS1_YES

PLACEMENT_NOTE=PLACE NEXT TO U5120

402

5%

0

MF-LF1/16W

7 41

21 43 91

7 39 41 42

7 43

7 43

43 52

52

2

1R5144MCP_CS1_NO

5%

MF-LF1/16W

20K

402

7 43

7 43

43 52

43 52

43 52

2

1 C51140.1UF

CERM

20%10V

402

LPCPLUS

1

2

910 8

5

4

3

7

6

U5110

CRITICAL

PI3USB102ZLE

LPCPLUS

TQFN

21 R5126MCP_CS1_NO

0

5%1/16W

MF-LF

402

21 R5127MCP_CS1_NO

0

5%MF-LF

1/16W 402

2

1 C5124LPCPLUS

0.1UF10V

402CERM

20%

1

2

9

10 8

5

4

3

7

6

U5120

LPCPLUS

PI3USB102ZLE

CRITICAL

TQFN

43 52

2

1R5190

MF-LF

5%1/16W

10K

402

21 91

21 43 91

21 43 91

21 43 91

21 43 91

21

R5146

PLACEMENT_NOTE=PLACE NEXT TO U14005%

MF-LF1/16W

0

402

MCP_CS1_YES&LPCPLUS_NOT

21

R5157LPCPLUS_NOT

402

0

MF-LF

5%1/16W

43 52

8 43 52

8 43

8 43

8 43 52

8

7 43

8 43

8

8 43

7 43

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

MCP79

Battery

SMC "Management" SMBus Connections

SMC

ExpressCard Slot SMC "Battery A" SMBus Connections

Battery Charger

(Write: 0x12 Read: 0x13)

ISL6258 - U7000

J3500

U1400

(MASTER)

U1400

(MASTER?)

(Write: 0x72 Read: 0x73)(Write: 0x9E Read: 0x9F)

SMSU5930


GPU Temp (Int)

G96: U8000

SMC

(MASTER)

U4900

SMC "A" SMBus ConnectionsNOTE: SMC RMT bus remains powered and may be active in S3 state

J5800


TRACKPAD

(MASTER)

U2901

U4900

SMC Vref DACsU2900

Margin Control



(MASTER)

Battery Manager - (Write: 0x16 Read: 0x17)

Battery LED Driver - (Write: 0x36 Read: 0x37)

U4900

SO-DIMM "B"J3200

Read: 0xA1-0xAF)

(Write: 0xA0-0xAE,

U2690 or U2695

HDCP ROM

GPU Temp (Ext)

U4900

(MASTER)

U4900

SMCJ3100

SMC

ALSJ3401


EMC1043-1: U5550

CPU Temp


EMC1043-1: U5570

(See Table)

BatteryJ6955

(MASTER)

SO-DIMM "A"

Battery Temp - (Write: 0x90 Read: 0x91)

(Write: 0xA0 Read: 0xA1)

The bus formerly known as "Battery B"MCP79

Mikey

(WRITE: 0X72 READ: 0X73)

U6800

MCP79 SMBus "1" Connections

SMC "0" SMBus Connections


TMP102: U5540

Battery Charger Temp

MCP Temp

SMC "B" SMBus Connections

(WRITE: 0X9A READ: 0X9B)

EMC1043-2: U5500

MCP79 SMBus "0" Connections

(Write: 0xA2 Read: 0xA3)

=PP3V42_G3H_SMBUS_SMC_BSA

SMB_BSA_DATA

SMB_BSA_CLK

=SMBUS_CHGR_SDA

SMB_MGMT_CLK

SMB_MGMT_DATA

=I2C_VREFDACS_SCL

SMBUS_SMC_BSA_SDAMAKE_BASE=TRUE

=SMBUS_EXCARD_SCL

SMBUS_SMC_BSA_SCLMAKE_BASE=TRUE

=I2C_SODIMMB_SDA

MAKE_BASE=TRUE

SMBUS_SMC_0_S0_SCL

=GPU_I2CS_SCL

MAKE_BASE=TRUE

SMBUS_SMC_MGMT_SCL

MAKE_BASE=TRUE

SMBUS_SMC_MGMT_SDA =I2C_VREFDACS_SDA

=I2C_PCA9557D_SCL

=PP3V3_S3_SMBUS_SMC_MGMT

=SMBUS_GPUTHMSNS_SDAMAKE_BASE=TRUE

SMBUS_SMC_0_S0_SDA

=SMBUS_BATT_SCL

SMB_B_S0_DATA


=I2C_HDCPROM_SDA

=I2C_SMS_SDA

=I2C_SMS_SCL

=I2C_TPAD_SDA

=I2C_TPAD_SCL

=I2C_PCA9557D_SDA

SMB_B_S0_CLK

=PP3V3_GPU_SMBUS_SMC_0_S0

=SMBUS_GPUTHMSNS_SCL

=I2C_HDCPROM_SCL

SMB_0_S0_CLK

SMB_0_S0_DATA

=I2C_SODIMMA_SCL

=I2C_SODIMMA_SDA

=I2C_SODIMMB_SCL I2C_ALS_SCL

=GPU_I2CS_SDA

=SMBUS_BATT_SDA


SMB_A_S3_DATA SMBUS_SMC_A_S3_SDAMAKE_BASE=TRUE

=PP3V3_S3_SMBUS_SMC_A_S3

SMBUS_SMC_A_S3_SCLMAKE_BASE=TRUE

SMB_A_S3_CLK

=I2C_MIKEY_SDA

=I2C_MIKEY_SCL

MAKE_BASE=TRUE

SMBUS_MCP_1_DATA

MAKE_BASE=TRUE

SMBUS_MCP_1_CLK

=PP3V3_S0_SMBUS_SMC_B_S0

=SMBUS_TMPSNSR_SDA

=SMBUS_TMPSNSR_SCL

=SMBUS_MCPTHMSNS_SDA

=SMBUS_MCPTHMSNS_SCL

SMBUS_SMC_B_S0_SDAMAKE_BASE=TRUE

I2C_ALS_SDA

=I2C_CPUTHMSNS_SDA

=I2C_CPUTHMSNS_SCLSMBUS_SMC_B_S0_SCLMAKE_BASE=TRUE

=SMBUS_CHGR_SCL

=SMBUS_EXCARD_SDA

MAKE_BASE=TRUE

SMBUS_MCP_0_CLK

SMBUS_MCP_0_DATAMAKE_BASE=TRUE

051-8071

9844

B

SYNC_DATE=07/22/2008SYNC_MASTER=BEN_K20

K20 SMBUS CONNECTIONS

2

1R5231

MF-LF

1.5K

402

1/16W5%

2

1R5230

402

1.5K5%

1/16WMF-LF

2

1R52711K

402MF-LF1/16W5%

2

1R52701K5%

1/16WMF-LF

402

2

1R52811K

402MF-LF1/16W5%

2

1R52801K

402MF-LF1/16W

5%

2

1R5250

MF-LF

4.7K5%

402

1/16W

2

1R5251

402

1/16W

4.7K5%

MF-LF

2

1R5260

5%

3.3K

1/16WMF-LF402

2

1R52613.3K

402MF-LF

5%

1/16W

2

1R5290

1/16W

4.7K

402

5%

MF-LF

2

1R5291

5%

4.7K

1/16WMF-LF

402

2

1R5201

1/16W

5%

MF-LF402

4.7K

2

1R5200

MF-LF402

1/16W

5%

4.7K

8

41

41

60

41

41

26

31

28

94

76

94

94 26

26

8

47 94

59

41

8

24

51

51

50

50

26

41

8

47

24

41

41

27

27

28 30

76

59

8

41

8

41

58

58

21 91

21 91

8

47

47

47

47

94

30

47

47 94

60

31

7 13 21 91

7 13 21 91

OUT

N-CHN

S

D

G

P-CHN

G

DS

IN

OUT

V+

REFIN+

IN- OUT

GND

OUT

IN

OUT

OUT

IN

VER 1

VCC

A

1

0

B1

GND

B0

SEL

INOUT

IN

OUTIN-

IN+ REF

V+

GND

OUT

OUTIN

OUT

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

BMON Current Sense - Entire circuit must be near SMC (U4900)

PBUS Voltage Sense & Filter

Rthevenin = 4504 ohms

Place short near U8000 center

Place RC close to SMC

CPU VCore Load Side Current Sense / Filter

Place short near U1000 center

Enables PBUS VSense divider when high.

DCIN Current Sense Filter






Consider INA211 (GAIN 500 version) since I=4.93 Amps across R5388

CPU VCore High Side Current Sensor


GPU Voltage Sense / Filter

CPU Voltage Sense / Filter

MCP Voltage Sense / Filter

LOAD SIDE:

current from battery to PBUS

INA214 has gain of 100V/V

Monitors battery discharge

REGULATOR SIDE:

U5303 only senses current up to 6.6A

=PP3V42_G3H_BMON_ISNS

BMON_INA_OUT

CHGR_BMON

GND_SMC_AVSS


PPBUS_G3H_VSENSE

VOLTAGE=18.5V

SMC_CPU_VSENSE

BMON_AMUX_OUT

SMC_GPU_VSENSE

SMC_MCP_VSENSE

SMC_CPU_ISENSE

=PPVCORE_S0_CPU

=PPVIN_S5_CPU_IMVP_ISNS

=PPVIN_S5_CPU_IMVP_ISNS_R

GPUVSENSE_IN

CPUVCORE_HISIDE_IOUT

CHGR_AMON SMC_DCIN_ISENSE

GND_SMC_AVSS

PPBUS_G3H

SMC_CPU_HI_ISENSE

GND_SMC_AVSS

PBUSVSENS_EN_L

ISNS_CPU_N

PBUSVSENS_EN_DIV SMC_PBUS_VSENSE

GND_SMC_AVSS

GND_SMC_AVSS

GND_SMC_AVSS

ISNS_CPU_P

CPUVSENSE_IN

=PBUSVSENS_EN

GND_SMC_AVSS

IMVP6_IMON

=PPVCORE_GPU_REG

SMC_BATT_ISENSE

SMC_BMON_MUX_SEL

=PPVCORE_S0_MCP

=PP3V42_G3H_CPUCOREISNS

MCPVSENSE_IN

GND_SMC_AVSS

CHGR_CSO_R_N

CHGR_CSO_R_P

Current & Voltage Sensing

SYNC_MASTER=YWU_K20 SYNC_DATE=08/20/2008

45 98

B051-8071

21

XW5309SM

2

1 C5309

402

X5R

20%

0.22UF

6.3V

21

R53094.53K

1%

402

1/16W

MF-LF

41

21

XW5359SM

2

1 C53300.22UF

402

20%

X5R

6.3V

41

60 21

R5380

1%

MF-LF

402

1/16W

4.53K

2

1 C5380

6.3V

X5R

20%

402

0.22UF

41

21

R53594.53K

1%

1/16W

MF-LF

402

2

1 C5359

402

0.22UF

X5R

20%

6.3V

41

3

1

6

4

5

2

U5303SC70

INA214

BMON_ENG

60 96

60 96

2

1 C5318

402

10V20%

CERM

0.1uF

BMON_ENG

60

2 1

R5330BMON_PROD

0

1/16WMF-LF

5%

402

5

6

2

1

3 4

U5313NC7SB3157P6XG

BMON_ENG

SC70

2

1R5371BMON_ENG

402

1/16WMF-LF

100K5%

21

R53914.53K

MF-LF1/16W

402

1%

42

2

1 C53900.22UF

X5R

20%6.3V

402

41

2

1 C5369BMON_ENG

0.1uF20%10V

402CERM

2

1 C53880.1UF

CERM

10V

20%

402

8

8

21

R5335

1%

402

1/16W

MF-LF

4.53K

2

1 C5335

X5R

0.22UF

402

6.3V

20%

42

4

3

2

1R5388

MF

0.0011%1W

1206

3

1

6

4

5

2

U5388INA210

SC70

2

1R5332

402

17.4K1%

1/16WMF-LF

42 21

R5399

1/16W

402

1%

MF-LF

4.53K21

XW5399SM

PLACEMENT_NOTE=Place near U1400 center

2

1 C5399

X5R402

20%6.3V

0.22UF

2

1

R5316100K

402

MF-LF

1/16W

5%

61 21

R53316.19K

1%

1/16W

MF-LF

402

4

5

3

Q5315FDG6332CG

SC70-6

1

2

6

Q5315FDG6332CGSC70-6

2

1

R53866.98K

402

MF-LF

1/16W

1%

2

1 C5385

20%

X5R

402

0.22UF

6.3V

2

1

R5385

1%

1/16W

MF-LF

402

12.7K

41

2

1

R5315100K

402

MF-LF

1/16W

5%

8

41 42 45 46

8 11 12

41 42 45 46

7 8

41 42 45 46

96

41 42 45 46

41 42 45 46

41 42 45 46

96

67

41 42 45 46

8 77

8 22 23

8

41 42 45 46

V+

V-THRM

V+

V-THRM

V+

V-THRM

IN

IN

IN

OUT

OUT

OUT

V+

REFIN+

IN- OUT

GND

IN

OUT

IN

OUT

IN

OUT

OUT

IN

V+

V-THRM

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

Gain: 1.4x

GPU VCore Current Sense and GPU 1.8V Current Sense share

MCP VCore Current Sense


Gain: 274xGPU 1.8V Current Sense

CPU FSB 1.05V Current Sense

dual package opamp U5440

OPA2333s for proto are placeholders for OPA2330

1.05V CPU Current Sense Filter

GPU 1.8V Current Sense FilterPlace RC close to SMC

NC

NCNC

NCNC

NC

dual package opamp U5410

GPU VCore Current Sense FilterMCP VCore Current Sense Filter

Gain: 274x


GPU VCore Current Sense


Gain: 274x

MCP MEM VDD Current Sense

MCP MEM VDD Current Sense and CPU FSB 1.05V Current Sense share

MCP MEM VDD Current Sense Filter


GPUISENS_N

MCPDDR_IOUT

=PP3V3_S0_MCPCOREISNS

=PP3V3_S0_MCPDDRISNS

MCPCOREISNS_N

DDRISNS_N

=PPMCPDDR_ISNS

1V05CPUISNS_R_P

=PP1V8_S0GPU_ISNS_R

DDRISNS_R_N

1V05CPU_N

=PP3V3_S0_GPU1V8ISNS

SMC_GPU_1V8_ISENSE

GND_SMC_AVSS

GND_SMC_AVSS

SMC_GPU_ISENSE

SMC_CPU_FSB_ISENSE

SMC_MCP_CORE_ISENSEMCPCORE_IOUT

GND_SMC_AVSS

GND_SMC_AVSS

GND_SMC_AVSS

P1V8_S0GPU_IOUT

P1V8GPU_P

P1V8GPU_N

P1V8GPUISNS_R_P

SMC_MCP_DDR_ISENSE

DDRISNS_P

CPU1V05_S0_IOUT

P1V8GPUISNS_R_N

DDRISNS_R_P

=PP1V8_S0GPU_ISNS

MCPCOREISNS_P

1V05CPUISNS_R_N

=PPMCPDDR_ISNS_R

1V05CPU_P

GPUISENS_PGFXIMVP6_IMON

GPUVCORE_IOUT

051-8071 B

9846

SYNC_MASTER=YWU_K20

Current SensingSYNC_DATE=08/12/2008

8

4

9

1

2

3

U5410OPA2333DFN

65 96

2

1C5472SIGNAL_MODEL=EMPTY

470PF10%50VCERM402

2

1 C5475

20%

0.22UF

6.3V

X5R

402

2

1R54371M1%

MF-LF1/16W

SIGNAL_MODEL=EMPTY

402

21

R5436

402

1%

MF-LF

1/16W

3.65K

21

R5431

402

MF-LF

1%

3.65K

1/16W

21

R5432

402

MF-LF

1/16W

1%

1M

SIGNAL_MODEL=EMPTY

21

C5432

402

50V

470PF

10%

CERM

SIGNAL_MODEL=EMPTY

21

R5443

1/16W

402

MF-LF

1%

3.65K

41

21

R5444

MF-LF

402

1/16W

1%

3.65K

8

4

3

2

1R5445

MF

CRITICAL

1206

0.0021%

1/4W

8

2

1C5442

402CERM

470PF

50V10%

SIGNAL_MODEL=EMPTY

2

1R5442

1/16W

1M1%

SIGNAL_MODEL=EMPTY

MF-LF402

21

R5441 SIGNAL_MODEL=EMPTY

MF-LF

1/16W

402

1%

1M

21

C5441

402CERM

10%50V

SIGNAL_MODEL=EMPTY

470PF

2

1 C5440

402

10V

CERM

20%

0.1UF

8

8

2

1C5412470PF

402

10%50VCERM

SIGNAL_MODEL=EMPTY

21

R5414

1/16W

MF-LF

3.65K

402

1%

2

1R5412

1%1M

1/16WMF-LF402

SIGNAL_MODEL=EMPTY

2

1 C54100.1UF20%

CERM

10V

402

21

C5411

402

50V

470PF

CERM

10% SIGNAL_MODEL=EMPTY

21

R5411

402

1M

MF-LF

1/16W

1%

SIGNAL_MODEL=EMPTY

4

3

2

1R54130.002

CRITICAL

1206

1/4WMF

1%21

R54654.53K

1%

MF-LF

402

1/16W

21

R54153.65K

1%

402

MF-LF

1/16W42

77

21

C5498470PF

CERM

10%50V

402

2

1 C5465

6.3V

402

X5R

20%

0.22UF

21

R5498

402

1/16W

MF-LF

1%

4.02K

21

R549110K

402

1%

1/16W

MF-LF

21

R5493

402

MF-LF

1/16W

1%

2.87K

2

1 C5420

CERM

0.1UF20%

402

10V

3

1

6

4

5

2

U5420

SC70INA213

21

R54954.53K

402

1%

1/16W

MF-LF

2

1 C54350.22UF

402

X5R

20%

6.3V

42

21

R54704.53K

1/16W

1%

MF-LF

402

2

1 C54700.22UF

X5R

20%

6.3V

402

42

21

R5440

MF-LF

1%

4.53K

402

1/16W

2

1 C54900.22UF20%

402

X5R

6.3V

42

65 96

64 96

64 96

8

4

9

7

6

5

U5440OPA2333DFN

8

4

9

1

2

3

U5440OPA2333DFN

8

4

9

7

6

5

U5410OPA2333DFN

21

R54754.53K

402

1%

1/16W

MF-LF

96

8

8

96

96

96

8

41 42 45 46

41 42 45 46

41 42 45 46

41 42 45 46

41 42 45 46

96

96

96

96

96

96

96

96

BI

BI

BI

BI

BI

BI

GND

V+

ADD0

ALERTSCL

SDA

DN1

DP1

GNDSMCLK

SMDATA

VDD

THERM*

DP2/DN3

DN2/DP3

ALERT*

THRM_PAD

DN1

DP1

GNDSMCLK

SMDATA

VDD

THERM*

DP2/DN3

DN2/DP3

ALERT*

THRM_PAD

BI

BI

DN1

DP1

GNDSMCLK

SMDATA

VDD

THERM*

DP2/DN3

DN2/DP3

ALERT*

THRM_PADBI

BI

BI

BI

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

GPU Proximity/GPU Die/Left Heat Pipe

Placement note:

Detect GPU Die Temperature

charger circuit

Battery Charger Proximity

Detect Left Heat Pipe Temperature

Place on top side under left heat pipe near CPU

Placement note:

Compensation for External Diode 1 only

Note: EMC1403 can perform Beta

TEMP SENSOR HAS ADDRESS WRITE:0X92, READ: 0X93

close to right fin stack

Place U5540 near battery

Placement note:

Place Q5501 on bottom side

Detect Right Fin Stack Temperature

Placement note:Place U5570 under CPU

and close to left fin stack

Detect CPU Die Temperature

to IC pins as possible

Keep 2 caps as close

Placement note:

Place U5550 near GPU

Placement note:

CPU Proximity/CPU Die/Right Fin Stack

Detect Right Heat Pipe Temperature

Detect MCP Die Temperature

518S0519

MCP Proximity/MCP Die/Right Heat Pipe

Placement note:Keep 2 caps as close

to IC pins as possible NOTE: U5500 Changed to EMC1403-2. Write Address: 0x9A

Place U5500 near MCP

Placement note:

=PP3V3_S0_BATTCHARGERTMPSNSR

=SMBUS_TMPSNSR_SCL

=SMBUS_TMPSNSR_SDA

CPU_THERMD_N

CPUTHMSNS_ALERT_L

=I2C_CPUTHMSNS_SCL

=I2C_CPUTHMSNS_SDA

CPUTHMSNS_THM_L

CPU_THERMD_P

PP3V3_S0_CPUTHMSNS_R


VOLTAGE=3.3V

=PP3V3_S0_CPUTHMSNS

=PP3V3_S0_GPUTHMSNS

GPU_TDIODE_N

GPUTHMSNS_D_P

GPUTHMSNS_D_N

GPU_TDIODE_P

=SMBUS_GPUTHMSNS_SDA

=SMBUS_GPUTHMSNS_SCL

GPUTHMSNS_ALERT_L

GPUTHMSNS_THM_L

VOLTAGE=3.3V

PP3V3_S0_GPUTHMSNS_R


CPUTHMSNS_D2_P

CPUTHMSNS_D2_N

MCPTHMSNS_D_P

MCP_THMDIODE_N

=PP3V3_S0_REMTHMSNS

MCPTHMSNS_D_N

MCP_THMDIODE_P

=SMBUS_MCPTHMSNS_SDA

REMTHMSNS_THM_L

REMTHMSNS_ALERT_L

=SMBUS_MCPTHMSNS_SCL

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mmPP3V3_S0_REMTHMSNS_R

VOLTAGE=3.3V

SYNC_MASTER=YWU_K20 SYNC_DATE=05/28/2008

47 98

B051-8071

Thermal Sensors

2

1C5580

402

50VCERM

0.0022UF10%

SIGNAL_MODEL=EMPTY

2

1C5590

CERM50V10%

0.0022uF

402

SIGNAL_MODEL=EMPTY

21

R557047

5%

402

1/16WMF-LF

2

1 C5570

402CERM10V20%0.1uF

44

44

2

1R5502

402

1/16W5%10K

MF-LF

2

1R5501

402MF-LF1/16W

10K5%

44

44

2

1 C5500

402

20%10VCERM

0.1uF

1

11

7

9

10

6

4

2

5

3 8

U5500

DFNEMC1403-2

CRITICAL

2

1C5511SIGNAL_MODEL=EMPTY

0.0022uF

CERM

10%50V

402

2

1C55210.0022uF

CERM402

50V10%

SIGNAL_MODEL=EMPTY

21

R5500

1/16WMF-LF402

47

5%

21 96

21 96

2

1

4

3

J5502

M-RT-SM78171-0002

1

11

7

9

10

6

4

2

5

3 8

U5550

DFNEMC1403-1

CRITICAL

1

11

7

9

10

6

4

2

5

3 8

U5570

DFNEMC1403-1

CRITICAL

5

6

1

2

3

4

U5540HPA00330AI

SOT563

2

3

1Q5503SOT732-3

BC846BMXXH

75 96

75 96

2

1C5552

10%50V

402CERM

0.0022uF

SIGNAL_MODEL=EMPTY

2

1C55510.0022uF

50V

402CERM

10%

SIGNAL_MODEL=EMPTY

21

R555047

1/16W5%

MF-LF402

2

1 C5550

CERM10V20%0.1uF

402

2

1R5552

MF-LF

10K

1/16W

402

5%

2

1R5551

5%

402

10K

1/16WMF-LF

44

44

10 96

10 96

2

3

1Q5501SOT732-3

BC846BMXXH

2

1 C5540

10V

CERM

0.1uF20%

402

2

1R5571

1/16W

10K

MF-LF

5%

4022

1R5572

402MF-LF1/16W5%10K

8

44

44

8

8

96

96

96

96

7 96

8

7 96

G

S D

G

S DIN

OUT OUT

IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

Right FanLeft Fan

518S0521518S0521

SMC_FAN_0_TACH

=PP3V3_S0_FAN_LT

=PP5V_S0_FAN_LT

FAN_LT_TACH

=PP3V3_S0_FAN_RT

FAN_RT_TACH

=PP5V_S0_FAN_RT

FAN_RT_PWMSMC_FAN_0_CTL

SMC_FAN_1_TACH

SMC_FAN_1_CTLFAN_LT_PWM

Fan Connectors

B051-8071

9848


41

41 41

41

4

3

2

1

6

5

J566078171-0004

CRITICAL

M-RT-SM

4

3

2

1

6

5

J5650M-RT-SM

CRITICAL

78171-0004

1

2

6

Q56602N7002DW-X-GSOT-3632

1R5661100K

5%

MF-LF402

1/16W

4

5

3

Q56602N7002DW-X-GSOT-3632

1R5651

402MF-LF

5%1/16W

100K

21

R5665

402

47K

MF-LF1/16W5%

2

1R5660

402MF-LF

47K5%

1/16W

21

R5655

1/16W5%

MF-LF402

47K2

1R5650

1/16W

47K

402

5%

MF-LF

8

7 8

7

8

7

8

7 7

D

G S

P2_4

P2_6

VDD

P0_4

P0_2

P2_0P2_2P

0_0

P2_3P2_1P4_7P4_5P4_3P4_1P3_7P3_5P3_3P3_1P5_7P5_5P5_3P5_1

P1_1

P1_3

P1_5

P1_7

P7_7

VSS

D+D-VDD

P7_0

P1_0

P1_2

P1_4

P1_6 P5_0

P5_2P5_4P5_6P3_0P3_2P3_4

P4_0P4_2P4_4P4_6

P3_6

P2_5

P2_7

P0_3

VSS

P0_5

P0_7

P0_6

PADTHRML

(SYM-VER2)

P0_1

Y

C

B

A

IN

OUT

Y

B

A

Y

B

A

Y

B

A

NC

NC

NC

NC

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

PIN NAME

2.55 KOHM

KEYBOARD CONNECTOR

SMC_MANUAL_RESET LOGIC

TPAD BUTTONS DISABLE

R_SNS

0.204 V

294E-6 W

0.0188 V

SPI HOST TO Z2

PLACE C5704, C5705 & C5706

ISSP SCLK/I2C SCL

ISSP CLOCK

18V BOOSTER

PSOC

3V3 LDO

IC

V+

VDD

VDD

VIN

14MA (MAX)

8MA (TYP)

60MA MAX

60MA MAX

80UA

10UA

10 OHM

0.2 OHM

1.5 OHM

V_SNS POWER

0.021 V

0.012 V

0.012 V

0.6 V

0.0255 V 0.255E-6 W

16.32E-6 W

36E-3 W

0.72E-3 W

96E-6 W

APN 518S0637

LID CLOSE => SMC_LID_LC < 0.50V

LID OPEN => SMC_LID_LC ~ 3.42VWHEN THE LID IS CLOSED

THIS ASSUMES THERE’S A PP3V42_G3H PULL UP ON MLB

THE TPAD BUTTONS WILL BE DISABLE

TMP102

U5701 CHIP DECOUPLING

PLACE THESE COMPONENTS CLOSE TO J5800

USB INTERFACES TO MLB

APN 311S0406

APN 337S2983

KEYBOARD SCANNER

VOUTTRACKPAD PICK BUTTONS

TO MLB CONNECTOR

PLACE C5701, C5702 & C5703

CLOSE TO U5701 VDD PIN 22 CLOSE TO U5701 VDD PIN 49

PSOC USB CONTROLLER

ISOLATION CIRCUIT

TEST POINTS ARE FOR ON BOARD PROGRAMMING

PSOC PROGRAMMING CONNECTOR

ISSP DATA

75.2E-6 W

CURRENT

4.7 OHM4MA (MAX)

APN 518S0430

ISSP SDATA/I2C SDA

=PP3V3_S3_TPAD

=PP3V42_G3H_TPAD

=PP3V3_S3_TPAD

BUTTON_DISABLE

=PP3V42_G3H_TPAD

ISSP_SCLK_P1_1

Z2_RESET

PSOC_MISO

PSOC_SCLK

Z2_MISO

TP_P4_5

WS_KBD18

WS_KBD16N

WS_KBD7

Z2_KEY_ACT_L

WS_KBD19

WS_CONTROL_KEY

WS_KBD13

TP_PSOC_P1_3

WS_KBD20

WS_KBD3

WS_KBD9

WS_KBD10

WS_KBD12

WS_KBD14

WS_KBD15_C

Z2_CS_L

WS_KBD22

WS_KBD11

Z2_SCLK

WS_KBD8

WS_KBD7

WS_CONTROL_KBD

WS_LEFT_OPTION_KBD

WS_KBD_ONOFF_L

=PP3V42_G3H_TPAD

WS_LEFT_SHIFT_KBD

WS_KBD23

WS_KBD22

WS_KBD19

WS_KBD20

WS_KBD21

WS_KBD9

WS_KBD10

WS_KBD11

WS_KBD13

WS_KBD14

WS_KBD17

WS_KBD18

WS_KBD6

WS_KBD5

WS_KBD4

WS_KBD3

WS_KBD2

WS_KBD1

WS_KBD8

WS_LEFT_SHIFT_KEY

WS_KBD16N

WS_KBD17

SMC_LID

WS_CONTROL_KBD

PSOC_MOSI

PSOC_F_CS_L

WS_KBD12WS_KBD15_C

BUTTON_DISABLE

WS_KBD23

WS_KBD21

Z2_MOSI

SMC_TPAD_RST_L

WS_LEFT_OPTION_KBD

PP3V3_S3_PSOC

WS_LEFT_SHIFT_KBD

WS_LEFT_SHIFT_KEY

DIFFERENTIAL_PAIR=USB2_TPAD

USB_TPAD_P

WS_KBD16_NUM

WS_KBD15_CAP

SMC_ONOFF_L

PP3V3_S3_PSOC

USB_TPAD_R_P

DIFFERENTIAL_PAIR=USB2_TPADNET_SPACING_TYPE=USBNET_PHYSICAL_TYPE=USB_90D

WS_KBD1

WS_CONTROL_KEY

WS_LEFT_SHIFT_KBDZ2_CLKIN

WS_KBD2

WS_LEFT_OPTION_KBD

WS_CONTROL_KBD

=PP3V42_G3H_TPAD

DIFFERENTIAL_PAIR=USB2_TPAD

USB_TPAD_N

MIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.50MMPP3V3_S3_PSOC

=PP3V3_S3_TPAD

=PP3V3_S3_TPAD

ISSP_SDATA_P1_0

=PP3V42_G3H_TPAD

=PP3V3_S3_TPAD

=PP3V3_S3_TPAD

ISSP_SCLK_P1_1

WS_LEFT_OPTION_KEY

TP_P7_7

ISSP_SDATA_P1_0

WS_KBD6

WS_KBD5

WS_KBD4

USB_TPAD_R_N

DIFFERENTIAL_PAIR=USB2_TPADNET_SPACING_TYPE=USBNET_PHYSICAL_TYPE=USB_90D

TP_PSOC_SDA

TP_PSOC_SCL

Z2_DEBUG3

WS_LEFT_OPTION_KEY

Z2_HOST_INTN

PICKB_L

Z2_BOOT_CFG1

WELLSPRING 1SYNC_DATE=05/19/2008

B051-8071

9849

SYNC_MASTER=YMA_K20

2 1

C57270.1UF

10V20%

402CERM

2 1

C5726

20%10VCERM402

0.1UF

2 1

C5725

402

10V20%

CERM

0.1UF

4

5

3

1

2

U5725

CRITICALTC7SZ08AFEAPE

SOT665

4

5

3

1

2

U5727

SOT665

TC7SZ08AFEAPECRITICAL

4

5

3

1

2

U5726

TC7SZ08AFEAPE

SOT665

CRITICAL

9

8

7

6

5

4

30

3

29

28

27

26

25

24

23

22

21

20

2

19

18

17

16

15

14

13

12

11

10

1

32

31

J5713CRITICAL

FF14-30A-R11B-B-3H

F-RT-SM

4

3

2

1

6

5

J5702

TPAD_DEBUGCRITICAL

FH19C-4S-0.5SH25F-RT-SM1

21

R5715

1/16WMF-LF

10K

402

1%

21

R5714470

1/16W

402MF-LF

1%

21

R5710

402MF-LF1/16W5%

1K

2

1 C5710

CERM

PLACEMENT_NOTE=NEAR J5713

20%0.1UF

10V

402

40 41 42

21

R5704

402

1/16W

1.5

5%

MF-LF

5

4

6

3

1

2

U5703

SC70SN74LVC1G10

CRITICAL

21

R5701

402MF-LF

5%

24

1/16W

50

19

49

22

57

23

24

11 32

12 31

13 30

14 29

3 40

4 39

5 38

6 37

7 36

8 35

9 34

10 33

55

44

56

43

1 42

2 41

15

28

16

27

17

26

18

25

51

48

52

47

53

46

54

45

21

20

U5701

OMIT

CY8C24794MLF

CRITICAL

21

R5702

MF-LF1/16W5%

402

24

2

1 C5701

6.3V

603X5R

4.7UF20%

2

1 C5702

402CERM50V5%100PF

2

1 C5703

16VX7R-CERM

10%0.1UF

402

2

1 C5704

402CERM50V

100PF5%

2

1 C570510%16VX7R-CERM

0.1UF

402

2

1 C5706

603X5R6.3V20%4.7UF

2

1R576933K

1/16W5%

402MF-LF

2

1R577033K

402

1/16W5%

MF-LF

2

1R577133K

402

1/16W

MF-LF

5%

2

1 C5758

402

10%16V

0.1UF

X7R-CERM

21

3

Q5701

SOD-VESM-HF

SSM3K15FV

8 49

8 49

8 49

49

8 49

7 49

7 50

7 50

7 50

7 50

7

49

49

7 49

7 50

7

49

49

7 49

7

7

49

7 49

7 49

7 49

7 49

7 49

49

7 50

7

49

7 49

50

7 49

7 49

7 49

7 49

7

8 49

7 49

7 49

7 49

7 49

7 49

7 49

7 49

7 49

7 49

7 49

7 49

7 49

7 49

7 49

7 49

7 49

7 49

7 49

7 49

7 49

49

49

7 49

7 49

7 50

7 50

7 49 49

49

7

49

7

49

50

42 7 49

49

7 49

49

20 91

7

7

7 41 42

49

7 49

49

7 49 7 50

7 49

7 49

7 49

8 49

20 91

49 8 49

8 49

7 49

8 49

8 49

8 49

7 49

49

7 49

7 49

7 49

7 49

7 50

49

50

7 50

7 50

VDD

VOUTGND

CE

IN

THRML

CAP

SW

LED

VIN

CTRL

PADGND

CTRL

PGND

THRML

L

VIN

DO

FB

SW

PAD GND

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

- RIPPLE TO MEET ERS

- 100-300 KHZ CLEAN SPECTRUM

- STARTUP TIME LESS THAN 2MS

- R5812,R5813,C5818 MODIFIED

BOOSTER DESIGN CONSIDERATION:

BOOSTER +18.5VDC FOR SENSORS

HIGH= keyboard backlight not present

APN 518S0691

HF APN 152s0898

APN 353S1401

To detect Keyboard backlight, SMC will

LOW = keyboard backlight present

J5815 pin 1 is grounded

on keyboard backlight flex

IPD FLEX CONNECTOR

APN 516S0689

BOM OPTION: KBDLED_YES

tristate SMC_SYS_KBDLED:

R5853 ALWAYS PRESENT

APN 371S0313

- POWER CONSUMPTION

- DROOP LINE REGULATION

APN 152S0504

KBD BACKLIGHT CONNECTOR

Keyboard LED Driver

3V3 LDO FOR IPD

APN 353S1364

SWITCH_NODE=TRUE


KBDLED_SW

SMC_KDBLED_PRESENT_L


KBDLED_ANODE

=PP3V3_S0_TPAD =PPVIN_S0_KBDLED

SMC_SYS_KBDLED


KBDLED_CAP

Z2_SCLK

Z2_RESET

PP3V3_S3_LDO0.20MM0.50MM

Z2_CLKIN

Z2_BOOT_CFG1Z2_HOST_INTN

Z2_BOOST_EN

Z2_CS_L

PICKB_LPSOC_MISO

PSOC_MOSI

PSOC_SCLK

=I2C_TPAD_SCL

0.20MM

0.50MM PP18V5_S3

=I2C_TPAD_SDA

PSOC_F_CS_L

Z2_KEY_ACT_L

Z2_DEBUG3

Z2_MOSIZ2_MISO

SMC_KDBLED_PRESENT_L

0.20MM

0.50MM

TPAD_GND_F

=PP5V_S3_TPAD

VOLTAGE=5VMIN_LINE_WIDTH=0.50MMMIN_NECK_WIDTH=0.20MM

PP3V3_S3_LDO_RMIN_LINE_WIDTH=0.50MM


VOLTAGE=3.3V

PP3V3_S3_LDO

MIN_LINE_WIDTH=0.50MM


VOLTAGE=3.3V

Z2_BOOST_EN


MIN_LINE_WIDTH=0.50MM PP5V_S3_BOOSTER

INPUT_SW

0.50MM0.20MM

BOOST_SW


SWITCH_NODE=TRUE


PP18V5_S3MIN_LINE_WIDTH=0.50MMMIN_NECK_WIDTH=0.20MM

VOLTAGE=18.5V

BOOST_FB

VOLTAGE=18.5V

PP18V5_S3_SWMIN_LINE_WIDTH=0.50MM


MIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.50MM

TPAD_GND_FVOLTAGE=0V

=PP5V_S3_TPAD PP5V_S3_VR

WELLSPRING 2SYNC_MASTER=K20_MLB SYNC_DATE=09/24/2008

9850

051-8071 B

2

1 C5800

PLACEMENT_NOTE=NEAR J5800

0.1UF20%10VCERM

402

2

1 C5850

603

10%1UF16VX5R

21

L5850

CRITICAL

1098AS-SM

10UH-0.58A-0.35OHM

2

1 C58160.1UF

16VX7R-CERM

10%

402

2

1 C58172.2UF10%

603

X5R16V

2

9

8

7

1

6

4

3 5

U5805

CRITICAL

TPS61045QFN

21

R5805

0 5%

1/16W

MF-LF

402

21

L5801CRITICAL

3.3UH-870MA

VLF3010AT-SM-HF

2

1R5811100K

MF-LF

1%1/16W

402

2

1R5813

1/16W

MF-LF

1%

71.5K

402

2

1 C5819

603-1

10%25V

X5R

1UF

21

D5802

B0520WSXG

SOD-323

2

1 C5818

402

39PF

CERM

50V5%

2

1R5812

1/16WMF-LF

1M1%

402

21

R5806

402

5%

0

MF-LF1/16W

21

R5801

603MF-LF

5%1/10W

0

4

3

2

1

J5815FF18-4A-R11AD-B-3H

F-RT-SM

CRITICAL

2

1 C5855

X5R

603

35V10%

1UF

2

1R5855

1%

10

402MF-LF

1/16W

2

1R5852NO STUFF

10K

1/16W

402MF-LF

5%

1

7

3

5

2

6

4

U5850CRITICAL

DFN

LT3491

2

1R5853

402

470K5%

1/16WMF-LF

2

1R5854

402

4.7K5%

MF-LF1/16W

41

21

R5873

1/16W

402

10

1%

MF-LF

2

1 C585420%6.3V

X5R603

4.7UF

2

1 C58380.1UF

X7R-CERM402

16V10%

21

R5836

0.2

1%

MF

402-HF

1/6W

3

24

1

VR5802

MLF

MM3243DRRE

CRITICAL

2

1 C5853

16V

603

10%

X5R

2.2UF

9

8 7

6 5

4 3

22 21

20

2

19

18 17

16 15

14 13

12 11

10

1

J5800

M-ST-SM

55560-0228

CRITICAL

50 7

7

8 9

49

49 7

50 7

49 7

49 7

49

50 7

49 7

49 7

49 7

49 7

49 7

44

50 7

44

49 7

49 7

49 7

49

49 7

50 7

50 7

50 8

50 7

50 7

50 7

50 7

50 8

OUT

FS

PD

ST

RES

RES

GNDNC

NC

NC

NC

NC

NC

VOUTX

VOUTY

VOUTZ

VDD

IN

VDDIO

SDI

SDO

VDD

GND

INT

SCK

RESERVED

CSB

NC

OUT

OUT

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

R5921 PULLS UP SMS_PWRDN TO TURN OFF SMS WHEN PIN IS NOT BEING DRIVEN BY SMC

Pull-up required if SMS_INT_L not used.

Stuff R5931 AND NoStuff R5932 to use U5930

NoStuff R5931 AND Stuff R5932 if U5930 is not used

Analog SMS

NC

NC

NC

NC

NC

NC

NC

Digital SMS

+Z (up)

+Y

+XFront of system

placed on board top-side:

Desired orientation when

in correct orientationCircle indicates pin 1 location when placed

+Y

+X

+Z (up)

NC

NC

Front of system

placed on board top-side:

Desired orientation when

in correct orientationCircle indicates pin 1 location when placed

NC

NC

SMS_ONOFF_L

SMS_SELFTESTMAKE_BASE=TRUESMS_PWRDN

SMS_Y_AXIS

SMS_X_AXIS

SMS_Z_AXIS

SMS_INT_L=I2C_SMS_SDA

=PP3V3_S5_SMC

=I2C_SMS_SCL

=PP3V3_S3_SMS

=PP3V3_S3_SMS


Sudden Motion Sensor (SMS)

051-8071 B

9851

SYNC_MASTER=YWU_K20

41

41

2

1 C5922

402X5R16V10%0.1UF

2

1 C5926

603

20%10UF4VX5R

42

2

1R593210K1/16WMF-LF

PROD_DIGSMS5%

402

2

1R5931ENG_DIGSMS

5%10K

4021/16WMF-LF

92

7

8

6

10

1

12

11

4

3

5

U5930

LGA

ENG_DIGSMS

273141043

CRITICAL

2

1 C5931

16V402CERM-X5R10%0.022UF

ENG_DIGSMS

2

1 C59320.1UF10%16VX5R402

ENG_DIGSMS

41

2

1R5922

5%

MF-LF402

10K

1/16W

8

10

12

14

2

4

15

5

16

13

11

9

6

3

7

1

U5920

CRITICAL

LGAAP344ALH

2

1R592110K5%

1/16WMF-LF

402

2

1 C5923

16V10%

CERM

0.01UF

402

2

1 C59240.01UF10%

CERM16V

402

2

1 C59250.01UF

402

16V10%

CERM

41

44

42 41 8

44

51 8

51 8

INOUT

ININ

GND

VCC

WP*/ACC

CE*

SI/SIO0

HOLD*

SCLK

SO/SIO1

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

42 MHz

1 MHz

25 MHz

31 MHz

1

0

1

0

1

0

1

0

MCP79 SPI Frequency Select

Frequency SPI_MOSI SPI_CLK

Any of the 4 frequencies can be selected

with R6190, R6191, R5190 and R5191

25MHz is selected with R5190 and R5191

SPI_CLK_MUX SPI_CLK

SPI_MLB_CS_L

SPI_WP_L

SPI_HOLD_L

=PP3V3_S5_ROM

SPI_MISO_R

SPI_MOSI

SPI_MISO_MUX

SPI_MOSI_MUX


SPI ROM

051-8071 B

9852

2

1C61000.1UF

10VCERM402

20%

2

1R6101

1/16W5%3.3K

MF-LF4022

1R6100

402MF-LF1/16W

3.3K5%

3

8

2

56

7

4

1

U6100

SOP

OMIT

CRITICAL

MX25L3205DM2I-12G

32MBIT2

1R6190NO STUFF

402

10K

1/16W5%

MF-LF

21

R6150

PLACEMENT_NOTE=PLACE CLOSE TO U6100

MF-LF

5%1/16W

0

402

43 43 21

R6152

PLACEMENT_NOTE=PLACE CLOSE TO U6100

MF-LF

5%1/16W

0

40243 21

R6105

PLACEMENT_NOTE=PLACE CLOSE TO U6100MF-LF

5%1/16W

0

402

2

1R6191NO STUFF

402MF-LF

5%1/16W

10K

43

91

43 8

91

91

OUTS

OUT

SELB

SELA

BP

IN

GND

EN

PADTHRML

EN

IN

NC

NR/FB

OUT

GND

IN

OUT

OUT

OUT

IN

OUT

OUT

OUT

IN

SYNC

CD-R

PORT-F-VREFO

PORT-E-VREFO

PORT-B-VREFO

PORT-C-VREFO

PORT-B-R

PORT-B-L

PORT-E-R

PORT-E-L

PORT-H-R

PORT-H-L

PORT-G-R

PORT-G-L

JDREF

VREF

PORT-D-R

PORT-D-L

PORT-C-R

PORT-C-L

SPDIFO

PORT-F-R

PORT-F-L

PORT-A-VREFO/DCVOL

DVSS

CD-GND

BEEP

AVSS2

AVDD2

AVDD1

SDATA_OUT

SDATA_IN

CD-L

SENSE_A

SENSE_B

AVSS1

GPIO1/DMIC-L

BCLK

NC

SPDIFI/EAPD/MIDI-I/DMIC-R

PORT-A-L

PORT-A-R

RESET*

GPIO0/DMIC-CLK

PORT-B-VREFO2

DVDD

DVDD_IO

REV B3

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

APPLE P/N 353S1860APPLE P/N 353S1897AUDIO 4.6 V REGULATOR MIKEY 3.3 V REGULATOR

APPLE P/N 353S1527

AUDIO CODEC

PP4V6_AUDIO_ANALOG

4V6_REG_BP

PP5V_S3_AUDIO

=PP3V3_S0_AUDIO AUD_REG_SHDN_L

GND_AUDIO_CODEC

=PP3V3_S0_AUDIO 3V3_REG_FB

GND_AUDIO_CODEC

MIKEY_REG_SHDN_L

PP3V3_MIKEY_ANALOG

VOLTAGE=3.3V

MIN_LINE_WIDTH=0.15MMMIN_NECK_WIDTH=0.10MM

4V6_REG_SENSE

VOLTAGE=5V

AUD_4V6_REG_IN


MIN_LINE_WIDTH=0.30MMMIN_NECK_WIDTH=0.20MMVOLTAGE=4.6V

PP4V6_AUDIO_ANALOG

HDA_SDIN0

AUD_GPIO_0

HDA_RST_L

AUD_BI_PORT_C_R

AUD_BI_PORT_D_R

AUD_GPIO_1

AUD_BI_PORT_C_L

AUD_BI_PORT_D_L

BEEP

CODEC_SDATA_IN

AUD_GPIO_0_R

NC_BAL_IN_L NO_TEST

NC_BAL_IN_COM NO_TEST

NC_BAL_IN_R NO_TEST

HDA_BITCLK

HDA_SDOUT

HDA_SYNC

=PP3V3_S0_AUDIO

NO_TESTNC_VRP

NC_AUD_BI_PORT_G_LNO_TEST

AUD_CODEC_JDREF

NC_AUD_BI_PORT_H_LNO_TEST

NC_AUD_BI_PORT_G_RNO_TEST

NC_AUD_VREF_PORT_B2NO_TEST

NO_TEST NC_AUD_VREF_PORT_E

NO_TEST NC_AUD_VREF_PORT_C

AUD_SPDIF_IN


VOLTAGE=0V

GND_AUDIO_CODEC


AUD_SENSE_A

AUD_VREF_PORT_A

AUD_BI_PORT_F_L

AUD_SPDIF_O

AUD_VREF_PORT_F

AUD_SENSE_B

AUD_BI_PORT_A_L

AUD_BI_PORT_A_R

AUD_BI_PORT_E_R

AUD_VREF_PORT_B

AUD_CODEC_VREF

AUD_BI_PORT_H_R

AUD_BI_PORT_F_R

AUD_BI_PORT_E_L

AUD_BI_PORT_B_L

AUD_BI_PORT_B_R

AUD_SPDIF_OUT

CODEC_DVDD


VOLTAGE=3.3VMIN_NECK_WIDTH=0.20MM



AVDD_ADC_DAC

GND_AUDIO_CODEC

PP4V6_AUDIO_ANALOG


051-8071 B

53 98

AUDIO:CODECSYNC_MASTER=AUDIO_K20

2

1 C6207

402CERM

0.001UF

50V20%

21

L6202

0402

FERR-220-OHM

2

1C6205CRITICAL

20%100UF

6.3VTANT

CASE-AL1

2

1 C6206

50VCERM402

10%0.001UF

2

1C6204

CASE-AL1TANT6.3V20%

100UF

CRITICAL

57

57

58

58

54

54

58

58

58

54

58

58

56

56

56

56

21

R6203

5%1/16W

33

402MF-LF

2

1R6207

1/16W5%

402

100K

MF-LF

2

1 C6222

50V10%

402CERM

0.001UF

2

1C622110%

SMA-HF1TANT16V

3.3UF

CRITICAL2

1R6206

402

1%20.0K

1/16WMF-LF

2

1 C6203

50VCERM

10%

402

0.001UF

2

1 C62010.001UF10%

402

50VCERM2

1C62004.7UF

20%

402X5R4V

2

1R6251

402

1/16W5%

20K

MF-LF

NOSTUFF

21

L6201FERR-220-OHM

0402

9

91 21

21

R6250

5%

33

1/16WMF-LF402

27

10

48

47

34

13

5

8

11

46

45

44

43

30

17

16

31

15

1436

35

29

24

23

32

28

22

21

33

41

39

37

40

3

2

74

91

20

18

19

12

6

42

26

38

25

U6200CRITICAL

LQFP

ALC885-VB3-GR

2

1 C6220

16VX5R402

0.1UF10%

2

1R62010

NOSTUFF

MF-LF1/16W5%

402

2

1R6205

1/16W

402MF-LF

5%100K

21

R6204

5%

22

1/16WMF-LF402

91 21

91 21

55

56

55

56

55

91 21

2

1R625310K5%1/16WMF-LF402

2

1C6251

X5R402

10%0.1UF

16V

21

R6252

1/16WMF-LF402

5%

1K

2

1C6252

16V10%

CERM402

0.01UF

2

1 C62531UF

402

10%

X5R

CRITICAL

10V2

1C6250

402X5R16V

0.1UF10%

1

3

5

6

2

4

U6202TPS71733

CRITICAL

SON

2

1C621310%

CRITICAL

16V

0805

10UF

X5R-CERM2

1C6208

X5R10V10%

805

CRITICAL

4.7UF

2

1 C6212

10%

X5R402

0.1UF

25V

2

1R622110K5%

402

1/16WMF-LF

21

XW6203SM

2 1

C6211

CRITICAL

402

10%

X7R

0.015UF

25V

9

5

4

6

81

2

3

7

U6201

TDFN

MAX8902A

21

XW6200SM

2

1 C6209

50V

402CERM

10%0.001UF

2

1C6210

16V10%

402X5R

0.1UF

21

R62201K

5%1/16WMF-LF402

21

L6200FERR-220-OHM

0402

58 54 53

55 9

58 57 53 8

58 56 55 54 53

58 57 53 8

58 56 55 54 53

58

58 54 53

58 57 53 8

58 56 55 54 53

58 56 55 54 53

58 54 53

V-

V+

V-

V+

IN

OUT

OUT

IN

IN

IN

IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

GAIN = -5.4 DB AV = 0.52Pseudo-Diff Line-In Filter

FC = 1.89 HZ

AUD_PORTA_L

AUD_LIFILT_RT

AUD_PORTA_R AUD_BI_PORT_A_R

AUD_LIFILT_LT


PP4V6_AUDIO_LINE_IN

AUD_BI_PORT_A_L

GND_AUDIO_CODEC

AUD_CODEC_INREF

AUD_LIFILT_SHUTDOWN_L

AUD_LI_INL_R

PP4V6_AUDIO_ANALOG

AUD_VREF_PORT_A

AUD_LI_INR_R

AUD_LI_INL AUD_LI_INL_C

AUD_LIFILT_LT_RVOLTAGE=0V

AUD_LI_GND

AUD_LIFILT_RT_R

AUD_LI_INR AUD_LI_INR_C

GND_AUDIO_CODEC

SYNC_MASTER=AUDIO_K20

051-8071

9854

B

AUDIO: LINE INSYNC_DATE=09/29/2008

2 1

C6321CRITICAL

3.3UF

SMA-HF1TANT16V10%

2 1

C6320 CRITICAL

3.3UF

SMA-HF1TANT16V10%

2 1

C6311CRITICAL

3.3UF

SMA-HF1TANT16V10%

2 1

C6310CRITICAL

3.3UF

SMA-HF1TANT16V10%

2

1 C630220%

CASE-AL1TANT6.3V

100UF

CRITICAL

2

1C63014.7UF

6.3V20%

X5R-CERM

CRITICAL

402

2

1C63030.001UF

CERM50V

CRITICAL

402

10%

21

L6300

0402

FERR-220-OHM

21

C6322

603

2.2UF

16V10%

X5R

CRITICAL

21

C63122.2UF

603

16VX5R

10%

CRITICAL

53 21

R6300

402

1/16W

165

MF-LF

1%

57

21

R6301

402

5%

10

MF-LF1/16W

57

57

53

53

58

2

1R6303

1/16W1%

402MF-LF

27.4K

2

1R630227.4K

1/16WMF-LF

1%

402

21

R632125.5K

1/16W1%

402MF-LF

21

R6320

MF-LF

1%

25.5K

402

1/16W

21

R6311

1/16W

25.5K

1%

402MF-LF

21

R632313.3K

1/16WMF-LF

1%

402

4

10

5

1

2

3

U6300

UMAX-HF

CRITICAL

MAX4253EUB

21

R6322

402

13.3K

MF-LF

1%1/16W

2

1C6300

10%

402

0.001UF

CERM50V

CRITICAL

4

10

6

9

8

7

U6300

UMAX-HFMAX4253EUB

CRITICAL

21

R631313.3K

MF-LF

1%

402

1/16W

21

R6310

MF-LF

25.5K

1%1/16W

402

21

R631213.3K

1%1/16W

402MF-LF

58 56 55 54 53

58 53

58 56 55 54 53

IN

IN

IN

IN

IN

IN

SVSS

INL

SHDN*

INR

VDD

PVSS

PGND

SGND

THRM

OUTR

OUTL

C1P

C1N

PAD

OUT

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

HP:3.52 HZ

1st Order DAC Filter

LP:34 KHZ

VOLTAGE GAIN:1.53

APN:353S1637

Headphone Amplifier (MAX9724A)

AUD_BI_PORT_D_R AUD_CODEC_OUTR_C

AUD_BI_PORT_D_L AUD_CODEC_OUTL_C

AUD_HPAMP_INR_M

AUD_HPAMP_INL_M

GND_AUDIO_CODEC

AUD_HPAMP_INR_M


VOLTAGE=0V

GND_AUDIO_HPAMP_PGND


MAX9724_PVSS

AUD_HPAMP_INL_M

AUD_HPAMP_MUTE_L

MIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.40 MMVOLTAGE=0V

AUD_LO_GND

AUD_HPAMP_OUTRMIN_LINE_WIDTH=0.20 MMMIN_NECK_WIDTH=0.15 MM

AUD_HPAMP_OUTLMIN_LINE_WIDTH=0.20 MMMIN_NECK_WIDTH=0.15 MM


PP5V_AUDIO_HPAMP_PVDD_FVOLTAGE=5V

MAX9724_C1N

MAX9724_C1P

PP5V_S3_AUDIO

AUD_GPIO_0

AUD_HPAMP_OUTL

AUD_HPAMP_OUTR AUDIO: HEADPHONE AMPSYNC_MASTER=AUDIO_K20 SYNC_DATE=09/29/2008

9855

051-8071 B

57 55

57 55

21

R6520

1/16W1%

MF-LF

13.7K

402

21

R6510

402

1/16W

13.7K

MF-LF

1%

21

R6521

1/16W1%

402MF-LF

21K

2 1

C6521220PF

CERM402

5%25V

CRITICAL

2 1

C6511220PF

CERM402

5%25V

CRITICAL

21

R651121K

1%1/16W

402MF-LF

2

1R6524

1/16W1%2.21K

402MF-LF

2

1R65142.21K

402

1%1/16WMF-LF

21

L6500FERR-120-OHM-1.5A

0402

2

1R650010K5%

1/16W

402MF-LF

2

1C65041UF

CRITICAL

10%

402

10VX5R

21

C6520

10%16VTANT

SMA-HF1

3.3UF

CRITICAL

2

1 C6503CRITICAL

402

1UF

10V10%

X5R

21

C6510

10%16VTANT

SMA-HF1

3.3UF

CRITICAL

2

1C6502CRITICAL

0805X5R-CERM

10UF16V10%

2

1C6500

X5R-CERM

CRITICAL

10%

0805

16V

10UF

12

13 9

5

7 42

10

11

8

6

1

3

U6500CRITICAL

TQFNMAX9724A

21

XW6501SM

57

21

L6501

0402

FERR-1000-OHM

21

XW6500SM

2

1 C6501

CERM402

0.001UF

50V10%

53

53

53

55

55

55

55

58 56 54 53

53 9

57 55

57 55

IN

IN

OUT

OUT

OUT

IN

OUT

IN

OUT

OUT

IN

OUT

OUT

IN

OUT

OUT

GND PGND

VDD PVDD

IN-

IN+

SYNC

OUT-

OUT+

SHDN*

THRMLPAD

GND PGND

VDD PVDD

IN-

IN+

SYNC

OUT-

OUT+

SHDN*

THRMLPAD

GND PGND

VDD PVDD

IN-

IN+

SYNC

OUT-

OUT+

SHDN*

THRMLPAD

GND PGND

VDD PVDD

IN-

IN+

SYNC

OUT-

OUT+

SHDN*

THRMLPAD

GND PGND

VDD PVDD

IN-

IN+

SYNC

OUT-

OUT+

SHDN*

THRMLPAD

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

PLACE C6625 CLOSE TO VDD PIN




4X MONO SPEAKER AMPLIFIERS (MAX9705)

GAIN = 12 DBAPN: 353S1595

PLACE C6621/C6622 CLOSE TO PVDD PIN


SPEAKER CHECKPOINTS



FC (SPEAKERS L2/R2/LFE) = ~97 HZFC (SPEAKERS L1/R1) = ~796 HZ


PLACE CLOSE TO U6610 PIN 9





SPKRAMP_L1_OUT_PMIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.30 mm


SPKRAMP_L1_OUT_NMIN_NECK_WIDTH=0.20 MM

MIN_LINE_WIDTH=0.30 mmMIN_NECK_WIDTH=0.20 MM

SPKRAMP_R1_OUT_P

MIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.30 mm

SPKRAMP_R1_OUT_N

SPKRAMP_L2_OUT_NMIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.30 mm

MIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.30 mm

SPKRAMP_L2_OUT_P

PP5V_S3_AUDIO_AMP

SPKRAMP_L1_OUT_N

AUD_BI_PORT_C_L

MAX9705R2_PIN

GND_AUDIO_CODEC

GND_AUDIO_CODEC

SPKRAMP_SYNC4


SPKRAMP_R2_OUT_N


SPKRAMP_R2_OUT_P


AUD_VREF_PORT_B

AUD_BI_PORT_B_L

AUD_BI_PORT_C_R

AUD_BI_PORT_B_R

SPKRAMP_LFE_OUT_NMIN_LINE_WIDTH=0.30 MMMIN_NECK_WIDTH=0.20 MM

SPKRAMP_LFE_OUT_P


AUD_BI_PORT_H_R

SPKRAMP_SYNC1

SPKRAMP_SYNC1

SPKRAMP_SYNC3

AUD_SPKRAMP_INL1_L

AUD_SPKRAMP_INL2_L

AUD_SPKRAMP_INR1_L

GND_AUDIO_CODEC

AUD_SPKRAMP_INR2_L

GND_AUDIO_CODEC

AUD_SPKRAMP_SHUTDOWN_L

PP5V_S3_AUDIO_AMP

MAX9705L2_PIN

PP5V_S3_AUDIO_AMP

MAX9705R1_NIN

MAX9705R2_NIN

AUD_SPKRAMP_INC_R

GND_AUDIO_CODEC


MAX9705C_PIN

MAX9705C_NIN


MAX9705R1_PIN

MAX9705L2_NIN

MAX9705L1_NIN

SPKRAMP_L1_OUT_P

SPKRAMP_L2_OUT_P

SPKRAMP_L2_OUT_N

SPKRAMP_SYNC2

SPKRAMP_R1_OUT_N

SPKRAMP_R2_OUT_N

MAX9705L1_PIN

PP5V_S3_AUDIO_AMP

SPKRAMP_R1_OUT_P

SPKRAMP_SYNC4


SPKRAMP_SYNC3


SPKRAMP_SYNC2

SPKRAMP_R2_OUT_P

PP5V_S3_AUDIO_AMP

SPKRAMP_LFE_OUT_N

SPKRAMP_LFE_OUT_P

051-8071 B


9856


AUDIO:SPEAKER AMP

21

C6654

10%16V

CERM-X7R402

0.082UF

CRITICAL

21

C6653

10%16V

CERM-X7R402

0.082UF

CRITICAL

21

C6634CRITICAL

0.01UF

402CERM16V10%

21

C6633CRITICAL

0.01UF

402CERM16V10%

21

C6614CRITICAL

0.01UF

10%16V

402CERM

21

C6613CRITICAL

CERM

10%

0.01UF

402

16V

21

C6644

402CERM-X7R

CRITICAL

0.082UF

16V10%

21

C6643

10%16V

0.082UF

402CERM-X7R

CRITICAL

21

C6624

402

CRITICAL

0.082UF

CERM-X7R16V10%

21

C66230.082UF

CRITICAL

402CERM-X7R

16V10%

2

1C6655

X5R402

10%10V

1UF

2

1C66451UF10%10VX5R402

2

1C6635

X5R

10%

402

1UF10V

2

1C6625

402

10%

X5R10V

1UF

2

1C6615

402X5R10V10%1UF

1

11

65

10

7

8

9

2

3

4

U6650

CRITICAL

TDFN1MAX9705

1

11

65

10

7

8

9

2

3

4

U6640

CRITICAL

TDFN1MAX9705

1

11

65

10

7

8

9

2

3

4

U6630

CRITICAL

MAX9705TDFN1

1

11

65

10

7

8

9

2

3

4

U6620

CRITICAL

TDFN1MAX9705

1

11

65

10

7

8

9

2

3

4

U6610TDFN1

CRITICAL

MAX9705

2

1R6650

SIGNAL_MODEL=EMPTY

MF-LF402

NOSTUFF

05%

1/16W

96 57 56 7

96 57 56 7

53 21

L6650FERR-1000-OHM

0402

2

1R6608NOSTUFF

MF-LF

335%1/16W

402

2

1R66090

402

1/16WMF-LF

5%2

1 C66510.001UF

CRITICAL

402CERM

10%50V2

1C6652CRITICAL

100UF

TANTCASE-AL1

20%6.3V

2

1C6642100UF

CRITICAL

6.3VTANT

CASE-AL1

20%

2

1C6632

CASE-AL1

20%

CRITICAL

TANT6.3V

100UF

2

1C6622100UF

CASE-AL1

CRITICAL

6.3VTANT

20%

2

1C6612

CASE-AL1TANT6.3V20%

100UF

CRITICAL

96 57 56 7

96 57 56 7

2

1R6640

SIGNAL_MODEL=EMPTY

402MF-LF

NOSTUFF

5%1/16W

0

53 21

L6640FERR-1000-OHM

0402

2

1R6607

402

05%

MF-LF1/16W

2

1R6606NOSTUFF

402

1/16W5%33

MF-LF

2

1 C6641CRITICAL

0.001UF

CERM

10%50V

402

2

1R6630

SIGNAL_MODEL=EMPTY

402

1/16W5%0

NOSTUFF

MF-LF

96 57 56 7

96 57 56 7

2

1R6604NOSTUFF

5%1/16WMF-LF402

33

53 21

L6630FERR-1000-OHM

0402

2

1 C6631CRITICAL

50VCERM

0.001UF

402

10%

2

1R660501/16W

402MF-LF

5%

2

1R6603

MF-LF1/16W

402

05%

2

1R6610

SIGNAL_MODEL=EMPTY

05%

1/16WMF-LF

402

NOSTUFF

96 57 56 7

2

1R6620

SIGNAL_MODEL=EMPTY

1/16W

05%

MF-LF402

NOSTUFF

53 21

L6620FERR-1000-OHM

0402

2

1 C6621CRITICAL

50V

0.001UF10%

402CERM

2

1 C6611

10%0.001UF

CRITICAL

402CERM50V

2

1R6602

402MF-LF1/16W5%33

NOSTUFF

96 57 56 7

96 57 56 7

96 57 56 7

21

L6610FERR-1000-OHM

0402

53

53

21

L6601

0402

FERR-1000-OHM

2

1R6600

402

5%100K

MF-LF1/16W

56 9

96 57 56 7 58 56 55 54 53

58 56 55 54 53

56

56

56

56

58 56 55 54 53

58 56 55 54 53

56

56 9

56 9

58 56 55 54 53

56

56

96 57 56 7

96 57 56 7

96 57 56 7

56

96 57 56 7

96 57 56 7

56 9

96 57 56 7

56

56

56

56

56

96 57 56 7

56 9

96 57 56 7

96 57 56 7

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

OUT

OUT

IN

IN

AUDIO

MICROPHONE

DETECT FOR PT

GROUND

RIGHT

LEFT

SWITCH

POF

SHIELD

SHELL

PINS

C - GND

A - VIN

B - VCC

OPERATING VOLTAGE 3.3

GROUND

RIGHT

LEFT

SWITCH

DETECT FOR PT

AUDIO

PINS

SHELL

SHIELD

POF

A - VDD

B - GND

C - VOUT

OPERATING VOLTAGE 3.3

OUT

BI

BI

OUT

IN

BI

BI

OUT

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

AUDIO JACK 2 LINE IN JACK, SPDIF RX

SPEAKER CONNECTORS

APN: 518S0520MIC CONNECTOR

APN: 518S0521

AUDIO JACK 1 LO/HP JACK, SPDIF TX

RETURN FOR HF NOISE

APN: 518S0672

APN: 514-0632

APN: 514-0633

AUD_CONNJ2_TIP_F

AUD_CONNJ2_SLEEVEDET_F

AUD_SPDIF_IN

AUD_CONNJ2_SLEEVE_F

SPKRAMP_L2_OUT_N

SPKRAMP_L1_OUT_N

SPKRAMP_L2_OUT_P

AUD_J2_COM

HS_MIC_HI

HS_MIC_LO

AUD_LO_GND

AUD_HPAMP_OUTR


AUD_CONNJ1_RING_FMIN_LINE_WIDTH=0.20 MM

AUD_J1_TIPDET_RAUD_CONNJ1_TIPDET_F

AUD_HPAMP_OUTL

AUD_J1_SLEEVEDET_R

AUD_LI_GND

AUD_J2_TIPDET_RAUD_CONNJ2_TIPDET_F

AUD_LI_INRAUD_CONNJ2_RING_F

GND_CHASSIS_AUDIO_JACK

AUD_CONNJ1_TIP_FMIN_LINE_WIDTH=0.20 MMMIN_NECK_WIDTH=0.15 MM

MIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.40 MMAUD_CONNJ1_SLEEVE_F

AUD_CONNJ1_SLEEVE2_F

SPKRAMP_R2_OUT_N

SPKRAMP_R1_OUT_N

SPKRAMP_R1_OUT_P

SPKRAMP_LFE_OUT_P

SPKRAMP_LFE_OUT_N

AUD_LI_INL

SPKRAMP_R2_OUT_P

SPKRAMP_L1_OUT_P

BI_MIC_HI

BI_MIC_LO

BI_MIC_SHIELD

AUD_CONNJ1_SLEEVEDET_F



AUD_CONNJ1_TIP

AUD_CONNJ1_SLEEVE2

AUD_CONNJ1_SLEEVEDET

=PP3V3_S0_AUDIO

AUD_SPDIF_OUT


AUD_CONNJ1_SLEEVE

MIN_LINE_WIDTH=0.20 MMAUD_CONNJ1_RING


AUD_CONNJ1_TIPDET


AUD_CONNJ2_TIPDET

AUD_CONNJ2_TIP

AUD_CONNJ2_RING

=PP3V3_S0_AUDIO

AUD_CONNJ2_SLEEVEDET

AUD_J2_OPT_OUT

AUD_CONNJ2_SLEEVE


AUDIO: JACKSSYNC_DATE=09/29/2008

57 98

051-8071 B

21

R6700

1/16WMF-LF

10K

5%

402

58

58

21

L6706FERR-220-OHM

CRITICAL

0402

21

L6704FERR-220-OHM

CRITICAL

0402

21

L6701 CRITICAL

0603

FERR-220-OHM-2.5A

55

55

53

58

54

54

53

2

1 C6765

CERM50V

100PF5%

402

NOSTUFF

8

7

6

9

5

4

3

2

12

11

10

1

J6750SPDIF-RX-K20

F-RT-TH

CRITICAL

9

8

7

6

5

4

3

2

13

12

11

10

1

J6700SPDIF-TX-K20

F-RT-TH

CRITICAL

6

5

4

3

2

1

8

7

J678278171-6006

M-RT-SM

CRITICAL

2

1 C67905%

402CERM50V

100PF

NOSTUFF

2

1C67895%

402CERM50V

100PF

NOSTUFF

96 56 7

96 56 7

2

1C6764

CERM

5%

402

50V

100PF

NOSTUFF

2

1 C6763100PF5%

402

50VCERM

NOSTUFF

2

1C67625%

100PF

402CERM50V

2

1 C6761

50VCERM402

5%100PF

NOSTUFF

2

1 C6714

402

NOSTUFF

50VCERM

100PF5%

2

1 C6712

50V

402CERM

5%

NOSTUFF

100PF

2

1C6715100PF

NOSTUFF

CERM50V

402

5%2

1C6713100PF

5%50V

CERM402

2

1C6711

50VCERM402

100PF5%

NOSTUFF

2

1 C6710

50VCERM402

100PF5%

NOSTUFF

2

1 C6784

50VCERM402

5%100PF

NOSTUFF

2

1C6783

402

5%100PF

CERM

NOSTUFF

50V

2

1 C67825%

402CERM50V

100PF

NOSTUFF

2

1C67815%

402

50V

100PF

NOSTUFF

CERM

58

58

96 56 7

96 56 7

21

L6756FERR-1000-OHM

0402

4

3

2

1

6

5

J6781CRITICAL

M-RT-SM78171-0004

2

1C6787NOSTUFF

100PF

50V5%

CERM402

2

1 C6788NOSTUFF

50V

100PF

CERM

5%

402

2

1C6785NOSTUFF

402

5%

CERM

100PF

50V2

1 C6786

CERM

5%50V

402

NOSTUFF

100PF

21

L6754

0402

FERR-1000-OHM

21

R6701

402

0

MF-LF1/16W5%

21

R67680

1/16WMF-LF402

5%

21

R6766

5%

MF-LF402

0

1/16W

21

R6764

5%

MF-LF402

1/16W

0

21

R6762

MF-LF402

1/16W

0

5%

21

R6761

402MF-LF

5%

0

1/16W

21

R6711

1/10W

0

MF-LF603

5%

21

R6710

5%1/16W

0

MF-LF402

21

R67160

5%

402MF-LF1/16W

21

R67150

1/16W5%

402MF-LF

21

R67140

1/16W5%

MF-LF402

21

R67130

MF-LF1/16W5%

402

2

1 C6701

CERM6.3V

402-LF

2.2UF20%

96 56 7

96 56 7

3

2

1

5

4

J6780M-RT-SM

78171-0003

CRITICAL

2

1 C6700

10%0.1UF

X5R402

16V

21

L6752FERR-1000-OHM

0402

21

L6705FERR-1000-OHM

0402

58 7

58 7

58 7

2

1

DZ6700

402

CRITICAL

6.8V-100PF

21

L6703FERR-1000-OHM

0402

21

L6702

0402

FERR-1000-OHM

55

2

1

DZ6753

402

CRITICAL

6.8V-100PF

2

1

DZ6752

402

CRITICAL

6.8V-100PF

2

1

DZ6702

4026.8V-100PF

CRITICAL

2

1

DZ6701CRITICAL

6.8V-100PF402

2

1

DZ67046.8V-100PF

402

CRITICAL

21

L6758FERR-220-OHM

0402

2

1

DZ67556.8V-100PF

402

CRITICAL

2

1

DZ6754

402

CRITICAL

6.8V-100PF

2

1

DZ6703CRITICAL

6.8V-100PF402

21

L6751FERR-220-OHM

0402

2

1 C67500.1UF10%

402X5R16V

21

R6749

MF-LF402

1/16W5%

10

21

XW6701SM

96 56 7

96 56 7

96 56 7

96 56 7

54

57

57

58 57 53 8

57

58 57 53 8

OUT

IN

OUT

IN

IN

D

SG

D

SG

D

SG

D

SG

D

G S

OUT

IN

OUT

OUT

IN

IN

IN

D

SG

D

SG

OUT

IN

IN

BI

OUT

IN

IN

OUT

OUT

GND THMENABLE

AVDD

SDA

MICBIAS

DETECT

BYPASSINT*

SCL

IN

VDD

GND

MR* RST* OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

VREF_B (100%)

VREF_B (100%)

PORT F (BUILT-IN MIC)

PIN COMPLEX

DET ASSIGNMENT

PORT G DETECT(SPDIF DELEGATE)

HEADSET MIC

LINE_IN AMP SHUTDOWN CONTROL

0X0F (15)

0X23 (35)

MIXER(OUTPUT)

0X18 (24,B)

0x1E (SPDIF OUT)

N/A

KEEP DET TRACE AS SHORT AS POSS

NC

SPEAKERS L1/R1

FUNCTION

HP/LINE OUT 0X0C (12) 0X14 (20,D) 0X14 (20,D)

N/A

DET ASSIGNMENT

VREF_B (100%)

MUTE CONTROL

GPIO_0

NC

PORT A DETECT (Line-in)

PLACE L6800/C6800 CLOSE TO Q6800/01/02

NC

PORT D DETECT (Line-out)

VOLUME

0X0C (12)

0x1F (SPDIF IN)

MIKEY

0X15 (21,A)

MIKEY

N/AN/A

VREF

VREF_F (100%)

0X1B (27,E)

0X19 (25,F)0X07 (7)

MIXER(INPUT)

0X24 (36)

0X24 (36)

N/A

FUNCTION

LINE IN

SPDIF IN

N/A 0X16 (22,G)N/A

N/A

N/A

0X07 (7)

0X0A (10)

0X08 (8)

CODEC INPUT SIGNAL PATHS

0X0E (14) 0X04 (4) 0X0E (14) 0X17 (23,H)

CONVERTER

0X03 (3) 0X0D (13)

0X1A (26,C)

0X0D (13)

SPDIF OUT

MIC

0X02 (2)

CODEC OUTPUT SIGNAL PATHS

CONVERTER

0X05 (5)

SPEAKERS L2/R2

SPEAKER LFE

N/A

0X15 (21,A) VREF_A (50%)

PIN COMPLEX

0X06 (6)

0X0F (15)

TIPDET DEBOUNCE CIRCUIT

HS_MIC_HIHS_MIC_HI_R

HS_MIC_LO

AUD_BI_PORT_E_LMAKE_BASE=TRUE

GND_AUDIO_CODEC

AUD_IP_PERIPHERAL_DETAUD_IP_PERPH_DET_DB

PP4V6_AUDIO_ANALOG

HS_SW_DET

HS_MIC_BIAS

HS_RX_BP

AUD_IPHS_SWITCH_EN

HS_SDA

AUD_PORTG_DET_L

AUD_BI_PORT_E_R

HS_INT_L

HS_RST_L

HS_SCL

GND_AUDIO_CODEC

AUD_I2C_INT_L

=I2C_MIKEY_SCL

=PP3V3_S0_AUDIO

PP3V3_MIKEY_ANALOG

PP3V3_S0_HS_RX



AUD_INJACK_INSERT_L

AUD_SENSE_A

AUD_J1_SLEEVEDET_INV

AUD_PORTD_DET_L

AUD_J1_TIPDET_R AUD_J1_DET_RC

=PP3V3_S0_AUDIO PP3V3_S0_AUDIO_F

GND_AUDIO_CODEC

PP3V3_S0_AUDIO_F

PP3V3_S0_AUDIO_F

AUD_J2_TIPDET_R

PP3V3_S0_AUDIO_F

AUD_J1_SLEEVEDET_R

GND_AUDIO_CODEC

GND_AUDIO_CODEC

BI_MIC_HI_F

BI_MIC_LO_F

MAKE_BASE=TRUEAUD_BI_PORT_F_L

GND_CHASSIS_AUDIO_MIC

BI_MIC_LO

BI_MIC_HI

BI_MIC_SHIELD

AUD_VREF_PORT_F

AUD_BI_PORT_F_R

AUD_J1_SLEEVEDET_R

GND_AUDIO_CODEC

BI_MIC_BIAS

=I2C_MIKEY_SDA

AUD_LIFILT_SHUTDOWN_L

AUD_OUTJACK_INSERT_L

AUD_SENSE_A

AUD_J2_DET_RC

AUD_SENSE_B

AUD_IP_PERPH_DET_R

GND_AUDIO_CODEC

=PP3V3_S0_AUDIO

GND_AUDIO_CODEC

AUD_LIN_SHUTDOWN

AUD_IP_PERIPHERAL_DET_RAUD_J1_TIPDET_R

AUDIO: JACK TRANSLATORSSYNC_MASTER=AUDIO_K20

051-8071

58 98

B


17

21

R6865

MF-LF1/16W

402

0

5%

TPDT_BYPASS

21

R6864

5%

0

402MF-LF1/16W

2

1R6863

402MF-LF

5%100K1/16W

21

R6862

1/16W

402

0

5%

MF-LF

TPDT_DEBOUNCE4

35

21

U6860SC-70-1

CRITICAL

TPS3801E18DCKTPDT_DEBOUNCE

2

1 C686110%0.1UF

402X5R16V

TPDT_DEBOUNCE

2

1R6861100K5%

MF-LF1/16W

NOSTUFF

402

2

1 C6860

16V

NOSTUFF

X5R402

0.1UF10%

21

R6860

5%

0

402

1/16WMF-LF

TPDT_DEBOUNCE

58 57

2

1 C688510%

402

25VX7R

0.0082UF

2

1R6881

MF-LF402

5%1K1/16W

2

1 C6887100PF5%

402CERM50V

21

R6885

5%

MF-LF1/16W

402

2.2K

11

5

6 1

7

4 9

8

2

10

3

U6800

CRITICAL

DRCCD3275

2

1R6884NOSTUFF

5%1/16WMF-LF

0

402

21

L6882

0402

FERR-1000-OHM

2

1 C6886

50V

0.001UF10%

402CERM

53

53

57

57

21

XW6800SM

2

1R6883

402

100K

MF-LF1/16W5%

2

1 C6884

50V5%

402CERM

15PF

21

C6883

X7R-CERM402

CRITICAL

10%

0.1UF

16V

21

44

19 9

44

2

1 C6882CRITICAL

4.7UF6.3V20%

603-HFTANT

2

1R68822.2K5%

402

1/16WMF-LF

2

1R6880100K1/16W

402MF-LF

5%

21

R6893

1/16W

0

402MF-LF

5%

21

R6892

1/16WMF-LF

5%

0

402

21

R6891

1/16WMF-LF

0

402

5%

21

R6890

MF-LF

5%

402

0

1/16W 2

1C6880

603

20%10UF

CRITICAL

6.3VX5R

21

L6880NOSTUFF

FERR-1000-OHM

0402

2

1 C6881

X7R

0.01UF10%25V

402

2

1R6851

5%1/16WMF-LF402

0

21

L6850

0402

FERR-1000-OHM

21

L6851FERR-1000-OHM

0402

54

45

3Q6803

SOT563SSM6N15FEAPE

2

1R6814100K

1/16W5%

402MF-LF

12

6Q6803

SOT563SSM6N15FEAPE

2

1R6815

MF-LF

5%100K

402

1/16W

2

1 C6853

TANT-POLY

10UF

CRITICAL

16V20%

2012-LLP

57 7

57 7

57 7

53

53

53

21

XW6851SM

21

XW6850SM 2

1R6852100K

402MF-LF1/16W5%

2

1

C6852

CERM5%50V

15PF

402

21

C6850

402

10%

X5R25V

0.1UF

CRITICAL

2

1

C6851

50V10%402CERM

0.001UF

21

R6855

MF-LF402

1/16W5%

2.2K21

R68502.2K

MF-LF1/16W5%

402

58 53

21

3


12

6Q6801

SOT563SSM6N15FEAPE

45

3Q6801SSM6N15FEAPE

SOT563

12

6Q6800SSM6N15FEAPE

SOT563

45

3Q6800

SOT563SSM6N15FEAPE

2

1R6805

1/16W

10K1%

MF-LF402

57 21

R681247K

MF-LF402

5%1/16W

2

1R6811270K

MF-LF402

5%1/16W

2

1

C6811

CERM 40220% 10V0.1UF

2

1R6813

MF-LF

1%1/16W

39.2K

402

58 57

53

2

1 C6802

CERM

10%16V

402

0.01UF

2

1R6804

5%1/16W

220K

MF-LF402

21

R6803

1/16W

100K

5%

MF-LF402

2

1R68065.11K

1/16W

402MF-LF

1%

21

L6800

0402

FERR-1000-OHM

2

1 C6800

16V10%

402X5R

0.1UF

58 57

58 53

2

1R6801

402

220K

MF-LF

5%1/16W

21

R6802

5%

47K

402MF-LF1/16W

2

1

C68010.1UF20%CERM

10V402

58 56 55 54 53

54 53

58 56 55 54 53

58 57 53 8

53

58 57 53 8 58

58 56 55 54 53

58

58

58

58 56 55 54 53

58 56 55 54 53

58 57

58 56 55 54 53

58 56 55 54 53

58 57 53 8

58 56 55 54 53

BI

V-

V+

BI

D SG

DSG

IN

OUT

D

S G

D

SG

G

D S

SW

BOOSTVIN

BIAS

SHDN*

GND

NC

FB

PADTHRM

NC

BI

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

518S0720

BIL Connector

MagSafe DC Power Jack

send transients onto ADAPTER_SENSE when AC isVoltage divider from DCIN ensures Q6901

Vgs is met when SYS_ONEWIRE is high or low.

Q6920 used as bilateral switch to ensure

<Vth>

Vout = 3.425

200mA max output

(Switcher limit)

<Rb>

<Ra>

Vout = 1.25V * (1 + Ra / Rb)

SIG

PWR

adapter detects system and enables 16.5V output.

If ADAPTER_SENSE > Vth

<Rb>

PWR

GND

GND

Q6910 restricts system load to 10K-70K window until

<Ra>

SYS_ONEWIRE doesn’t drive unpowered U6990

then turn off FET

Vgs = 7.63V @ 13V DCIN

Vgs = 11.750V @ 20V DCIN

Vgs(max) = 20V

1-Wire OverVoltage Protection

3.425V "G3Hot" SupplySupply needs to guarantee 3.31V delivered to SMC VRef generator

518S0694

Battery Connector

connected.

The chassis ground will otherwise float and can

Vth = Vdcin / 2

Vth = Vdcin * (Rb / (Ra + Rb))

PPVIN_G3H_P3V42G3HMIN_LINE_WIDTH=0.3 mmMIN_NECK_WIDTH=0.3 mmVOLTAGE=18.5V

P3V42G3H_FB

PPDCIN_S5_P3V42G3HMIN_LINE_WIDTH=0.3 mmMIN_NECK_WIDTH=0.3 mmVOLTAGE=18.5V

ADAPTER_SENSE

=PP3V42_G3H_BATT

=SMBUS_BATT_SDA

=SMBUS_BATT_SCL

SMC_BIL_BUTTON_DB_L

SMC_BS_ALRT_L

ONEWIRE_EN

PP18V5_DCIN_ONEWIREMIN_LINE_WIDTH=0.25mmMIN_NECK_WIDTH=0.20mmVOLTAGE=18.5V

ONEWIRE_OVERVOLT

=PPVBAT_G3H_P3V42G3H

ONEWIRE_ESD

ONEWIRE_DCIN_DIV

SYS_ONEWIRE_BILAT

SMC_BC_ACOK

SYS_ONEWIRE

MIN_LINE_WIDTH=1mmPP18V5_DCIN_FUSE

MIN_NECK_WIDTH=0.20mmVOLTAGE=18.5V

ONEWIRE_PWR_EN_L

SMC_BC_ACOK_RC

ONEWIRE_PWR_EN_L_DIV

=PP18V5_DCIN_CONN

=PP3V42_G3H_REG

P3V42G3H_BOOST

P3V42G3H_SW


SWITCH_NODE=TRUE


=PP18V5_DCIN_CONN

=SMBUS_BATT_SDA

GND_BATT_CHGND

=SMBUS_BATT_SCL

GND_BATT_CHGND

PPVBAT_G3H_CONNMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.4 mmVOLTAGE=8.6V

PPVBAT_G3H_CONN_F

DC-In & Battery Connectors

59 98

051-8071 B

SYNC_MASTER=RXU_K20 SYNC_DATE=05/21/2008

59 44

21

XW6953SHORT-1206

21

XW6952SHORT-1206

21

XW6951SHORT-1206

21

XW6950SHORT-1206

2

1 C6951

402

10%0.001UF

CERM50V

2

1 C6950

10%

402CERM50V

0.001UF

5

4

3

2

1

J6995F-RT-SM

FF18-5A-R11AD-B-3H

CRITICAL

21

3

D6950RCLAMP2402B

SC-75

CRITICAL

9

8

7

6

5

4

3

2

13

12

11

10

1

15

14

J6950

M-RT-SMGS731301047E7H

CRITICAL

21

3

D6900CRITICAL

RCLAMP2402BSC-75

3

2

1

D6905SOT-323

BAT30CWFILM

CRITICAL

6

9

48

7

5

1

3

2

U6990DFN

LT3470A

CRITICAL

1

2

6

Q6910

SOT-563

BSS84V

CRITICAL

45

3Q6915

SOT563

CRITICAL

SSM6N15FEAPE

12

6 Q6915

SOT563

SSM6N15FEAPE

5

4

3

2

1

J690078048-0573

M-RT-SM

CRITICAL

2

1 C6955

10%

402CERM

50V

0.001UF

2

1C6952

402

50V

47PF5%

CERM2

1C6953

402

47PF5%

CERM

50V2

1C6954

10%

CERM

0.001UF

402

50V

42 7

2

1C6994

6.3V

0.22UF20%

X5R

402

2

1 C6999

X5R-CERM

6.3V20%22UF

603

2

1R6995

402

1/16W

1%

MF-LF

348K

2

1R6996

1%

402MF-LF

200K

1/16W

2

1C6995

402

5%50V

CERM

22pF

21

L6995

CRITICAL

33UH

CDPH4D19FHF-SM

2

1C699010UF

805

X5R

10%25V

21

R6905

MF805

47

1%1/3W

2

1R6916

5%270K

402

1/16WMF-LF

42 41 21

R6910

5%

MF-LF

1K

402

1/16W

12

6

Q6920SSM6N15FEAPESOT563

CRITICAL

45

3

Q6920

SOT563

CRITICAL

SSM6N15FEAPE

42 41

2

1R6914

5%100K

MF-LF1/16W

402

2

1 C6905

PLACEMENT_NOTE=Place near L6900

603

20%

CERM50V

0.01UF

2

1R6920

1%1/16W

402MF-LF

24.3K

5

3

1

4

2

U6915CRITICAL

SOT23-5-HFLM397

2

1 C69170.001UF10%50V

402CERM

2

1R6918

1/16W5%

270K

402MF-LF

2

1R6912

402MF-LF

5%1/16W

330K

21

F6905CRITICAL

6AMP-24V

1206-1

2

1R6913

5%

MF-LF1/16W

402

100K

2

1C69150.1UF

X5R

10%25V

402

2

1R6915

1/16W5%

270K

MF-LF402

2

1R6917

MF-LF

5%1/16W

270K

402

2

1C69100.001UF

10%50V

CERM402

2

1R6911

1/16W5%

470K

402MF-LF

59 44

7

8

42 41 7

8

7

59 8

8

59 8

59 44

60 59 9

59 44

60 59 9

7

GS D

CSON

CSOP

VNEG

VCOMP

ICOMP

VREF

ACIN

SDA

VHST

SCL

VDDP

BGATE

VDD

ACOK

THRM_PAD

AGATEAGND

AMON

BMON

BOOT

CSIN

CSIP

DCIN

LGATE

PGND

PHASE

UGATE

TRKL*

NC

OUT

OUT

IN

BI

OUT

GND

VCC

D

S G

D

S G

D

GS

D1

D3

D4

S3

S2

GATE

S1

D2

D1

D3

D4

S3

S2

GATE

S1

D2

D

GS

GS D


APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

(PPVBAT_G3H_CHGR_R)

TO SYSTEM

(OD)

20V/V

32V/V

152S0542

Reverse-Current Protection

(L7030 limit)

Max Current = 8.5A

f = 400 kHz

5. Q7055 and Q7056 changed to 376S0666.

Input impedance of ~40K meets

1. L7030 changed from T18 MLB inductor to 152S0542.

2. Added Q7056, C7058,R7055,R7056..

ACIN pin threshold

3S Battery Default

(CHGR_CSO_N)

(CHGR_CSO_P)

2S Battery Default

R7075 clamps CHGR_AMON when charger is

not powered to counter TL331 bias current.

VREF = 3.2V, < 300uA

sparkitecture requirements

threshold at 13.07V

Divider sets ACIN

is 3.2V, +/- 50mV

(CHGR_DCIN)

152S0542

30mA max load

(OD)

Inrush Limiter

3. U7000 Thermal Pad is now connected to GND, not through XW.

4. Q7060 and Q7065 changed to 376S0667.

M99 differences from last sync on 12/02/07 to T18 MLB:

FROM ADAPTER

(CHGR_AGATE)

152S0542

152S0542

SWITCH_NODE=TRUEMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6 mm

CHGR_PHASE

=PPDCIN_S5_CHGR

VOLTAGE=12.6V

PPVBAT_G3H_FET


VOLTAGE=12.6VMIN_NECK_WIDTH=0.4 mmMIN_LINE_WIDTH=0.6 mm

BATT_POS_GATE


PPVBAT_G3H_CHGR_R

CHGR_BGATE



PPVBAT_G3H_CHGR_REG

=PPBUS_G3H

CHGR_VNEG

CHGR_CSO_P


PP5V1_CHGR_VDD

CHGR_CSO_N

CHGR_ICOMP

CHGR_CSI_P

CHGR_LGATE

CHGR_UGATE

=CHGR_ACOK

CHGR_BMON

=SMBUS_CHGR_SDA

CHGR_ACIN

CHGR_VCOMP

=SMBUS_CHGR_SCL

CHGR_VNEG_R

=PP3V42_G3H_CHGR

CHGR_VCOMP_R

TP_CHGR_TRKL

CHGR_SGATE


CHGR_AMON

PP5V1_CHGR_VDD

AMON_CLAMP

SGATE_P0V1_VREF

CHGR_AMON

=PP3V42_G3H_CHGR


PP5V1_CHGR_VDDP

CHGR_BOOT

GND_CHGR_AGND


CHGR_AGATE_DIVMIN_LINE_WIDTH=0.3 mm

MIN_NECK_WIDTH=0.3 mmMIN_LINE_WIDTH=0.3 mmCHGR_SGATE_DIV

PPDCIN_S5_INRUSH

VOLTAGE=18.5V


CHGR_DCIN

PPVBAT_G3H_CHGR_REG_LMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.4 mm

VOLTAGE=12.6V

CHGR_PHASE_RC

GND_BATT_CHGND

CHGR_CSO_R_N

GND_CHGR_AGND

VOLTAGE=0V


VOLTAGE=12.6V


PPVBAT_G3H_CONN

MIN_LINE_WIDTH=0.6 mmPPDCIN_S5_CHGR_R


CHGR_AGATE

CHGR_CSI_N

CHGR_CSI_R_N


PPDCIN_S5_FET_CHGR

VOLTAGE=18.5V

CHGR_CSI_R_P

CHGR_CSO_R_P


051-8071 B

9860

PBus Supply & Battery Charger

353S1832 IC,ISL6258A,BAT CHARGER,4X4MM,QFN28 CRITICAL1 U7000 ISL6258A

IC,ISL6258,BAT CHARGER,28P,4X4,QFN,L U7000 CRITICAL1 ISL6258353S1938

3

2

1

4

5

Q7057

CRITICAL

LFPAK-SM

HAT1127H

32

1

4

5

Q7058

LFPAK-SMHAT1127HCRITICAL

2

1 C7099NO STUFF

0.001UF

402X7R50V10%

2

1R7099NO STUFF

1/10W

603

5%10

MF-LF

2

1

F7041CRITICAL

1206

8AMP-24V

3

2

1

D7005BAT30CWFILM

SOT-323

CRITICAL

21

L7031

SM

CRITICAL

2.2UH-20A-5.5M-OHM

2

1 C7037CRITICAL

CASE-D2-SMPOLY-TANT

20%22UF

25V

2

1C7043

POLY-TANT

20%33UF

16V

CASED2E-SM

CRITICAL

21

L7030CRITICAL

SM

2.2UH-20A-5.5M-OHM

2

1 C7036CRITICAL

25V

22UF20%

POLY-TANTCASE-D2-SM

3 2 1

4

8 7 6 5

Q7065SOI

HAT1128R01

CRITICAL

321

4

8765

Q7060HAT1128R01SOI

CRITICAL

321

4

5

Q7031

CRITICAL

LFPAK-HF

RJK0305DPB

321

4

5

Q7036

CRITICAL

RJK0305DPBLFPAK-HF

21

R7056

1/16W402

5%MF-LF

1M

21

R7057

5%

4021/16W

MF-LF

20K

32

1

4

5

Q7056


2

1 C7058

402-1

1UF

10VX5R

10%

2

1 C7041

50V

0.001UF10%

X7R402

2

1 C70340.001UF10%50VX7R402

12


2

1R7074

402

1M5%

MF-LF1/16W

45

3 Q7074

SOT563SSM6N15FEAPE2

5

4

3

1U7070

SOT23-5

TL331

4

3

2

1 R70200.02

0612MF

0.5%1W

CRITICAL

34

12

R70500.005

MF0612

1W1%

CRITICAL

42

2

1 C7026

50V10%

CERM402

0.001UF

2

1 C7050

402

10%16VX5R

0.1uF

SIGNAL_MODEL=EMPTY

2

1 C7070

X5R

10%0.1uF

402

16V

2

1 C7011

402CERM

0.01UF10%16V

44

44

45 60

45

2

1C70050.1UF

25V

402X5R

10%

2

1R7061

1%1/16W

332K

MF-LF402

2

1C70551UF

X5R25V

603-1

10%

2

1R7065

402

1/16WMF-LF

5%100K

2

1R706662K

402

1/16W5%

MF-LF

2

1 C7033

X5R

10%

603-1

25V

1UF

21

R7052

402

5%

MF-LF1/16W

10

21

R705110

1/16WMF-LF

5%

402

2

1

F7040CRITICAL

1206

8AMP-24V

2

1C7040

POLY-TANT16V

33UF20%

CASED2E-SM

CRITICAL

2

1 C7032

25V

603-1

10%1UF

X5R

2

1 C7031CRITICAL

22UF20%25VPOLY-TANTCASE-D2-SM

2

1 C7030

CASE-D2-SM

25V20%22UF

POLY-TANT

CRITICAL

321

4

5

Q7030

LFPAK-HF

CRITICAL

RJK0305DPB

21

R7021

1/16WMF-LF

5%

10

402

21

R702210

1/16W

402MF-LF

5%

321

4

5

Q7035

LFPAK-HFRJK0305DPB

CRITICAL

2

1 C70350.22UF

10VCERM402

10%

2

1 C7020

10%

SIGNAL_MODEL=EMPTY

CERM402

10V

0.047UF

2

1C70220.1UF

10%

402X5R25V

2

1 C7021

402

0.1UF10%25VX5R

2

1C7001

10V

402

1UF

X5R

10%

4

8

12

20

19

7

24

13

29

10

11

23

22

21

5

2

18

17

28

27

25

15

16

9

26 6

1

14

3

U7000QFN

OMIT

ISL6258A

CRITICAL

21

XW7000SM

3

2

1

4

5

Q7055


2

1 C7056

X5R402

0.1UF10%16V

2

1C7057

10%

CERM402

0.01uF

16V

2

1R7070

MF-LF

1%

402

1/16W

57.6K

2

1R7071

MF-LF

1.82K1%

402

1/16W

2

1R7060

MF-LF1/16W

402

470K1%

2

1C7060

10%25V

0.1UF

X5R402

2

1R7010

1/16W

402

30.1K

MF-LF

1%

21

R70014.7

402

1/16W5%

MF-LF

2

1C7000

X5R

10%

402

1UF

10V

2

1C7002

402

1UF

X5R

10%10V

2

1R7015

402MF-LF1/16W1%56.2K

2

1C7015

402CERM

0.001UF

50V10%

2

1R7016

402

1/16W1%

MF-LF

3.01K

2

1 C7016

402CERM50V10%470PF

2

1 C7042

16VX5R

0.033UF10%

402

2

1R7011

1%

MF-LF1/16W

402

9.31K

8

8

94

60

94

94

8 60

60

45 60

8 60

60

9 59

45 96

60

59

94

96

96

45 96

IN

IN

IN

OUT

IN

OUT

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

IN

IN

OUT

VID0

DPRSTP*

NC

VW

COMP

FB

FB2

RBIAS

VR_TT*

NTC

VR_ON

PGOOD

PSI*

RTN

VSEN

DFB

DROOP

VO

OCSET

VSUM

ISEN2

VID1

VID3

VID2

VID4

VID5

VID6

PGND2

VIN VDD PVCC

LGATE2

PHASE2

UGATE2

ISEN1

PGND1

LGATE1

UGATE1

PHASE1

BOOT1

BOOT2

3V3

VDIFF

SOFT

DPRSLPVR

TPADGND

CLK_EN*

IMONOUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

DPRSTP*

1

Place R7131 Between L7100,L7101 and CPU

(IMVP6_VW)

2-Phase

DCM

0 DCM

44A MAX CURRENT

1-Phase

1

(GND_IMVP6_SGND)

Place R7126 in hot

(IMVP6_PHASE2)

(IMVP6_ISEN1)

spot of reg circuit.

0

1

(IMVP6_VO)

ModePSI*

(GND)

(ISL9504A)

DPRSLPVR

CCM

1

0

0

0

0

(GND)

(IMVP6_COMP)

These caps are for Q7102

(IMVP6_NTC)

CCM

1-Phase

(PGD_IN)

(IMVP6_PHASE1)

(GND_IMVP6_SGND)

(IMVP6_ISEN2)

(IMVP6_VSUM)

(IMVP6_VO)

LAYOUT NOTE:

1 1-Phase

(IMVP6_FB)

1

These caps are for Q7100

Operation

IMVP6_FB

IMVP6_VSEN_P

IMVP6_BOOT2_R

IMVP6_BOOT2


PP5V_S0_IMVP6_VDD

VOLTAGE=5V

MIN_LINE_WIDTH=0.25 MMPPVIN_S5_IMVP6_VIN


MIN_LINE_WIDTH=0.25 MM MIN_NECK_WIDTH=0.2 MMIMVP6_ISEN1

CPU_PROCHOT_L

IMVP6_VID<3>

=PP3V3_S0_IMVP

=PP1V05_S0_CPU


PP3V3_S0_IMVP6_3V3

VOLTAGE=3.3V

IMVP6_VID<2>

IMVP6_VID<0>

IMVP6_VID<1>

IMVP_VR_ON_R

IMVP6_NTC_R

MIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.25 MMIMVP6_VW

IMVP6_LGATE2 MIN_LINE_WIDTH=0.5 MM MIN_NECK_WIDTH=0.2 MM

IMVP6_ISEN2 MIN_LINE_WIDTH=0.25 MM MIN_NECK_WIDTH=0.2 MM

IMVP6_VO2 MIN_LINE_WIDTH=0.25 MM MIN_NECK_WIDTH=0.25 MM

IMVP6_VSEN_N MIN_LINE_WIDTH=0.25 MM MIN_NECK_WIDTH=0.2 MM

IMVP6_VO2

IMVP_VR_ON IMVP_VR_ON_R

MIN_LINE_WIDTH=0.25 MM MIN_NECK_WIDTH=0.2 MMIMVP6_VSEN_P

IMVP6_UGATE1 MIN_LINE_WIDTH=0.5 MM MIN_NECK_WIDTH=0.2 MM

IMVP6_VSUM1 MIN_LINE_WIDTH=0.25 MM MIN_NECK_WIDTH=0.25 MM

IMVP6_OCSET MIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.25 MM

IMVP6_VO MIN_LINE_WIDTH=0.25 MM MIN_NECK_WIDTH=0.20 MM

IMVP6_DFB MIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.25 MM

IMVP6_RBIAS MIN_LINE_WIDTH=0.25 MM MIN_NECK_WIDTH=0.20 MM

IMVP6_VDIFF MIN_LINE_WIDTH=0.25 MM MIN_NECK_WIDTH=0.20 MM

MIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.25 MMIMVP6_FB2

IMVP6_PHASE1 MIN_LINE_WIDTH=1.5 MM MIN_NECK_WIDTH=0.2 MM

MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.25 MMIMVP6_BOOT1

IMVP6_LGATE1 MIN_LINE_WIDTH=0.5 MM MIN_NECK_WIDTH=0.2 MM

IMVP6_VSUM2 MIN_LINE_WIDTH=0.25 MM MIN_NECK_WIDTH=0.25 MM

IMVP6_VO1

CPU_VCCSENSE_N

IMVP6_UGATE2 MIN_LINE_WIDTH=0.5 MM MIN_NECK_WIDTH=0.2 MM

MIN_NECK_WIDTH=0.2 MMIMVP6_BOOT2 MIN_LINE_WIDTH=0.25 MM

MIN_NECK_WIDTH=0.2 MMIMVP6_PHASE2 MIN_LINE_WIDTH=1.5 MM

PM_DPRSLPVR

IMVP6_COMP MIN_LINE_WIDTH=0.25 MM MIN_NECK_WIDTH=0.20 MM

IMVP6_SOFT MIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.25 MM

MIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.25 MMIMVP6_FB

IMVP6_DROOP MIN_LINE_WIDTH=0.25 MM MIN_NECK_WIDTH=0.20 MM

=PPVCORE_S0_CPU_REG

VR_PWRGOOD_DELAY

IMVP6_DFB

CPU_PSI_L

IMVP6_IMON

VR_PWRGD_CLKEN_L

IMVP6_DROOP

CPU_VCCSENSE_P

IMVP6_OCSET

IMVP6_LGATE1

IMVP6_BOOT1_R

IMVP6_BOOT1

IMVP6_COMP

IMVP6_COMP_RC

IMVP6_VDIFF

IMVP6_VDIFF_RC

IMVP6_VO1 MIN_NECK_WIDTH=0.25 MMMIN_LINE_WIDTH=0.25 MM

IMVP6_VID<6>

IMVP6_VID<5>

IMVP6_VID<4>

CPU_DPRSTP_L

IMVP_DPRSLPVR

IMVP6_VR_TT_L

IMVP6_NTC

IMVP6_SOFT

IMVP6_RBIAS


GND_IMVP6_SGND

VOLTAGE=0V


IMVP6_FB2

IMVP6_VW

IMVP6_VSEN_N

IMVP6_VO_R

IMVP6_VSUM2

IMVP6_VSUM

IMVP6_PHASE2

IMVP6_ISEN1

IMVP6_VO

IMVP6_VSUM1

IMVP6_PHASE1

IMVP6_ISEN2

IMVP6_LGATE2

IMVP6_UGATE2

IMVP6_UGATE1

=PPVIN_S5_CPU_IMVP

=PP5V_S0_CPU_IMVP


9861

B051-8071

SYNC_MASTER=RXU_K20

IMVP6 CPU VCore Regulator

2

1C7153

CASED2E-SMPOLY-TANT

33UF

CRITICAL

20%16V

21

R71880

MF-LF

5%

603

1/10W21

R7189

603

1/10W5%

0

MF-LF

2

1C7133

D3LPOLY-TANT

CRITICAL

20%16V

68UF2

1C7155

CASED2E-SM

16V20%

CRITICAL

33UF

POLY-TANT 2

1 C7158

603-1

1UF

X5R

10%25V

2

1 C7118

X5R

10%1UF

603-1

25V2

1C711720%

16V

68UF

CRITICAL

POLY-TANTD3L

2

1C7157

10%

402X7R

0.001UF

50V

2

1C7156

X7R402

10%0.001UF

50V

2

1C7152

402X7R

10%0.001UF

50V2

1C7108

X7R402

10%0.001UF

50V

21

R7160

402MF-LF

0

1/16W5%

I849 I848

45

2

1 C7154

25V10%

X5R

1UF

603-1

321

4

5

Q7101

LFPAK-HF

RJK0328DPB

CRITICAL

321

4

5

Q7102

LFPAK-HF

RJK0305DPB

CRITICAL

321

4

5

Q7103

LFPAK-HF

RJK0328DPB

CRITICAL

321

4

5

Q7100

CRITICAL

RJK0305DPBLFPAK-HF

9

19

14

5

44

18

20

43

42

41

40

39

38

37

13

22

27

35

49

7

15

4

31

2

28

34

129

33

8

6

25

30

32

23

24

3

21

12

11

16

46

45

17

10

47

26

36

48

U7100QFN

ISL9504BCRZ

CRITICAL

2

1R7199

5%1/16WMF-LF

68

402

88 42 14 10 21

R7198

1/16W

0

MF-LF

5%

402

2

1

R7126470K

CRITICAL

402

88 11

88 11

61

61

21

XW7101SM

21

XW7103SM

2

1R7197

402

10K5%1/16WMF-LF

2

1R7127

1/16WMF-LF402

4.02K1%

2

1R7108

1%

MF-LF402

147K

1/16W

2

1

R7131

0603-LF

CRITICAL

10KOHM-5%

2

1 C7109

603-1X5R25V

1UF10%

2

1R711613.3K

402

1/16WMF-LF

1%

2

1C7105

X7R

0.015UF

16V

402

10%

2

1R7111255

1/16W1%

MF-LF402

2

1 C7114470PF10%50V

402CERM

2

1 C7106

10%

CERM402

50V

0.001UF

88 9

88 9

88 9

88 9

88 9

88 9

88 9

2

1C7196

16V10%

402X5R

0.1UF

21

L7101CRITICAL

PCMC104T-SM

0.36UH-30A-1.05MOHM

21

L7100

PCMC104T-SM

CRITICAL

0.36UH-30A-1.05MOHM

2

1R7106

MF-LF603

1%1/10W

3.65K

2

1R7101

1%

603MF-LF1/10W

3.65K

21

XW7100SM

2

1C7121

X5R

20%6.3V

0.22UF

402

2

1C7143

CERM402

0.001UF

50V10%

21

R71230

MF-LF402

1/16W5%

2

1 C7132

402

10%50V

0.001UF

CERM

2

1C7131

10%

CERM402

50V

0.001UF

SIGNAL_MODEL=EMPTY

21

R7122

1/16W5%

MF-LF

0

402

2

1 C7134

10%

402

10V

0.068UF

CERM

2

1C7128

6.3V

402

10%

CERM-X5R

0.22UF

2

1R711511K1%1/16WMF-LF402

2

1R71302.61K

402MF-LF1/16W

1%

2

1R7118

MF-LF402

1/16W1%1K

2

1 C7129180pF5%

402

50VCERM

21

R7117

1%

402

1/16WMF-LF

3.92K2

1C7116

402

0.001uF

NO STUFF

10%50V

CERM

2

1R7107

5%1

MF-LF402

1/16W

2

1R710415%1/16WMF-LF402

2

1R7114

1%

MF-LF1/16W

402

97.6K

2

1C7113390PF

CERM50V

402

10%

2

1R71091K1%

402

1/16WMF-LF

2

1R7113

MF-LF1/16W

1K1%

402

2

1C7110

10%16V

402CERM

0.01uF

2

1 C7135

402

20%

X5R-CERM6.3V

4.7UF

2

1R7110

402MF-LF1/16W1%6.81K

2

1C71070.001UF

10%50VCERM402

21

R7119

MF-LF

1%

402

1/16W

499

2

1C7130

16V

0.1uF10%

402X5R

21

R712110

1%

402MF-LF1/16W

2

1C71261UF10%10V

402X5R

21

R7112

1%1/16W

10

402MF-LF

21

R7120

1%

402

1/16W

10

MF-LF

2

1C7127

X5R

20%

603

25V

0.22UF

21

C7104

CERM10V

402

10%

0.22UF21

R7105

1%

402MF-LF1/16W

10K

2 1

XW7102SM

25

61

9

10

88 21

88 14 10 9

2

1 C71150.22UF20%

X5R603

25V

2 1

XW7104SM

21

C7103

402CERM10V

0.22UF

10%

21

R7100

1%

10K

402MF-LF1/16W

61

88 61

61

61

8

13 12 11 10 8 6

61

61

61

61

88 61

61

41 61

88 61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

8

61

61

61

61

61

61

61

88

61

61

61

61

88 61

61

61

61

61

61

61

61

61

61

8

8

OUT

Q1

Q2

SW

VREG3

COMP1 COMP2

CSN1 CSN2

CSP1 CSP2

DRVH1 DRVH2

FUNC

GND

PGOOD1 PGOOD2

RF

SW1 SW2

THRM_PAD

TRIP

VFB1 VFB2

VIN

VREF2

VREG5

VBST1 VBST2

V5SW

DRVL1

SKIPSEL2

SKIPSEL1

DRVL2

EN1 EN2

EN

S

D

G

IN IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

Vout = 5.0V

F=400KHZ

.

(Q7220 limit)

7A MAX OUTPUT

F=400KHZ

6A MAX OUTPUT

Vout = 3.3V

(L7260 limit)

One master PGOOD for both 5V and 3V3

=PPVIN_S5_P5VP3V3

=PP5V_S3_REG =PP3V3_S5_REG

GATE_NODE=TRUEMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6 mm

P3V3S5_DRVH


P3V3S5_LLSWITCH_NODE=TRUE


P3V3S5_DRVLGATE_NODE=TRUE MIN_LINE_WIDTH=0.6 mm

=P5VS3_EN

P5VS3_COMP1

P5VS3_FUNCP5VP3V3_VREG3


P5VS3_DRVLGATE_NODE=TRUE

=PP5V_S3_REG

P5VS3_COMP1_R

P5VP3V3_VREF2

P3V3S5_COMP2_R

P5VS3_VFB1-R

P5VS3_LL_RC

P3V3S5_VFB2_R

P3V3S5_LL_RC


P3V3S5_VBST


P5VP3V3_VREG5

P5VP3V3_VREG3

P3V3S5_CSP2

P3V3S5_COMP2

P3V3S5_RF

P3V3S5_CSP2_R

P3V3S5_CSN2

P3V3S5_VFB2

GND_P5VP3V3_SGNDMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.2 mmVOLTAGE=0V

P5VS3_VFB1

P5VS3_CSN1

P5VS3_LLSWITCH_NODE=TRUE

P5VP3V3_VREF2

P5V3V3_PGOOD

P3V3S5_EN

P5VS3_CSP1

GATE_NODE=TRUE

P5VS3_DRVH


P5VP3V3_VREF2


P5VS3_VBST

P5VS3_CSP1-R


051-8071 B

9862

SYNC_MASTER=RXU_K20

5V / 3.3V Power Supply

2

1 C7271

402X7R50V10%0.001UF

2

1 C7270

50V

0.001UF

X7R402

10%

2

1 C7273

50V

0.001UF

X7R402

10%

2

1 C7272

50V

0.001UF

X7R402

10%

2

1R7298NO STUFF

MF-LF603

1/10W5%10

2

1 C7298

50V

0.001UF

X7R402

10%

NO STUFF

2

1R72991

603

1/10W5%

MF-LF

2

1 C7299

CERM

0.0033UF

402

10%50V

2

1

R7249

5%

0

402

1/16W

MF-LF

21R7248

NO STUFF

0 5%

MF-LF

1/16W

402

67 67

2

1C7238

50VCERM

470PF10%

402

2

1

R723810K1%

MF-LF

1/16W

402

2

1C7239

CERM

402

5%100PF

50V

2

1

R7239

1/16W

MF-LF

20.0K1%

402

2

1C7292

CRITICAL

6.3V20%

CASE-D3L-SM1

330UF

POLY-TANT

3 2 1

4

5

Q7225SI7110DN

CRITICAL

PWRPK-1212-8-HF

2

1

XW7222SM

PLACEMENT_NOTE=PLACE XW7222 NEXT TO L7220.

2

1

XW7262SM

PLACEMENT_NOTE=PLACE XW7262 NEXT TO L7260.

2

1C7237

50V5%

402

CERM

100PF

2

1C7236

50VCERM

470PF

402

10%

2

1

R723720.0K1%

402

1/16W

MF-LF2

1

R723610K

402

1/16W

1%

MF-LF

2

1

XW7221

PLACEMENT_NOTE=PLACE XW7220 AND XW7221 NEXT TO L7220.

SM

2

1

XW7220SM

2

1R72562.74K

MF-LF

402

1%

1/16W

21R7247

1.54K

402

1/16W

1%

MF-LF

21C7218

0.1UF

16V

X5R

10%

402

2

1

XW7260

PLACEMENT_NOTE=PLACE XW7260 AND XW7261 NEXT TO L7260 .

SM

21

R7246

1.18K

402

MF-LF

1%

1/16W

21C7288

0.1UF

25V

10%

X5R

402

2

1

R72163.83K1%

402

MF-LF

1/16W

21

XW7200SM

PLACEMENT_NOTE=Place XW7200 between pins U7200.28 and 33.

29

22

13

23

169

2631

2

14

33

2532

19

6

3

205

28

11

214

12

2730

241

187

178

1510

U7201CRITICAL

TPS51220

LLP

2

1C7240CRITICAL

POLY-TANT

33UF20%

16V

CASED2E-SM

2

1C7280CRITICAL

CASED2E-SMPOLY-TANT

16V20%

33UF

3 2 1

4

5

Q7220

CRITICAL

LFPAK-HFRJK0305DPB

2

1R722110K

MF-LF402

1/16W1%

2

1R7220

1%

40.2K

402MF-LF

1/16W

PATH=I623

2

1R7261

1%

MF-LF402

1/16W

10K

2

1R7260

1/16W

PATH=I621

402

MF-LF

1%

23.2K

2

1C72010.22UF

CERM

402

10%

10V

10

7 6 5

8

1

9 4 3 2

Q7260

CRITICAL

FDMS9600S

MLP

2

1

XW7261SM

67

2

1

R7206249K

402

MF-LF

1%

1/16W

2

1 C7205

6.3V

603

X5R

20%10UF

2

1C72031UF

6.3VCERM

402

10%

21

L7220

CRITICAL

1.0UH-22A-10M-OHM

SM-IHLP

2

1 C7281

25V

1UF

X5R

10%

603-1

2

1C725010UF

10V

20%

X5R

805

2

1C7252

CRITICAL

6.3V20%

CASE-D3L-SM1

330UF

POLY-TANT

2

1 C7224

10%

0.1UF

603-1

X7R

50V

2

1 C7290

6.3V

20%

10UF

603

X5R

2

1C7264

10%

0.1UF

50V

X7R

603-1

2

1 C7241

603-1

25V

1UF

X5R

10%

21

L7260

CRITICAL

2.2UH-14A

IHLP2525CZ-SM1

2

1C7200

603-1X5R

1UF

25V10%

8

62 8 8

62

62 8

62

62

62

62

MODE

VDDQSNSCOMP

NC0

NC1

VTTSNS

VTT

VTTREF

PGOOD

S3

S5

VTTGND THRM_PAD GND CS_GNDPGND

CS

LL

DRVL

DRVH

VDDQSET

VBST

VLDOINV5FILTV5IN

SYM (2 OF 2)

IN

IN

OUT

NCNC

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

(DDRREG_DRVH)

Vout = VTTREF(DDRREG_DRVL)

VTT Enable

(DDRREG_VBST)

Vout = 0.75V * (1 + Ra / Rb)

<Ra>

(Q7335 limit)

(DDRREG_CSGND)

<Rb>

VDDQ/VTTREF Enable

VDDQ PGOOD

10mA max load

(DDRREG_VDDQSNS)

Vout = VDDQSNS/2 (DDRREG_LL)

(DDRREG_FB)

Vout = 1.50V or 1.80V

f = 400 kHz

18A MAX OUTPUT

=PPVIN_S3_DDRREG

GATE_NODE=TRUEDDRREG_DRVH


=PPDDR_S3_REG

PP5V_S3_DDRREG_V5FILT

VOLTAGE=5V



VOLTAGE=0V

GND_DDRREG_SGND

=PP5V_S3_DDRREG

DDRREG_VBSTMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.2 mm

DDRREG_FB


DDRREG_CSGND

DDRREG_CS

=DDRVTT_EN

=DDRREG_EN


DDRREG_DRVLGATE_NODE=TRUE

=PPVIN_S0_DDRREG_LDO

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6 mmSWITCH_NODE=TRUE

DDRREG_LL


DDRREG_VDDQSNS

DDRREG_PGOOD

=PPVTT_S3_DDR_BUF

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=2 mm

=PPVTT_S0_DDR_LDO

DDRREG_VTTSNS


B

9863

051-8071

1.5V DDR3 Supply

2

1C7331

D3LPOLY-TANT

68UF

CRITICAL

20%16V2

1C7330

D3LPOLY-TANT

16V20%

CRITICAL

68UF

2

1 C7346

50V

0.001UF10%

402X7R

2

1 C7333

50V

0.001UF10%

402X7R

2

1 C7345

6.3V20%

X5R

10UF

603

2

1 C7340CRITICAL

CASE-C2-SM

2.5V20%330UF

POLY-TANT

2

1C7341CRITICAL

2.5V20%

330UF

CASE-C2-SMPOLY-TANT

2

1

XW7300SM

PLACEMENT_NOTE=Place next to U7300.3

2

1 C7355

20%

603

6.3VX5R

10UF

2

1

XW7345

PLACEMENT_NOTE=Place next to L7330

SM

321

4

5

Q7335RJK0328DPB

CRITICAL

LFPAK-HF

21

L7330

IHLP4040DZ11-SM

CRITICAL

1.0UH-20A321

4

5

Q7330RJK0305DPB

CRITICAL

LFPAK-HF

67

2

1R73108.06K

1/16W

402MF-LF

1%

67

2

1C7300

603

4.7UF

CERM

20%6.3V

68 9

2

1C73500.033UF

10%

X5R16V

402

21

XW7335PLACEMENT_NOTE=Place next to Q7335SM

21

XW7360

PLACEMENT_NOTE=Place next to C7361

SM

2

1C7360

X5R-CERM6.3V20%

603

22UF

CRITICAL

2

1 C7361

6.3V20%22UF

CRITICAL

X5R-CERM603

21

R7305

MF-LF1/16W5%

4.7

402

2

1C7305

10%

X5R10V

1UF

402

2

5

1

24

23

8

9

22

15

14

25

11

10

13

18

12

7

4

20

3

19

21

17

16

6

U7300

CRITICAL

TPS51116QFN

2

1C7320

50V5%

100PF

CERM402

NO STUFF

2

1 C7332

603-1

10%1UF

X5R25V

2

1R7321

1/16WMF-LF

1%

402

15.0K

2

1R7320

402

1%1/16W

15.0K

MF-LF

21

C73250.1UF

10%

X7R50V

603-1

8

8

8

8

26 8

8

IN

IN

OUT

IN

IN

IN

S

D

G

S

D

G

IN

IN

LDOREFIN

LDO

PGNDGND

TONSEL

EN_LDO

V5DRV1

VBST1

DRVL1

VSW

EN1

LL1

DRVH1

VOUT1

TRIP1

SKIPSEL

VBST2

DRVH2

LL2

DRVL2

VOUT2

EN2

THRM_PAD

VIN

VFB1

TRIP2

REFIN2

PGOOD2

PGOOD1

VREF2

V5DRV

VREF3

V5FILT

D

SG

D

SG

D

SG

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D


(P5VRTS0_UGATE)

(MCPCORES0_LGATE)

Max load 100mA

(=P5V_RTS0_EN)

Vout = 0.7V * (1 + Ra / Rb)

3.5A MAX OUTPUT

(Q7510 limit?)(=PPMCPCORE_S0_REG)

Vout = 2.0V * Req / (Ra + Req)

(=PP5V_RTS0_REG)

(P5VRTS0_BOOT)

(SGND)

<Rb>

Max load 50uA

<Ra>

<Rd>

<Ra>

Req = Rb || Rc || Rd || Re

<Rb>

MCP79 Rev A01 requires higher core & analog voltage

(P5VRTS0_PHASE)

(Q7560 Limit)

Vout = See below

<Re>

MAX CURRENT: 11A

<Rc>

111 +0.876V +0.719V +0.70V

110 +0.913V +0.752V +0.75V

100 +0.995V +0.830V +0.85V

011 +1.049V +0.885V +0.90V

010 +1.101V +0.937V +0.95V

001 +1.159V +0.994V +1.00V

000 +1.224V +1.060V +1.05V

VID<2:0> Voltage Voltage MCP Target

Rev A01 Production

Vout = 5.03V (MCPCORES0_PHASE)

(P5VRTS0_LGATE)

f = 200 kHz F = 300 KHZ

101 +0.952V +0.789V +0.80V

from PVCC to VCC)

(Internal 10-ohm path

(MCPCORES0_UGATE)

=PPVIN_S0_P5VRTS0_MCPCORE

MCPCORES0_UGATE

GATE_NODE=TRUE


MCPCORES0_BOOT

P5VRTS0_UGATE

MIN_NECK_WIDTH=0.2MMGATE_NODE=TRUE


PVIN_P5VRTS0_MCPCORE

MCPCORES0_LGATE


GATE_NODE=TRUEMIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.5 MMMIN_NECK_WIDTH=0.2 MMSWITCH_NODE=TRUE

MCPCORES0_PHASE

GND_MCPREG_SGND

VOLTAGE=0V


MCPCORES0_ILIM

VOLTAGE=2VPP2V_S0_MCPREG_REF

MCPCORES0_REFIN

PMCPCORE_VSNS

PP5V_S0_MCPREG_LDOVOLTAGE=5V

P5VRTS0_BOOT


P5V_RTS0_FB

=MCPCORES0_EN

MCPCORES0_PGOOD

P5V_RTS0_PGOOD

PP3V3_S0_MCP_VREFMIN_LINE_WIDTH=0.5 MMMIN_NECK_WIDTH=0.2 MMVOLTAGE=3.3V

MCP_VID<1>

MCP_VID<2>

MCP_VID2_LMCP_VID1_LMCP_VID0_L

MCPCOREISNS_P

MCPCOREISNS_N

PPMCPCORE_LL_RC



PP5VRTS0_LL_RC

P5VRTS0_PHASE

SWITCH_NODE=TRUEMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM

=PP5V_S0_REG =PPMCPCORE_S0_REG


GATE_NODE=TRUE

P5VRTS0_LGATE

P5VRTS0_VSNS

P5V_RTS0_ILIM

MCP_VID<0>

=P5V_RTS0_EN

PP5V_S0_MCPREG_VCCMIN_LINE_WIDTH=0.5 MMMIN_NECK_WIDTH=0.2 MMVOLTAGE=5V


64 98

B051-8071

SYNC_MASTER=RXU_K20

5V_S0 / MCP CORE REGULATORMCP_A01Q114S0373 1 R7570RES,MTL FILM,1/16W,40.2K,1,0402,SMD,LF

114S0453 1 R7581 MCP_A01RES,MTL FILM,1/16W,267K,1,0402,SMD,LF

R7571 MCP_A01Q1114S0404 RES,MTL FILM,1/16W,84.5K,1,0402,SMD,LF

MCP_A01QR75821 RES,MTL FILM,1/16W,100K,1,0402,SMD,LF114S0411

R7580 MCP_A01Q114S0458 1 RES,MTL FILM,1/16W,301K,1,0402,SMD,LF

1 MCP_A01114S0400 RES,MTL FILM,1/16W,76.8K,1,0402,SMD,LF R7571

RES,MTL FILM,1/16W,48.7K,1,0402,SMD,LF114S0382 R75701 MCP_A01

MCP_A01QR75811 RES,MTL FILM,1/16W,237K,1,0402,SMD,LF114S0447

R75801 MCP_A01114S0482 RES,MTL FILM,1/16W,523K,1,0402,SMD,LF

114S0422 1 R7582 MCP_A01RES,MTL FILM,1/16W,130K,1,0402,SMD,LF

67

2

1

XW7516


SM

2

1R7520NO STUFF

1%

402MF-LF

61.9K

1/16W

2

1R7521

402

1/16W5%0

MF-LF

2

1R7582MCP_PROD

402

1/16WMF

110K0.1%

45

3Q7582

SOT563SSM6N15FEAPE

2

1R7581MCP_PROD

402

1/16WMF

237K0.1%

12

6Q7580SSM6N15FEAPE

SOT563

2

1R7580

402

1/16W

MCP_PROD

MF

475K0.1%

45

3Q7580

SOT563SSM6N15FEAPE

2

1C7560

D3LPOLY-TANT

CRITICAL

68UF

16V20%

2

1R7514

402

100K

1/16W1%

MF-LF

2

1C7566

603X5R

20%10UF

4V

2

1 C7565

CASE-C2-SM

2.5V20%330UF

POLY-TANT

CRITICAL

2

1 C7561

25V10%

603-1X5R

1UF

2

1 C75024.7UF20%6.3VX5R-CERM402

2

1C7503

X5R10V10%

402-1

1UF

2

1 C7501

10%

X5R402-1

10V

1UF

2

1C7500

805

10%

X5R25V

10UF

2

1C7564

10VCERM-X7R

603

5%0.22UF

2

1R7570

402

1/16W

48.7K

MF

0.1%

MCP_PROD

2

1R7571

402

MCP_PROD

54.9K

1/16WMF

0.1%

2

1R7564

1%100K

402

1/16WMF-LF2

1 C7530

20%10VCERM402

0.1UF21

XW7500SM

2

1 C7562CRITICAL

CASE-C2-SMPOLY-TANT2.5V20%330UF

9

5

1

3010

6

11

2417

3

20

19

3112

2

33

29

32

28

13

22

2516

8

7

21

4

2714

2318

2615U7500

CRITICAL

QFN

SN0802043

2

1 C7599NO STUFF

0.001UF

402

10%50VX7R

2

1R7599NO STUFF

1.00

402

1%1/6W

MF

2

1 C7598NO STUFF

0.001UF10%

402X7R50V

2

1R7598NO STUFF

1.001%

1/6WMF

402

96 46

96 46

4 3

2 1

R7505

MCPCORES0_PHASE_LMIN_LINE_WIDTH=0.5 MM


CRITICALMF

1%

0612

1W

0.001

2

1 C7512

20%

402CERM50V

0.001UF

2

1C7504

X5R

1UF

10V10%

402-1

2

1R75004.7

402MF-LF

5%1/16W

21

XW7510SM

3 2 1

4

5

Q7510SI7110DN

PWRPK-1212-8-HF

CRITICAL

21

L7510

IHLP2525CZ-SM1

CRITICAL

2.2UH-14A

2

1 C7516

805

X5R

10V

10UF20%

2

1C7515

CRITICAL

POLY-TANT6.3V

330UF20%

CASE-D3L-SM1

3 2 1

4

5

Q7511

PWRPK-1212-8-HF

SI7108DN

CRITICAL

2

1 C7569

50V

0.001UF

402

10%

X7R

2

1 C75630.001UF

50VX7R

10%

402

2

1 C7568CRITICAL

CASE-C2-SMPOLY-TANT2.5V20%330UF

21

L7560

SWITCH_NODE=TRUE

CRITICAL

1.0UH-20A

IHLP4040DZ11-SM

2

1 C75900.01UF

16V10%

CERM402

21

21

21

67

67

2

1 C7567

603

10UF

X5R

20%4V

321

4

5

Q7565

CRITICAL

LFPAK-HF

RJK0328DPB

321

4

5

Q7560RJK0305DPBLFPAK-HF

CRITICAL

2

1 C75140.22UF

603

16VX7R

10%

2

1 C7511

603-1X5R25V

1UF10%

2

1C7510CRITICAL

POLY-TANT16V

CASED2E-SM

20%33UF

2

1C7520NO STUFF

402CERM50V

100PF5%

67

8

8 8

BST

V5V

FB

TON

VLDO

FBL

EN/PSV

DL

ILIM

LX4

LX3

LX2

LX0

DH

VIN2

VIN1

PGOOD

ENL

LX5

LX1

VIN0

VIN3

VIN4VOUT

PGNDAGND

IN

IN

NC

NCIN

IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

NC

NC

MAX CURRENT = 6A

PWM FREQ = 400KHZ

CPUVTTS0_FB_C

VOLTAGE=0VMIN_LINE_WIDTH=0.4 mmMIN_NECK_WIDTH=0.25 mm

GND_CPUVTTS0_SGND

CPUVTTS0_LL_RC

MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.5 MMPPCPUVTT_ISNS_R

=PP5V_S0_CPUVTTS0

CPUVTTS0_FB

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.4 mmVOLTAGE=5V

PP5V_S0_CPUVTTS0_R

CPUVTTS0_LL_XW

1V05CPU_PCPUVTTS0_VBST

=CPUVTTS0_EN

CPUVTTS0_PGOOD

CPUVTTS0_TONE

CPUVTTS0_ILIM

PPCPUVTT_S0_REG_XW

1V05CPU_N

=PPVIN_S0_CPUVTTS0

=PPCPUVTT_S0_REG


CPUVTTS0_LL

B


051-8071

9865

CPU VTT Power Supply

46 96

46 96

1/4W1%

MF1206

0.002

CRITICALR7650

1 2

3 4

15%

MF-LF1/10W

603

R76981

2

10%

402X7R

0.001UF

50V

C76981

2

67

67

NO STUFF

402CERM50V

330PF10%

C76311

2

NO STUFF

16VCERM402

0.01UF10%

C76301

2

NO STUFF

1/16WMF-LF

10K1%

402

R76311

2

SM

XW7662

12

SM

XW7661

12

402MF-LF1/16W

56.2K 1%

R76301 2

50VCERM402

0.001UF20%

C76581

2

101/16WMF-LF402

5%

R76991 2

402

180PF5%50VCERM

NO STUFF

C76561

2

12.1K

CRITICAL

1%

402MF-LF1/16W

R76551

2

0.01UF

402CERM16V10%

C76551

2

CRITICAL

402MF-LF

1%1/16W

11KR76561

2

CRITICAL

CASE-B2-SM

6.3V20%150UF

POLY-TANT

C76541

2

2.2UH-14A

IHLP2525CZ-SM1

CRITICAL

L7650

1 20.22UF

402

10VCERM

10%

C7653

12

7.15K1/16WMF-LF402

1%

R7654

1 2

SMXW76601 2

CRITICAL

SC417MLPQ

U7600

4

30

34

8

12

14

29

32

1

2

27

13

23

24

25

28

33

15

16

17

18

19

20

21

22

26

31

3

6

9

10

11

35

7

5

10%10VX5R

1UF

402

C76571

2

25V10%1UF

603-1X5R

C7651 1

2CASED2E-SMPOLY-TANT20%16V

33UF

CRITICALC7650 1

2

130K1/16W

402

1%

MF-LF

R7651 1

2

8

8

8

VIN

SW1

SW2

GND

RUN2

RUN1

VFB1

VFB2

PADTHRML

VI

SWENFB

GND

OUT

IN

S

D

G

S

D

G

PGND

PHASE

UG

LG

PVCC

FCCM

EN

PGOOD

COMP

FSET

ISEN

FB

VO

BOOT

VIN

THRMLPAD

VCC

G

D

SGND

VIN

VFB

ITH/RUN SENSE-

NGATE

GND

BIAS

OUT

ADJ

IN

SHDN*

PADTHRML

THRM_PAD

PVINAVIN

PGMODE

OVT FB

AGND PGND

SWEN

IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

EXPRESSCARD 1.5V_S0 SUPPLY

FREQ = 1Mhz

VOUT = 0.6V * (1 + Ra / Rb)

<Rb>

1.8V S0 Switcher / 1.0VFW SWITCHER

MCP79 PLL VLDO(Switcher limit)

300mA max output<Ra>

f = 2.25 MHz

1.8V S0 Switcher

S5 power required for output discharge feature

0.3A max output

(Switcher limit)

F = 2.25 MHZ

MCP 1.05V AUXC Supply

Vout = 1.052V

f = 400 kHz

5A max output

(L7770 limit)

MAX Current = 1.2A

Vout = 0.6V * (1 + Ra/Rb)

<Ra>Vout = 1.5V

<Rb>

<Ra>

MAX CURRENT = 300MA

Vout = 1.052V

INPUT RAIL IS 3.3V S0

MAX CURRENT = 300MA

VOUT = 0.8V * (1 + RA / RB)

FW BOOST POWER

<Rb>

<Ra>F=550KHZ?

VOUT = 10V

?MA MAX OUTPUT

<Rb>

<Ra>

<Rb>

Vout = 1.001V

VOUT = 1.804V

(P1V05S5_VFB)

(=PP1V05_S5_REG)

(GND)

Vout = 0.6V * (1 + Ra / Rb)

<Rb>

<Ra>

=PP1V5_EXP_S0

PP3V3_S0_MCP_PLL_VLDO_BIAS=PP3V3_S0_MCP_PLL_VLDO


=PP1V0_FW_REG

P5V_P1V05S5_V5FILT

P1V05S5_ISEN

GATE_NODE=TRUEP1V05S5_DRVL


P1V5EXPS0_FB

P1V0FW_VFB

=PP1V8_S0_REG

TP_P1V5_EXP_S0_PGOOD

=PP3V3_S3_P1V5EXPS0

P1V5EXPS0_AVIN

P1V5EXPS0_SGND

=PP1V05_S5_MCP

P1V05S5_VSNS

=P1V5_EXP_S0_EN

=PP1V05_S0_FET


P1V05_S0_MCP_PLL_UF_ADJ

P1V8GPU_SW=P1V8FB_EN

=PP3V3_GPU_P1V8S0

=PP1V8_GPUIFPX_REG

PFWBOOST_ITH_R

PFWBOOST_NGATE

PFWBOOST_ITH

PFWBOOST_SW

SWITCH_NODE=TRUE


=PPVIN_PFWBOOST

PFWBOOST_BOOST


PFWBOOST_FB

=PFWBOOST_REG

PFWBOOST_SENSE

MIN_LINE_WIDTH=0.4 mmP1V8S0_LX

MIN_NECK_WIDTH=0.2 mmSWITCH_NODE=TRUE

=PP3V3_S3_P1V8S0

SWITCH_NODE=TRUE

MIN_LINE_WIDTH=0.5 mmP1V0FW_SW



P1V05S5_DRVHGATE_NODE=TRUE

P1V05_S5_PGOOD

=P1V05S5_EN

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6 mmP5V_P1V05S5

VOLTAGE=5V

=PPVIN_S0_P1V05S5


VOLTAGE=0V

GND_P1V05S5_SGND


P1V05S5_VFB

MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MMSWITCH_NODE=TRUE

P1V05S5_LL MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM

P1V05S5_VBST

P1V8S0_VFB

=PP3V3_FW_P1V0FW

=P1V8S0_EN

=PPVIN_S0_P1V05S5

P1V05_S5_COMP

P1V05S5_COMP_R

P1V05_S5_FSET

66 98

B051-8071


Misc Power Supplies

562K

MF-LF

1%

402

1/16W

R77001

2

4.7UF20%

X5R4V

402

C77051

2

PCAA031B-SM

2.2UH-1.2A

CRITICAL

L7700

1 2

MF-LF

280K1%

402

1/16W

R77011

2

6.3V

402-LF

20%

CERM

2.2UFC7700 1

2

67

402

4.7UF20%4VX5R

C77851

2

2.2UH-1.2A

CRITICAL

PCAA031B-SM

L7780

1 2

1%187K

1/16WMF-LF402

R77821

2

10PF

CERM

5%50V

402

C7782 1

2

402MF-LF1/16W1%280KR77831

2

402

1UF

CERM

10%6.3V

C7740 1

2

402

5%1/16WMF-LF

100R77431 2

CRITICAL

805CERM6.3V20%22UFC77131

2

402

1%

MF-LF1/16W

150KR7710

1

2

22PF

402CERM5%50V

C77121

2

SMXW7710

1 2402MF-LF1/16W1%100KR77111

2

CERM805

20%22UF6.3V

CRITICALC77101

2

5%1

402MF-LF1/16W

R77121

2 CRITICAL

2.2UH-1.2APCAA031B-SM

P1V5EXPS0_SW

L7710

1 2

TPS62510BQA

CRITICAL

U7710

39

6

4

7

5

8

210

1

1116V

402X5R10%0.1UF

C77111

2

05%

NO STUFF

1/16WMF-LF402

R77421

2

MF-LF

40.2K

402

1/16W1%

R77411

2

402

1%66.5K

1/16WMF-LF

R77401

2

DFN

CRITICAL

LTC3025U7740

5

1

2

3 4

6

7

6.3V

1UF10%

CERM402

C7742 1

2

1UF

CERM402

10%6.3V

C7741 1

2

CRITICAL

STPS1L30MF

DO222-SMD77901 2

CASED2E-SM

20%33UF

POLY-TANT16V

C77981

2

CRITICAL

SOT23-6LTC1872

U7790

2

1

6

4

3

5

402

50VCERM

0.0012UF10%

C7797 1

2

1%

402MF-LF

1/16W

38.3K

R77971

2

0612MF

0.5%0.02

1W

R7790

1 2

3 4

CRITICALSUPERSOT-6FDC796NGQ7790

7

4

1 2 3 5 6

16VPOLY-TANT

33UF20%

CASED2E-SM

C77991

2

10UF

16V10%

X5R1206

C7790 1

2

1/16WMF-LF

402

1%

86.6K

R77961

2

402

5%50VCERM

33PF

C7795 1

2

1%

1206MF-LF1/4W

1.00M

R77951

2

10%16V

1UF

402X5R

C7794 1

2

CRITICAL

4.7UH-10A

PCMC063T-SM

L7795

1 2

10%1UF

X5R25V

603-1

C77521

2

10%

402CERM16V

0.01UFC7753 1

2

5%

402CERM50V

22PFC7755 1

2

10%

402CERM50V

470PFC7754 1

2

1/16W

402MF-LF

1%100KR77531

2

QFNISL6269

CRITICAL

U7750

13

5

4

6

3

7

9

11

10

16

15

12

17

14

2

1

8

PWRPK-1212-8-HF

SI7108DN

CRITICAL

Q7771

5

4

1 2 3

CRITICAL

SI7110DNPWRPK-1212-8-HF

Q7770

5

4

1 2 3

402

4V

4.7UF20%

X5R

C77761

2

CRITICAL

2.2UH-8.0A

PCMB065T-SM

L7770

1 2

CRITICAL

B2-SM

2.0VPOLY-TANT

330UF20%

C7771 1

2

SM

PLACEMENT_NOTE=Place XW7775 next to C7775

XW7775

1

2

402MF-LF

1%3.74K

1/16W

R77801

2

4.42K

MF-LF

1%1/16W

402

R77811

2

603-1

10%

X5R

1UF

25V

C77751

2

1/16W

402MF-LF

2.0K1%

R77791

2

402

10%10VCERM

0.22UFC7770 1

2

16VX5R

2.2UF

603

10%

C77501

2

4.7UF

603

6.3V20%

CERM

C7751 1

2

SMXW7750

1

2

4.7

5%1/16WMF-LF402

R77511 2

67

67 1/16W1%

MF-LF402

38.3KR77521

2

10uF

6.3VX5R

20%

603

C7762 1

2

10UH-0.55A-330MOHMPCAA031B-SM

CRITICAL

L7760

1 2

TPS62202SOT23-5

CRITICAL

U7760

3

4

2

5

1

603X5R

6.3V20%

10uF

C7760 1

2

CERM402

5%10PF

50V

C7701 1

2

LTC3547

DFN-HF

CRITICAL

U7700

5

2

7

4

6

9

1

8

3

8 38

8

8

8

8

8

8

9

8 68

8 23

67 83 84

8

8

8

8

8

8 66

8

8 66

OUT

IN

OUT

OUT

OUT

IN

OUT

IN

D

SG

D

SG

D

SG

D

SG

OUT

OUT

IN

IN

IN

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

IN

IN

OUT

SENSE

CT

VDD

GND

RESET*

MR*

ADJ1

SEL

ADJ2

REF

VCC

TMR

GND THRM_PAD

RST*

OUTOUT

OUT

OUT

Y

B

A

VDD

MR*

RST*V4MON

V3MON

V2MON

GND THRM_PAD

NC

OUT

TABLE_5_ITEM

CRITICAL BOM OPTIONTABLE_5_HEAD

PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

DU7871 IS TO REPLACE U7870

V2MON THRESHOLD IS 2.866V

3.3V 1.05V AND 1.5V S0 RAILS MONITOR CIRCUIT

1.5V 1.05V COMPARED TO 0.5V

place XW0402 if needed to save trace space for pin 7,8

3.3V 1,05V S5 ENABLE

NC

GPUVCORE ENABLE

G96 GPU requires rails to come

up in the following order:

1) 1.1V

2) GPU_3.3V


3) GPUVcore

BOMOPTION: EG

4) GDDR3 1.8V


LTC2909 THRESHOLD IS 3.136V

Graphic MEM ENABLE

EXT GPU PWRGD Pullup

S0 ENABLE

Unused PGOOD signal

S5 rail PWRGD

TRST = 200MS

TIE TMR TO GND

(PM_S4_STATE_L)

TPS3808 MR* HAS INTERNAL PULLUP

3.3V,5V S3 ENABLE

0

PM_SLP_S3_L

1

0

00

PM_SLP_S4_L

1

0

1

0

1

1

1

Battery Off (G3Hot)

Soft-Off (S5)

State

Run (S0)

(PM_SLP_S3_L)

PM_ALL_GFX_PGOOD

EG PM_ALL_GPU_PGOOD

IG highOther S0 RAILS

Sleep (S3)

SMC_PM_G2_ENABLE

1.1V GPU ENABLE

S0PGOOD_PWROK

=PP3V3_S0_PWRCTL =PP3V3_S0_VMON

=PP3V3_S0_VMON

=PP3V3_S5_PWRCTL

=CPUVTTS0_EN

MCPDDR_ENMAKE_BASE=TRUE

MAKE_BASE=TRUE

P2V5S0_EN

P1V05S0_EN

PM_SLP_S3_L_R

MAKE_BASE=TRUE

=PP1V05_S0_VMON

=PP1V5_S0_VMON

P3V3S5_EN

=PP3V3_GPU_PWRCTL P1V8_S0GPU_ENMAKE_BASE=TRUE

EXTGPU_PWR_EN

=PP3V3_S0_PWRCTL P1V1_GPU_EN_RC

=PP3V3_S5_PWRCTL

SMC_PM_G2_EN

=P1V8FB_EN

=PP3V3_S0_VMON

=PP1V5_S0_VMON

=PP1V05_S0_VMON

MCPCORES0_ENMAKE_BASE=TRUE

P1V2_S0_EN

MAKE_BASE=TRUE

S0PGOOD_PWROK

PM_ALL_GPU_PGOODMAKE_BASE=TRUE

P1V8FB_PGOOD

=P1V8S0_EN

=P2V5S0_EN

S0_PWR_PGOODMAKE_BASE=TRUE

MAKE_BASE=TRUE

TP_DDRREG_PGOOD DDRREG_PGOOD

CPUVTTS0_PGOOD

MAKE_BASE=TRUE

CPUVTTS0_EN

=MCPDDR_EN

PM_SLP_S3_L

=P1V1GPU_EN

MCPCORES0_PGOOD

P1V8S0_PGOOD

GPUVCORE_EN_RC_L

MAKE_BASE=TRUE

PM_SLP_S4_L

GPUVCORE_EN_RC_L

=P5VS3_EN

=DDRREG_EN

=P3V3S3_EN

P1V05_S5_PGOOD

RSMRST_PWRGD

CT

=PP3V3_GPU_PWRCTL

=PP3V42_G3H_PWRCTL

S0PGOOD_PWROK

PM_ALL_GPU_PGOOD

=GPUVCORE_EN

=PP3V3_S0_PWRCTL

=P5V_RTS0_EN

=P3V3S0_EN

=PBUSVSENS_EN

=P1V2S0_EN

=MCPCORES0_EN

=PP3V3_S0_PWRCTL

P5V3V3_PGOOD

P5V_RTS0_PGOOD

=PP3V3_S5_PWRCTL

ALL_SYS_PWRGD

P5VS3_EN

MAKE_BASE=TRUE

GPUVCORE_PGOOD

ALL_GFX_PGOOD_R

P1V8S0_ENMAKE_BASE=TRUE

P1V1_GPU_ENMAKE_BASE=TRUE

P1V8_S0GPU_EN_RC

GPUVCORE_ENMAKE_BASE=TRUE

P1V1GPU_PGOOD P3V3GPU_EN

PM_G2_P1V05S5_ENMAKE_BASE=TRUE

=P1V05S5_EN

DDRREG_ENMAKE_BASE=TRUE

GPUVCORE_EN_RC

MAKE_BASE=TRUE

GPU_S0_EN_L

Power Control

SYNC_MASTER=YMA_K20

051-8071 B

67 98


353S2718 1 IC, QUAD VOLTAGE MONITOR CRITICALU7871

21

R7868

100K4021/16W 5% MF-LF

21

R7869

MF-LF

PLACEMENT_NOTE=near U950005%1/16W 402

EG_PWRSEQ_HW

2

1 C7889

20%10V

0.1UF

402CERM

2

1C7869NO STUFF

0.022UF20%

16V

402

CERM

PLACEMENT_NOTE=near U9500

84 41 25

TDFN

4

1

8

9

3

5

6

2 7

ISL88042IRTEZU7871

OMIT

4

5

3

1

2

U7880

TC7SZ08AFEAPESOT665

21

R7878

MF-LF1/16W

100

5%

402

21

R7888EG_PWRSEQ_HW

402MF-LF1/16W

0

5%

87

87

2

1 C7886

PLACEMENT_NOTE=nearU9900

0.47UF

6.3V

10%

402

CERM-X5R2

1 C7885


0.47UF

CERM-X5R

402

6.3V

10%

2

1

R7886

1/16W

PLACEMENT_NOTE=nearU9900402MF-LF

5%

5.1K

2

1

R7885


MF-LF

10K

1/16W5%

402

84 68 67 9

2

1R7889


1/16W

MF-LF

100K

5%

402

3

2

9

1

6

5

7

8

U7870

DFN

LTC2909

4

NO STUFF

2

1C78700.1uF

10V

CERM402

20%

CLOSE TO U7870 & U7871

2

1C7841

402

CERM

50V

20%

0.001UF

6

5 1

3

2

4

U7840TPS3808G33DBVRG4

SOT23-6

2

1C7840

402

CERM

10V

20%

0.1uF

2

1R7840

5%

1/16W

MF-LF

402

100K

2

1R78940


5%

402

1/16W

MF-LF

2

1 C7812NO STUFF

10%

CERM-X5R

402

6.3V

0.47UF


2

1

R7812

MF-LF

0

5%1/16W

402PLACEMENT_NOTE=near U7201

2

1 C7810

6.3V

10%

402

CERM-X5R

0.47UF


2

1

R7811

MF-LF

402

5.1K

1/16W5%


62

2

1 C78800.47UF

6.3V

402

10%


CERM-X5R2

1 C7881

402

6.3V

CERM-X5R

10%

0.47UF

PLACEMENT_NOTE=nearQ7600

2

1 C7882NO STUFF

0.47UF

6.3V

CERM-X5R

10%

402PLACEMENT_NOTE=nearQ7971

2

1 C7883

CERM-X5R

0.47UF

6.3V

10%

402


84 82 41 36 33 21 7

2

1R7879

100K5%

402

1/16W


MF-LF

2

R7890

MF-LF

5%

100K

402

1

1/16W

2

1

R7880

22K

MF-LF1/16W


5%

402

2

1

R7881

33K

1/16W

402MF-LF

5%


2

1

R7882

0

MF-LF

PLACEMENT_NOTE=nearQ7971

402

5%1/16W

2

1

R7883


402MF-LF

10K5%1/16W

2

1 C78840.47UF10%

6.3V

CERM-X5R

402PLACEMENT_NOTE=nearU7951

NO STUFF

62

64

2

1

R7884

0


1/16WMF-LF

5%

402

66

65

68

64

68

45

68

64

41

2

1R7858

5%

1/16W

402


MF-LF

100K

2 1

R78015.1K


1/16W

402MF-LF

5%

2

1 C7802

CERM

10V

402

10%

0.068UF

NO STUFF


2 1

R7802100

MF-LF1/16W5%

402

2

1 C7801


CERM-X5R

402

0.47UF10%

6.3V

65

66

62

45

3Q7861SSM6N15FEAPE

SOT563

EG_PWRSEQ_HW

12

6Q7861

SOT563

SSM6N15FEAPE

EG_PWRSEQ_HW

45

3Q7850SSM6N15FEAPE

SOT563

EG_PWRSEQ_HW

12

6Q7850EG_PWRSEQ_HW

SSM6N15FEAPE

SOT563

64

21

R7891

1/16WMF-LF402

0

5%


NO STUFF

84 83 66

42 41 39 21

2

1R7810

1/16W


402MF-LF

5%

100K

63

68

21

R7863

100KMF-LF5%1/16W 402

EG_PWRSEQ_HW

21

R7864EG_PWRSEQ_HW

0402MF-LF5%1/16W


2

1C7861EG_PWRSEQ_HW

402

16V

CERM

0.01UF10%


84 77

2

1R7892

402

5%

MF-LF

10K

1/16W

2

1R7853

402

5%

MF-LF

100K

1/16W

84

21R7850

4021/16W MF-LF5%

EG_PWRSEQ_HW

100K

21

R7851

10K402MF-LF1/16W 5%

EG_PWRSEQ_HW

21 R7852


5%

0

MF-LF

402

1/16W

EG_PWRSEQ_HW

2

1 C7850

402PLACEMENT_NOTE=near U9500

CERM

20%

0.022UF

NO STUFF

16V

84 83

67

67 8 8 67

67 8

67 8

67 8

67 8

67 8

67 8

67 8

67 8

8 67

67 8 67

83

63

67

67

66

41

67 8

8

67

67 9

67 8

67 8

67 8

77

83

IN

D

SG

D

SG

IN

D

SG

D

SG

IN

ININ

D

SG

D

SG

D

SG

D

SG

IN

S

D

G

D

G S

S

G

D

S

G

D

S

D

G

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

3.3V S3 FET

0.087 A (EDP)

CHANNEL

1.5V S0 FET

RDS(ON)

1.5V S0 FET

26 mOhm @4.5V

In order to support unpowering rail, hardware must guarantee MEM_CKE signals are low

before rail is turned off, and remains low until after rail turns back on or DIMMs

will exit self-refresh prematurely. MEM_VTT_EN output from MCP79 used to enable clamp

on VTT rail, which pulls all CKE signals low through VTT termination resistors.

MCP79 DDR pad leakage is high enough that nVidia recommends unpowering during sleep.

MCP79 DDR FETs

81mW max power

90mA max load @ 0.9V

LOADING

RDS(ON)

P-TYPE

3.3V S0 FET

RDS(ON)

CHANNEL

LOADING

RDS(ON)

CHANNEL

MOSFET

3.3V GPU FET

LOADING 1.1 A (EDP)

MOSFETFDC638P

P-TYPE

MOSFET

3.3V S0 FET

2.9 A (EDP)

26 mOhm @4.5V

P-TYPE

FDC606P

FDC606P

APN 376S0651

LOADING

CHANNEL

MOSFET

N-TYPE

SI7108DN

5.4 A (EDP)

5 mOhm @4.5V

SI7108DN

LOADING

APN 376S0651

5 mOhm @4.5V

1.05V S0 FET

48 mOhm @4.5V

N-TYPE

CHANNEL

3.3V GPU FET

RDS(ON)

MOSFET

5.1 A (EDP)

1.05V S0 FET

3.3V S3 FET

P3V3GPU_EN

=PP3V3_S0_FET

=MCPDDR_EN

=PPVTT_S0_VTTCLAMP

=DDRVTT_EN

VTTCLAMP_EN

=PP5V_S3_VTTCLAMP

=P3V3S3_EN=P3V3S0_EN

P1V05_EN_L

P1V05S0_EN

MCPDDR_EN_L

=PP5V_S3_MCPDDRFET

=PP1V8R1V5_S0_MCP_FET

MCPDDR_SS

MCPDDR_EN_L_RC

P3V3S0_EN_L

=PP3V3_S3_P3V3S3FET

P3V3GPU_EN_L

=PP3V3_GPU_P3V3GPUFET

P3V3GPU_SS

P3V3S0_SS

=PP3V3_S0_P3V3S0FET

P1V05_EN_L_RC

=PP3V3_S5_P1V05FET

=PP1V05_S5_P1V05S0FET

=PP1V05_S0_FET

=PP5V_S3_P1V05S0FET

P3V3S3_EN_L

VTTCLAMP_L

=PP3V3_S0GPU_FET

=PP1V8R1V5_S0_FET

P1V05S0_SS

=PP3V3_S3_FET

P3V3S3_SS

98

051-8071

68

Power FETs

SYNC_DATE=05/19/2008SYNC_MASTER=YMA_K20

B

321

4

5

Q7953

CRITICAL

PWRPK-1212-8-HF

SI7108DN

4

3

65

21

Q7970FDC606P_G

CRITICAL

SOT-6

4

3

65

21

Q7930FDC606P_G

CRITICAL

SOT-6

21

3

Q7972

SOD-VESM-HF

SSM3K15FV

321

4

5

Q7901SI7108DN

PWRPK-1212-8-HF

CRITICAL

67

45

3Q7951SSM6N15FEAPE

SOT563

2

1R7953

10K5%

402

1/16WMF-LF

21

R7951

402

5%1/16WMF-LF

100K1

2

6Q7951

SOT563SSM6N15FEAPE

21

R7952

5%

MF-LF1/16W

402

220K

2

1 C79530.068UF10%

402CERM10V

4

3

6

5

2

1

Q7910CRITICAL

FDC638P_G

SM

45

3Q7912SSM6N15FEAPE

SOT563

12

6Q7912SSM6N15FEAPE

SOT563

67 67

2

1

R7932

5%

1/16W

402

100K

MF-LF

21

R7930

402

MF-LF

1/16W

5%

47K

2

1C7931

402

X5R

10%

0.033UF

16V

21

C79300.01UF

16V

CERM

402

10%

2

1

R7912

1/16W

5%

402

10K

MF-LF

21

R791047K

1/16W

5%

402

MF-LF

2

1C7911

16V

X5R

10%

402

0.033UF

21

C7910

16V

CERM

402

10%

0.01UF

67

45

3Q7971SSM6N15FEAPE

SOT563

2

1R7903

5%100K

402

1/16WMF-LF

21

R7901

402

1/16WMF-LF

10K

5%

21

R7971

1/16WMF-LF

47K

5%

402

12

6Q7971SSM6N15FEAPE

SOT563

2

1 C7903

10V10%

CERM

0.068UF

402

2

1C79020.1UF20%

402CERM10V

84 67

2

1

R7972

1/16W

402

MF-LF

51K5%

21

R7970

402

5%

MF-LF

1K

1/16W

21

C7970

10%

16V

402

CERM

0.01UF

2

1C7971

402

10%

10V

1UF

X5R

2

1R7975

MF-LF1/16W

402

5%10

12

6Q7975SSM6N15FEAPE

SOT563

2

1C7976

NO STUFF

50V20%

CERM402

0.001UF

2

1R7976

402MF-LF

100K

5%1/16W

45

3Q7975SSM6N15FEAPE

SOT563

63 9

8

8

8 8

8

8

8

8

8

8

66 8

8

8

8

8

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

GND_SENSE

VDD_SENSE

PEX_IOVDDQ23

PEX_IOVDDQ25

PEX_IOVDD5

PEX_IOVDDQ1

PEX_IOVDDQ2

PEX_PLLVDD

PEX_IOVDDQ22

PEX_IOVDDQ6

PEX_IOVDD2

PEX_IOVDD3

PEX_IOVDD4

PEX_IOVDDQ9

PEX_IOVDDQ15

PEX_IOVDDQ16

PEX_IOVDDQ17

PEX_IOVDDQ19

PEX_IOVDDQ20

PEX_IOVDDQ21

PEX_IOVDD1

PEX_IOVDDQ14

PEX_IOVDDQ13

PEX_IOVDDQ12

PEX_IOVDDQ8

PEX_IOVDDQ7

PEX_IOVDDQ5

PEX_IOVDDQ4

PEX_IOVDDQ11

PEX_IOVDDQ24

PEX_IOVDDQ18

PEX_IOVDDQ3

PEX_IOVDDQ10

NC

SYMBOL 2 OF 9

PEX_RFU2

PEX_TX2

PEX_TX3

PEX_TX3*

PEX_TX4

PEX_TX4*

PEX_TX5*

PEX_TX6*

PEX_RFU1

PEX_RX5

PEX_RX3*

PEX_RX4

PEX_RX0

PEX_RX1

PEX_RX0*

PEX_RX9

PEX_RX9*

PEX_RX4*

PEX_RX5*

PEX_RX10

PEX_TX13*

PEX_TX1

PEX_TX7

PEX_TX10

PEX_TX10*

PEX_TX11

PEX_TX11*

PEX_TX12

PEX_TX12*

PEX_TX13

PEX_TX14

PEX_TX14*

PEX_TX15*

PEX_TX9*

PEX_TX8*

PEX_TX2*

PEX_TX1*

PEX_TX0*

PEX_RX15*

PEX_RX12*

PEX_RX11*

PEX_RX10*

PEX_RX8*

PEX_RX7*

PEX_RX6*

PEX_RX2*

PEX_TX0

PEX_TX9

PEX_TX5

PEX_TX6

PEX_TX8

PEX_TX15

PEX_RX3

PEX_RX6

PEX_RX7

PEX_RX8

PEX_RX11

PEX_RX12

PEX_RX2

PEX_RX1*

PEX_RX15

PEX_RX14*

PEX_RX14

PEX_RX13

PEX_RX13*

PEX_TSTCLK_OUT*

PEX_TSTCLK_OUT

PEX_TERMP

PEX_CLKREQ*

PEX_RST*

PEX_REFCLK*

PEX_REFCLK

PEX_TX7*

SYMBOL 1 OF 9

NC

NCNC

NC

NCNCNCNCNCNCNCNCNCNCNCNCNCNC

NCNC

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D


1500mA

(NONE)

(NONE)

180mA

250mA

PEX 1.1V Current = 2A


- =PP1V2_GPU_PEX_PLLXVDD


- =PP1V2_GPU_PEX_IOVDD

- =PP1V2_GPU_PEX_IOVDDQ

=PP1V1_GPU_PEX_PLLXVDD

PEG_CLK100M_P

PEG_CLK100M_N

PEG_R2D_C_N<15>

PEG_R2D_C_N<14>

PEG_R2D_C_P<14>

PEG_R2D_C_P<15>

PEG_R2D_C_P<0>

PEG_R2D_C_N<0>

PEG_R2D_C_P<1>

PEG_R2D_C_P<9>

PEG_R2D_C_N<11>

TP_PEX_CLKREQ_L

PEG_R2D_C_P<13>

PEX_TERMP_PD

PEG_D2R_C_P<13>

PEG_D2R_C_N<13>

PEG_D2R_P<10>

PEG_D2R_C_N<10>

GPU_VDD_SENSE

PEG_D2R_C_P<0>

PEG_D2R_C_N<0>

PEG_D2R_C_N<1>

PEG_D2R_C_P<2>

PEG_D2R_C_N<2>

PEG_D2R_C_P<3>

PEG_D2R_C_N<3>

PEG_D2R_C_P<4>

PEG_D2R_C_N<4>

PEG_R2D_P<12>

PEG_R2D_C_N<12>

PEG_R2D_C_P<11>

PEG_R2D_C_N<9>

PEG_R2D_C_N<10>

PEG_R2D_P<9>

PEG_R2D_N<4>

PEG_R2D_P<5>

PEG_R2D_N<5>

PEG_R2D_C_N<1>

PEG_R2D_C_N<7>

PEG_R2D_C_N<5>

NC_GPU_DFMNO_TEST=TRUE

PEG_R2D_P<14>

PEG_R2D_P<15>

PEG_R2D_P<8>

PEG_R2D_P<7>

PEG_R2D_P<6>

PEG_R2D_P<3>

PEG_D2R_C_P<8>

PEG_D2R_C_P<6>

PEG_D2R_C_P<5>

PEG_D2R_C_P<9>

PEG_R2D_N<6>

PEG_R2D_N<8> PEG_D2R_C_N<8>

PEG_D2R_C_N<9>

PEG_D2R_C_N<12>

PEG_D2R_C_P<12>

PEG_D2R_C_N<11>

PEG_D2R_C_P<11>

PEG_D2R_C_P<10>

PEG_D2R_C_N<7>

PEG_D2R_C_P<7>

PEG_D2R_C_P<1>

PEG_R2D_P<10>

PEG_R2D_N<9>

PEG_R2D_P<4>

PEG_R2D_N<3>

PEG_D2R_C_N<6>

PEG_D2R_C_N<5>

PEG_R2D_C_P<4>

PEG_R2D_N<2>

PEG_R2D_P<2>

PEG_D2R_N<15>

PEG_D2R_P<15>

PEG_D2R_N<13>

PEG_D2R_P<14>

PEG_D2R_P<12>

PEG_D2R_P<11>

PEG_D2R_N<11>

PEG_D2R_N<10>

PEG_D2R_N<12>

PEG_D2R_P<13>

PEG_D2R_N<14>

PEG_D2R_N<9>

PEG_D2R_P<8>

PEG_D2R_N<7>

PEG_D2R_P<7>

PEG_D2R_P<6>

PEG_D2R_N<6>

PEG_D2R_P<9>

PEG_D2R_N<8>

PEG_D2R_N<5>

PEG_D2R_P<5>

PEG_D2R_P<4>

PEG_D2R_N<4>

PEG_D2R_P<3>

PEG_D2R_N<3>

PEG_D2R_P<2>

PEG_D2R_N<2>

PEG_D2R_P<1>

PEG_D2R_N<1>

PEG_D2R_N<0>

PEG_D2R_P<0>

PEG_R2D_C_P<2>

PEG_R2D_C_N<2>

PEG_R2D_C_N<3>

PEG_R2D_C_N<4>

PEG_R2D_C_P<5>

PEG_R2D_C_N<6>

PEG_R2D_C_P<7>

PEG_R2D_C_P<8>

PEG_R2D_C_N<8>

PEG_R2D_C_N<13>

PEG_R2D_P<0>

PEG_R2D_P<1>

PEG_R2D_N<1>

PEG_R2D_N<0>

GPU_GND_SENSE

PEG_R2D_P<11>

PEG_R2D_C_P<6>

PEG_R2D_N<15>

PEG_R2D_C_P<12>

PEG_R2D_N<11>

PEG_R2D_N<10>

PEG_R2D_N<7>

PEG_R2D_C_P<3>


PP1V1_GPU_PEX_PLLVDD_FMIN_LINE_WIDTH=0.25 mm

VOLTAGE=1.2V

=PP1V1_GPU_PEX_IOVDD

=PP1V1_GPU_PEX_IOVDDQ

PEG_R2D_N<14>

PEG_R2D_N<13>

PEG_R2D_P<13>

PEG_R2D_N<12>

GPU_RESET_L GPU_RESET_R_L

PEG_R2D_C_P<10>

PEX_TSTCLK_N

PEX_TSTCLK_P

PEG_D2R_C_N<15>

PEG_D2R_C_P<15>

PEG_D2R_C_N<14>

PEG_D2R_C_P<14>

SYNC_MASTER=M98_MLB

NV G96 PCI-E

9869


051-8071 B

90 9

21C8084 0.1uF

10% 16V X5R 402

21C8083 0.1uF

10% X5R16V 402

90 9

90 9

21C8086 0.1uF

10% 16V X5R 402

21C8085 0.1uF

10% 16V X5R 402

90 9

90 9

90 9

90 9

21C8056 0.1uF

10% 402X5R16V

21C8055 0.1uF

10% 402X5R16V

9

90 17

90 17

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

21C8023 0.1uF

X5R 40210% 16V

21C8022402X5R10% 16V

0.1uF

21C8025 0.1uF

X5R 40210% 16V

21C8024 0.1uF

X5R 40210% 16V

21C8027 0.1uF

X5R 40210% 16V

21C8026 0.1uF

X5R 40210% 16V

21C8029 0.1uF

X5R 40210% 16V

21C8028 0.1uF

X5R 40210% 16V

21C8031 0.1uF

X5R 40210% 16V

21C8030 0.1uF

X5R 40210% 16V

21C8033 0.1uF

X5R 40210% 16V

21C8032 0.1uF

X5R 40210% 16V

21C8035X5R 40210% 16V

0.1uF

21C8034 0.1uF

X5R 40210% 16V

21C803710% 16V

0.1uF

X5R 402

21C8036 0.1uF

X5R 40210% 16V

21C8039 0.1uF

40210% 16V X5R

21C8038X5R

0.1uF

40210% 16V

21C8041X5R 40210% 16V

0.1uF

21C8040 0.1uF

X5R 40216V10%

21C8043 0.1uF

X5R 40210% 16V

21R80205%

0

402MF-LF1/16W

21

R8060200

MF-LF402

1%1/16W

21

R8050

1/16W1%

402MF-LF

2.49K

AM26

AL26

AK25

AL25

AM25

AM24

AM23

AL23

AK22

AL22

AM22

AM21

AM20

AL20

AK19

AL19

AP32

AN32

AM32

AM31

AM30

AM29

AL29

AK29

AK28

AL28

AM28

AM27

AM19

AM18

AM17

AL17

AJ18

AJ17

AG21

AN26

AP26

AR26

AR25

AP25

AN25

AN23

AP23

AR23

AR22

AP22

AN22

AN20

AP20

AR20

AR19

AP34

AR34

AR32

AR31

AP31

AN31

AN29

AP29

AR29

AR28

AP28

AN28

AP19

AN19

AN17

AP17

AM16

AG20

AG19

AR17

AR16

AR13

U8000

BGA

NB9P-GS

OMIT

AD20

AG14

AG23

AG22

AG18

AG17

AG16

AG15

AG13

AL16

AK26

AK23

AK20

AK18

AJ27

AG12

AJ25

AJ24

AJ22

AJ21

AJ19

AJ15

AJ14

AG26

AG25

AG24

AG11

AK27

AK24

AK21

AK17

AK16

AB7

V6

U7

R7

P7

P6

A2

M7

F7

E35

E7

AL7

AK15

D35

AJ5

AG6

AF6

AD6

H32

AD19

U8000NB9P-GS

BGA

OMIT

21C8042 0.1uF

X5R 40210% 16V

21

L801510NH-600MA

0603

21C8045 0.1uF

16V 402X5R10%

2

1 C8017

20%10VCERM402

0.1UF

2

1 C8011

20%0.1UF

402CERM10V

2

1 C8010

402CERM

0.1UF20%10V

2

1 C8009

402CERM6.3V10%1UF

2

1 C80081UF

CERM402

10%6.3V

2

1 C8007

20%

CERM

4.7UF

6.3V

603

2

1 C800622UF

CERM-X5R805

20%6.3V

2

1 C80021UF10%6.3VCERM402

21C8044 0.1uF

10% X5R 40216V

2

1 C8000

20%

805

6.3V

22UF

CERM-X5R

2

1C8015

6.3VCERM

4.7UF20%

603

2

1 C8016

603

6.3VCERM

20%4.7UF

2

1 C8005

10V20%

402CERM

0.1UF

21C8047 0.1uF

X5R 40210% 16V

2

1 C80040.1UF

10V

402

20%

CERM2

1 C8003

6.3VCERM402

10%1UF

2

1 C8001

CERM603

6.3V20%4.7UF

21C8046 0.1uF

X5R 40210% 16V

21C8049 0.1uF

X5R 40210% 16V

21C8048 0.1uF

X5R 40210% 16V

21C8058 0.1uF

10% X5R16V 402

21C805110% X5R 40216V

0.1uF

21C8057 0.1uF

10% X5R16V 402

90 9

90 9

21C8060 0.1uF

10% X5R16V 402

21C8059 0.1uF

10% X5R16V 402

90 9

90 9

21C806210%

0.1uF

16V X5R 402

21C8061 0.1uF

10% 16V X5R 402

90 9

21C8050 0.1uF

X5R 40210% 16V

90 9

21C8064 0.1uF

10% 16V X5R 402

21C8063 0.1uF

10% 16V X5R 402

90 9

90 9

21C8066 0.1uF

10% X5R16V 402

21C8065 0.1uF

10% 16V X5R 402

90 9

90 9

21C8068 0.1uF

10% X5R16V 402

21C8021X5R 402

0.1uF

10% 16V

21C8067 0.1uF

10% X5R16V 402

90 9

90 9

21C8070 0.1uF

10% X5R16V 402

21C8069 0.1uF

10% X5R16V 402

90 9

90 9

21C8072 0.1uF

10% 16V X5R 402

21C8071 0.1uF

10% 16V X5R 402

90 9

21C802010% 16V X5R 402

0.1uF

90 9

21C8074 0.1uF

10% 16V X5R 402

21C8073 0.1uF

10% 16V X5R 402

90 9

90 9

21C8076 0.1uF

10% X5R16V 402

21C8075 0.1uF

10% X5R16V 402

90 9

90 9

21C8078 0.1uF

10% X5R16V 402

21C8077 0.1uF

10% X5R16V 402

90 9

90 9

21C8080 0.1uF

10% X5R16V 402

21C8079 0.1uF

10% X5R16V 402

90 9

90 9

21C8082 0.1uF

10% X5R16V 402

21C8081 0.1uF

10% X5R16V 402

90 9

8

7

90

90

90

77

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90 90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

77

90

90

90

90

90

8

8

90

90

90

90

90

90

90

90

SYMBOL 7 OF 9

FBVDDQ FBVDDQ

SYMBOL 8 OF 9

GNDGND

VDD VDD

SYMBOL 9 OF 9

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

Page Notes


???A @ ???MHz 1.8V GDDR3

Nvidia PRD for GB-128 uses 4x4.7uF, 8x0.47uF, 16x0.1uF


- =PP1V8_GPU_FBVDDQ

(NONE)

(NONE)

- =PPVCORE_GPU


???A @ ???/???MHz Core/Mem Clk for VDD

=PP1V8_GPU_FBVDDQ

=PPVCORE_GPU


B051-8071

9870

SYNC_MASTER=M98_MLB

NV G96 CORE/FB POWER

AC19

AC18

AC17

AC16

AC15

AC14

AC13

AC12

AC11

AB25

L19

AB23

AB21

AB19

AB17

AB15

AB13

AB11

Y24

Y22

Y20

L18

Y18

Y16

Y14

Y12

W25

W24

W23

W22

W21

AD24

L17

W19

W18

W17

W16

W15

W14

W13

W12

W11

V25

L16

V23

V21

V19

V17

V15

V13

V11

T24

T22

T20

L15

T18

T16

T14

T12

R25

R24

R23

R22

R21

R20

L14

R19

R18

R17

R16

R15

R14

R13

R12

R11

P25

L13

P23

P21

P19

P17

P15

P13

P11

M24

M22

M20

L12

M18

M16

M14

M12

L25

L24

L23

L22

W20

AD22

L21

AD18

AD16

AD14

AD12

AC25

AC24

AC23

AC22

AC21

AC20

L20

L11

U8000NB9P-GS

BGA

OMIT

V22

V20

V18

V16

V14

V12

V9

V5

V2

U25

B30

U24

U23

U22

U21

U20

U19

U18

U17

U16

U15

B27

U14

U13

U12

U11

T25

T23

T21

T19

T17

T15

B24

T13

T11

R34

R31

R5

R2

P24

P22

P20

P18

B21

P16

P14

P12

N25

N24

N23

N22

N21

N20

N19

B15

N18

N17

N16

N15

N14

N13

N12

N11

M34

M31

B12

M25

M23

M21

M19

M17

M15

M13

M11

M5

M2

B9

L9

J34

J31

J5

J2

F34

F31

F5

F2

E30

B6

AP30

AP27

E27

AP24

AP21

AP18

AP15

AP12

AP9

AP6

AP3

AN34

AN2

E24

AL30

AL27

AL24

AL21

AL18

AL15

AL12

AL9

AL6

AK34

E18

AK31

AP33

AK5

AK2

AG34

AG31

AG5

AG2

AE25

AE24

E15

AE23

AE22

AE21

AE20

AE19

AE18

AE17

AE16

AE15

AE14

E12

AE13

AE12

AE11

AD34

AD31

AD25

AD23

AD21

AD17

AD15

E9

AD13

AD11

AD5

AD2

AC9

AB24

AB22

AB20

AB18

AB16

E6

AB14

AB12

AA34

AA25

AA24

AA23

AA22

AA21

AA20

AA19

C34

AA18

AA17

AA16

AA15

AA14

AA13

AA12

AA11

AA5

AA2

C2

Y25

Y23

Y21

Y19

Y17

Y15

Y13

Y11

V31

V24

B33

B3

U8000NB9P-GS

BGA

AJ28

AE27

AD27

AC27

AB29

AB27

AA31

AA29

AA27

Y27

W27

V34

V29

V27

U29

U27

T27

R27

P27

N27

J29

J24

J23

J22

J21

J20

J17

J16

J15

J14

H29

G22

G18

G17

G9

G8

E21

B18

U8000NB9P-GS

OMIT

BGA

2

1C81700.47UF

CERM-X5R

10%

6.3V

402

2

1C81710.47UF

CERM-X5R

10%

6.3V

402

2

1C8168

CERM-X5R

0.47UF10%

6.3V

402

2

1C81690.47UF

CERM-X5R

10%

6.3V

402

2

1C81670.47UF

402

6.3V

10%

CERM-X5R

2

1C8161

402

CERM-X5R

10%

6.3V

0.47UF

2

1 C81180.1UF

10V

20%

402

CERM2

1 C8119

20%

0.1UF

10V

CERM

402

2

1 C8120

10V

20%

CERM

402

0.1UF

2

1 C8121

10V

20%

402

0.1UF

CERM2

1 C8122

10V

20%

CERM

402

0.1UF

2

1C8156

CERM

402

20%

0.1UF

10V

2

1C8162

402

0.1UF

CERM

20%

10V2

1C8163

402

CERM

10V

20%

0.1UF

2

1C8157

CERM

402

10V

0.1UF20%

2

1C81504.7UF

603

20%

6.3V

CERM

2

1C8164

CERM

402

0.1UF20%

10V2

1C8165

CERM

402

0.1UF20%

10V

2

1C8158

CERM

402

10V

20%

0.1UF

2

1C81514.7UF

603

20%

CERM

6.3V

2

1C8159

CERM

402

10V

20%

0.1UF

2

1C8166

CERM-X5R

402

0.47UF

6.3V

10%

2

1C8160

402

CERM-X5R

10%

6.3V

0.47UF

2

1 C8103

402

CERM-X5R

10%

0.47UF

6.3V

2

1 C8108

402

CERM-X5R

10%

0.47UF

6.3V

2

1 C8113

402

CERM

10V

20%

0.1UF

2

1 C81140.1UF

CERM

402

10V

20%

2

1 C8109

402

CERM-X5R

10%

0.47UF

6.3V

2

1 C8104

402

CERM-X5R

10%

0.47UF

6.3V

2

1 C8115

CERM

402

20%

0.1UF

10V2

1 C8116

10V

0.1UF

402

20%

CERM

2

1 C8111

402

CERM-X5R

10%

0.47UF

6.3V2

1 C8110

402

CERM-X5R

10%

0.47UF

6.3V

2

1 C8105

402

CERM-X5R

10%

0.47UF

6.3V2

1 C8106

402

CERM-X5R

10%

0.47UF

6.3V

2

1 C81170.1UF

CERM

402

10V

20%

2

1 C8112

402

CERM-X5R

10%

0.47UF

6.3V

2

1 C8107

402

CERM-X5R

10%

0.47UF

6.3V

2

1 C8102

402

6.3V

X5R-CERM

20%

4.7UF

2

1 C8100

402

6.3V

X5R-CERM

20%

4.7UF

2

1 C8101

6.3V

402

X5R-CERM

20%

4.7UF

8

8

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

D

SG

IN

OUT OUT

OUT

OUT

OUT

OUT

FBC_D8

FBC_CMD2

FBC_CMD3

FBC_RFU0

FBC_RFU1*

FBC_RFU7*

FBC_RFU6

FBC_RFU5*

FBC_RFU4

FBC_RFU3*

FBC_RFU2

FBC_D63

FBC_D62

FBC_D21

FBC_D24

FBC_D25

FBC_D26

FBC_D0

FBC_D2

FBC_CMD1

FBC_CMD0

FBC_D5

FBC_D3

FBC_D4

FBC_D6

FBC_D7

FBC_D9

FBC_D10

FBC_D11

FBC_D12

FBC_D13

FBC_D14

FBC_D15

FBC_D16

FBC_D17

FBC_D18

FBC_D19

FBC_D20

FBC_D23

FBC_D28

FBC_D31

FBC_D34

FBC_D32

FBC_D33

FBC_D36

FBC_D37

FBC_D38

FBC_D39

FBC_D40

FBC_D41

FBC_D42

FBC_D43

FBC_D44

FBC_D45

FBC_D46

FBC_D47

FBC_D48

FBC_D49

FBC_D50

FBC_D51

FBC_D52

FBC_D53

FBC_D54

FBC_D55

FBC_CMD26

FBC_CMD25

FBC_CMD24

FBC_CMD23

FBC_CMD22

FBC_CMD20

FBC_CMD19

FBC_CMD17

FBC_CMD16

FBC_CMD14

FBC_CMD13

FBC_CMD11

FBC_CMD10

FBC_CMD9

FBC_CMD8

FBC_CMD7

FBC_CMD6

FBC_CMD5

FBC_CMD4

FBC_CMD21

FBC_CMD18

FBC_CMD15

FBC_CMD12

FBC_D1

FBC_D58

FBC_D57

FBC_D56

FBC_D27

FBC_D29

FBC_D30

FBC_D35

FBC_D22

FBC_CLK0*

FBC_CLK0

FBC_CLK1

FBC_CLK1*

FBC_DQM0

FBC_DQM1

FBC_DQM2

FBC_DQM3

FBC_DQM4

FBC_DQM5

FBC_DQM6

FBC_DQM7

FBC_DQS_RN0

FBC_DQS_RN1

FBC_DQS_RN2

FBC_DQS_RN3

FBC_DQS_RN4

FBC_DQS_RN5

FBC_DQS_RN6

FBC_DQS_RN7

FBC_DQS_WP1

FBC_DQS_WP0

FBC_DQS_WP2

FBC_DQS_WP3

FBC_DQS_WP4

FBC_DQS_WP5

FBC_DQS_WP6

FBC_DQS_WP7

FB_DLLAVDD1

FBC_DEBUG

FB_PLLAVDD1

FB_VREF

FBC_CMD28

FBC_CMD27

FBC_CMD30

FBC_CMD29

FBC_D61

FBC_D60

FBC_D59

SYMBOL 4 OF 9

FBA_D62

FBA_D60

FBA_D59

FBA_D57

FBA_D55

FBA_D52

FBA_D48

FBA_D43

FBA_D39

FBA_D36

FBA_D34

FBA_D32

FBA_D30

FBA_D28

FBA_D27

FBA_D26

FBA_D25

FBA_CMD0

FBA_CMD7

FBA_CMD9

FBA_D5

FBA_CMD1

FBA_D0

FBA_D1

FBA_CMD2

FBA_CMD3

FBA_CMD4

FBA_CMD5

FBA_CMD6

FBA_CMD8

FBA_CMD10

FBA_CMD11

FBA_CMD15

FBA_CMD14

FBA_CMD13

FBA_CMD12

FBA_D14

FBA_D15

FBA_D17

FBA_D20

FBA_D23

FBA_D24

FBA_D33

FBA_D35

FBA_D38

FBA_D40

FBA_D41

FBA_D42

FBA_D44

FBA_D45

FBA_D46

FBA_D47

FBA_D49

FBA_D50

FBA_D51

FBA_D53

FBA_D54

FBA_D56

FBA_CMD24

FBA_CMD23

FBA_CMD22

FBA_CMD21

FBA_CMD20

FBA_CMD19

FBA_CMD18

FBA_CMD17

FBA_CMD16

FBA_D22

FBA_D19

FBA_D16

FBA_CMD25

FBA_D31

FBA_D18

FBA_D3

FBA_D11

FBA_D10

FBA_D9

FBA_D8

FBA_D7

FBA_D6

FBA_D4

FBA_D2

FBA_D37

FBA_D21

FBA_D29

FBA_DQM5

FBA_DQM6

FBA_DQS_RN0

FBA_DQM7

FBA_DQS_RN2

FBA_DQS_RN1

FBA_DQS_RN4

FBA_DQS_RN3

FBA_DQS_RN5

FBA_DQS_RN6

FBA_DQS_RN7

FBA_DQS_WP0

FBA_DQS_WP1

FBA_DQS_WP4

FBA_DQS_WP5

FBA_DQS_WP6

FB_DLLAVDD0

FBA_DQS_WP7

FBA_DEBUG

FB_PLLAVDD0

FB_CAL_PU_GND

FB_CAL_PD_VDDQ

FB_CAL_TERM_GND

FBA_CLK1*

FBA_DQM1

FBA_DQM2

FBA_DQM3

FBA_DQM4

FBA_CLK0*

FBA_CLK1

FBA_CLK0

FBA_CMD30

FBA_DQM0

FBA_DQS_WP3

FBA_DQS_WP2

FBA_D58

FBA_D63

FBA_D61

FBA_RFU7*

FBA_RFU1*

FBA_RFU3*

FBA_RFU4

FBA_RFU5*

FBA_RFU6

FBA_RFU2

FBA_RFU0

FBA_D13

FBA_D12

FBA_CMD29

FBA_CMD28

FBA_CMD27

FBA_CMD26

SYMBOL 3 OF 9

NC

NCNCNCNCNCNCNC

NCNCNCNCNCNCNCNC

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D



(NONE)


- =PP1V2_GPU_FBPLLAVDD

(NONE)

- =PP1V8_GPU_FBIO

FB_A_MA<10>

FB_A_MA<1>

FB_A_CLK_P<1>

FB_A_RDQS<4>

FB_A_DQM_L<4>

FB_A_DRAM_RST

FB_A_MA<12>

FB_A_UMA<5>

FB_A_BA<0>

FB_A_DQ<2>

FB_A_UMA<2>

FB_A_DQ<37>

FB_A_DQ<43>

FB_A_DQ<56>

FB_A_DQ<57>

FB_A_DQ<58>

FB_A_DQ<60>

FB_A_DQ<63>


FB_B_DQ<51>

FB_B_DQ<56>

FB_B_DQ<38>

FB_B_DQ<39>

FB_B_DQ<40>

FB_B_DQ<41>

FB_B_DQ<54>

FB_B_DQ<49>

FB_B_DQ<48>

FB_B_DQM_L<0>

FB_B_DQM_L<1>

FB_B_DQM_L<2>

FB_B_DQM_L<3>

FB_B_DQM_L<4>

=PP1V8_GPU_FBIO

FB_B_DQ<35>

FB_B_DQ<50>

FB_B_DQM_L<6>

FB_B_DQM_L<7>

FB_B_DQ<46>

FB_B_DQ<47>

FB_B_RDQS<5>

FB_B_WDQS<1>

FB_B_MA<0>

FB_B_MA<9>

FB_B_MA<6>

TP_FBC_CMD30

TP_FBC_CMD29

TP_FBC_CMD28

FB_B_DQ<25>

FB_B_WDQS<6>

FB_B_WDQS<5>

FB_B_WDQS<3>

FB_B_WDQS<4>

FB_B_WDQS<2>

FB_B_WDQS<0>

FB_B_RDQS<7>

FB_B_RDQS<6>

FB_B_RDQS<4>

FB_B_RDQS<3>

FB_B_RDQS<2>

FB_B_RDQS<1>

FB_B_RDQS<0>

FB_B_DQM_L<5>

FB_B_CLK_P<1>

FB_B_CLK_N<0>

FB_B_DQ<42>

FB_B_DQ<44>

FB_B_DQ<45>

FB_B_DQ<32>

FB_B_DQ<31>

FB_B_DQ<30>

FB_B_DQ<53>

FB_B_DQ<60>

FB_B_DQ<36>

FB_B_DQ<63>

FB_VREF_UNTERM

FB_B_DQ<52>

FB_B_DQ<57>

FB_B_DQ<59>

FB_B_DQ<62>

FB_B_LMA<4>

FB_B_RAS_L

FB_B_DQ<2>

FB_B_DQ<1>

FB_B_BA<0>

FB_B_DRAM_RST

FB_B_LMA<5>

FB_B_BA<1>

FB_B_UMA<2>

FB_B_UMA<4>

FB_B_UMA<3>

FB_B_CS1_L

FB_B_CS0_L

FB_B_MA<11>

FB_B_CAS_L

FB_B_WE_L

FB_B_UMA<5>

FB_B_MA<12>

FB_B_MA<7>

FB_B_MA<10>

FB_B_LMA<2>

FB_B_LMA<3>

FB_B_MA<1>

FB_B_MA<13>

FB_B_BA<2>

FB_B_DQ<58>

FB_B_DQ<43>

FB_B_DQ<37>

FB_B_DQ<33>

FB_B_DQ<34>

FB_B_DQ<29>

FB_B_DQ<28>

FB_B_DQ<27>

FB_B_DQ<24>

FB_B_DQ<23>

FB_B_DQ<22>

FB_B_DQ<21>

FB_B_DQ<20>

FB_B_DQ<19>

FB_B_DQ<18>

FB_B_DQ<17>

FB_B_DQ<16>

FB_B_DQ<14>

FB_B_DQ<13>

FB_B_DQ<8>

FB_B_DQ<9>

FB_B_DQ<7>

FB_B_DQ<6>

FB_B_DQ<4>

FB_B_DQ<3>

FB_B_DQ<5>

FB_B_DQ<26>

FB_B_MA<8>

FBC_DEBUG

FB_B_WDQS<7>

FB_B_CLK_N<1>

FB_B_CLK_P<0>

FB_B_CKE

FB_A_MA<13>

FB_A_BA<2>

TP_FBA_CMD28

TP_FBA_CMD29

FB_A_DQ<12>

FB_A_DQ<13>

FB_A_DQ<61>

FB_A_WDQS<2>

FB_A_WDQS<3>

FB_A_DQM_L<0>

TP_FBA_CMD30

FB_A_CLK_P<0>

FB_A_CLK_N<0>

FB_A_DQM_L<3>

FB_A_DQM_L<2>

FB_A_DQM_L<1>

FB_A_CLK_N<1>

FBCAL_TERM_GND

FBCAL_PU_GND

FB_A_WDQS<7>


VOLTAGE=1.1V

PP1V1_GPU_FBPLLAVDD_F


FB_A_WDQS<6>

FB_A_WDQS<5>

FB_A_WDQS<4>

FB_A_WDQS<1>

FB_A_WDQS<0>

FB_A_RDQS<7>

FB_A_RDQS<6>

FB_A_RDQS<5>

FB_A_RDQS<3>

FB_A_RDQS<1>

FB_A_RDQS<2>

FB_A_DQM_L<7>

FB_A_RDQS<0>

FB_A_DQM_L<6>

FB_A_DQM_L<5>

FB_A_DQ<29>

FB_A_DQ<21>

FB_A_DQ<6>

FB_A_DQ<7>

FB_A_DQ<8>

FB_A_DQ<9>

FB_A_DQ<10>

FB_A_DQ<18>

FB_A_DQ<31>

FB_A_DQ<16>

FB_A_DQ<19>

FB_A_DQ<22>

FB_A_MA<7>

FB_A_CKE

FB_A_MA<0>

FB_A_MA<9>

FB_A_MA<6>

FB_A_LMA<2>

FB_A_MA<8>

FB_A_LMA<3>

FB_A_DQ<54>

FB_A_DQ<53>

FB_A_DQ<51>

FB_A_DQ<50>

FB_A_DQ<49>

FB_A_DQ<47>

FB_A_DQ<46>

FB_A_DQ<45>

FB_A_DQ<44>

FB_A_DQ<42>

FB_A_DQ<41>

FB_A_DQ<40>

FB_A_DQ<38>

FB_A_DQ<35>

FB_A_DQ<33>

FB_A_DQ<24>

FB_A_DQ<23>

FB_A_DQ<20>

FB_A_DQ<17>

FB_A_DQ<15>

FB_A_DQ<14>

FB_A_WE_L

FB_A_UMA<3>

FB_A_UMA<4>

FB_A_BA<1>

FB_A_LMA<5>

FB_A_DQ<1>

FB_A_DQ<0>

FB_A_RAS_L

FB_A_DQ<5>

FB_A_LMA<4>

FB_A_DQ<25>

FB_A_DQ<26>

FB_A_DQ<27>

FB_A_DQ<28>

FB_A_DQ<30>

FB_A_DQ<32>

FB_A_DQ<34>

FB_A_DQ<36>

FB_A_DQ<39>

FB_A_DQ<48>

FB_A_DQ<52>

FB_A_DQ<55>

FB_A_DQ<59>

FB_A_DQ<62>

FB_A_DQ<11>

FB_B_DQ<15>

FB_B_DQ<12>

FB_B_DQ<11>

FB_B_DQ<10>

FB_B_DQ<0>

FB_A_CS1_L

FB_A_CS0_L

FB_A_MA<11>

FB_A_CAS_L

FB_A_DQ<4>

FB_A_DQ<3>

FB_B_DQ<61>

=PP1V8_GPU_FBIO

FBCAL_PD_VDDQ

FBA_DEBUG GPU_FB_VREF


GPU_FB_VREF_UNTERM_L


FB_B_DQ<55>

SYNC_MASTER=K20_MLB

B051-8071

9871


NV G96 FRAME BUFFER I/F

AH29

AG29

AE29

AD29

M29

L29

R29

P29

AJ34

AJ32

AC33

AE31

H35

J32

L34

N31

AJ35

AJ31

AC34

AD32

G35

H31

L35

N32

AL34

AL32

AF35

AF32

H34

J30

P32

P30

T30

P34

P33

L30

AJ33

AL35

AM34

AH34

M30

AH32

AH35

AH33

AM35

AH30

AJ30

AK30

AL31

AM33

AL33

M32

AK32

AN33

AB32

AC35

AE34

AE33

AE35

AF34

AF33

AE32

L31

AE30

AC32

AD30

AF30

AF31

AG32

AH31

AG30

G33

E34

N30

E33

K34

G34

K33

K35

H33

G31

F30

H30

G32

P31

K32

G30

K30

K31

N33

L32

L33

N34

P35

N35

R32

R30

T34

W30

W33

W35

AB34

AB35

W29

Y32

T33

AB33

AB30

U33

U30

U35

V30

W34

Y35

U34

U31

Y31

U32

Y33

AA32

AA30

W32

Y34

Y30

AB31

T35

W31

V32

AC30

AC31

T31

T32

AF27

AG27

M27

L27

K27

U8000

OMIT

BGANB9P-GS

2

1R8294

MF-LF

60.4

1/16W

1%

402

2

1R8293

402MF-LF1/16W

1%60.4

2

1 C8290

402

CERM

10V

0.1UF20%

2

1 C8291

402

CERM

10V

0.1UF20%

2

1 C8202

402

CERM

10V

20%

0.1UF

2

1

R8292

PLACEMENT_NOTE=Place close to U8000.

40.21%

MF-LF

402

1/16W

G28

G27

G25

G24

G15

G14

G12

G11

A32

D32

B26

E26

C14

D14

A10

E10

A31

D31

A26

F26

B14

E14

B10

D9

A34

D34

D28

D27

A16

D15

D10

F11

G19

C13

B11

F12

B35

B34

C32

B32

E8

C31

B31

C29

B29

E32

F32

D33

C33

E31

D30

F9

F29

E29

A29

A28

B28

C28

C26

D25

B25

A25

F8

D29

F28

E28

F27

F25

E25

D26

D24

D16

B16

D8

A17

C16

A14

B13

A13

D13

F13

F14

E16

F16

F10

F15

F17

E13

D12

C10

C11

C8

A8

B8

A11

E11

D11

F20

G21

E20

B23

D21

A23

A20

F21

B20

C23

F22

C19

F18

D19

E19

D20

D22

A19

D18

B22

C20

E22

C25

F24

B17

C22

A22

F23

F19

B19

C17

E23

D23

D17

E17

J27

J18

J19

U8000

OMIT

NB9P-GSBGA

75

95 80 73

75

95 79 72

95 80 73 95 79 72

75 73 72

2

1

R8297

402

MF-LF

1/16W

1%

1.02K

NO STUFF

2

1

R82962.49K

1%

1/16W

MF-LF

402

12

6Q8295

SOT563

SSM6N15FEAPE

NO STUFF

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

2

1

R825110K

402

MF-LF

1/16W

5%

2

1

R8201

402

5%

1/16W

MF-LF

10K

2

1 C8200

402

10%

1UF

CERM

6.3V

2

1R8290


1%1/16WMF-LF402

48.7

21

L8200CRITICAL

0402

FERR-220-OHM

2

1

R8295

1%

1/16W

402

MF-LF

1.07K

2

1C8296

402

X5R

10%

0.1uF

16V

NO STUFF

2

1

R8291


1%

402

33.2

MF-LF

1/16W

2

1

R825010K

402

MF-LF

1/16W

5%

95 80 73

2

1

R8200

1/16W

10K5%

MF-LF

402

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73

95 80 73 7

95 80 73 7

95 73 7

95 80

95 80 73

95 80 73

95 80 73

95 80 73 7

95 80 73

95 80 73

95 80 73

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

2

1 C8201

402

20%

0.1UF

10V

CERM

95 79 72

95 79 72

95 79 72

95 79 72

95 72

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 80 73 7

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79 72

95 79

95 79 72

95 79 72

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

95 79 72 7

71 8

71 8

75

75

75 75

75

75

71 8

71 8

IN

IN

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

BI

BI

IN

IN

IN IN

D

SG

D

SG

D

SG

D

SG

IN IN

CK*

DQ17

CKE

A8/AP

RFU

DQ9

A11

CK

CS0*

DM2

BA2

BA1

BA0

WDQS1

WDQS3

WDQS2

WDQS0

RDQS3

RDQS2

SEN

DQ24

DQ20

DQ1

DQ0

DQ2

DQ3

DQ5

DQ6

DQ4

DQ7

DQ10

DQ11

DQ12

DQ13

DQ15

DQ16

DQ18

DQ19

DQ21

DQ23

DQ22

DQ25

DQ26

DQ27

DQ29

DQ28

DQ30

DQ31

A3

A4

DM3

DM1

DM0

CAS*

WE*

MF

ZQ

RAS*

A5

A6

A9

DQ8

RDQS1

RDQS0

RESET

A10

A7

A2

A1

A0

A12/CS1*

DQ14

MFHIGH

MFHIGH

(1 OF 2)

MFHIGH

CK*

DQ17

CKE

A8/AP

RFU

DQ9

A11

CK

CS0*

DM2

BA2

BA1

BA0

WDQS1

WDQS3

WDQS2

WDQS0

RDQS3

RDQS2

SEN

DQ24

DQ20

DQ1

DQ0

DQ2

DQ3

DQ5

DQ6

DQ4

DQ7

DQ10

DQ11

DQ12

DQ13

DQ15

DQ16

DQ18

DQ19

DQ21

DQ23

DQ22

DQ25

DQ26

DQ27

DQ29

DQ28

DQ30

DQ31

A3

A4

DM3

DM1

DM0

CAS*

WE*

MF

ZQ

RAS*

A5

A6

A9

DQ8

RDQS1

RDQS0

RESET

A10

A7

A2

A1

A0

A12/CS1*

DQ14

MFHIGH

MFHIGH

(1 OF 2)

MFHIGH

VDD0

VDD1

VDD4

VDD3

VDD2

VSS6

VSS7

VSS3

VSS5

VSS2

VSS1

VSS0

VSS4

VSSA0

VSSA1

VDDA0

VDDA1

VDD7

VDD6

VDDQ0

VDDQ1

VDDQ2

VDDQ3

VDDQ4

VDDQ5

VDDQ6

VDDQ7

VDDQ8

VDDQ9

VDDQ10

VDDQ11

VDDQ12

VDDQ13

VDDQ14

VDDQ15

VDDQ16

VDDQ17

VDDQ18

VDDQ19

VDDQ20

VDDQ21

VSSQ0

VSSQ3

VSSQ4

VSSQ5

VSSQ6

VSSQ7

VSSQ8

VSSQ9

VSSQ10

VSSQ11

VSSQ12

VSSQ13

VSSQ14

VSSQ15

VSSQ16

VSSQ17

VSSQ18

VSSQ19

VREF0

VREF1

VSSQ2

VSSQ1

VDD5

(2 OF 2)

VDD0

VDD1

VDD4

VDD3

VDD2

VSS6

VSS7

VSS3

VSS5

VSS2

VSS1

VSS0

VSS4

VSSA0

VSSA1

VDDA0

VDDA1

VDD7

VDD6

VDDQ0

VDDQ1

VDDQ2

VDDQ3

VDDQ4

VDDQ5

VDDQ6

VDDQ7

VDDQ8

VDDQ9

VDDQ10

VDDQ11

VDDQ12

VDDQ13

VDDQ14

VDDQ15

VDDQ16

VDDQ17

VDDQ18

VDDQ19

VDDQ20

VDDQ21

VSSQ0

VSSQ3

VSSQ4

VSSQ5

VSSQ6

VSSQ7

VSSQ8

VSSQ9

VSSQ10

VSSQ11

VSSQ12

VSSQ13

VSSQ14

VSSQ15

VSSQ16

VSSQ17

VSSQ18

VSSQ19

VREF0

VREF1

VSSQ2

VSSQ1

VDD5

(2 OF 2)

BI

BI

BI

BI

BI

BI

BI

BI

NC NC

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

- =PP1V8_S0_FB_VREFA


- =PP1V8_S0_FB_VDD


VRAM4

U8400.J12U8400.J1U8400.J1

(NONE)


Connect to designated pin, then GNDU8400.J12

Connect to designated pin, then GND

FB_A1_MF

FB_A_UMA<2>

FB_A_UMA<4>

FB_A_MA<0>

FB_A_UMA<5>

FB_A_MA<1>

FB_A_UMA<3>

FB_A_MA<6>

FB_A_MA<8>

FB_A_MA<9>

FB_A_MA<11>

FB_A_MA<10>

FB_A_DQ<28>

FB_A_MA<6>

FB_A_LMA<5>

FB_A_CLK_N<0>

FB_A_LMA<4>

FB_A_CLK_P<0>

FB_A_LMA<3>

FB_A_LMA<2>

FB_A_MA<0>

FB_A_MA<7>

FB_A_MA<9>

FB_A_MA<10>

FB_A_MA<11>

FB_A_WE_L

FB_A_RAS_L

FB_A_RDQS<3>

FB_A_RDQS<2>

FB_A_RDQS<0>

FB_A_RDQS<1>

FB_A_WDQS<3>

FB_A_WDQS<2>

FB_A_WDQS<0>

FB_A_WDQS<1>

FB_A0_ZQ

FB_A0_SEN

FB_A_BA<1>

FB_A_BA<2> FB_A_BA<2>

FB_A_BA<0>

FB_A_WDQS<4>

FB_A_WDQS<6>

FB_A_RAS_L

FB_A_CLK_N<1>

FB_A_CLK_P<1>

FB_A_MA<12>

FB_A_CKE

FB_A_MA<7>FB_A_DQ<60>

FB_A_DQ<57>

FB_A_DQ<56>

FB_A_DQ<59>

FB_A_DQ<58>

FB_A_DQ<63>

FB_A_DQ<61>

FB_A_DQ<40>

FB_A_DQ<62>

FB_A_DQ<44>

FB_A_DQ<47>

FB_A_DQ<33>

FB_A_DQ<32>

FB_A_DQ<36>

FB_A_DQ<37>

FB_A_DQ<38>

FB_A_DQ<39>

FB_A_DQ<34>

=PP1V8_GPU_FB_VDDQ

FB_A_DQ<16>

FB_A_DQ<19>

FB_A_DQ<21>

FB_A_DQ<22>

FB_A_DQ<20>

FB_A_DQ<26>

FB_A_DQ<25>

FB_A_DQ<27>

FB_A_DQ<17>

FB_A_DQ<6>

FB_A_DQ<7>

FB_A_DQ<8>

FB_A_DQ<11>

FB_A_DQ<9>

FB_A_DQ<10>

FB_A_DQ<14>

FB_A_DQ<4>

FB_A_DQ<15>

FB_A_DQ<0>

FB_A_DQ<3>

FB_A_DQ<2>

FB_A_DQM_L<0>

FB_A_DQ<13>

FB_A_DQ<23>

FB_A_DQ<18>

FB_A_DQ<1>

FB_A_DQ<12>

FB_A_DQM_L<1>

FB_A_DQM_L<2>

FB_A_DQM_L<3>

FB_A_MA<1>

FB_A_DQ<24>

FB_A_DQ<29>

FB_A_DQ<30>

FB_VREF_UNTERM

=PP1V8_GPU_FB_VDD


FB_A0_VREF_UNTERM_L

FB_A_DQM_L<4>

FB_A_DQM_L<6>

FB_A_DQM_L<5>

FB_A_DRAM_RST

FB_A_RDQS<7>

FB_A1_SEN

FB_A2_VREF FB_A3_VREF

VOLTAGE=0.9V

FB_A_CLK1_TERM


FB_A1_VREF

FB_A_BA<1>

FB_A2_VREF_UNTERM_L

FB_A0_VREF

VOLTAGE=0.9V

FB_A_CLK0_TERM

FB_A1_VREF_UNTERM_L

FB_A3_VREF_UNTERM_L

FB_A_WDQS<5>

FB_A_WDQS<7>

FB_A_RDQS<6>

FB_A_RDQS<4>

FB_A_DQ<35>

FB_A_RDQS<5>

FB_A_DQM_L<7>

FB_VREF_UNTERM

FB_A_DQ<31>

FB_A_DQ<5>

FB_A_DQ<43>

FB_A_DQ<41>

FB_A_DQ<54>

FB_A_DQ<46>

FB_A_DQ<45>

FB_A_DQ<42>

FB_A_DQ<55>

FB_A_DQ<50>

FB_A_DQ<48>

FB_A_DQ<53>

FB_A_DQ<52>

FB_A_DQ<51>

FB_A_DQ<49>

FB_A1_ZQ

FB_A_CAS_L

FB_A_WE_L

FB_A_CS0_L

=PP1V8_GPU_FB_VDD

FB_A_MA<8>

=PP1V8_GPU_FB_VDDQ

FB_A_CKE

FB_A_MA<12>

FB_A_CS0_L

FB_A_DRAM_RST

FB_A_CAS_L

FB_A0_MF

FB_A_BA<0>

GDDR3 Frame Buffer A (Bottom)

051-8071


72 98

B

2

1 C84320.01UF10%

402CERM16V

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

G11

G2

D12

D9

D4

D1

B12

B9

T12

T9

T4

T1

P12

P9

P4

P1

L11

L2

B4

B1

J12

J1

V10

V3

L12

L1

G12

G1

A10

A3

H12

H1

E12

E9

E4

E1

C12

C9

C4

V12

V1

C1

R12

R9

R4

R1

N12

N9

N4

N1

J9

J4

A12

A1

K12

K1

V11

V2

M12

M1

F12

F1

A11

A2

U8450

K4J10324QD-HC11

32MX32-900MHZ-MFH

OMIT

BGA

CRITICAL

G11

G2

D12

D9

D4

D1

B12

B9

T12

T9

T4

T1

P12

P9

P4

P1

L11

L2

B4

B1

J12

J1

V10

V3

L12

L1

G12

G1

A10

A3

H12

H1

E12

E9

E4

E1

C12

C9

C4

V12

V1

C1

R12

R9

R4

R1

N12

N9

N4

N1

J9

J4

A12

A1

K12

K1

V11

V2

M12

M1

F12

F1

A11

A2

U8400

32MX32-900MHZ-MFH

K4J10324QD-HC11

BGA

CRITICAL

OMIT

A4

H4

P2

P11

D11

D2

V4

J2

V9

P3

P10

D10

D3

H10

A9

B10

B11

G3

F2

F3

E2

T3

T2

C3

R3

R2

M3

N2

L3

M2

T10

T11

R10

R11

C2

M10

N11

L10

M11

G10

F11

F10

E11

C10

C11

B3

B2

N3

N10

E10

E3

F4

H9

J10

J11

F9

H3

G4

G9

M4

K2

L4

K3

H2

K4

M9

K10

J3

L9

K11

H11

K9 U8400

K4J10324QD-HC11

BGA

32MX32-900MHZ-MFH

CRITICAL

OMIT

A4

H4

P2

P11

D11

D2

V4

J2

V9

P3

P10

D10

D3

H10

A9

B10

B11

G3

F2

F3

E2

T3

T2

C3

R3

R2

M3

N2

L3

M2

T10

T11

R10

R11

C2

M10

N11

L10

M11

G10

F11

F10

E11

C10

C11

B3

B2

N3

N10

E10

E3

F4

H9

J10

J11

F9

H3

G4

G9

M4

K2

L4

K3

H2

K4

M9

K10

J3

L9

K11

H11

K9 U8450

CRITICAL

32MX32-900MHZ-MFH

K4J10324QD-HC11

BGA

OMIT

95 79 72 71 95 79 72 71

45

3Q8450

SOT563

SSM6N15FEAPE

2

1R84841.33K

1%1/16W

402MF-LF

2

1R8483

549

MF-LF

402

1%1/16W

2

1

R84859311%

402MF-LF

1/16W 2

1 C8482

CERM

0.01uF

16V10%

402

45

3Q8400

SOT563

SSM6N15FEAPE

2

1 C8431

10%16V

0.01UF

402CERM

2

1R8434

MF-LF

1%

402

1/16W

1.33K

2

1R8433

1%

MF-LF

402

1/16W

549

2

1

R8435

402

931

MF-LF

1%1/16W

12

6Q8450

SOT563

SSM6N15FEAPE

12

6Q8400

SOT563

SSM6N15FEAPE

75 73 72 71

75 73 72 71

2

1R84811.33K

1%

MF-LF

1/16W

402

2

1R8480

549

402

MF-LF

1%1/16W

2

1

R8482931

1/16W1%

MF-LF402

2

1 C8481

16V10%0.01uF

402CERM

2

1

R8432

1%

402MF-LF

1/16W

931

2

1C84960.01UF

402

16V10%

CERM2

1C8446

CERM

0.01UF

402

10%16V

2

1C847010UF

603

X5R

6.3V

20%

2

1C845010UF

603

X5R

6.3V

20%

2

1C8420

X5R

603

10UF20%

6.3V

2

1C840010UF

20%

603

6.3V

X5R

95 79 71

95 79 71

95 79 71 7

95 79 71 7

95 79 71

95 79 71

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

2

1 C8454

16V10%

402

X5R

0.1uF

2

1 C8465

16V10%

402

X5R

0.1uF

2

1 C8453

16V10%0.1uF

X5R

402

2

1 C84600.1uF

16V10%

402

X5R

2

1 C8452

402

16V10%0.1uF

X5R2

1 C8451

X5R16V10%

402

0.1uF

2

1 C8476

16V10%

402X5R

0.1uF

2

1 C8475

10%16V

402X5R

0.1uF

2

1 C8474

16V10%

402X5R

0.1uF

2

1 C8473

16V10%

402X5R

0.1uF

2

1

R8496

MF-LF402

1%

1/16W

243

2

1

R8497

MF-LF

1%

402

1/16W

243

2

1

R8494

MF-LF1/16W

402

1211%

VRAM4

2

1

R8495

VRAM4

121

1/16W

402

1%

MF-LF

2

1

R8493

VRAM4

1%

121

MF-LF402

1/16W

2

1

R8499

5%1/16W

402

MF-LF

100

2

1

R8498

1/16W1%

402

MF-LF

243

2

1 C8472

16V10%

402X5R

0.1uF

2

1 C8471

402

16VX5R

0.1uF10%

2

1

R8492

MF-LF

VRAM4

1/16W

1211%

4022

1

R8490

5%

1K

1/16W

402MF-LF

95 79 72 71

95 79 72 71

95 79 71

95 79 71

95 79 71

95 79 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 71

95 79 72 71

95 79 71

95 79 72 71

95 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 71

95 79 71

95 79 71

95 79 71

95 79 71

95 79 71

95 79 71

95 79 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 71

95 79 71

95 79 71

95 79 71

95 79 71

95 79 71

95 79 71

95 79 71

95 79 72 71

95 79 71

95 79 71

95 79 71

95 79 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 71

95 79 71

95 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71 7

95 79 71

95 79 71

95 79 71

95 79 71

2

1

R8442

VRAM4

1/16W

402MF-LF

1211%

2

1

R8443

1/16W

VRAM4

MF-LF

1%

121

402

2

1

R8444

VRAM4

1/16W

402MF-LF

1211%

2

1

R8447

1/16W

243

MF-LF

1%

402

2

1

R8440

MF-LF1/16W

402

1K5%

2

1 C8410

X5R

402

16V10%0.1uF

2

1 C84150.1uF

X5R

402

10%16V

2

1 C84210.1uF10%16VX5R402

2

1

R8446

1/16W

1%

402MF-LF

243

2

1

R8445

VRAM4

MF-LF1/16W

402

1211%

2

1

R8448

MF-LF

243

402

1%1/16W

2

1

R8449

MF-LF

100

402

1/16W5%

2

1 C8426

402

0.1uF

X5R

10%16V

2

1 C8425

X5R402

16V

0.1uF10%

2

1 C8424

402

0.1uF

16V10%

X5R2

1 C8423

402X5R16V10%

0.1uF

2

1 C8422

10%

0.1uF

16VX5R402

2

1 C8401

10%0.1uF

X5R

402

16V2

1 C84040.1uF

16VX5R

402

10%

2

1 C84020.1uF

402

X5R

10%16V

2

1 C8403

10%0.1uF

X5R

402

16V

2

1R8431

402MF-LF

1/16W1%

1.33K

2

1R8430

1/16WMF-LF

402

1%

549

80 79 73 72 9 8

80 79 73 72 8

72 9

79 79

72 9

79 79

80 79 73 72 8

80 79 73 72 9 8

IN

IN

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

BI

BI

IN

IN

IN IN

D

SG

D

SG

D

SG

D

SG

ININ

CK*

DQ17

CKE

A8/AP

RFU

DQ9

A11

CK

CS0*

DM2

BA2

BA1

BA0

WDQS1

WDQS3

WDQS2

WDQS0

RDQS3

RDQS2

SEN

DQ24

DQ20

DQ1

DQ0

DQ2

DQ3

DQ5

DQ6

DQ4

DQ7

DQ10

DQ11

DQ12

DQ13

DQ15

DQ16

DQ18

DQ19

DQ21

DQ23

DQ22

DQ25

DQ26

DQ27

DQ29

DQ28

DQ30

DQ31

A3

A4

DM3

DM1

DM0

CAS*

WE*

MF

ZQ

RAS*

A5

A6

A9

DQ8

RDQS1

RDQS0

RESET

A10

A7

A2

A1

A0

A12/CS1*

DQ14

MFHIGH

MFHIGH

(1 OF 2)

MFHIGH

CK*

DQ17

CKE

A8/AP

RFU

DQ9

A11

CK

CS0*

DM2

BA2

BA1

BA0

WDQS1

WDQS3

WDQS2

WDQS0

RDQS3

RDQS2

SEN

DQ24

DQ20

DQ1

DQ0

DQ2

DQ3

DQ5

DQ6

DQ4

DQ7

DQ10

DQ11

DQ12

DQ13

DQ15

DQ16

DQ18

DQ19

DQ21

DQ23

DQ22

DQ25

DQ26

DQ27

DQ29

DQ28

DQ30

DQ31

A3

A4

DM3

DM1

DM0

CAS*

WE*

MF

ZQ

RAS*

A5

A6

A9

DQ8

RDQS1

RDQS0

RESET

A10

A7

A2

A1

A0

A12/CS1*

DQ14

MFHIGH

MFHIGH

(1 OF 2)

MFHIGH

VDD0

VDD1

VDD4

VDD3

VDD2

VSS6

VSS7

VSS3

VSS5

VSS2

VSS1

VSS0

VSS4

VSSA0

VSSA1

VDDA0

VDDA1

VDD7

VDD6

VDDQ0

VDDQ1

VDDQ2

VDDQ3

VDDQ4

VDDQ5

VDDQ6

VDDQ7

VDDQ8

VDDQ9

VDDQ10

VDDQ11

VDDQ12

VDDQ13

VDDQ14

VDDQ15

VDDQ16

VDDQ17

VDDQ18

VDDQ19

VDDQ20

VDDQ21

VSSQ0

VSSQ3

VSSQ4

VSSQ5

VSSQ6

VSSQ7

VSSQ8

VSSQ9

VSSQ10

VSSQ11

VSSQ12

VSSQ13

VSSQ14

VSSQ15

VSSQ16

VSSQ17

VSSQ18

VSSQ19

VREF0

VREF1

VSSQ2

VSSQ1

VDD5

(2 OF 2)

VDD0

VDD1

VDD4

VDD3

VDD2

VSS6

VSS7

VSS3

VSS5

VSS2

VSS1

VSS0

VSS4

VSSA0

VSSA1

VDDA0

VDDA1

VDD7

VDD6

VDDQ0

VDDQ1

VDDQ2

VDDQ3

VDDQ4

VDDQ5

VDDQ6

VDDQ7

VDDQ8

VDDQ9

VDDQ10

VDDQ11

VDDQ12

VDDQ13

VDDQ14

VDDQ15

VDDQ16

VDDQ17

VDDQ18

VDDQ19

VDDQ20

VDDQ21

VSSQ0

VSSQ3

VSSQ4

VSSQ5

VSSQ6

VSSQ7

VSSQ8

VSSQ9

VSSQ10

VSSQ11

VSSQ12

VSSQ13

VSSQ14

VSSQ15

VSSQ16

VSSQ17

VSSQ18

VSSQ19

VREF0

VREF1

VSSQ2

VSSQ1

VDD5

(2 OF 2)

BI

NC NC

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D


VRAM4

U8500.J12U8500.J1U8500.J12

(NONE)

U8500.J1




- =PP1V8_S0_FB_VDD


Page Notes

- =PP1V8_S0_FB_VREF_B

FB_B_CLK_N<1>

FB_B_CLK_P<1>

FB_B_CLK_N<0>

FB_B_CLK_P<0>

FB_B_CKE

FB_B_MA<12>

FB_B_DRAM_RST

FB_B_RDQS<2>

FB_B_RDQS<3>

FB_B_WDQS<0>

FB_B_WDQS<3>

FB_B_BA<0>

=PP1V8_GPU_FB_VDD =PP1V8_GPU_FB_VDD

=PP1V8_GPU_FB_VDDQ

FB_B_DQ<58>

FB_B_DQ<62>

FB_B_DQ<61>

FB_B_DQ<60>

FB_B_DQ<56>

FB_B_DQ<39>

FB_B_DQ<38>

FB_B_DQ<37>

FB_B_MA<8>

FB_B_MA<7>

FB_B_DQ<40>

FB_B_DQ<54>

FB_B_DQ<55>

FB_B_DQ<53>

FB_B_DQ<52>

FB_B_DQ<41>

FB_B_DQ<42>

FB_B_DQ<47>

FB_B_DQ<44>

FB_B_DQ<45>

FB_B_DQ<43>

FB_B_DQ<46>

FB_B_DQ<33>

FB_B_DQ<35>

FB_B_DQ<34>

FB_B_RAS_L

FB_B_RDQS<1>

FB_B_WDQS<1>

FB_B_WDQS<2>

FB_B_BA<2>

FB_B_DQ<28>

FB_B_DQ<31>

FB_B_DQ<27>

FB_B_DQ<26>

FB_B_DQ<25>

FB_B_DQ<30>

FB_B_DQ<29>

FB_B_DQ<24>

FB_B_DQ<22>

FB_B_DQ<20>

FB_B_DQ<18>

FB_B_DQ<23>

FB_B_DQ<17>

FB_B_DQ<13>

FB_B_DQ<0>

FB_B_RDQS<0>

FB_B_DQ<21>

FB_B_DQ<16>

FB_B_DQ<19>

FB_B_MA<11>

FB_B_CAS_L

FB_B_LMA<3>

FB_B_LMA<5>

FB_B_LMA<4>

FB_B_MA<9>

FB_B_MA<6>

FB_B_MA<7>

FB_B_MA<8>

FB_VREF_UNTERM

=PP1V8_GPU_FB_VREF_B=PP1V8_GPU_FB_VREF_B

=PP1V8_GPU_FB_VDDQ

FB_B_DQM_L<4>

FB_B_DQ<48>

VOLTAGE=0.9V

FB_B_CLK0_TERM FB_B_CLK1_TERM

VOLTAGE=0.9V

FB_B2_VREF FB_B3_VREF

FB_B0_VREF

FB_B_MA<10>

FB_B_BA<0>

FB_B_DQM_L<6>

FB_B_DQ<50>

FB_B_DQ<49>

FB_B_DQM_L<7>

FB_B_DQM_L<5>

FB_B_DQ<51>

FB_B_BA<1>

FB_B_WDQS<6>

FB_B_RDQS<7>

FB_B_RDQS<4>

FB_B_RDQS<5>

FB_B_RDQS<6>

FB_B_WDQS<4>

FB_B_BA<2>

FB_B_WDQS<7>

FB_B_WDQS<5>

FB_B_MA<9>

FB_B_MA<10>

FB_B_BA<1>

FB_B_MA<11>

FB_B_DQ<32>

FB_B_DQ<36>

FB_B_DQ<57>

FB_B_DQ<59>

FB_B_DQ<63>

FB_B2_VREF_UNTERM_L

FB_B_CS0_L

FB_B_WE_L

FB_B0_SEN

FB_B0_MF

FB_B0_ZQ

FB_B0_VREF_UNTERM_L FB_B1_VREF_UNTERM_L

FB_B1_VREF

FB_B3_VREF_UNTERM_L

FB_VREF_UNTERM

FB_B_MA<0>

FB_B_MA<1>

FB_B_UMA<2>

FB_B_UMA<3>

FB_B_UMA<4>

FB_B_MA<6>

FB_B_UMA<5>

FB_B_DQ<5>

FB_B_DQ<4>

FB_B_DQ<9>

FB_B_DQ<14>

FB_B_DQ<15>

FB_B_DQ<10>

FB_B_DQ<11>

FB_B_DQ<8>

FB_B_DQ<12>

FB_B_DQM_L<3>

FB_B_DQM_L<1>

FB_B_DQM_L<2>

FB_B_DQM_L<0>

FB_B_MA<0>

FB_B_MA<1>

FB_B_LMA<2>

FB_B_DQ<7>

FB_B_DQ<1>

FB_B_DQ<2>

FB_B_DQ<3>

FB_B_DQ<6>FB_B_CKE

FB_B_MA<12>

FB_B_CS0_L

FB_B_WE_L

FB_B_CAS_L

FB_B_RAS_L

FB_B1_ZQ

FB_B1_MF

FB_B1_SEN

FB_B_DRAM_RST

73 98

B051-8071


GDDR3 Frame Buffer B (Bottom)95 80 71 7

G11

G2

D12

D9

D4

D1

B12

B9

T12

T9

T4

T1

P12

P9

P4

P1

L11

L2

B4

B1

J12

J1

V10

V3

L12

L1

G12

G1

A10

A3

H12

H1

E12

E9

E4

E1

C12

C9

C4

V12

V1

C1

R12

R9

R4

R1

N12

N9

N4

N1

J9

J4

A12

A1

K12

K1

V11

V2

M12

M1

F12

F1

A11

A2

U8550BGA

32MX32-900MHZ-MFH

K4J10324QD-HC11

CRITICAL

OMIT

G11

G2

D12

D9

D4

D1

B12

B9

T12

T9

T4

T1

P12

P9

P4

P1

L11

L2

B4

B1

J12

J1

V10

V3

L12

L1

G12

G1

A10

A3

H12

H1

E12

E9

E4

E1

C12

C9

C4

V12

V1

C1

R12

R9

R4

R1

N12

N9

N4

N1

J9

J4

A12

A1

K12

K1

V11

V2

M12

M1

F12

F1

A11

A2

U8500

K4J10324QD-HC11

32MX32-900MHZ-MFH

BGA

CRITICAL

OMIT

A4

H4

P2

P11

D11

D2

V4

J2

V9

P3

P10

D10

D3

H10

A9

B10

B11

G3

F2

F3

E2

T3

T2

C3

R3

R2

M3

N2

L3

M2

T10

T11

R10

R11

C2

M10

N11

L10

M11

G10

F11

F10

E11

C10

C11

B3

B2

N3

N10

E10

E3

F4

H9

J10

J11

F9

H3

G4

G9

M4

K2

L4

K3

H2

K4

M9

K10

J3

L9

K11

H11

K9 U8500

K4J10324QD-HC11

32MX32-900MHZ-MFH

OMIT

BGA

CRITICAL

A4

H4

P2

P11

D11

D2

V4

J2

V9

P3

P10

D10

D3

H10

A9

B10

B11

G3

F2

F3

E2

T3

T2

C3

R3

R2

M3

N2

L3

M2

T10

T11

R10

R11

C2

M10

N11

L10

M11

G10

F11

F10

E11

C10

C11

B3

B2

N3

N10

E10

E3

F4

H9

J10

J11

F9

H3

G4

G9

M4

K2

L4

K3

H2

K4

M9

K10

J3

L9

K11

H11

K9 U8550

CRITICAL

OMIT

BGA

32MX32-900MHZ-MFH

K4J10324QD-HC11

95 80 73 71 95 80 73 71

45

3Q8550SSM6N15FEAPE

SOT563

2

1R8584

MF-LF

1%1/16W

402

1.33K

2

1R8583

1/16W

1%

402MF-LF

549

2

1

R8585

1%

402MF-LF

931

1/16W 2

1 C8582

16V

0.01uF

CERM402

10%

45

3Q8500SSM6N15FEAPE

SOT563

2

1R8534

1%1/16W

MF-LF402

1.33K

2

1R8533

MF-LF402

1%

1/16W

549

2

1

R8535

1/16W1%

402MF-LF

931

2

1 C85320.01uF10%16VCERM402

12

6Q8550SSM6N15FEAPE

SOT563

12

6Q8500SSM6N15FEAPE

SOT563

75 73 72 71

75 73 72 71

2

1 C8581

10%

402CERM

0.01uF

16V

2

1R8580

402

1/16W1%

549

MF-LF

2

1

R8582

1/16W1%

MF-LF402

931

2

1R8581

MF-LF

1%1/16W

402

1.33K

2

1R8530

1/16W1%

402

MF-LF

549

2

1 C8531

10%16V

402CERM

0.01uF

2

1

R8532

1%

402MF-LF

1/16W

931

2

1R8531

402

1/16W1%

MF-LF

1.33K

2

1C85460.01UF

CERM402

10%16V

2

1C8596

16V10%

402

0.01UF

CERM

2

1

R8590

402

1/16W

1K5%

MF-LF

2

1

R8593

MF-LF

1%

VRAM4

1/16W

121

402

2

1

R8592

402

121

VRAM4

1%

MF-LF1/16W

2

1

R8594

VRAM4

402

1%

121

MF-LF1/16W

2

1

R8595

402

VRAM4

MF-LF

1211%

1/16W

2

1

R8597

1/16W

402MF-LF

1%

243

2

1

R8596

1%

1/16W

402MF-LF

243

2

1

R8543

VRAM4

MF-LF

1%

121

402

1/16W

2

1

R8540

402

5%

MF-LF1/16W

1K

2

1

R8542

VRAM4

402MF-LF

1211%

1/16W

2

1

R8545

VRAM4

MF-LF402

1%

1/16W

121

2

1

R8544121

VRAM4

1/16W

1%

MF-LF402

2

1

R8547

1/16W

402MF-LF

1%

243

2

1

R8546

MF-LF1/16W

402

1%

243

2

1C857010UF

603

X5R

6.3V

20%

2

1C855010UF

603

20%

6.3V

X5R

2

1C852010UF

603

X5R

6.3V

20%

2

1C850010UF

603

X5R

6.3V

20%

95 80 71

95 80 71

95 80 71 7

95 80 71 7

95 80 71

95 80 71

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

2

1 C85540.1uF

X5R

402

10%16V

2

1 C8565

16V10%

402

X5R

0.1uF

2

1 C8553

16V10%

402

X5R

0.1uF

2

1 C8560

16V10%

402

X5R

0.1uF

2

1 C85520.1uF

X5R

402

10%16V

2

1 C85510.1uF

X5R

402

10%16V

2

1 C8576

X5R402

10%16V

0.1uF

2

1 C8575

16VX5R402

10%

0.1uF

2

1 C8574

16V10%

402X5R

0.1uF

2

1 C8573

10%

402X5R16V

0.1uF

2

1

R8599100

402

1/16WMF-LF

5%

2

1

R8598

1%

243

MF-LF

402

1/16W

2

1 C8572

X5R402

10%16V

0.1uF

2

1 C8571

X5R402

10%16V

0.1uF

95 80 73 71

95 80 73 71

95 80 71

95 80 71

95 80 71

95 80 71

95 80 73 71

95 80 73 71

95 80 73 71

95 80 73 71

95 80 73 71

95 80 73 71 7

95 80 71

95 80 73 71

95 80 71

95 80 73 71

95 73 71 7

95 80 73 71 7

95 80 73 71

95 80 73 71

95 80 71

95 80 71

95 80 71

95 80 71

95 80 71

95 80 71

95 80 71

95 80 71

95 80 73 71

95 80 73 71 7

95 80 73 71

95 80 71

95 80 71

95 80 71

95 80 71

95 80 71

95 80 71

95 80 71

95 80 71

95 80 73 71

95 80 71

95 80 71

95 80 71

95 80 71

95 80 73 71

95 80 73 71

95 80 73 71

95 80 73 71

95 80 73 71

95 80 73 71 7

95 80 73 71

95 80 71

95 80 71

95 73 71 7

95 80 73 71

95 80 73 71 7

95 80 73 71

95 80 73 71

95 80 73 71

95 80 73 71

95 80 73 71 7

95 80 73 71

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71 7

95 80 71

95 80 71

95 80 71

95 80 71

2

1 C8510

16V10%

402

X5R

0.1uF

2

1 C8515

16V10%

402

X5R

0.1uF

2

1 C8521

402

16V10%

X5R

0.1uF

2

1

R8548

1/16W1%

402MF-LF

243

2

1

R8549

1/16W5%

402MF-LF

100

2

1 C8526

10%

X5R

0.1uF

402

16V2

1 C8525

16V10%

402X5R

0.1uF

2

1 C8524

16V10%

402X5R

0.1uF

2

1 C8523

16V10%

402X5R

0.1uF

2

1 C8522

16V10%

402X5R

0.1uF

2

1 C85010.1uF

402

16V10%

X5R2

1 C85040.1uF

16V

402

X5R

10%

2

1 C8502

16V10%

402

X5R

0.1uF

2

1 C85030.1uF

16V10%

X5R

402

80 79 73 72 8 80 79 73 72 8

80 79 73 72 9 8

73 9 73 9

80 79 73 72 9 8

80 80

80 80

HDA_BCLK

HDA_SYNC

HDA_SDO

HDA_RST*

SPDIF

BUFRST*

JTAG_TMS

MIOA_CLKIN

MIOA_CLKOUT

JTAG_TCK

GPIO20

GPIO23

HDA_SDI

MIOA_D8

MIOA_D10

MIOA_D9

JTAG_TDI

GPIO2

GPIO11

GPIO7

GPIO5

GPIO4

GPIO3

GPIO1

GPIO0

MIOB_VDDQ_4

MIOB_VDDQ_2

GPIO21

GPIO18

GPIO15

GPIO16

GPIO17

GPIO9

GPIO10

GPIO12

GPIO13

GPIO14

GPIO19

JTAG_TDO

JTAG_TRST*

MIOA_CTL3

MIOA_D7

MIOA_D6

MIOA_D5

MIOA_D4

MIOA_D3

MIOA_D2

MIOA_D1

MIOA_DEMIOB_CAL_PD_VDDQ

GPIO6

GPIO8

MIOA_D11

MIOA_D12

MIOA_D13

MIOB_D9

MIOB_D8

MIOB_D7

MIOB_D5

MIOB_D6

MIOB_D3

MIOB_D0

MIOB_DE

MIOB_CLKOUT*

MIOB_CTL3

MIOB_CLKOUT

MIOB_CLKIN

MIOB_D11

MIOB_D12

MIOB_D13

MIOB_D14

MIOB_D16

MIOB_D17

MIOB_D15

MIOB_HSYNC

MIOB_VSYNC

THERMDP

THERMDN

PGOOD_OUT*

XTAL_IN

XTAL_OUT

XTAL_OUTBUFF

MIOB_D10

MIOB_D4

MIOB_D2

MIOB_D1

MIOA_VSYNC

MIOA_HSYNC

MIOA_D14

MIOA_CLKOUT*

MIOA_D0MIOB_CAL_PU_GND

MIOB_VDDQ_3

MIOA_VDDQ_3

MIOA_VDDQ_4

MIOA_VDDQ_2

GPIO22

RFU1

ROM_CS*

ROM_SCLK

ROM_SO

STRAP_REF_3V3

STRAP_REF_MIOB

VDD33_5

VDD33_1

VDD33_2

VDD33_3

VDD33_4

RFU1_GND

RFU0

RFU0_GND

ROM_SI

MIOA_VDDQ_1

MIOB_VDDQ_1

MIOA_CAL_PU_GND

MIOA_CAL_PD_VDDQ

MIOA_VREF

MIOB_VREF

TESTMODE

SP_PLLVDD

PLLVDD

VID_PLLVDD

XTAL_SSIN

SYMBOL 6 OF 9BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

OUT

IN

OUT

OUT

OUT

IN

IN

NC

NC

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

Typically <??mA



50mA

25mA

65mA

110mA

- =PP1V2_GPU_VID_PLLVDD

- =PP1V2_GPU_PLLVDD

Page Notes

- =PP3V3_GPU_VDD33

- =PP3V3_GPI_MIO

- =PP1V2_GPU_H_PLLVDD

(NONE)


(NONE)

(IPD)

=PP1V1_GPU_PLLVDD

=PP1V1_GPU_H_PLLVDD

=PP3V3_GPU_VDD33

=PP3V3_GPU_MIO

GPU_MIOB_PU_GND

GPU_MIOA_PU_GND

GPU_MIOA_PD_VDDQ

GPU_MIOB_VREF

=PP1V1_GPU_VID_PLLVDD

GPU_MIOB_PD_VDDQ

GPU_MIOA_VREF

GPU_GPIO_1

GPU_GPIO_0

GPU_GPIO_11

GPU_GPIO_10

GPU_GPIO_9

GPU_GPIO_8

GPU_GPIO_7

GPU_GPIO_6

GPU_GPIO_5

GPU_GPIO_4

GPU_GPIO_3

GPU_GPIO_2

GPU_GPIO_16

GPU_MIOA_CLKOUT_P

GPU_MIOA_VSYNC

GPU_MIOA_HSYNC

GPU_MIOA_D<14>

GPU_MIOA_D<13>

GPU_MIOA_D<12>

GPU_MIOA_D<11>

GPU_MIOA_D<10>

GPU_MIOA_D<8>

GPU_MIOA_D<5>

GPU_MIOA_D<4>

GPU_MIOA_CLKOUT_N

GPU_MIOA_D<6>

GPU_MIOA_D<3>

GPU_MIOA_D<2>

GPU_MIOA_D<0>

GPU_MIOA_DE

GPU_MIOB_CLKOUT_P

GPU_MIOB_D<9>

GPU_MIOB_D<8>

GPU_MIOB_D<7>

GPU_MIOB_D<6>

GPU_MIOB_D<5>

GPU_MIOB_D<4>

GPU_MIOB_D<3>

GPU_MIOB_D<2>

GPU_MIOB_D<1>

GPU_MIOB_D<0>

GPU_MIOB_DE

GPU_MIOB_CTL3

GPU_MIOB_CLKOUT_N

GPU_HDA_SYNC

GPU_HDA_RST_L

TP_GPU_BUFRST_L

GPU_HDA_SDO

GPU_HDA_SDI

GPU_GPIO_17

GPU_JTAG_TCK

GPU_JTAG_TDI

GPU_MIOA_CLKIN

GPU_MIOB_CLKIN

GPU_STRAP<2>

GPU_STRAP<0>

GPU_MIOB_D<12>

GPU_MIOB_D<11>

GPU_TESTMODE_PD

GPU_MIOA_PD_VDDQ

GPU_MIOA_PU_GND

GPU_MIOB_PD_VDDQ

GPU_MIOB_PU_GND

GPU_MIOB_D<13>

GPU_MIOB_D<10>

GPU_MIOA_D<7>

GPU_MIOA_D<9>

GPU_MIOA_D<1>

GPU_MIOA_CTL3

GPU_JTAG_TDO

GPU_GPIO_18

GPU_GPIO_15

GPU_GPIO_14

GPU_GPIO_13

GPU_GPIO_12

GPU_SPDIF

GPU_HDA_BCLK

GPU_GPIO_23

GPU_GPIO_22

GPU_GPIO_21

GPU_GPIO_20

GPU_GPIO_19

TP_GPU_PGOOD_OUT_L

GPU_THERMD_N

GPU_THERMD_P

GPU_STRAP<1>

GPU_MIOB_D<14>

GPU_MIOB_HSYNC

GPU_MIOB_VSYNC

PP1V1_GPU_H_PLLVDD_F



PP1V1_GPU_PLLVDD_FMIN_LINE_WIDTH=0.2 mm

VOLTAGE=1.2V


PP1V1_GPU_VID_PLLVDD_F

VOLTAGE=1.2V



GPU_XTALOUT

GPU_XTALSSIN

GPU_XTALOUTBUFF

GPU_XTALIN

=PP3V3_GPU_MIO

GPU_STRAP_REF_MIOB_PD

GPU_STRAP_REF_3V3_PD

GPU_ROM_SO

GPU_ROM_SI

GPU_ROM_SCLK

GPU_ROM_CS_L

=PP3V3_GPU_VDD33

GPU_JTAG_TRST_L

GPU_JTAG_TMS

SYNC_MASTER=K20_MLB

74

051-8071


B

98

NV G96 GPIO/MIO/MISC

75

75

75

75

7

75

75

75

75

75

6

6

6

6

6

7

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

2

1 C8698

402CERM

1UF

6.3V10%

2

1 C86960.47UF10%6.3VCERM-X5R402

2

1 C86970.47UF10%6.3VCERM-X5R402

2

1 C8694

CERM402

10V20%0.1UF

2

1 C86920.022UF

CERM-X5R

10%16V

402

2

1 C86900.022UF

CERM-X5R

10%16V

402

2

1 C86950.1UF

CERM10V20%

402

2

1 C8693

CERM-X5R16V10%0.022UF

402

2

1 C8691

10%0.022UF

402CERM-X5R16V

2

1R8660

1/16W

MF-LF

402

10K5%

2

1R8696

402MF-LF1/16W1%40.2K

D2

D1

B2

B1

AD9

J13

J12

J11

J10

J9

B5

B4

AP35

M9

N9

A5

AF9

C4

D3

D4

C3

K9

J26

AK14

J25

AE9

C5

W2

AF1

Y9

W9

AB9

AA9

W1

Y5

AC3

AC2

AC1

AC4

AB1

AB2

AB3

Y3

V7

W7

W5

Y6

W6

U6

AE2

AE3

Y2

Y1

W3

W4

V4

AE1

AA6

AA7

L3

N5

U9

T9

R9

P9

N3

N2

U1

U4

T1

T2

T3

P3

P2

P1

N6

T6

R6

U3

U2

P4

N1

P5

T4

R4

N4

T5

U5

AP16

AR14

AN16

AN14

AP14

A7

B7

C7

D6

D7

J7

H6

H5

H4

H1

H2

H3

M6

L6

K6

L5

K3

L7

M4

L4

L2

L1

J6

J4

H7

K5

K4

K2

K1

A4

U8000NB9P-GS

OMIT

BGA

2

1 C8600

402

10%

6.3V

0.47UF

CERM-X5R

2

1C8637

20%

4.7UF

603

CERM

6.3V

2

1C86434.7UF

CERM

6.3V

20%

603

2

1C86404.7UF

20%

6.3V

603

CERM2

1 C8641

402

16V

X5R

10%

0.1uF

2

1C8633

20%

6.3V

CERM

603

4.7UF

21

L8630CRITICAL

0402

FERR-220-OHM

2

1C8630

20%

6.3V

CERM

603

4.7UF

2

1 C86310.1uF

16V

402

X5R

10%

2

1

R862349.9

402

MF-LF

1%

1/16W

2

1C8610

CERM

10%

1UF

6.3V

402

2

1C8611

6.3V

402

1UF10%

CERM

2

1

R8619

402

MF-LF

1/16W

10K5%

2

1

R8618

1/16W

402

MF-LF

5%

10K

2

1 C8619

16V

X5R

402

10%

0.1uF

2

1

R8621

402

1/16W

49.9

MF-LF

1%

2

1

R8622

MF-LF

402

1%

49.9

1/16W

2

1

R8620

MF-LF

49.91%

402

1/16W

2

1

R8617

MF-LF

1/16W

402

10K5%

2

1

R8616

MF-LF

1/16W

10K5%

402

2

1 C8617

16V

X5R

402

10%

0.1uF

21

L8640CRITICAL

0402

FERR-220-OHM

21

L8635CRITICAL

FERR-220-OHM

0402

2

1C8635

20%

6.3V

603

4.7UF

CERM2

1 C86360.1uF

402

16V

X5R

10%

2

1 C86020.47UF10%

CERM-X5R

402

6.3V2

1 C8601

402

10%

CERM-X5R

6.3V

0.47UF

2

1R8697

402MF-LF1/16W1%40.2K

8

8

75 74 8 6

75 74 8

74

74

74

8

74

74

74

74

74

75 74 8

75

75

75

75

75 74 8 6

OUT

OUT

OUT

IN

NCNC

D

GS

IN

IN

IN

IN

BI

BI

BI

BI

BI

OUT

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D


F 1111 PU 45k

E 1110 PU 35k

D 1101 PU 30k

THERM

TVMODE[1]

Strap S1/S2 Bit[3:0] PU/PD Rval

PCI_DEVID[2]

SUB_VENDORROM_SCLK

Strap S1/S2 Bit[3:0] PU/PD Rval

0 0000 PD 5k

1 0001 PD 10k

4 0100 PD 25k

5 0101 PD 30k

6 0110 PD 35k

7 0111 PD 45k

LCD0_BL_EN

PCI_DEVID[4]

9 1001 PU 10k

STRAP 0

STRAP 1

STRAP 2

ROM_SI

(I2CS requires pullups even if not used)

I2CS ties into SMBus connection page

HPDF

GPU 27MHz Crystal

DVI_MODE1

A 1010 PU 15k

B 1011 PU 20k

C 1100 PU 25k

LCD0_BL_PWM

VID0

VID2/MEM_VID

Native Func

Config Straps

RAMCFG[3]

USER[3]

2 0010 PD 15k

RAMCFG[2]

XCLK_277

GP HPDE

GP

Unused Clocks

Unused signals

DVI_MODE0

G96 MIOA_DE and MIOA_D<9..0> are used as Debug Port.

GPIOs

SWAPRDY_A

Isolation FETs for DP MUX inputs

PWR_CTL1

HPDD

HDMI_DETECT1

HDMI_DETECT0

PEX_PLLEN_TERM100

RAMCFG[0]

PCI_DEVID[0]

3GIO_PADCFG[0]

USER[0]

TVMODE[0]

Strapping Bit 0

PCI_DEVID[1]

SLOT_CLK_CFG

Strapping Bit 1

USER[1]

HPDC

Renamed signals

Unused I2C Buses

PWR_CTL0

AC_DET

FAN_PWM

VID1

3 0011 PD 20k

Physical

Native Func

3GIO_PADCFG[3]

PCI_DEVID[3]

8 1000 PU 5k

USER[2]

3GIO_PADCFG[2]

SLI_SYNC

MEM_VREF

GPIOs

TVMODE[2]

Strapping Bit 3Strapping Pin Strapping Bit 2

RAMCFG[1]

3GIO_PADCFG[1]

LCD0_VDD

ROM_SO

GPU_GPIO_7

GPU_GPIO_8

GPU_GPIO_9

GPU_GPIO_10

GPU_ROM_SO

GPU_ROM_SCLK

GPU_GPIO_5

GPU_GPIO_6

GPU_GPIO_4

GPU_GPIO_3

EG_DP_CA_DET

=PP3V3_GPU_VDD33

EG_LCD_PWR_EN

=PP3V3_S0_DDC_LCD

NO_TEST=TRUE

NC_GPU_GPIO_18MAKE_BASE=TRUE

NO_TEST=TRUE



NC_GPU_GPIO_20

GPU_GPIO_23

LVDS_EG_DDC_CLKMAKE_BASE=TRUE

GPU_TDIODE_NMAKE_BASE=TRUE

GPU_TDIODE_PMAKE_BASE=TRUE

GPU_XTALSSIN

GPU_XTALIN

GPU_XTALOUTGPU_XTALOUTMAKE_BASE=TRUE

GPU_CLK27MMAKE_BASE=TRUE

GPU_CLK27M_SSMAKE_BASE=TRUE

LVDS_EG_DDC_DATAMAKE_BASE=TRUE

NC_GPU_I2CH_SCLMAKE_BASE=TRUE NO_TEST=TRUE

NC_GPU_I2CH_SDANO_TEST=TRUEMAKE_BASE=TRUE

NC_GPU_I2CE_SDAMAKE_BASE=TRUE NO_TEST=TRUE

NC_GPU_I2CE_SCLNO_TEST=TRUEMAKE_BASE=TRUE

DP_EG_DDC_DATAMAKE_BASE=TRUE

GPU_I2CH_SCL

GPU_I2CH_SDA

GPU_I2CE_SDA

GPU_I2CE_SCL

NC_GPU_I2CC_SDAMAKE_BASE=TRUE NO_TEST=TRUE

EG_DP_CA_DET

NC_GPU_GPIO_17


GPU_GPIO_19

GPU_GPIO_20

GPU_GPIO_21

NC_GPU_MIOA_CLKOUT_NNO_TEST=TRUEMAKE_BASE=TRUE

NC_GPU_MIOA_CTL3


TP_GPU_MIOA_DEMAKE_BASE=TRUE

TP_GPU_MIOA_D<9..0>MAKE_BASE=TRUE

NC_GPU_MIOA_CLKIN


NC_GPU_MIOB_CLKINMAKE_BASE=TRUE NO_TEST=TRUE

NC_GPU_MIOB_CLKOUT_PMAKE_BASE=TRUE NO_TEST=TRUE

NC_GPU_MIOB_CLKOUT_NMAKE_BASE=TRUE NO_TEST=TRUE

NC_GPU_MIOB_D<14..0>


NC_GPU_MIOB_VSYNCMAKE_BASE=TRUE NO_TEST=TRUE

GPU_GPIO_22

GPU_GPIO_17

GPU_GPIO_16


NC_GPU_GPIO_23

NO_TEST=TRUE


NC_GPU_MIOA_D<14..10>MAKE_BASE=TRUE NO_TEST=TRUE

NC_GPU_MIOA_HSYNCMAKE_BASE=TRUE NO_TEST=TRUE

NC_GPU_MIOA_VSYNCMAKE_BASE=TRUE NO_TEST=TRUE

LVDS_EG_B_CLK_P

MAKE_BASE=TRUE

NC_FBC_CMD30NO_TEST=TRUE

NO_TEST=TRUE

NC_GPU_ROM_CS_LMAKE_BASE=TRUE

MAKE_BASE=TRUE

TP_LVDS_EG_B_CLK_P

TP_GPU_VCORE_VID3MAKE_BASE=TRUE

MAKE_BASE=TRUE

GPU_VCORE_VID2

GPU_VCORE_VID1MAKE_BASE=TRUE

GPU_GPIO_0

MAKE_BASE=TRUE NO_TEST=TRUE

NC_CPU_HDA_SD0

NC_CPU_HDA_SYNCNO_TEST=TRUEMAKE_BASE=TRUE

NC_CPU_HDA_BCLKMAKE_BASE=TRUE NO_TEST=TRUE


NC_CPU_HDA_RST_L


NC_FBB_MA<13>


NC_LVDS_EG_A_DATA_N<3>


NC_LVDS_EG_B_DATA_P<3>

GPU_ROM_CS_L

GPU_STRAP<1>

GPU_STRAP<2>

=PP3V3_GPU_MIO

DP_EG_DDC_DATA

DP_EG_DDC_CLK

NC_GPU_I2CD_SCLMAKE_BASE=TRUE NO_TEST=TRUE

NC_GPU_MIOB_CTL3


GPU_XTALOUTBUFF

GPU_CLK27M_XTALOUT_R

GPU_THERMD_N

GPU_XTALSSIN

GPU_MIOB_D<14..0>

GPU_MIOB_VSYNC

GPU_MIOB_HSYNCNC_GPU_MIOB_HSYNCMAKE_BASE=TRUE NO_TEST=TRUE

GPU_MIOB_CLKOUT_P

GPU_MIOB_CLKOUT_N

GPU_MIOB_DENC_GPU_MIOB_DEMAKE_BASE=TRUE NO_TEST=TRUE

GPU_MIOB_CTL3

GPU_MIOB_CLKIN

NC_GPU_I2CD_SDAMAKE_BASE=TRUE NO_TEST=TRUE

GPU_MIOA_D<9..0>

GPU_MIOA_D<14..10>

GPU_MIOA_CLKIN

GPU_MIOA_CLKOUT_PNC_GPU_MIOA_CLKOUT_PMAKE_BASE=TRUE NO_TEST=TRUE

GPU_MIOA_CLKOUT_N

GPU_MIOA_CTL3

GPU_MIOA_DE

GPU_MIOA_HSYNC

GPU_MIOA_VSYNC


NC_FBA_MA<13>

TP_FBA_CMD28

TP_FBC_CMD28

GPU_HDA_SDO

GPU_HDA_SYNC

GPU_HDA_BCLK

GPU_HDA_RST_L

NO_TEST=TRUE

NC_FBA_CMD30MAKE_BASE=TRUE

GPU_SPDIFMAKE_BASE=TRUE

NC_GPU_SPDIFNO_TEST=TRUE

GPU_HDA_SDI

LVDS_EG_A_DATA_N<3>

GPU_I2CD_SDA

TP_FBA_CMD30

TP_FBC_CMD29

TP_FBA_CMD29

LVDS_EG_A_DATA_P<3>

TP_FBC_CMD30

FB_B_MA<13>

FB_A_MA<13>

LVDS_EG_B_CLK_N

LVDS_EG_B_DATA_P<3>

LVDS_EG_B_DATA_N<3>

GPU_I2CC_SDA

GPU_CLK27M

DP_EG_DDC_CLKMAKE_BASE=TRUE

GPU_I2CB_SCL

GPU_I2CD_SCL

NO_TEST=TRUE

NC_FBC_CMD29MAKE_BASE=TRUE

NC_LVDS_EG_B_DATA_N<3>MAKE_BASE=TRUE NO_TEST=TRUE

NO_TEST=TRUE


GPU_STRAP<0>

DP_CA_DET

DP_CA_DET_EG

NO_TEST=TRUE



NC_LVDS_EG_A_DATA_P<3>

MAKE_BASE=TRUE

TP_LVDS_EG_B_CLK_N


NC_FBA_CMD29

NC_FBC_CMD28NO_TEST=TRUEMAKE_BASE=TRUE

NC_FBA_CMD28MAKE_BASE=TRUE NO_TEST=TRUE

NC_CPU_HDA_SDINO_TEST=TRUEMAKE_BASE=TRUE

GPU_THERMD_P

GPU_I2CA_SCL

GPU_I2CA_SDA

GPU_I2CB_SDA

GPU_I2CC_SCLNC_GPU_I2CC_SCLNO_TEST=TRUEMAKE_BASE=TRUE

=PP3V3_GPU_MIO

MAKE_BASE=TRUE

SMC_GFX_OVERTEMP_R_L

MAKE_BASE=TRUE

SMC_GFX_THROTTLE_R_L

GPU_GPIO_14

GPU_GPIO_13

SMC_GFX_OVERTEMP_L

GPIO7_FBVDD_ALTVOMAKE_BASE=TRUE

DP_IG_DDC_DATA

GPU_GPIO_15

MAKE_BASE=TRUE

TP_GPU_GSTATE<0>

MAKE_BASE=TRUE

EG_BKLT_EN

MAKE_BASE=TRUE

EG_LCD_PWR_EN

MAKE_BASE=TRUE

TP_LVDS_EG_BKL_PWM

DP_EG_HPDMAKE_BASE=TRUE

NO_TEST=TRUE


MAKE_BASE=TRUE

TP_GPU_GSTATE<1>

SMC_GFX_THROTTLE_L

GPU_ROM_SI

FB_VREF_UNTERMMAKE_BASE=TRUE

GPU_VCORE_VID0MAKE_BASE=TRUE

DP_IG_DDC_CLK

=PP3V3_GPU_VDD33

GPU_GPIO_2

GPU_GPIO_1

GPU_GPIO_11

GPU_GPIO_12

GPU_GPIO_18

FB_VREF_UNTERM

GPIO7_FBVDD_ALTVO

EG_BKLT_EN

SMC_GFX_THROTTLE_R_L

SMC_GFX_OVERTEMP_R_L

=PP3V3_GPU_VDD33

GPU_XTALOUT

RES,MTL FILM,1/16W,35.7K,1,0402,SMD,LF R8708 VRAM_512_HYNIX1114S0368

RES,MTL FILM,1/16W,45.3K,1,0402,SMD,LF114S0378 VRAM_1024_SAMSUNGR87071

1 R8708 VRAM_512_SAMSUNG114S0378 RES,MTL FILM,1/16W,45.3K,1,0402,SMD,LF

75 98


051-8071 B

SYNC_MASTER=M98_MLB

G96 GPIOs & Straps

2

1R8792

10K5%

1/16W

MF-LF402

2

1R8793

10K

1/16W5%

MF-LF402

2

1R8794

1/16W

10K

402MF-LF

5%

2

1R8795

402

NO STUFF

1/16W

MF-LF

5%

10K

75 73 72 71

83 75

84 75

84 75

2

1R8796

MF-LF

5%

2.2K

1/16W

402

2

1R8797

5%

2.2K

1/16W

MF-LF402

77

41

41

21R87991/16W

05% 402MF-LF

21R87981/16W

05% 402MF-LF

84 21

R8743

5%1/16WMF-LF

0

402

DP_CA_DET_EG_PLD

74

74

74

74

74

74

81 9

81 75

81 9

81 75

2

1R8753

5%

402

MF-LF1/16W

4.7K

2

1R8752

4.7K5%

1/16WMF-LF

402

2

1R8751

4.7K

MF-LF

5%

402

1/16W

2

1R8750

1/16W

4.7K

402

5%

MF-LF

81

84 82 81

2

1R8742

DP_CA_DET_EG_FET

402MF-LF1/16W

1%100K

21

3

Q8742

SSM3K15FV

SOD-VESM-HF

DP_CA_DET_EG_FET

2

1R8705

NO STUFF

1%

10K

1/16W

402

MF-LF

2

1R8703

1/16WMF-LF

1%

10K

NO STUFF

4022

1R8701

402

1%

MF-LF

45.3K

1/16W

2

1R870645.3K

MF-LF402

1%

1/16W

2

1R8704

1/16W

1%

402

10K

MF-LF

2

1R8711

1/16W

MF-LF402

1%

NO STUFF

4.99K

2

1R87094.99K

MF-LF

1%

402

1/16W

NO STUFF

2

1R8707

1/16W

2.0K5%

402MF-LF

OMIT

2

1R8702

5%

MF-LF

NO STUFF

2.0K

1/16W

402

2

1R8712

1%

15.0K

MF-LF1/16W

4022

1R8710

5%1/16WMF-LF

402

2.0K

2

1R8708

MF-LF

402

OMIT

45.3K

1/16W1%

2

1R8782

1/16W5%

10M

402MF-LF

NO STUFF

31

42

Y8780

CRITICAL

SM-227MHZ

21

C8781

50V

12pF

5%

402CERM

21

C878012pF

5%

CERM402

50V

21

R87830

MF-LF1/16W

402

5%

95 75

75 74

77

77

2

1R8780

10K

402

5%1/16W

MF-LF

2

1R8781

402

5%

10K

GPU_SS_INT

MF-LF

1/16W

74

74

74

74

74

74

74

74

75

75 74 8 6

78 8 7

74

81

96 47

96 47

75 74

74

75 74 75 74

95 75

95

81

81 75

76

76

76

76

75

74

74

74

7

7

74

74

74

76 7

7

74

74

75 74 8

74

74

75 74

74

74

74

74

74

74

74

74

74

74

74

74

74

74

74

74

74

71

71

74

74

74

74

74

74

76

76

71

71

71

76

71

71

71

76

76

76

76

81 75 76

76

7

74

76

76

76

76

75 74 8

75

75

74

74

83 75

74

7

84 75

84 75

7

7

75 73 72 71

75 74 8 6

74

74

74

74

74

75

75

75 74 8 6

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IFPB_TXC*

I2CD_SDA

I2CB_SCL

I2CS_SDA

I2CS_SCL

I2CC_SCL

I2CC_SDA

IFPEF_RSET

I2CA_SDA

DACB_RSET

DACC_VSYNC

DACC_HSYNC

DACC_BLUE

DACC_GREEN

DACC_RED

DACB_CSYNC

DACB_BLUE

DACB_GREEN

DACB_RED

DACA_VSYNC

DACA_RED

IFPF_L0*

IFPF_L0

IFPF_AUX*

IFPF_AUX

IFPE_L3*

IFPE_L3

IFPE_L2*

IFPE_L2

IFPE_L1*

IFPE_L1

IFPE_L0*

IFPE_L0

IFPE_AUX

IFPD_L3*

IFPD_L3

IFPD_L2*

IFPD_L2

IFPD_L0*

IFPD_AUX*

IFPC_L3*

IFPC_L2*

IFPC_L0*

IFPC_AUX*

IFPB_TXD7*

IFPB_TXD7

IFPB_TXD6*

IFPB_TXD5

IFPB_TXD4*

IFPA_TXD2*

IFPA_TXD2

DACC_VREF

DACC_RSET

DACC_VDD

DACB_VDD

DACA_VDD

DACA_VREF

DACA_RSET

DACA_HSYNC

DACA_GREEN

DACA_BLUE

IFPF_L1

IFPF_L1*

IFPF_L2

IFPF_L3

IFPF_L2*

IFPF_L3*

IFPE_AUX*

IFPD_L0

IFPD_L1

IFPD_L1*

IFPC_L3

IFPC_L2

IFPC_L1

IFPC_L0

IFPB_TXD6

IFPB_TXD4

IFPB_TXC

IFPA_TXD3*

IFPA_TXD3

IFPA_TXD1

IFPA_TXD1*

IFPA_TXD0

IFPA_TXD0*

IFPA_TXC*

IFPA_TXC

I2CA_SCL

IFPCD_RSET

IFPC_AUX

I2CE_SDA

I2CE_SCL

I2CD_SCL

I2CB_SDA

I2CH_SCL

IFPC_L1*

I2CH_SDA

IFPD_AUX

IFPB_TXD5*

IFPEF_PLLVDD

IFPAB_PLLVDD

IFPAB_RSET

IFPF_IOVDD

IFPE_IOVDD

IFPD_IOVDD

IFPC_IOVDD

IFPB_IOVDD

IFPA_IOVDD

DACB_VREF

IFPCD_PLLVDD

SYMBOL 5 OF 9

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

NCNC

NCNCNCNCNCNCNCNC

NCNC

NCNCNCNCNCNCNCNC

NCNC

NCNCNCNCNCNCNCNC

NCNCNC

NCNC

NCNCNC

NC

NCNCNC

NCNCNC

NC

NCNC

NCNC

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

Power inputs must be pulled down if not used

Place at AG10

I2CS must be pulled up if not used

I2CS must be pulled up if not used.

Sum of peak currents: 240mAPower aliases required by this page:


- =PP3V3_GPU_IFPCD_IOVDD

I2CS addr fixed at 0x9E,0x9F


(NONE)

- =PP1V8_GPU_IFPX

Place at AK8

I2CS addr fixed at 0x9E,0x9F

Place at AG9

?mA peak per diff pair

?mA peak for all pairs

?mA peak per diff pair

(NONE)

160mA peak

Place at AJ8

80mA peak

?mA peak for all pairs

Page Notes

=PP1V1_GPU_IFPCD_IOVDD

VOLTAGE=1.8VMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.3 mm

PP1V8_GPU_IFPCD_PLLVDD_F

PP1V8_GPU_IFPEF_PLLVDD_F

PP1V1_GPU_IFPEF_IOVDD_F

DP_EG_AUX_CH_P

DP_EG_AUX_CH_N

PP1V8_GPU_IFPAB_IOVDD_FMIN_LINE_WIDTH=0.4 mm


PP1V8_GPU_IFPEF_PLLVDD_F

GPU_I2CC_SCL


PP1V8_GPU_IFPAB_PLLVDD_F


PP1V1_GPU_IFPEF_IOVDD_F

GPU_DACB_VDD

GPU_DACA_VDD

LVDS_EG_B_DATA_P<2>

LVDS_EG_B_DATA_N<2>

LVDS_EG_B_DATA_P<3>

LVDS_EG_B_DATA_N<3>

DP_EG_ML_N<2>

DP_EG_ML_P<3>

DP_EG_ML_N<1>

DP_EG_ML_P<1>

GPU_IFPAB_RSET

LVDS_EG_A_CLK_P

LVDS_EG_A_DATA_N<2>

DP_EG_ML_P<2>

PP1V8_GPU_IFPCD_PLLVDD_F

GPU_IFPCD_RSET

GPU_IFPEF_RSET

GPU_IFPAB_RSET

LVDS_EG_A_CLK_N

LVDS_EG_A_DATA_P<0>

LVDS_EG_A_DATA_N<0>

LVDS_EG_A_DATA_N<3>

LVDS_EG_A_DATA_P<3>

LVDS_EG_A_DATA_P<2>

LVDS_EG_B_CLK_P

=GPU_I2CS_SDA

GPU_I2CC_SDA

GPU_I2CH_SCL

GPU_I2CB_SDA

GPU_I2CB_SCL

GPU_I2CD_SDA

GPU_I2CD_SCL

GPU_I2CE_SDA

GPU_I2CE_SCL

PP1V1_GPU_IFPCD_IOVDD_F

LVDS_EG_B_DATA_N<1>

LVDS_EG_B_DATA_P<1>

LVDS_EG_B_DATA_P<0>

DP_EG_ML_N<0>

DP_EG_ML_P<0>

LVDS_EG_A_DATA_N<1>

LVDS_EG_A_DATA_P<1>

DP_EG_ML_N<3>

GPU_DACC_VDD


PP1V1_GPU_IFPCD_IOVDD_FMIN_LINE_WIDTH=0.4 mm

LVDS_EG_B_DATA_N<0>

LVDS_EG_B_CLK_N

GPU_I2CA_SDA

GPU_I2CH_SDA

=GPU_I2CS_SCL

GPU_I2CA_SCL

GPU_IFPEF_RSET

GPU_IFPCD_RSET

=PP1V8_GPU_IFPX

NV G96 Video Interfaces

SYNC_MASTER=K20_MLB

B051-8071

9876


2

1R8851

MF-LF1/16W1%

1K

402

2

1R88611K5%

402MF-LF

1/16W

2

1R8860

5%1/16W

402MF-LF

NO STUFF

1K

75

75

75

75

44

44

75

75

75

75

75

75

75

75

75

75

75

75

2

1R8856

5%

MF-LF

10K

1/16W

4022

1R8857

402

5%

10K

MF-LF

1/16W

95 81

95 81

95 81

95 81

95 81

95 81

95 81

95 81

95 81

95 81

2

1R8855

MF-LF1/16W1%

1K

402

AH3

AH2

AH1

AJ1

AJ2

AJ3

AL3

AL2

AD7

AF2

AF3

AL1

AJ6

AE5

AE6

AF5

AF4

AG4

AH4

AH5

AH6

AE7

AD4

AE4

AR4

AR5

AP5

AN5

AN7

AP7

AR7

AR8

AK8

AN4

AP4

AK7

AJ9

AR2

AP1

AM4

AM3

AM5

AL5

AM6

AM7

AJ8

AN3

AP2

AP11

AN11

AR10

AR11

AN10

AP10

AP8

AN8

AN13

AP13

AG10

AJ11

AK9

AL11

AK11

AL10

AK10

AM9

AM10

AL8

AM8

AM12

AM11AG9

E1

E2

G6

F6

E5

D5

G5

F4

E4

E3

G2

G3

G4

G1

AM2

AK6

AG7

AH7

AK4

AM1

AL4

AJ4

AC5

AC6

AB6

AA4

AB4

AB5

Y4

AL13

AK12

AJ12

AK13

AM15

AM13

AM14

AL14

U8000

OMIT

NB9P-GSBGA

2

1C8816

CERM

0.1UF

402

10V20%

21

L8810CRITICAL

FERR-220-OHM

0402

2

1C8810

6.3V

603

CERM

20%

4.7UF

2

1C88110.1UF

CERM

402

10V20%

2

1C8813

20%10VCERM

0.1UF

402

2

1C88030.1UF

20%10VCERM402

21

L8800

CRITICAL

FERR-220-OHM

0402

2

1C88004.7UF

20%

CERM

6.3V

603

2

1C8801

20%0.1UF

10V

402CERM

2

1C88154.7UF

20%

603

CERM

6.3V

2

1R8854

5%

1/16W

10K

402MF-LF

2

1R8853

1/16W

5%

10K

MF-LF402

2

1R8852

1/16W

5%

10K

402MF-LF

2

1C88054.7UF

20%

CERM

6.3V

603

95 84 7

95 84

95 84

95 84

95 84

95 84

95 84

95 84

95 84

95 84

95 84

95 84

95 84

95 84

75

75

21

L8815

CRITICAL

0402

FERR-220-OHM

2

1C8806

20%0.1UF

CERM10V

402

21

L8805

CRITICAL

FERR-220-OHM

0402

2

1R8850

MF-LF1/16W

1K1%

402

8

76

76

76

76

76 76

76

76

76

76

76

76

76

76

8

PVCC

THRM_PAD

FDE

PGOOD

AF_EN

VR_ON

IMON

VID4

VID3

VID2

VID1

VID0

LGATE

PGND

PHASE

UGATE

BOOT

VSS

VIN

ISP

VO

ISN

ICOMP

RTN

VSEN

VDIFF

FB

COMP

VW

OCSET

SOFT

VDD

RBIAS

OUT

IN

IN

IN

IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM


VID1

(GFXIMVP6_AGND)

1

1

1

VID2

1 10

1

1

1

1

VID0

0

1

-

-

Max Batt Balanced

-

Max perf

-

-

(PPVCORE_GPU_REG)

PLACE C8965,C8966,C8967 AND C8968 ON THE BACK SIDE OF GPU

Other VID states may not be valid

1.00425V

0.92700V

0.90125V

Voltage

GPU VCore Setpoints

X

X

X

VID3

Default Vcore Setpoints

GPU VCore Regulator

Vout = 1.05V - 0.96V

24.6A max output(OCP limit)

SWITCH_NODE=TRUEMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MMGFXIMVP6_PHASE


VOLTAGE=0V

GND_GFXIMVP6_AGND


GFXIMVP6_AF_EN

PPVCORE_GPU_REG_RMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM

MIN_NECK_WIDTH=0.3MMMIN_LINE_WIDTH=0.3MMGFXIMVP6_PHASE_VSUM

GFXIMVP6_VID2

GFXIMVP6_VID1

GFXIMVP6_VID0


MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.3MMGFXIMVP6_OCSET


PP5V_S5_GFXIMVP6_PVCC

VOLTAGE=5V


GFXIMVP6_BOOTMIN_LINE_WIDTH=0.3MMMIN_NECK_WIDTH=0.2MM


GFXIMVP6_FB

GFXIMVP6_VWMIN_LINE_WIDTH=0.3MMMIN_NECK_WIDTH=0.2MM


MIN_LINE_WIDTH=0.3MMGFXIMVP6_COMP


GFXIMVP6_VID3


GFXIMVP6_SOFT

GPU_VCORE_VID2

GPU_VCORE_VID1

GPU_VCORE_VID0

GFXIMVP6_VID4

GFXIMVP6_VID3

MIN_LINE_WIDTH=0.25 mmVOLTAGE=0V

MIN_NECK_WIDTH=0.20 mmGPU_GND_SENSE


GFXIMVP6_COMP_RC

=PP5V_S3_GPUVCORE

GFXIMVP6_VDIFF_RCMIN_LINE_WIDTH=0.3MMMIN_NECK_WIDTH=0.3MM

MIN_LINE_WIDTH=0.25 mmVOLTAGE=1.25V

MIN_NECK_WIDTH=0.20 mmGPU_VDD_SENSE

GFXIMVP6_RBIASMIN_LINE_WIDTH=0.3MMMIN_NECK_WIDTH=0.2MM

MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.3MMGFXIMVP6_VDIFF


GFXIMVP6_VSEN_P

GFXIMVP6_VSEN_N


GFXIMVP6_VID0

GFXIMVP6_VID2

GFXIMVP6_VID4

GPUVCORE_PGOOD

GFXIMVP6_FDE

GFXIMVP6_IMON

GFXIMVP6_VID1

MIN_LINE_WIDTH=0.3MMGFXIMVP6_DROOP


=GPUVCORE_EN

MIN_LINE_WIDTH=0.3MMMIN_NECK_WIDTH=0.2MMVOLTAGE=5V

PP5V_S5_GFXIMVP6_VDD

GFXIMVP6_UGATEMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM


GFXIMVP6_LGATE


GFXIMVP6_VIN

=PPVIN_GPU_GPUVCORE

=PPVCORE_GPU_REG

MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.3MMGFXIMVP6_DFB

GFXIMVP6_VSUM


GFXIMVP6_VOMIN_LINE_WIDTH=0.3MMMIN_NECK_WIDTH=0.2MM

GPUVID_0P90V GPUVID2_1,GPUVID1_1,GPUVID0_1

GPUVID_1P00V GPUVID2_0,GPUVID1_1,GPUVID0_1

B

9877


051-8071

GPU (G96) CORE SUPPLY

2

1C8935

CASED2E-SM

33UF

16V20%

POLY-TANT

CRITICAL

321

4

5


CRITICAL

75 21

R8994

5%1/16WMF-LF

0

402

75

75

21

R8990

402

5%

0

1/16WMF-LF

2

1R8985

MF-LF

5%

GPUVID1_0

2.2K

402

1/16W

2

1R8983GPUVID2_0

MF-LF

5%1/16W

2.2K

402

2

1R8987

1/16W

402MF-LF

5%2.2K

GPUVID0_1

2

1R8984

5%1/16W

402MF-LF

2.2K

GPUVID1_1

2

1R8988

402MF-LF

05%1/16W

2

1R8982

MF-LF

GPUVID2_1

5%

402

1/16W

2.2K

2

1R8980

5%1/16WMF-LF

0

402

2 1

R8986

1/16WMF-LF402

0

5%

2

1C8969

X7R402

10%0.001UF

50V

2

1 C8934

50V

0.001UF

402

10%

X7R

43

21

R8940

1W1%

MF0612

0.001

84 67

2

1C8931

20%

CASED2E-SMPOLY-TANT

16V

33UF

CRITICAL

2

1 C8967

X5R

20%6.3V

10UF

603

2

1C896810UF

20%

X5R6.3V

603

32

1C8942

D2T-SM2

330UF20%2.0V

POLY-TANT

CRITICAL

2

1C8906330PF

5%

COG402

50V

2

1R8903

MF-LF402

1/16W1%1K

2

1C8933

603-1

25VX5R

10%1UF2

1 C8932

25V

603-1

10%1UF

X5R2

1C8930CRITICAL

POLY-TANT

20%16V

33UF

CASED2E-SM

321

4

5

Q8950CRITICAL

RJK0305DPBLFPAK-HF

2

1R8930

5%

402

1K

1/16WMF-LF

3 2

1 C8943

D2T-SM2

20%

POLY-TANT2.0V

330UF

CRITICAL

2

1C896610UF

6.3VX5R

20%

603

2

1 C8965

20%

603

6.3VX5R

10UF

21

L8920

MPL104-SM

CRITICAL

0.6UH-30A-1.5MOHM2

1C8956

603

10%0.22UF

16VX7R

321

4

5


CRITICAL

21

R89007.87K

402MF-LF1/16W1%

2

1R89015.11K

1/16W

402MF-LF

1%

1

2R89029.76K

402MF-LF1/16W

1%

21

C897168PF

402-1

5%50VCERM

2

1C8972

16V10%

X5R

0.1uF

402

2

1 C8903

10%0.01uF

16VCERM402

2

1C8902

6.3V

4.7UF20%

X5R-CERM402

21

R8911

5%1/16W

402MF-LF

1

2

1 C8901

10%

402X5R10V

1uF

2 1

C89040.033UF

10%

402X5R16V

12

R8905150K

1/16WMF-LF402

1%

21

R8904

MF-LF402

1%

10

1/16W

2

1C8921

50V

402CERM

10%0.001UF

67

2

1 C89230.001UF

50V

402CERM

10%

2

1 C8922

X7R

10%

402

0.001UF

50V

2

1R89094.99K

1/16WMF-LF

402

1%

2

1 C8953

50VCERM402

10%680pF

21

XW8900SM

4

15

8

29

12

14

27

26

25

24

23

7

16

18

33

2

9

1

22

19

31

20

3

21

13

11

28

10

32

6

5

17

30

U8900CRITICAL

ISL6263C

QFN

2

1 C8920

10%50V

402

0.001UF

CERM

2 1

C8950

402

180PF

CERM50V5%

2

1 C8952

50V

402-1CERM

68PF5%

2

1R8953

MF-LF

2.21K

402

1%1/16W

21

C8951

CERM

10%50V

402

560PF

2

1R891010K5%

402MF-LF1/16W

2

1R8907

1/16W5%

402MF-LF

10K

21

R8920

PLACEMENT_NOTE=Place R8908 at U8900

402

1/16W5%

MF-LF

20

21

R8908

MF-LF402

20

1/16W5%

PLACEMENT_NOTE=Place R8920 at U8900

2

1R8950

402

1%1/16W

374K

MF-LF

2

1R8951

1/16W1%

402MF-LF

4.99K

77

77

77

77 8

77 8

77

77

77

69

8

69

77

77

77

46

77

8

45 8

D

G S

IN

SYM_VER-1

SYM_VER-1

NC

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

LCD (LVDS) INTERFACE

518S0651

Place close to the connector

Place close to the connector

Panel has 2K pull-ups

no-panel case (development).

100K pull-ups are for

LCD_PWREN_L_RC

LCD_PWREN_L

PP3V3_SW_LCD_UFMIN_LINE_WIDTH=0.5 mm


=PP3V3_S0_DDC_LCD

LVDS_DDC_CLK

LVDS_DDC_DATA

LVDS_CONN_B_CLK_F_N

LVDS_CONN_B_DATA_P<0>


LVDS_CONN_A_DATA_N<1>

LVDS_CONN_A_DATA_P<1>



LVDS_CONN_B_DATA_N<0>



BKL_SYNC




LED_RETURN_3

LVDS_CONN_A_CLK_P

LVDS_CONN_B_CLK_P

LVDS_CONN_B_CLK_N

LVDS_CONN_A_CLK_N

VOLTAGE=3.3V


PP3V3_SW_LCD


LVDS_CONN_B_CLK_F_P

LED_RETURN_5

LVDS_CONN_A_CLK_F_P

LED_RETURN_6

PPVOUT_S0_LCDBKLT

LED_RETURN_4

LED_RETURN_2

LED_RETURN_1

LVDS_CONN_A_CLK_F_N

=PP3V3_S0_LCD

LCD_PWR_EN

051-8071 B

9878


LVDS Display Connector

2

1 C90081000PF10%100VX7R603

4

3

6521

Q9000

SMFDC638P_G

CRITICAL

2

1C9002

50V

0.001UF10%

X7R402

9

8

7

6

5

44

43

42

41

40

4

39

38

37

36

35

34

33

32

31

30

3

29

28

27

26

25

24

23

22

21

20

2

19

18

17

16

15

14

13

12

11

10

1

J9000

CRITICAL

F-RT-SM20474-040E-11

4 3

21

L9011CRITICAL

DLP11S

90-OHM-100MA

4 3

21

L9010CRITICAL

DLP11S

90-OHM-100MA

84

2

1R9010

100K

1/16W

402MF-LF

5%

2

1R9011

MF-LF1/16W

100K

402

5%

21

3

Q9001SSM3K15FV

SOD-VESM-HF

2

1R9000

100K

MF-LF

402

1/16W5%

21

R9001

402

1/16WMF-LF

5%

100K

21

C9000

CERM

10%50V

402

0.0022uF

21

L9000

CRITICAL

FERR-250-OHM

SM

2

1C9001

10%

0.1UF

X5R

16V

402

2

1C9010

50V

0.001UF

X7R

10%

402

7 8 75

7 81

7 81

7 95

7 81 95

7 81 95

7 81 95

7 81 95

7 81 95

7 81 95

7 81 95

7 81 95

7 81 95

7 85

7 81 95

7 81 95

7 81 95

7 85

81 95

81 95

81 95

81 95

7

7 95

7 85

7 95

7 85

7 85

7 85

7 85

7 85

7 95

8

IN

IN

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

BI

BI

IN

IN

IN

IN IN

IN

IN IN

DQ13

DM0

DM1

DM3

A1

A0

A2

A4

A3

DQ31

DQ30

DQ28

DQ29

DQ27

DQ26

DQ25

DQ22

DQ23

DQ21

DQ19

DQ18

DQ17

DQ16

DQ15

DQ14

DQ12

DQ11

DQ10

DQ7

DQ4

DQ6

DQ5

DQ3

DQ2

DQ0

DQ1

DQ8

DQ9

DQ20

DQ24

A5

A9

A8/AP

ZQ

MF

SEN

RESET

RDQS0

RDQS2

RDQS1

RDQS3

WDQS0

WDQS2

WDQS3

WDQS1

BA0

BA1

BA2

RFU

A7

A6

DM2

RAS*

CAS*

WE*

CK*

CS0*

CK

A10

A11

CKE

A12/CS1*

MFLOW

MFLOW

MFLOW

(1 OF 2)

DQ13

DM0

DM1

DM3

A1

A0

A2

A4

A3

DQ31

DQ30

DQ28

DQ29

DQ27

DQ26

DQ25

DQ22

DQ23

DQ21

DQ19

DQ18

DQ17

DQ16

DQ15

DQ14

DQ12

DQ11

DQ10

DQ7

DQ4

DQ6

DQ5

DQ3

DQ2

DQ0

DQ1

DQ8

DQ9

DQ20

DQ24

A5

A9

A8/AP

ZQ

MF

SEN

RESET

RDQS0

RDQS2

RDQS1

RDQS3

WDQS0

WDQS2

WDQS3

WDQS1

BA0

BA1

BA2

RFU

A7

A6

DM2

RAS*

CAS*

WE*

CK*

CS0*

CK

A10

A11

CKE

A12/CS1*

MFLOW

MFLOW

MFLOW

(1 OF 2)

VDD0

VDD1

VDD4

VDD3

VDD2

VSS6

VSS7

VSS3

VSS5

VSS2

VSS1

VSS0

VSS4

VSSA0

VSSA1

VDDA0

VDDA1

VDD7

VDD6

VDDQ0

VDDQ1

VDDQ2

VDDQ3

VDDQ4

VDDQ5

VDDQ6

VDDQ7

VDDQ8

VDDQ9

VDDQ10

VDDQ11

VDDQ12

VDDQ13

VDDQ14

VDDQ15

VDDQ16

VDDQ17

VDDQ18

VDDQ19

VDDQ20

VDDQ21

VSSQ0

VSSQ3

VSSQ4

VSSQ5

VSSQ6

VSSQ7

VSSQ8

VSSQ9

VSSQ10

VSSQ11

VSSQ12

VSSQ13

VSSQ14

VSSQ15

VSSQ16

VSSQ17

VSSQ18

VSSQ19

VREF0

VREF1

VSSQ2

VSSQ1

VDD5

(2 OF 2)

VDD0

VDD1

VDD4

VDD3

VDD2

VSS6

VSS7

VSS3

VSS5

VSS2

VSS1

VSS0

VSS4

VSSA0

VSSA1

VDDA0

VDDA1

VDD7

VDD6

VDDQ0

VDDQ1

VDDQ2

VDDQ3

VDDQ4

VDDQ5

VDDQ6

VDDQ7

VDDQ8

VDDQ9

VDDQ10

VDDQ11

VDDQ12

VDDQ13

VDDQ14

VDDQ15

VDDQ16

VDDQ17

VDDQ18

VDDQ19

VDDQ20

VDDQ21

VSSQ0

VSSQ3

VSSQ4

VSSQ5

VSSQ6

VSSQ7

VSSQ8

VSSQ9

VSSQ10

VSSQ11

VSSQ12

VSSQ13

VSSQ14

VSSQ15

VSSQ16

VSSQ17

VSSQ18

VSSQ19

VREF0

VREF1

VSSQ2

VSSQ1

VDD5

(2 OF 2)

NCNC

IN

IN

IN

IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

VRAM8

Page Notes

Connect to designated pin, then GNDConnect to designated pin, then GNDU8400.J1 U8400.J12U8400.J1

(NONE)

- =PP1V8_S0_FB_VDD

- =PP1V8_S0_FB_VDDQ




U8400.J12

FB_A3_VREF

FB_A1_VREF

=PP1V8_GPU_FB_VDD

FB_A_CLK_P<1>

FB_A_CLK_N<1>

FB_A_BA<2>

FB_A_BA<1>

FB_A_WDQS<0>

FB_A_BA<0>

FB_A_WDQS<3>

FB_A_WDQS<2>

FB_A_WDQS<1>

FB_A_RDQS<0>

FB_A_RDQS<1>

FB_A_RDQS<3>

FB_A_RDQS<2>

FB_A_DRAM_RST

FB_A_RAS_L

FB_A_WE_L

FB_A_CS1_L

FB_A_CAS_L

FB_A_CLK_P<0>

FB_A_CLK_N<0>

FB_A_MA<12>

FB_A_CKE

FB_A_MA<10>

FB_A_MA<9>

FB_A_MA<11>

FB_A_MA<7>

FB_A_MA<8>

FB_A_LMA<5>

FB_A_LMA<4>

FB_A_MA<6>

FB_A_LMA<2>

FB_A_LMA<3>

FB_A_MA<1>

FB_A_MA<0>

FB_A_BA<2>

FB_A_BA<1>

FB_A_WDQS<6>

FB_A_BA<0>

FB_A_WDQS<4>

FB_A_WDQS<7>

FB_A_WDQS<5>

FB_A_RDQS<6>

FB_A_RDQS<4>

FB_A_DRAM_RST

FB_A_RDQS<5>

FB_A_RDQS<7>

FB_A_RAS_L

FB_A_WE_L

FB_A_CAS_L

FB_A_CS1_L

FB_A_MA<12>

FB_A_CKE

FB_A_MA<11>

FB_A_MA<10>

FB_A_MA<9>

FB_A_MA<7>

FB_A_MA<8>

FB_A_MA<6>

FB_A_UMA<5>

FB_A_UMA<4>

FB_A_UMA<2>

FB_A_UMA<3>

FB_A_MA<0>

FB_A_MA<1>

FB_A2_MF

FB_A2_ZQ

FB_A_DQM_L<2>

FB_A_DQ<20>

FB_A_DQM_L<0>

FB_A_DQM_L<1>

FB_A3_ZQ

FB_A_DQ<42>

FB_A_DQ<44>

FB_A_DQ<43>

FB_A_DQ<45>

FB_A_DQ<46>

FB_A_DQ<47>

FB_A_DQ<40>

FB_A_DQ<41>

FB_A_DQ<59>

FB_A_DQ<60>

FB_A_DQ<56>

FB_A_DQ<61>

FB_A_DQ<57>

FB_A_DQ<63>

FB_A_DQ<58>

FB_A_DQ<62>

FB_A_DQ<35>

FB_A_DQ<54>

FB_A_DQ<48>

FB_A_DQ<50>

FB_A_DQ<51>

FB_A_DQ<49>

FB_A_DQ<52>

FB_A_DQ<53>

FB_A_DQ<33>

FB_A_DQ<34>

FB_A_DQ<39>

FB_A_DQ<38>

FB_A_DQ<32>

FB_A_DQ<37>

FB_A_DQ<36>

FB_A3_SEN

FB_A3_MFFB_A_DQ<15>

FB_A2_SEN

FB_A_DQM_L<3>

FB_A_DQ<21>

FB_A_DQ<22>

=PP1V8_GPU_FB_VDDQ

=PP1V8_GPU_FB_VDD

=PP1V8_GPU_FB_VDDQ

FB_A2_VREF

FB_A0_VREF

FB_A_DQM_L<5>

FB_A_DQM_L<7>

FB_A_DQM_L<4>

FB_A_DQ<11>

FB_A_DQ<0>

FB_A_DQ<1>

FB_A_DQ<3>

FB_A_DQ<13>

FB_A_DQ<26>

FB_A_DQ<25>

FB_A_DQ<27>

FB_A_DQ<28>

FB_A_DQ<30>

FB_A_DQ<31>

FB_A_DQ<29>

FB_A_DQ<24>

FB_A_DQ<17>

FB_A_DQ<19>

FB_A_DQ<23>

FB_A_DQ<18>

FB_A_DQ<16>

FB_A_DQ<14>

FB_A_DQ<12>

FB_A_DQ<10>

FB_A_DQ<9>

FB_A_DQ<8>

FB_A_DQ<5>

FB_A_DQ<4>

FB_A_DQ<6>

FB_A_DQ<7>

FB_A_DQ<2>

FB_A_DQM_L<6>

FB_A_DQ<55>


79

B051-8071

98

GDDR3 Frame Buffer A (Top)

95 72 71

95 72 71

95 72 71

95 72 71

G11

G2

D12

D9

D4

D1

B12

B9

T12

T9

T4

T1

P12

P9

P4

P1

L11

L2

B4

B1

J12

J1

V10

V3

L12

L1

G12

G1

A10

A3

H12

H1

E12

E9

E4

E1

C12

C9

C4

V12

V1

C1

R12

R9

R4

R1

N12

N9

N4

N1

J9

J4

A12

A1

K12

K1

V11

V2

M12

M1

F12

F1

A11

A2

U9150

32MX32-900MHZ-MFL

BGA

K4J10324QD-HC11

OMIT

CRITICAL

G11

G2

D12

D9

D4

D1

B12

B9

T12

T9

T4

T1

P12

P9

P4

P1

L11

L2

B4

B1

J12

J1

V10

V3

L12

L1

G12

G1

A10

A3

H12

H1

E12

E9

E4

E1

C12

C9

C4

V12

V1

C1

R12

R9

R4

R1

N12

N9

N4

N1

J9

J4

A12

A1

K12

K1

V11

V2

M12

M1

F12

F1

A11

A2

U9100

32MX32-900MHZ-MFL

CRITICAL

OMIT

BGA

K4J10324QD-HC11

A4

H9

P2

P11

D11

D2

V4

J2

V9

P3

P10

D10

D3

H3

A9

B10

B11

G3

F2

F3

E2

T3

T2

C3

R3

R2

M3

N2

L3

M2

T10

T11

R10

R11

C2

M10

N11

L10

M11

G10

F11

F10

E11

C10

C11

B3

B2

N3

N10

E10

E3

F9

H4

J10

J11

F4

H10

G9

G4

M9

K11

L9

K10

H11

K9

M4

K3

J3

L4

K2

H2

K4 U9100

CRITICAL

OMIT

BGA

K4J10324QD-HC11

32MX32-900MHZ-MFL

A4

H9

P2

P11

D11

D2

V4

J2

V9

P3

P10

D10

D3

H3

A9

B10

B11

G3

F2

F3

E2

T3

T2

C3

R3

R2

M3

N2

L3

M2

T10

T11

R10

R11

C2

M10

N11

L10

M11

G10

F11

F10

E11

C10

C11

B3

B2

N3

N10

E10

E3

F9

H4

J10

J11

F4

H10

G9

G4

M9

K11

L9

K10

H11

K9

M4

K3

J3

L4

K2

H2

K4 U9150

K4J10324QD-HC11

BGA

OMIT

CRITICAL

32MX32-900MHZ-MFL

95 79 72 71 95 79 72 71

72

72 72

72

2

1C917010UF

VRAM8

6.3V

20%

X5R

603

2

1C9150

VRAM8

6.3V

20%

X5R

603

10UF

2

1C9120

VRAM8

6.3V

20%

603

10UF

X5R

2

1C9100

VRAM8

20%

6.3V

X5R

603

10UF

95 72 71

95 72 71

95 72 71 7

95 72 71 7

95 72 71

95 72 71

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

2

1 C9154

VRAM8

0.1uF

X5R

402

10%16V

2

1 C9165

VRAM8

X5R

402

10%16V

0.1uF

2

1 C91530.1uF

X5R

402

10%16V

VRAM8

2

1 C9160

VRAM8

0.1uF

X5R

402

10%16V

2

1 C9152

VRAM8

402

0.1uF

X5R

10%16V

2

1 C9151

VRAM8

X5R

0.1uF

402

10%16V

2

1 C91760.1uF

X5R402

10%16V

VRAM8

2

1 C9175

VRAM8

0.1uF

X5R402

10%16V

2

1 C9174

VRAM8

0.1uF

X5R402

10%16V

2

1 C9173

VRAM8

0.1uF

X5R402

10%16V

2

1

R9199

402

VRAM8

1005%

1/16WMF-LF

2

1

R9198

VRAM8

243

MF-LF

1%

1/16W

402

2

1 C9172

VRAM8

0.1uF

X5R402

10%16V

2

1 C9171

VRAM8

10%

0.1uF

X5R402

16V

2

1

R9190

VRAM8

MF-LF1/16W

1K5%

402

95 79 72 71

95 79 72 71

95 72 71

95 72 71

95 72 71

95 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 71

95 79 72 71

95 79 72 71

95 79 72 71

95 72 71

95 72 71

95 72 71

95 72 71

95 72 71

95 72 71

95 72 71

95 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 72 71

95 72 71

95 72 71

95 72 71

95 72 71

95 72 71

95 72 71

95 72 71

95 79 72 71

95 72 71

95 72 71

95 72 71

95 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 79 72 71

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71 7

95 72 71

95 72 71

95 72 71

95 72 71

2

1

R9140

VRAM8

1/16W

402MF-LF

5%

1K

2

1 C9110

402

16VX5R

0.1uF10%

VRAM8

2

1 C9115

VRAM8

16V10%0.1uF

X5R

402

2

1 C9121

VRAM8

402X5R

10%16V

0.1uF

2

1

R9148

1/16W

402MF-LF

1%

243

VRAM8

2

1

R9149

MF-LF402

5%

1/16W

100

VRAM8

2

1 C9126

VRAM8

0.1uF

16V10%

402X5R

2

1 C9125

16V10%

402X5R

0.1uF

VRAM8

2

1 C9124

X5R402

16V

0.1uF

VRAM8

10%

2

1 C9123

VRAM8

0.1uF

402

10%16VX5R

2

1 C9122

VRAM8

X5R

10%16V

402

0.1uF

2

1 C9101

402

VRAM8

16V

0.1uF

X5R

10%

2

1 C9104

VRAM8

16V10%

402

X5R

0.1uF

2

1 C91020.1uF

16V10%

X5R

402

VRAM8

2

1 C91030.1uF

VRAM8

16V10%

402

X5R

80 79 73 72 8

80 79 73 72 9 8

80 79 73 72 8

80 79 73 72 9 8

IN

IN

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

BI

BI

IN

IN

IN

IN IN

IN

IN IN

DQ13

DM0

DM1

DM3

A1

A0

A2

A4

A3

DQ31

DQ30

DQ28

DQ29

DQ27

DQ26

DQ25

DQ22

DQ23

DQ21

DQ19

DQ18

DQ17

DQ16

DQ15

DQ14

DQ12

DQ11

DQ10

DQ7

DQ4

DQ6

DQ5

DQ3

DQ2

DQ0

DQ1

DQ8

DQ9

DQ20

DQ24

A5

A9

A8/AP

ZQ

MF

SEN

RESET

RDQS0

RDQS2

RDQS1

RDQS3

WDQS0

WDQS2

WDQS3

WDQS1

BA0

BA1

BA2

RFU

A7

A6

DM2

RAS*

CAS*

WE*

CK*

CS0*

CK

A10

A11

CKE

A12/CS1*

MFLOW

MFLOW

MFLOW

(1 OF 2)

DQ13

DM0

DM1

DM3

A1

A0

A2

A4

A3

DQ31

DQ30

DQ28

DQ29

DQ27

DQ26

DQ25

DQ22

DQ23

DQ21

DQ19

DQ18

DQ17

DQ16

DQ15

DQ14

DQ12

DQ11

DQ10

DQ7

DQ4

DQ6

DQ5

DQ3

DQ2

DQ0

DQ1

DQ8

DQ9

DQ20

DQ24

A5

A9

A8/AP

ZQ

MF

SEN

RESET

RDQS0

RDQS2

RDQS1

RDQS3

WDQS0

WDQS2

WDQS3

WDQS1

BA0

BA1

BA2

RFU

A7

A6

DM2

RAS*

CAS*

WE*

CK*

CS0*

CK

A10

A11

CKE

A12/CS1*

MFLOW

MFLOW

MFLOW

(1 OF 2)

VDD0

VDD1

VDD4

VDD3

VDD2

VSS6

VSS7

VSS3

VSS5

VSS2

VSS1

VSS0

VSS4

VSSA0

VSSA1

VDDA0

VDDA1

VDD7

VDD6

VDDQ0

VDDQ1

VDDQ2

VDDQ3

VDDQ4

VDDQ5

VDDQ6

VDDQ7

VDDQ8

VDDQ9

VDDQ10

VDDQ11

VDDQ12

VDDQ13

VDDQ14

VDDQ15

VDDQ16

VDDQ17

VDDQ18

VDDQ19

VDDQ20

VDDQ21

VSSQ0

VSSQ3

VSSQ4

VSSQ5

VSSQ6

VSSQ7

VSSQ8

VSSQ9

VSSQ10

VSSQ11

VSSQ12

VSSQ13

VSSQ14

VSSQ15

VSSQ16

VSSQ17

VSSQ18

VSSQ19

VREF0

VREF1

VSSQ2

VSSQ1

VDD5

(2 OF 2)

VDD0

VDD1

VDD4

VDD3

VDD2

VSS6

VSS7

VSS3

VSS5

VSS2

VSS1

VSS0

VSS4

VSSA0

VSSA1

VDDA0

VDDA1

VDD7

VDD6

VDDQ0

VDDQ1

VDDQ2

VDDQ3

VDDQ4

VDDQ5

VDDQ6

VDDQ7

VDDQ8

VDDQ9

VDDQ10

VDDQ11

VDDQ12

VDDQ13

VDDQ14

VDDQ15

VDDQ16

VDDQ17

VDDQ18

VDDQ19

VDDQ20

VDDQ21

VSSQ0

VSSQ3

VSSQ4

VSSQ5

VSSQ6

VSSQ7

VSSQ8

VSSQ9

VSSQ10

VSSQ11

VSSQ12

VSSQ13

VSSQ14

VSSQ15

VSSQ16

VSSQ17

VSSQ18

VSSQ19

VREF0

VREF1

VSSQ2

VSSQ1

VDD5

(2 OF 2)

NC NC

IN

IN IN

IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

Connect to designated pin, then GNDU8500.J12U8500.J1U8500.J12U8500.J1


- =PP1V8_S0_FB_VDDQ

- =PP1V8_S0_FB_VDD


Page Notes

VRAM8


(NONE)


FB_B_CLK_N<1>

FB_B_CLK_P<1>

FB_B_MA<6>

FB_B_DQ<2>

FB_B_DQ<1>

FB_B_CLK_N<0>

FB_B_CLK_P<0>

FB_B_LMA<2>

FB_B_MA<8>

FB_B_MA<10>

FB_B_CKE

FB_B_BA<2>

FB_B_BA<1>

FB_B_WDQS<2>

FB_B_BA<0>

FB_B_WDQS<1>

FB_B_WDQS<0>

FB_B_WDQS<3>

FB_B_RDQS<2>

FB_B_RDQS<3>

FB_B_RDQS<1>

FB_B_RDQS<0>

FB_B_DRAM_RST

FB_B_RAS_L

FB_B_WE_L

FB_B_CS1_L

FB_B_CAS_L

FB_B_MA<12>

FB_B_MA<9>

FB_B_MA<11>

FB_B_MA<7>

FB_B_LMA<5>

FB_B_LMA<4>

FB_B_LMA<3>

FB_B_MA<1>

FB_B_MA<0>

FB_B_BA<2>

FB_B_BA<1>

FB_B_WDQS<4>

FB_B_BA<0>

FB_B_WDQS<7>

FB_B_WDQS<6>

FB_B_WDQS<5>

FB_B_RDQS<4>

FB_B_RDQS<7>

FB_B_DRAM_RST

FB_B_RDQS<5>

FB_B_RDQS<6>

FB_B_RAS_L

FB_B_WE_L

FB_B_CAS_L

FB_B_CS1_L

FB_B_MA<12>

FB_B_CKE

FB_B_MA<11>

FB_B_MA<10>

FB_B_MA<9>

FB_B_MA<7>

FB_B_MA<8>

FB_B_MA<6>

FB_B_UMA<5>

FB_B_UMA<4>

FB_B_UMA<2>

FB_B_UMA<3>

FB_B_MA<0>

FB_B_MA<1>

=PP1V8_GPU_FB_VDD

=PP1V8_GPU_FB_VDDQ

FB_B2_SEN

FB_B_DQM_L<1>

FB_B_DQM_L<3>

FB_B_DQ<3>

FB_B_DQ<22>

FB_B3_SEN

FB_B_DQ<23>

FB_B_DQ<18>

FB_B_DQ<20>

FB_B_DQ<5>

FB_B_DQ<6>

FB_B_DQ<7>

FB_B_DQ<11>

FB_B_DQ<10>

FB_B_DQ<14>

FB_B_DQ<9>

FB_B_DQ<19>

FB_B_DQ<17>

FB_B_DQM_L<2>

FB_B_DQM_L<0>

FB_B_DQ<15>

FB_B_DQM_L<7>

FB_B_DQ<34>

FB_B_DQ<47>

FB_B_DQ<45>

FB_B_DQ<43>

FB_B_DQ<53>

FB_B_DQ<54>

FB_B_DQ<52>

FB_B_DQ<61>

FB_B_DQ<37>

FB_B_DQ<39>

FB_B_DQ<36>

FB_B_DQM_L<4>

FB_B_DQM_L<6>

FB_B_DQM_L<5>

FB_B_DQ<55>

FB_B0_VREF

FB_B2_VREF

FB_B1_VREF

FB_B3_VREF

=PP1V8_GPU_FB_VDDQ

=PP1V8_GPU_FB_VDD

FB_B_DQ<21>

FB_B_DQ<30>

FB_B_DQ<29>

FB_B_DQ<25>

FB_B_DQ<31>

FB_B_DQ<27>

FB_B_DQ<26>

FB_B_DQ<13>

FB_B_DQ<8>

FB_B_DQ<12>

FB_B_DQ<0>

FB_B_DQ<4>

FB_B_DQ<46>

FB_B_DQ<44>

FB_B_DQ<40>

FB_B_DQ<42>

FB_B_DQ<41>

FB_B_DQ<49>

FB_B_DQ<50>

FB_B_DQ<48>

FB_B_DQ<51>

FB_B_DQ<38>

FB_B_DQ<32>

FB_B_DQ<33>

FB_B_DQ<58>

FB_B_DQ<63>

FB_B_DQ<57>

FB_B_DQ<56>

FB_B_DQ<35>

FB_B_DQ<60>

FB_B_DQ<62>

FB_B_DQ<59>

FB_B3_ZQ

FB_B3_MF

FB_B_DQ<16>

FB_B2_ZQ

FB_B2_MF

FB_B_DQ<28>

FB_B_DQ<24>

GDDR3 Frame Buffer B (Top)


051-8071 B

9880

95 73 71

95 73 71 95 73 71

95 73 71

G11

G2

D12

D9

D4

D1

B12

B9

T12

T9

T4

T1

P12

P9

P4

P1

L11

L2

B4

B1

J12

J1

V10

V3

L12

L1

G12

G1

A10

A3

H12

H1

E12

E9

E4

E1

C12

C9

C4

V12

V1

C1

R12

R9

R4

R1

N12

N9

N4

N1

J9

J4

A12

A1

K12

K1

V11

V2

M12

M1

F12

F1

A11

A2

U9250

32MX32-900MHZ-MFL

K4J10324QD-HC11

BGA

OMIT

CRITICAL

G11

G2

D12

D9

D4

D1

B12

B9

T12

T9

T4

T1

P12

P9

P4

P1

L11

L2

B4

B1

J12

J1

V10

V3

L12

L1

G12

G1

A10

A3

H12

H1

E12

E9

E4

E1

C12

C9

C4

V12

V1

C1

R12

R9

R4

R1

N12

N9

N4

N1

J9

J4

A12

A1

K12

K1

V11

V2

M12

M1

F12

F1

A11

A2

U9200

32MX32-900MHZ-MFL

K4J10324QD-HC11

BGA

OMIT

CRITICAL

A4

H9

P2

P11

D11

D2

V4

J2

V9

P3

P10

D10

D3

H3

A9

B10

B11

G3

F2

F3

E2

T3

T2

C3

R3

R2

M3

N2

L3

M2

T10

T11

R10

R11

C2

M10

N11

L10

M11

G10

F11

F10

E11

C10

C11

B3

B2

N3

N10

E10

E3

F9

H4

J10

J11

F4

H10

G9

G4

M9

K11

L9

K10

H11

K9

M4

K3

J3

L4

K2

H2

K4 U9250

32MX32-900MHZ-MFL

K4J10324QD-HC11

BGA

OMIT

CRITICAL

A4

H9

P2

P11

D11

D2

V4

J2

V9

P3

P10

D10

D3

H3

A9

B10

B11

G3

F2

F3

E2

T3

T2

C3

R3

R2

M3

N2

L3

M2

T10

T11

R10

R11

C2

M10

N11

L10

M11

G10

F11

F10

E11

C10

C11

B3

B2

N3

N10

E10

E3

F9

H4

J10

J11

F4

H10

G9

G4

M9

K11

L9

K10

H11

K9

M4

K3

J3

L4

K2

H2

K4 U9200BGA

OMIT

CRITICAL

K4J10324QD-HC11

32MX32-900MHZ-MFL

95 80 73 71 95 80 73 71

73

73 73

73

2

1

R9290

VRAM8

5%

1K

1/16W

402MF-LF

2

1

R92401K

1/16W

402

MF-LF

5%

VRAM8

2

1C9270

20%

6.3V

X5R

603

VRAM8

10UF

2

1C9250

20%

6.3V

X5R

603

10UF

VRAM8

2

1C9220

20%

6.3V

X5R

603

VRAM8

10UF

2

1C9200

20%

6.3V

X5R

603

10UF

VRAM8

95 73 71

95 73 71

95 73 71 7

95 73 71 7

95 73 71

95 73 71

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

2

1 C9254

16V10%

402

X5R

0.1uF

VRAM8

2

1 C9265

16V

0.1uF

X5R

402

10%

VRAM8

2

1 C92530.1uF

X5R

402

10%16V

VRAM8

2

1 C9260

402

0.1uF

X5R

10%16V

VRAM8

2

1 C9252

16V10%

402

X5R

0.1uF

VRAM8

2

1 C9251

16V10%

402

X5R

0.1uF

VRAM8

2

1 C92760.1uF

16V10%

402X5R

VRAM8

2

1 C92750.1uF

16V10%

X5R

VRAM8

402

2

1 C92740.1uF

X5R402

10%16V

VRAM8

2

1 C92730.1uF

16VX5R402

10%

VRAM8

2

1

R92991005%

MF-LF402

1/16W

VRAM8

2

1

R9298

1%

243

MF-LF402

1/16W

VRAM8

2

1 C92720.1uF

16V10%

402X5R

VRAM8

2

1 C92710.1uF

16V10%

402X5R

VRAM8

95 80 73 71

95 80 73 71

95 73 71

95 73 71

95 73 71

95 73 71

95 80 73 71

95 80 73 71

95 80 73 71

95 80 73 71

95 80 73 71

95 80 73 71 7

95 80 73 71

95 80 73 71

95 80 71

95 80 73 71 7

95 80 73 71

95 80 73 71

95 73 71

95 73 71

95 73 71

95 73 71

95 73 71

95 73 71

95 73 71

95 73 71

95 80 73 71

95 80 73 71 7

95 80 73 71

95 73 71

95 73 71

95 73 71

95 73 71

95 73 71

95 73 71

95 73 71

95 73 71

95 80 73 71

95 73 71

95 73 71

95 73 71

95 73 71

95 80 73 71

95 80 73 71

95 80 73 71

95 80 73 71

95 80 73 71

95 80 73 71 7

95 80 73 71

95 80 71

95 80 73 71

95 80 73 71 7

95 80 73 71

95 80 73 71

95 80 73 71

95 80 73 71

95 80 73 71 7

95 80 73 71

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71 7

95 73 71

95 73 71

95 73 71

95 73 71

2

1 C92100.1uF

402

10%16V

VRAM8

X5R 2

1 C92150.1uF

X5R

402

10%16V

VRAM8

2

1 C92210.1uF

X5R16V

402

10%

VRAM8

2

1

R9248

1/16W1%

402

MF-LF

243

VRAM8

2

1

R9249

1/16W5%

402

MF-LF

100

VRAM8

2

1 C9226

402

16V

0.1uF

X5R

10%

VRAM8

2

1 C9225

10%

0.1uF

X5R402

16V

VRAM8

2

1 C9224

402

0.1uF10%

X5R16V

VRAM8

2

1 C92230.1uF

X5R402

10%16V

VRAM8

2

1 C9222

16VX5R

0.1uF

VRAM8

10%

402

2

1 C9201

VRAM8

0.1uF

X5R

10%16V

402

2

1 C92040.1uF

X5R

402

10%16V

VRAM8

2

1 C92020.1uF

X5R

402

10%16V

VRAM8

2

1 C9203

VRAM8

0.1uF

402

X5R

10%16V

80 79 73 72 8

80 79 73 72 9 8 80 79 73 72 9 8

80 79 73 72 8

IN

IN

IN

IN

IN

IN

IN

IN

BI

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

IN

BI

BI

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

IN

OUT

BI

IN

IN

XSD*

HPD_1

DIN1_0-

DIN1_1+

DIN1_2-

DAUX1+

DIN1_3+

DDC_DAT2

DAUX2-

DDC_CLK2

HPD_2

GPU_SEL

TST0

DIN1_2+

DIN1_1-

DOUT_0-

DOUT_1+

DDC_CLK1

DDC_DAT1

DOUT_2+

DOUT_2-

DOUT_3+

DOUT_3-DIN2_1+

DDC_AUX_SEL

DIN2_1-

AUX+

AUX-

HPDIN

DIN2_2+

DIN2_2-

DIN2_3+

DIN2_3-

DAUX2+

DIN2_0-

DIN2_0+

DIN1_0+

DAUX1-

DOUT_1-

DOUT_0+

DIN1_3-

VDD

GND

OUT

OUT

VCC

C1

C2

C3

C4

A1B1

A2B2

A3B3

A4B4

GND THRM

IN

IN

OUT

IN

IN

BI

BI

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

TABLE_5_ITEM

TABLE_5_ITEM


PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

LVDS DDC MUX

LVDS Transmitter TerminationAll emulated LVDS outputs require this termination

LO=PORT1HI=PORT2

DisplayPort Mux

HI=DDCLO=AUX_CH

(All 24 resistors)

DP_IG_AUX_CH_P

DP_IG_AUX_CH_N

DP_IG_DDC_DATA

DP_IG_HPD

DP_EG_ML_P<2>

DP_EG_ML_N<3>

DP_EG_AUX_CH_C_N

DP_EG_DDC_CLK

DP_EG_DDC_DATA

DP_ML_P<2>

DP_IG_ML_N<0>

DP_IG_ML_N<1>

DP_IG_ML_N<2>

DP_EG_ML_P<3>

DP_CA_DETMAKE_BASE=TRUE

DP_AUX_CH_C_N

DP_AUX_CH_C_P

DP_ML_N<3>

DP_ML_N<2>

DP_ML_P<3>

LVDS_CONN_A_CLK_N

LVDS_A_DATA_P<0>

LVDS_A_DATA_N<0>

LVDS_A_DATA_P<2>

LVDS_A_DATA_N<2>

LVDS_B_CLK_N

LVDS_B_DATA_P<0>

LVDS_B_DATA_N<0>

LVDS_B_DATA_P<1>




LVDS_CONN_B_CLK_N

LVDS_CONN_B_CLK_P


DP_IG_AUX_CH_C_N

DP_IG_DDC_CLK

DP_EG_ML_N<1>

DP_EG_ML_N<2>

DP_HPD

=PP3V3_S0_DPMUX

DP_IG_ML_P<2>

DP_IG_ML_P<1>

DP_IG_ML_P<0>

DP_HPD_R

DP_ML_P<0>

=PP3V3_GPU_LVDS_DDC

LVDS_A_CLK_P

LVDS_DDC_CLK

LVDS_IG_DDC_DATA

LVDS_DDC_SEL_EG







LVDS_IG_DDC_CLK

LVDS_EG_DDC_CLK

=PP3V3_S0_LVDSDDCMUX

DP_EG_ML_N<0>

DP_EG_ML_P<0>

DP_ML_N<1>

DP_ML_P<1>

DP_ML_N<0>

DP_IG_AUX_CH_C_P

DP_EG_AUX_CH_C_P

LVDS_A_CLK_N

LVDS_B_DATA_N<1>

LVDS_A_DATA_N<1>

LVDS_DDC_SEL_IG

LVDS_DDC_DATA

LVDS_EG_DDC_DATA

MAKE_BASE=TRUEDP_HOTPLUG_DET

DP_IG_CA_DET

DP_EG_ML_P<1>

DP_IG_ML_P<3>

DP_IG_ML_N<3>



DP_MUX_XSD_L

DP_MUX_EN

=PP3V3_S0_DPMUX

DP_MUX_SEL_EG

DP_EG_AUX_CH_N

DP_EG_AUX_CH_P

LVDS_B_DATA_P<2>

DP_EG_HPD

LVDS_CONN_A_CLK_P

LVDS_B_CLK_P

LVDS_A_DATA_P<1>

LVDS_B_DATA_N<2>SYNC_MASTER=M98_MLB

81 98

B051-8071


Muxed Graphics Support

RES,MTL FILM,1/16W,357 OHM,1,0402,SMD,LF114S0174 GMUX_1V8R9320,R9322,R9325,R9327,R9330,R9332,R9335,R9337,R9340,R9342,R9345,R9347,R9350,R9352,R9355,R935716

RES,MTL FILM,270 OHM,1%,1/16W,0402,SMD,L GMUX_2V5R9320,R9322,R9325,R9327,R9330,R9332,R9335,R9337,R9340,R9342,R9345,R9347,R9350,R9352,R9355,R9357114S0517 16

2

1R9370

1/16W

402MF-LF

20K5%

2

1R937120K

402

1/16WMF-LF

5%

21

R9307

MUXGFX

1/16W

402MF-LF

5%

1K

PLACEMENT_NOTE=Place at U9320

2

1R9306

5%1K

1/16W

402MF-LF

2

1R9304

MF-LF402

1/16W

100K5%

2

1R9305

MF-LF402

1/16W

100K5%

95 78 7

95 78 7

95 78 7

95 78 7

95 78 7

95 78 7

95 78

95 78

95 78 7

95 78 7

95 78 7

95 78 7

95 78 7

95 78 7

95 78

95 78

2

1 C93011UF10%6.3VCERM-X5R402

DPMUX_EN_HPD

21

R9320OMIT

270

1%1/16WMF-LF402


2

1R9321GMUX_2V5

SIGNAL_MODEL=EMPTY

402

1%

MF-LF1/16W

133


21

R9325OMIT

1%

MF-LF1/16W

402

270


21

R9322

1%1/16W

270

402MF-LF


OMIT

95 84

95 84

95 84 7

2

1R9326GMUX_2V5

SIGNAL_MODEL=EMPTY1%

402MF-LF1/16W

133


21

R9327OMIT

402MF-LF1/16W1%

270


21

R9330OMIT

402MF-LF1/16W1%

270


2

1R9331GMUX_2V5


MF-LF1/16W

402

133


21

R9335OMIT

402MF-LF1/16W1%

270


21

R9332OMIT

402MF-LF1/16W1%

270


2

1R9336GMUX_2V5


MF-LF1/16W

402

133


21

R9337OMIT

1/16WMF-LF402

1%

270


21

R9340OMIT

1/16WMF-LF402

1%

270


2

1R9341GMUX_2V5


MF-LF1/16W

402

133


21

R9345OMIT

1/16WMF-LF402

1%

270


21

R9342OMIT

1/16WMF-LF402

1%

270


2

1R9346

SIGNAL_MODEL=EMPTY

MF-LF1/16W

402

133

GMUX_2V5

1%


21

R9347OMIT

1/16WMF-LF402

1%

270


21

R9350OMIT

1/16WMF-LF402

1%

270


2

1R9351GMUX_2V5


MF-LF1/16W

402

133


21

R9355OMIT

1/16WMF-LF402

1%

270


21

R9352OMIT

1/16WMF-LF402

1%

270


2

1R9356SIGNAL_MODEL=EMPTY

MF-LF1/16W

402

133

GMUX_2V5

1%


21

R9357OMIT

270

1/16W

402MF-LF

1%


95 84 7

95 84

95 84

95 84

95 84

95 84 7

95 84

95 84 7

95 84 7

95 84

95 84

95 84

95 84

2

1R9301

MF-LF402

1/16W

10K1%

DPMUX_EN_HPD

21

R9303

DPMUX_EN_PLD

1/16W

402MF-LF

0

5%

2

1R9302DPMUX_EN_S0&DPMUX_EN_PLD

1/16W

402MF-LF

10K1%

84

2

1R937220K

MF-LF402

1/16W5%

2

1R9373

5%1/16WMF-LF402

20K

2

1C9370

10VCERM402

0.1UF20%

78 7

18

75

18

75

78 7

84

84

14

157

12

6

5

13

10

9

3

2

11

8

4

1

U9370

SN74LV4066A

QFN1

18

84

B7

J4

A2

G2

J1

H3

J2

A1

H7

H4

G8

C8

B3

F2

F1

E2

E1

D2

D1

B2

B1

F8

F9

E8

E9

D8

D9

B8

B9

A8

A9

B6

A6

B5

A5

B4

A4

J5

J8

H5

H8

C2

H6

J6

H9

J9

H2

H1

U9320

MUXGFX

CBTL06141EEBGA

CRITICAL

SIGNAL_MODEL=DPMUX

2

1 C93210.1UF

CERM402

20%10V

MUXGFX

84

82

75

75

75

95 76

95 76

95 76

95 76

21C933616V

0.1uF40210% X5R

21C933516V10% 402X5R

0.1uF

95 76

95 76

95 76

95 76

95 76

95 76

2

1 C93200.1UF

CERM402

20%10V

MUXGFX

90 18

90 18 21C9331

16V10% 402X5R0.1uF

21C933016V10% 402X5R

0.1uF

84 82 75

95 82

95 82

95 82

95 82

95 82

95 82

95 82

95 82

95 82

95 82

9

75 9

75 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

90 9

95

96

81 8

8

8

96

95

81 8

BI

IN

IN

IO

NC NC

IO

GND

OUT

IO

NC NC

IO

GND

IO

NC NC

IO

GND

IO

NC NC

IO

GND

IN

IN

IN

IN

IN

IN

G

D

S

G

D

S

SYM_VER-2

SYM_VER-2

SYM_VER-2

SYM_VER-2

OUT

G

D

S

G

D

S

BI

IN

OC*

OUT

EN

GNDIN

GND

GND

ML_LANE0N

ML_LANE0P

ML_LANE1P

GND

ML_LANE1N

GND

GND

DP_PWR

ML_LANE2PAUX_CHP

RETURN

HOT_PLUG_DETECT

AUX_CHN

ML_LANE3P

ML_LANE3N

ML_LANE2N

CONFIG1

CONFIG2

BOT ROW TOP ROWTH PINS SM PINS

SHIELD PINS


APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

Port Power Switch

Q9440 must have Drain to Gate leakage of <500nA and Gate to Source resistance of >5MOhm pull-up to DP_PWR.

(CA) has 100k

Cable Adapter

DP to DVI/HDMI

to 100K (DPv1.1a).

greater than or equal

down HPD input with

DP Source must pull

PP3V3_S0_DPILIMMIN_LINE_WIDTH=0.38 MMMIN_NECK_WIDTH=0.20 MMVOLTAGE=3.3V

DP_HPD_Q


MIN_LINE_WIDTH=0.38 MMPP3V3_S0_DPPWR

DP_ML_C_N<3>

PM_SLP_S3_L

=PP3V3_S5_DP_PORT_PWR

=PP3V3_S0_DPCONN

DP_ML_C_P<3>

DP_ML_N<3>

DP_CA_DET

DP_CA_DET_L_Q

=PP3V3_S0_DPCONN

DP_ML_P<0>

DP_ML_N<0>

DP_ML_P<1>

DP_ML_N<1>

DP_ML_P<2>

DP_ML_N<2>

DP_ML_P<3>

DP_ML_C_N<2>

DP_ML_C_P<2>

DP_ML_C_N<1>

DP_ML_C_N<0>

DP_ML_C_P<0>

DP_ML_C_P<1>

DP_HPD_L_Q

DP_HPD

TP_DPPWR_OC_L

HDMI_CEC

DP_CA_DET_Q

DP_ML_CONN_N<2>

DP_ML_CONN_N<3>

DP_ML_CONN_P<3>

DP_AUX_CH_C_N

DP_AUX_CH_C_P DP_ML_CONN_P<2>

DP_ML_CONN_N<1>

DP_ML_CONN_P<1>

DP_ML_CONN_P<0>

DP_ML_CONN_N<0>

DisplayPort ConnectorSYNC_MASTER=K20_MLB SYNC_DATE=09/24/2008

051-8071 B

9882

J9400CONN,RCP,MDP,HB,20P,P=0.6514-0637 CRITICAL1

19

10

12

15

17

9

11

3

5

22 21

2

14 13

8 7

1

20

6

4

16

18

J9400

OMIT

F-RT-THSM

CRITICAL

DSPLYPRT-M97

84 67 41 36 33 21 7

1

3

5

2

4

U9480

CRITICAL

SOT23TPS2051B

2

1C94850.1UF

CERM

20%10V

402

2

1 C948622UF

CRITICAL

20%

X5R-CERM6.3V

603

95 81

2

1 C9481

20%10VCERM402

0.1UF

2

1C9480

603

10UF

X5R

20%6.3V

2

1

R9423100K

402

1/16W

MF-LF

5%

2

1

R9444

1/16W

402

5%

MF-LF

10K

2

1

R9445

5%

1/16W

402

MF-LF

10K

2

1R94221M

1/16W

402MF-LF

5%

4

5

3

Q9441

SOT-363

2N7002DW-X-G

1

2

6

Q9441

SOT-363

2N7002DW-X-G

81

21R9430 01/16W5% 402MF-LF

NO STUFF

21R9400NO STUFF

MF-LF 4025% 1/16W

0

21R94311/16W 402MF-LF

05%

NO STUFF

21R9401NO STUFF

1/16W 402

05% MF-LF

21R9432NO STUFF

MF-LF 4025% 1/16W

0

21R9402NO STUFF

MF-LF 4025% 1/16W

0

21R9413 0MF-LF 4025% 1/16W

NO STUFF

21R9403NO STUFF

MF-LF 4025% 1/16W

0

4

32

1

FL9400CRITICAL

12-OHM-100MATCM1210-4SM

4

32

1

FL9401

CRITICAL

TCM1210-4SM12-OHM-100MA

4

32

1

FL9402

CRITICAL

12-OHM-100MATCM1210-4SM

4

3 2

1

FL9403CRITICAL

TCM1210-4SM12-OHM-100MA

2

1R9442

5%1/16W

402

100K

MF-LF2

1R9443

5%1/16W

402MF-LF

100K

1

2

6

Q94402N7002DW-X-G

SOT-363

4

5

3

Q94402N7002DW-X-G

SOT-363

95 81

95 81

21

L9400FERR-120-OHM-3A

0603

2

1 C9400

20%50V

603CERM

0.01UF

95 81

95 81

95 81

95 81

21C94120.1uF

16V10% 402X5R

21C941316V10% 402X5R

0.1uF21C9416

16V10% 402X5R0.1uF

21C94170.1uF

16V10% 402X5R

109

12

3

D9410RCLAMP0524P

SLP2510P8

CRITICAL

DP_ESD

2

1R9425

MF-LF

1M

1/16W

402

5%

76

45

3

D9411CRITICAL

DP_ESD

SLP2510P8

RCLAMP0524P

52

6

43

1

D9400RCLAMP0504F

CRITICAL

SC70-6-1

DP_ESD

76

45

3

D9410

SLP2510P8

DP_ESD

CRITICAL

RCLAMP0524P

2

1R9420

MF-LF

5%1/16W

402

100K

21C941016V10% 402X5R

0.1uF21C941110% 16V 402X5R

0.1uF

84 81 75

21C941410% X5R

0.1uF16V 402

21C941510% X5R

0.1uF16V 402

109

12

3

D9411

DP_ESD

SLP2510P8

CRITICAL

RCLAMP0524P

2

1R9421

402

5%1/16W

100K

MF-LF

95 81

95 81

95 81

95

8

82 8

95

82 8

95

95

95

95

95

95

95

95

95

95

95

95

95

95

IN

OUT

IN

OUT

THRM_PAD

POK1

REF

TON

EN_LDO

VREF3

VIN

LDO

LDOREFIN

BYP

FB1

ILIM1

EN1

PVCC

SECFB

GND PGND

LGATE2

BOOT2

PHASE2

UGATE2

EN2

POK2

SKIP*

OUT2

ILIM2

REFIN2

VCC

OUT1

LGATE1

PHASE1

UGATE1

BOOT1

D

GS

NC

S

D

G

S

D

G

S

D

G

S

D

G

IN


APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

<Rb>

8A MAX OUTPUT

3.5A MAX OUTPUT

Vout = 1.103V

Vout = 1.8V

<Ra>

(SGND)

(=PP1V8FB_S0_REG)

<Ra>

f = 400 kHz

(Q9510 limit?)

(Rb should be between 10K and 100K)

<Rb>

(Q9560 limit?)

Vout = 0.7V * (1 + Ra / Rb)

F = 500 KHZ

Vout = 2(Req/(Ra+Req))

1 1.553V

0 1.8V

GPIO7 FBVDDQ

from PVCC to VCC)

(Internal 10-ohm path

P1V1GPU_VFB

=PPVIN_S0GPU_P1V8P1V1

GPUFB_VID_L

=P1V8FB_EN

MIN_LINE_WIDTH=0.6MMP1V8FB_LL

SWITCH_NODE=TRUEMIN_NECK_WIDTH=0.2MM

P1V8FB_DRVHMIN_LINE_WIDTH=0.6MM

GATE_NODE=TRUEMIN_NECK_WIDTH=0.2MMP1V1GPU_DRVL


GATE_NODE=TRUEMIN_NECK_WIDTH=0.2MM

GPU_P1V8_REFIN


SWITCH_NODE=TRUE

P1V1GPU_LL


P1V1GPU_DRVHMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MMGATE_NODE=TRUE

=PP1V1_S0GPU_REG

P1V8FB_DRVL

GATE_NODE=TRUEMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM

P1V1S0_VSNS


PP5V_S0GPU_VREF

=PP1V8_GPU_REG


P1V8FB_VBSTMIN_LINE_WIDTH=0.6MM

PVIN_S0GPU_P1V1

=P1V1GPU_EN

P1V1GPU_PGOOD

P1V8FB_PGOOD

P1V1GPU_TRIP

PP2V_S0GPU_P1V8_REFVOLTAGE=2V

MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MMP1V1GPU_VBST

P1V8FB_TRIP

P1V8_GPU_VSNS

GPIO7_FBVDD_ALTVO

GND_P1V1P1V8_SGND

VOLTAGE=0VMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM

PP5V_S0GPU_P1V1P1V8_VCCMIN_LINE_WIDTH=0.5 MMMIN_NECK_WIDTH=0.2 MMVOLTAGE=5V

=PP5V_S0GPU_P1V1P1V8_GPU

83 98

B051-8071

SYNC_MASTER=RXU_K20

1.1V / 1V8 FB Power Supply


353S2312 U9500IC,ISL6236,DUAL PWM CNTRL,QFN32 CRITICAL1

75

3 2 1

4

5

Q9515SI7108DN

CRITICAL

PWRPK-1212-8-HF

3 2 1

4

5

Q9510PWRPK-1212-8-HF

SI7110DN

CRITICAL

321

4

5

Q9561CRITICAL

SI7108DNPWRPK-1212-8-HF

321

4

5

Q9560PWRPK-1212-8-HFSI7110DN

CRITICAL

2

1C9504

402-1X5R

1UF

10V10%

2 1

R9500

MF-LF402

5%

4.7

1/16W

2

1 C9561

CERM402

10%0.01UF

16V

21

3


2

1R9562

1/16W1%

402MF-LF

78.7K

2

1C9501

10%

X5R402-1

1UF

10V

2

1C9503

10V

1UF10%

402-1X5R

2

1R9563

402

1%1/16WMF-LF

14.0K

2

1R9564127K

MF-LF

1%1/16W

402

2

1 C9585

10V20%

402CERM

0.1UF

21

XW9500SM

2

1C9500

25V10%

805X5R

10UF

5

6

3

2615

2

33

29

20

32

1

19

28

13

2516

22

3010

2318

8

7

3112

21

11

4

2714

9

2417

U9500

OMIT

ISL6236

CRITICAL

QFN

21

XW9515

PLACEMENT_NOTE=Place XW9515 next to C7615

SM

2

1C9520

402CERM50V5%

100PF

NO STUFF

2 1

XW9565SM


2

1C959033UF

16V20%

CRITICAL

POLY-TANTCASED2E-SM

2

1C9540CRITICAL

POLY-TANT

33UF

CASED2E-SM

16V20%

2

1 C95800.1UF

50V10%

603-1X7R

21

L9560CRITICAL

1.0UH-13A-5.6MOHM

PCMB065T-SM

67

84 67 66

67

84 67

2

1C9560

2.5V20%

CASE-B2-SM2POLY-TANT

220UF

CRITICAL

2

1 C9510

POLY-TANTB2-SM

CRITICAL

20%2.0V

330UF

21

L9510CRITICAL

2.2UH-8.0A

PCMB065T-SM

2

1R9585

MF-LF1/16W

402

130K1%

2

1R953575K

MF-LF1/16W

402

1%

2

1C951510UF

20%6.3V

603X5R

2

1R9521

402MF-LF

1%1/16W

10K

2

1R95205.76K

1/16W1%

402MF-LF

2

1 C95451UF10%25VX5R603-1

2

1C9530

X7R50V10%

603-1

0.1UF

2

1 C9595

25V10%1UF

X5R603-1

2

1 C9565

603

20%10UF

X5R6.3V

8

8

8

8

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

D

S G

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

IN

IN

OUT

D

SG

D

SG

IN

IN

D SG

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

PT17B

PT17A

PT16B

PT16A

PT15A

PT14B

PT4B

PT4A

PT3B

PT3A

PR10B

PR10A

PT32A

PT20B

PT19B

PT19A

PB15B

PB16A

PB16B

PR11B

PR12A

PR13B

PR14B

PR15A

PR15B

PR16A

PR16B

CFG0

GND GNDIO0

GNDIO1

GNDIO2

GNDIO3

GNDIO4

GNDIO5

GNDIO6

GNDIO7

LRC_GNDPLL

LRC_VCCPLL

PB2A

PB2B

PB14A

PB14B

PB15A

PB17A

PB17B

PB18A

PB18B

PB19A

PB19B

PB20A

PB20B

PB30A

PB30B

PB31A

PB31B

PB32A

PB32B

PL2A

PL2B

PL10A

PL10B

PL11A

PL11B

PL12A

PL12B

PL13A

PL13B

PL14A

PL14B

PL15A

PL15B

PL16A

PL16B

PL18A

PL18B

PL19A

PL19B

PL32A

PL32B

PR2A

PR2B

PR11A

PR12B

PR13A

PR14A

PR18A

PR18B

PR30A

PR30B

PT2A

PT2B

PT14A

PT15B

PT18B

PT20A

PT32B

TCK

TDI

TDO

TMS

TOE

ULC_GNDPLL

ULC_VCCPLLVCCAUX

VCCIO0

VCCIO1

VCCIO2

VCCIO3

VCCIO4

VCCIO5

VCCIO6

VCCIO7 VCCJ

PT18A

VCC

IN

IN

OUT

IN

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN


PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM

TABLE_5_ITEM

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

BANK7

BANK6

BANK4

(OD)

BANK2

(All 14 resistors)

LVDS Receiver Termination

BANK5

(OD)

BANK0

Required Pullups

Required Pulldowns

The MAKE BASE properties for these signals are on the POWER CONTROL page.

GMUX CPLD

BANK3

(Tie/strap low if EGPU doesn’t provide CLKREQ_L output, provide pullup to GPU rail if using CLKREQ_L output from EGPU)

GMUX_JTAG_TCK Inversion

BANK1

(Use open-drain PGOOD output to hold off the start of the GPU PWRSEQ until the first GPU rail’s source is valid)

PM_SLP_S3_L Isolation

EG_RAIL2_EN

EG_RESET_L

GMUX_INT

EG_CLKREQ_IN_L

EXTGPU_PWR_EN

TP_GMUX_PL18B_VSYNC

LVDS_IG_B_DATA_P<0>

PM_SLP_S3_L

TP_GMUX_PL10A

LVDS_IG_A_DATA_N<2>

LVDS_MUX_SEL_EG

TP_GMUX_PL10B

LVDS_IG_A_DATA_P<0>

=GMUX_PCIE_RESET_L

LPC_FRAME_L

LVDS_IG_B_DATA_P<2>

LVDS_IG_B_DATA_N<2>

LPC_AD<3>

LPC_AD<2>

LPC_AD<0>

LCD_PWR_EN

LVDS_DDC_SEL_EG

EG_PWRSEQ_EN

EG_PWRSEQ_EN

LVDS_IG_A_DATA_P<0>

LVDS_IG_B_DATA_P<1>

LVDS_IG_A_DATA_P<1>

LVDS_IG_A_DATA_P<2> LVDS_IG_A_DATA_N<2>

LVDS_IG_B_DATA_P<0> LVDS_IG_B_DATA_N<0>

LVDS_IG_B_DATA_P<2>

LVDS_EG_A_CLK_P LVDS_EG_A_CLK_N

LVDS_EG_B_DATA_P<1> LVDS_EG_B_DATA_N<1>

LVDS_EG_B_DATA_P<0> LVDS_EG_B_DATA_N<0>

LVDS_EG_A_DATA_P<0>

DP_CA_DET_EG

JTAG_GMUX_TCK

GMUX_PM_SLP_S3_L

LVDS_IG_B_DATA_N<2>

LVDS_IG_A_DATA_N<1>

LVDS_IG_A_CLK_N

LVDS_IG_B_DATA_N<1>

LVDS_IG_A_DATA_N<0>

EG_CLKREQ_IN_L

ALL_EG_PGOOD

JTAG_GMUX_TMS

JTAG_GMUX_TDO

JTAG_GMUX_TDI

LCD_BKLT_PWM

LCD_BKLT_EN

DP_MUX_SEL_EG

GMUX_DEBUG_RESET_L

LVDS_EG_B_DATA_P<2>

JTAG_GMUX_TCK

EG_CLKREQ_OUT_L

=PP3V3_S0_GMUX

LVDS_EG_A_DATA_P<2>

LVDS_EG_A_DATA_P<1>

LVDS_EG_A_DATA_P<0>

LVDS_B_DATA_N<2>

LVDS_B_DATA_P<2>

LVDS_B_DATA_P<0>

LVDS_B_CLK_N

DP_MUX_EN

DP_HOTPLUG_DET

LVDS_A_DATA_N<1>

LVDS_A_DATA_P<1>

LVDS_DDC_SEL_EG

=P1V8FB_EN

=GPUVCORE_EN

P3V3GPU_EN

=P1V1GPU_EN

EG_RAIL4_EN

EG_RAIL2_EN

LCD_BKLT_PWM

EG_RESET_L

TP_GMUX_PT20B

TP_GMUX_PT20A

LVDS_A_DATA_N<2>

LVDS_A_DATA_P<2>

LVDS_A_CLK_N

LVDS_A_CLK_P

EG_RAIL1_EN

LVDS_IG_B_DATA_N<0>

GMUX_JTAG_TCK_L

=PP3V3_S0_GMUX

LVDS_B_CLK_P

TP_GMUX_PT32A

LVDS_A_DATA_P<0>

GMUX_DEBUG_RESET_L

TP_GMUX_PT32B

=PP3V3_S3_GMUX

LVDS_EG_A_DATA_P<1>

GMUX_S3_PD_EN

EG_BKLT_EN

LVDS_EG_B_DATA_P<2>

LVDS_EG_B_DATA_N<1>

=PP3V3_S0_GMUX

LVDS_DDC_SEL_IG

LVDS_EG_A_DATA_N<2>

LVDS_EG_A_DATA_P<2>

LPC_CLK33M_GMUX

LPC_RESET_L

EG_RAIL3_EN

LVDS_EG_A_DATA_N<1>

LCD_PWR_EN

LVDS_EG_A_DATA_N<0>

LVDS_EG_A_CLK_N

LVDS_EG_A_CLK_P

LVDS_EG_B_DATA_N<2>

LVDS_EG_B_DATA_P<1>

LVDS_EG_B_DATA_N<0>

LVDS_EG_B_DATA_P<0>

LVDS_IG_A_CLK_N

LVDS_IG_A_CLK_P

LVDS_IG_B_DATA_N<1>

LVDS_IG_B_DATA_P<1>


MIN_LINE_WIDTH=0.4 mmPP3V3_S0_GMUX_LRC_VCCPLL

=PP3V3_S0_GMUX

LVDS_IG_A_DATA_P<2>

LVDS_IG_A_DATA_N<1>

LVDS_IG_A_DATA_P<1>

LVDS_IG_A_DATA_N<0>

GMUX_INT

EG_CLKREQ_OUT_L

EG_RAIL4_EN

GMUX_CFG0

GMUX_TOE

IG_BKLT_EN

EG_LCD_PWR_EN

IG_LCD_PWR_EN

ALL_SYS_PWRGD

=PP2V5_S0_GMUX

LPC_AD<1>

GMUX_S0_PD_DIS_RC

PP3V3_S0_GMUX_ULC_VCCPLL



JTAG_GMUX_TCK

DP_CA_DET

LVDS_A_DATA_N<0>

LVDS_EG_B_DATA_N<2>

LVDS_EG_A_DATA_N<2>

LVDS_EG_A_DATA_N<1>

LVDS_EG_A_DATA_N<0>

LVDS_IG_A_CLK_P

LVDS_DDC_SEL_IG

LVDS_B_DATA_N<0>

LVDS_B_DATA_P<1>

LVDS_B_DATA_N<1>

DP_MUX_SEL_EG

EG_RAIL3_EN

EG_RAIL1_EN

=PP1V2_S0_GMUX

GMUX_S3_PD_GND

=PP3V3_S0_GMUX

GMUX_PM_SLP_S3_LMAKE_BASE=TRUE

84 98

B051-8071


Graphics MUX (GMUX)SYNC_MASTER=T18_MXMGMUX

IC,CPLD,LATTICE,132CSBGA,REV,K20 U96001 CRITICAL GMUX_PROG341S2501

IC,XP2-8,HF,CPLD,BLANK336S0027 U9600 CRITICAL1 GMUX_8K_BLANK

95 84 76

95 84 76

95 84 76

95 84 76

95 84 76 7

95 84 76

95 84 76

95 84 76

95 84 76

95 84 76

2

1R9645

1%

402MF-LF1/16W

10K

95 84 76

95 84 76

95 84 76

9

75

9

75

2

1 C9629

402

10V20%0.1UF

CERM2

1 C9628

CERM402

0.1UF20%10V

2

1R9640

402

1%

MF-LF1/16W

10K

2

1 C96170.1UF

CERM402

20%10V

2

1 C9627

20%0.1UF

CERM10V

402

2

1 C9626

402CERM

0.1UF20%10V

2

1 C96160.1UF20%10V

402CERM2

1 C96150.1UF

10V20%

402CERM

2

1 C9625

20%10VCERM402

0.1UF

2

1 C9614

CERM402

0.1UF20%10V

2

1 C9624

20%

402CERM10V

0.1UF

2

1 C96230.1UF

402

20%

CERM10V

2

1R9646NO STUFF

402

10K1%1/16WMF-LF

2

1 C9613

402CERM10V20%0.1UF

2

1 C96120.1UF20%

402

10VCERM

2

1 C9622

10VCERM

20%

402

0.1UF

2

1 C9621

10V20%

402CERM

0.1UF

2

1 C9611

10V

402

20%

CERM

0.1UF

2

1 C96100.1UF

CERM

20%10V

402

2

1 C9609

CERM10V

0.1UF20%

402

2

1 C9608

20%

CERM10V

0.1UF

402

2

1 C9607

10VCERM

0.1UF20%

402

2

1 C9606

402

10VCERM

20%0.1UF

2

1R9641NO STUFF

402

10K1%

1/16WMF-LF

9 6

9 6

9 6

9

85 84 7

84 81

84 81

2

1 C96050.1UF

10V20%

CERM402

2

1 C9604

402CERM10V20%0.1UF

81

84 81

84 9

84

84

84

84

84 9

75

84 78

91 43 41 19 7

2

1R9647

MF-LF1/16W1%10K

402

NO STUFF

91 43 41 19 7

91 43 41 19 7

91 43 41 19 7

91 43 41 19 7

91 25 19

84 9

25

90 84 18

K12

F2

C3

M1

N5

M3

M9

M12

F13

C14

A12

B7

B5

M8

J14

J2

C11

P8

N11

J13

J3

C4

B11

A4

B4

K2

L12

K13

L13

K14

A5

C5

B3

A1

A13

B13

A3

A2

B12

A11

A10

B10

C10

A9

B9

A8

C9

C8

A7

A6

C7

B6

N13

N14

B14

A14

M13

L14

J12

H14

H12

H13

G13

G12

G14

F14

F12

E12

E14

D14

D13

D12

P1

N1

B2

B1

L2

K3

L3

L1

H3

H1

G3

H2

G2

F3

G1

F1

E3

D2

E1

D1

D3

C2

P14

N12

P13

P12

M10

P10

N2

P2

N9

P9

N8

N7

M7

P7

M6

P6

M5

P5

M4

N3

N4

P4

P11

M11

E2

C1

M2

P3

N6

N10

M14

E13

C13

C12

C6

B8

J1

K1 U9600

CRITICAL

OMIT

CSBGA-HF

XP28

90 84 18

90 84 18

90 84 18

90 84 18

90 84 18

90 84 18

90 84 18

90 84 18

90 84 18

90 84 18

90 84 18

12

6

Q9670SSM6N15FEAPESOT563

67 41 25 21

R9684

1/16W

402

5%

0

MF-LF

2

1R9678

4.7K

1/16W5%

MF-LF402

90 84 18

21

R967710K

1%1/16WMF-LF402

NO STUFF

2

1R9675

5%0

402

1/16WMF-LF

NO STUFF

2

1R9676100K

MF-LF1/16W5%

402

2

1 C9695

10%6.3V

402CERM

1UF

NO STUFF

45

3Q9607SSM6N15FEAPE

SOT563

12

6Q9607SSM6N15FEAPE

SOT563

9

21

L9620

0402

FERR-220-OHM

21

L9621

0402

FERR-220-OHM

2

1R9671EG_PWRSEQ_GMUX

4.7K

402

1/16WMF-LF

5%

2


402MF-LF1/16W5%4.7K

2

1R9673

402MF-LF1/16W5%4.7K

EG_PWRSEQ_GMUX

2

1R9674

402MF-LF1/16W5%4.7K

EG_PWRSEQ_GMUX

21R9694 100K1/16W MF-LF 4025%

90 84 18


MF-LF 402

05% 1/16W

21R9634EG_PWRSEQ_GMUX0

MF-LF 4025% 1/16W

2

1 C9691NO STUFF

10VCERM

0.1UF

402

20%

2

1 C9692

CERM10V20%

402

0.1UF

NO STUFF


MF-LF 402

05% 1/16W


4021/16W MF-LF5%

0

21R9630EG_PWRSEQ_HW

1/16W MF-LF

04025%

2

1 C9693NO STUFF

10VCERM402

20%0.1UF

2

1 C9694NO STUFF

10VCERM402

0.1UF20%

25

83 67 66

77 67

83 67

68 67

67

2

1R9679

PLACEMENT_NOTE=Place on top side at U9600SILK_PART=GMUX_RST1/16W

10K1%

MF-LF402

NO STUFF

21R96955% 4021/16W

10KMF-LF

84

21R9650


100402MF-LF1/16W1%

SIGNAL_MODEL=EMPTY

21R9654


1%100

402MF-LF1/16W

SIGNAL_MODEL=EMPTY

21R9653


100402MF-LF1/16W1%

SIGNAL_MODEL=EMPTY

21R9652


1/16W100

402MF-LF1%

SIGNAL_MODEL=EMPTY

21R9651


100402MF-LF1/16W1%

SIGNAL_MODEL=EMPTY

21R9655


100402MF-LF1/16W1%

SIGNAL_MODEL=EMPTY

21R9660


1% 1/16W MF-LF 402100

SIGNAL_MODEL=EMPTY

21R9661


100402MF-LF1/16W1%

SIGNAL_MODEL=EMPTY

21R9662


100402MF-LF1/16W1%

SIGNAL_MODEL=EMPTY

21R9656


100402MF-LF1/16W1%

SIGNAL_MODEL=EMPTY

84

21R9663


1/16W MF-LF100

4021%

SIGNAL_MODEL=EMPTY

21R9664


402100

MF-LF1/16W1%

SIGNAL_MODEL=EMPTY

21R9665


100402MF-LF1/16W1%

SIGNAL_MODEL=EMPTY

21R9666


SIGNAL_MODEL=EMPTY

1004021% MF-LF1/16W

2

1 C96310.1UF

CERM10V

402

20%

2

1 C96300.1UF

CERM10V20%

402

21R9680 1K1/16W MF-LF 4025%

21R9681 10K5% 402MF-LF1/16W

21R96905%

4.7K402MF-LF1/16W

9

21R9682MF-LF 4025%

10K1/16W

21R96835% 1/16W MF-LF

10K402

21R9691NO STUFF

100K1/16W5% 402MF-LF

21R9692 20K1/16W 4025% MF-LF

21R9693 100K5% MF-LF 4021/16W

17

45


95 81 7

2

1R9670

MF-LF1/16W1%10K

402

95 81 7

95 81

95 81

95 81

95 81

84

84

95 81

95 81

95 81 7

2

1C9600

4VX5R402

20%4.7UF

95 81

95 81 7

95 81 7

95 81

95 81

95 81

95 81

82 81 75

81

95 84 76

82 67 41 36 33 21 7

84 9

84

84

90 84 18

90 84 18

90 84 18

90 84 18 90 84 18

90 84 18 90 84 18

90 84 18

95 84 76 95 84 76

95 84 76 95 84 76

95 84 76 95 84 76

84 6

90 84 18

90 84 18

90 84 18

90 84 18

90 84 18

84

95 84 76

84 9

84 8

95 84 76

95 84 76

95 84 76

84 81

84

84

85 84 7

84 9

84

84 8

8

84 8

84

84 78

84 8

8

84 6

95 84 76

95 84 76 7

95 84 76

95 84 76

90 84 18

84 81

84 81

8

84 8

84

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

G

P-CHN

S D

G

D

S

N-CHN

IN

VREF

DIM

ENA

VSYNC

SSTCMP ISEN4

ISEN5

ISEN3

VSEN

VIN

THRM_PAD

LRT

LPF

ISWSEN

ISET

ISEN6

ISEN2

ISEN1

GNDA

DRV

RT


APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

*R9702 AND R9715 PIN 1 SHOULD BE PLACED NEAR C9709 PIN 2

50.4*R9724/(R9723+R9724)=2.4V

*BOOST_FET_CNTL AND PPVOUT_S0_LCDBKLT_SW SHOULD BE KEPT AS SHORT AS POSSIBLE.

*Q9701, D9701, C9709, C9710, L9701, R9702, AND R9715 SHOULD ALL BE PLACED NEAR EACHOTHER.

THRESHOLD=2.5V

*R9707, R9708, R9709, R9713, R9714, R9727, AND R9729 SHOULD AWAY FROM BOOST CIRCUIT

BKL_RT

BKL_SSTCMP_RC

PPVOUT_S0_LCDBKLT

MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.20 mmVOLTAGE=50V

BKL_ISEN3


BKLT_EN

BKL_ISET

BKL_SSTCMP

LCD_BKLT_PWM


BKL_ISEN4

BKL_VREF_4V9

BKL_LRT

BKL_LPF

BKL_VSYNC

BKL_VSEN

BKL_VIN

BKL_ISEN1MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.20 mm

PPBUS_S0_LCDBKLT_PWRVOLTAGE=6V


BKL_VREF_4V9

GND_BKL_PWRGND_X


PPBUS_S0_LCDBKLT_PWR

LED_RETURN_4MIN_NECK_WIDTH=0.20 mmMIN_LINE_WIDTH=0.5 mm




BKL_LRT_RC

BKL_VREF_4V9

PPVOUT_S0_LCDBKLT

LED_RETURN_5MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.20 mm


BKL_ISEN2


BKL_ISEN5


BKL_ISEN6


BKL_SYNC

BKL_DIMBKLT_PWM_RC

BKL_VREF_IN_4V9

BKL_PWR_EN_L


VOLTAGE=6VMIN_NECK_WIDTH=0.375MM

PPVIN_S0_LCDBKLT_BUF


SWITCH_NODE=TRUE

VOLTAGE=50V

PPVOUT_S0_LCDBKLT_SW

BOOST_FET_CNTLMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.20MM

BOOST_SINK_R


BOOST_SINK

GND_BKL_PWRGND GND_BKL_PWRGND


GND_BKL_PWRGNDMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.20 mm

GND_BKL_PWRGND

SYNC_MASTER=KIRAN_K20

LCD BACKLIGHT DRIVER


98

B051-8071

85

U9700IC,APP001A,WHT LED BKLGHT CTR,SCRN,QFN20353S2413 CRITICAL1

2 1

R9730

MF-LF

05%1/10W

603

21

R972775K

MF-LF

PLACEMENT_NOTE=R9727 AWAY FROM Q9701

1%1/16W

402

2

1 C9701CRITICAL

X5R

10UF

805

10%25V

PLACEMENT_NOTE=C9701 PLACE NEAR L9701

21

XW9701SM

PLACEMENT_NOTE=XW9701 PLACE NEAR C9701

21

R9706

402MF-LF

10K5%1/16W

21

R9705

1%

402MF-LF1/16W

100K2

1 C9703

10V

1UF10%

X5R402

21

R9724

1/16WMF-LF

1%60.4K

402

21

R97231.2M

MF-LF603

1%1/10W

2

1 C9710

CRITICAL

PLACEMENT_NOTE=C9710 PLACE NEAR J9000

10%

1210X7R100V

1.0UF

2

1 C9709

CRITICAL

1210

2.2UF10%100V

PLACEMENT_NOTE=C9709 PLACE NEAR C9710

X7R

NO STUFF

21

R971710.2

402TF

0.1%1/16W

2

1 C9708

402

0.1UF10%

X5R25V

BKLT_PLL

21

R9714


BKLT_PLL

1/16WMF-LF402

5%10K

2

1 C9707

402-LF

2.2UF

BKLT_PLL

CERM6.3V20%

2

1 C9705

10%

CERM402

0.0022UF

50V

21

R9709

1/16W1%

MF-LF


402

10K

21

R9708


100K1%1/16WMF-LF402

21

R9704

402

1/16W1%100

MF-LF

17

9

4

3

21

7

6

18

19

2

8

16

15

14

12

11

10

13

5

1

20

U9700

CRITICAL

QFN

APP001

OMIT

21

R9703

MF-LF

5%1/16W

5.1M

402

2

1 C97060.0022UF

402

50VCERM

10%

2 1

R97334.7K

402MF-LF

5%1/16W

2

1 C97141UF10%

402X5R10V

84 7

21

R970010K

402MF-LF

1%1/16W

1

2

6Q9702NTUD3127CXXG

CRITICAL

SOT-963

4

5

3

Q9702

SOT-963

CRITICAL

NTUD3127CXXG

21

R97118.06K1/16W1%

402MF-LF

21

R97104.02K1/16W1%

402MF-LF

321

4

5

Q9701CRITICAL

PWRPK-1212-8SI7308DN

21

R9722

1/16W0.1%

TF402

10.2

21

R9721

1/16W

10.2

402TF

0.1%

21

R9720

402

0.1%

10.2

TF1/16W

21

R9719

402TF

0.1%1/16W

10.2

21

R9718

1/16W

10.2

402TF

0.1%

2 1

R9734

BKLT_PLL

1/16W

05%

MF-LF402

78 7

21

R97130

1/16WMF-LF


BKLT_PLL_NOT

402

5%

21

R97072.67K

MF-LF

1%1/16W

402


2

1 C9702

X5R

0.1UF

25V10%

402

2

1 C9713

402

0.1UF10%25VX5R

21

R9701

402

1%

MF-LF1/16W

49.9

21

R9731

1%

402

1/16WMF-LF

187K

21

L9701

PLACEMENT_NOTE=L9701 PLACE NEAR Q9701

IHLP2525CZ-SM

22UH-2.5A

CRITICAL

21

R9715

PLACEMENT_NOTE=R9715 PLACE NEAR C9709 AND Q9701

402

1%

MF1/6W

0.4

2

1 C9712

NO STUFF402

47PF

CERM

5%50V

21

R9702

PLACEMENT_NOTE=R9702 PLACE NEAR C9709 AND Q9701

MF402

1/6W1%0.4

21

XW9702SM

86 85 21

D9701

RB160M-60G

SOD-123

CRITICAL

PLACEMENT_NOTE=D9701 PLACE NEAR Q9701

85 78 7

78 7

78 7

78 7

78 7

78 7

78 7

7

85

85

86 85

85

85 78 7

85

85

85

D

SG

D

SG

IN

IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

.

FDC638APZ

43 mOhm @4.5V

0.4 A (EDP)

P-TYPE

PPBUS S0 LCDBkLT FET

MOSFET

RDS(ON)

LOADING

CHANNEL

PPBUS_S0_LCDBKLT_EN_L

BKLT_EN_L

PPBUS_S0_LCDBKLT_PWRMIN_LINE_WIDTH=0.5 MM

MIN_NECK_WIDTH=0.375 MMVOLTAGE=6V

PPBUS_S0_LCDBKLT_EN_DIV

PPBUS_S0_LCDBKLT_FUSEDMIN_LINE_WIDTH=0.5 MMMIN_NECK_WIDTH=0.375 MMVOLTAGE=6V

LVDS_BKL_ON

=PPBUS_S0_LCDBKLT

BKLT_PLT_RST_L

SYNC_DATE=07/18/2008SYNC_MASTER=YLEE_K20

LCD Backlight Support

86 98

B051-8071

2

1R9840

MF-LF

4.7K5%

1/16W

402

25

9

45

3Q9807SSM6N15FEAPE

SOT563

12

6Q9807SSM6N15FEAPE

SOT563

4

3

65

21

Q9806FDC638APZ_SBMS001

CRITICAL

SSOT6-HF

2

1 C98020.1UF

16V10%

402X5R

2

1R9809

1%

147K

402

1/16W

MF-LF

2

1R9808

402

301K1%

MF-LF

1/16W

21

F9800

603-HF

3AMP-32V-467

85

8

IN

VIN

SW1

SW2

GND

RUN2

RUN1

VFB1

VFB2

PADTHRML

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

TABLE_5_ITEM


PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM

(Switcher limit)

f = 2.25 MHz

0.3A max output<Ra>

<Ra>

(Switcher limit)

<Rb>

<Rb>

Vout = 0.6V * (1 + Ra/Rb)

f = 2.25 MHz

300mA max output

Vout = 2.5V

Vout = 1.2V

GMUX 1.8V/1.2V S0 Switcher

=PP2V5_S0_REG

SWITCH_NODE=TRUE

P1V2S0_SWMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm

P1V2S0_VFB

=PP3V3_S0_P1V2P2V5


P2V5S0_SW

SWITCH_NODE=TRUE


=P2V5S0_EN

=P1V2S0_EN

=PP1V2_S0_REG

P2V5S0_VFB

R9901RES,MTL FILM,1/16W,150K,1,0402,SMD,LF114S0428 GMUX_2V51

R9901RES,MTL FILM,1/16W,237K,1,0402,SMD,LF114S0447 GMUX_1V81

87 98

B051-8071

Misc Power SuppliesSYNC_MASTER=RXU_K20 SYNC_DATE=05/07/2008

2

1 C99054.7UF20%

402

4VX5R

2

1 C9985

X5R4V20%

402

4.7UF

2

1R9982

MF-LF402

1%1/16W

280K

2

1C9982

5%10PF

CERM50V

402

2

1R9983

MF-LF

280K

1/16W1%

402

2

1R9900

MF-LF

1%1/16W

402

475K2

1C9901

50V

10PF5%

402CERM

2

1R9901OMIT

1/16W1%

MF-LF402

150K

21

L9980CRITICAL

PCAA031B-SM

2.2UH-1.2A2

1C9900

402-LFCERM6.3V20%

2.2UF

21

L9900CRITICAL

2.2UH-1.2A

PCAA031B-SM

3

8

1

9

6

4

7

2

5

U9900DFN-HF

LTC3547

CRITICAL

67

8

8

67

8

TABLE_SPACING_RULE_ITEM

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM


LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
























APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D













FSB 1X signals shown in signal table on right.

Spacing is 1x dielectric between ADDR#, REQ# signals, with 2x dielectric spacing to ADSTB#.

FSB 2X signals / groups shown in signal table on right.

Signals within each 4x group should be matched within 5 ps of strobe.

FSB 4X signals / groups shown in signal table on right.

DSTB# complementary pairs are spaced normally and are NOT routed as differential pairs.

DSTB# complementary pairs should be matched within 1 ps of each other, all DSTB#s matched to +/- 300 ps.

FSB (Front-Side Bus) Constraints CPU / FSB Net Properties

(CPU_VCCSENSE)

(CPU_VCCSENSE)

(FSB_CPURST_L)

(See above)

Signals

NET_TYPE

SPACING

FSB 1X Signals

ELECTRICAL_CONSTRAINT_SET

FSB 4X Signal Groups

FSB 2X

PHYSICAL

Spacing is 2x dielectric between DATA#, DINV# signals, with 3x dielectric spacing to the DSTB#s.

Signals within each 2x group should be matched within 20 ps. ADTSB#s should be matched +/- 300 ps.

All 4x/2x/1x FSB signals with impedance requirements are 50-ohm single-ended.

NOTE: 7 mil gap is for VCCSense pair, which Intel says to route with 7 mil spacing without specifying a target impedance.

SR DG recommends at least 25 mils, >50 mils preferred

SOURCE: MCP79 Interface DG (DG-03328-001_v01), Section 2.2

Most CPU signals with impedance requirements are 55-ohm single-ended.

FSB Clock Constraints

Some signals require 27.4-ohm single-ended impedance.

MCP FSB COMP Signal Constraints

SOURCE: Santa Rosa Platform DG, Rev 0.9 (#20517), Sections 4.4 & 5.8.2.4

Design Guide recommends each strobe/signal group is routed on the same layer.

NOTE: Intel Design Guide allows closer spacing if signal lengths can be shortened.

Intel Design Guide recommends FSB signals be routed only on internal layers.

SOURCE: Santa Rosa Platform DG, Rev 1.5 (#22294), Sections 4.2 & 4.3

CPU Signal Constraints

SOURCE: MCP79 Interface DG (DG-03328-001_v01), Section 2.2.4


SOURCE: MCP79 Interface DG (DG-03328-001_v01), Section 2.2

Signals within each 1x group should be matched to CPU clock, +0/-1000 mils.

FSB_DATA_GROUP0 FSB_50S FSB_D_L<15..0>FSB_DATA

FSB_DSTB_50S FSB_DSTBFSB_DSTB0 FSB_DSTB_L_P<0>

FSB_DSTB_50SFSB_DSTB0 FSB_DSTB FSB_DSTB_L_N<0>

FSB_50SFSB_DATA_GROUP1 FSB_D_L<31..16>FSB_DATA

FSB_50SFSB_DATA_GROUP1 FSB_DINV_L<1>FSB_DATA

FSB_DSTB_50SFSB_DSTB1 FSB_DSTB FSB_DSTB_L_P<1>


FSB_DSTB_50S FSB_DSTB_L_P<2>FSB_DSTBFSB_DSTB2

FSB_DSTB_50S FSB_DSTBFSB_DSTB2 FSB_DSTB_L_N<2>

FSB_50S FSB_D_L<63..48>FSB_DATA_GROUP3 FSB_DATA


FSB_DSTB_50S FSB_DSTB_L_P<3>FSB_DSTBFSB_DSTB3

FSB_DSTB_50S FSB_DSTBFSB_DSTB3 FSB_DSTB_L_N<3>

FSB_ADDRFSB_ADDR_GROUP0 FSB_A_L<16..3>FSB_50S

FSB_ADDR_GROUP0 FSB_REQ_L<4..0>FSB_ADDRFSB_50S

FSB_50SFSB_ADDR_GROUP1 FSB_ADDR FSB_A_L<35..17>

FSB_ADSTB_L<1>FSB_ADSTB1 FSB_ADSTBFSB_50S

FSB_50SFSB_1X FSB_1X FSB_ADS_L

FSB_50SFSB_BREQ0_L FSB_BREQ0_LFSB_1X

FSB_50S FSB_BREQ1_LFSB_BREQ1_L FSB_1X

FSB_50SFSB_1X FSB_1X FSB_BNR_L

FSB_50SFSB_1X FSB_1X FSB_BPRI_L

FSB_50SFSB_1X FSB_DBSY_LFSB_1X

FSB_50SFSB_1X FSB_DEFER_LFSB_1X

FSB_50SFSB_1X FSB_DRDY_LFSB_1X

FSB_50SFSB_1X FSB_HIT_LFSB_1X

FSB_50SFSB_1X FSB_1X FSB_HITM_L

FSB_50SFSB_CPURST_L FSB_CPURST_LFSB_1X

FSB_50SFSB_1X FSB_RS_L<2..0>FSB_1X

FSB_50SFSB_1X FSB_TRDY_LFSB_1X

CPU_50SCPU_BSEL CPU_BSEL<2..0>CPU_AGTL

CPU_50SCPU_FERR_L CPU_FERR_LCPU_8MIL

CPU_50SCPU_ASYNC CPU_IGNNE_LCPU_AGTL

CPU_50SCPU_INIT_L CPU_INIT_LCPU_AGTL

CPU_50SCPU_ASYNC_R CPU_INTRCPU_AGTL

CPU_50SCPU_ASYNC_R CPU_NMICPU_AGTL

CPU_50SCPU_PROCHOT_L CPU_PROCHOT_LCPU_AGTL

CPU_50SCPU_PWRGD CPU_PWRGDCPU_AGTL

CPU_50SCPU_ASYNC CPU_SMI_LCPU_AGTL

CPU_50SCPU_ASYNC CPU_STPCLK_LCPU_AGTL

CPU_50SPM_THRMTRIP_L PM_THRMTRIP_LCPU_8MIL

CPU_50SFSB_CPUSLP_L FSB_CPUSLP_LCPU_AGTL

CPU_50SCPU_FROM_SB CPU_DPSLP_LCPU_AGTL

CPU_50SCPU_DPRSTP_L CPU_DPRSTP_LCPU_AGTL

CPU_50SCPU_ASYNC FSB_DPWR_LCPU_AGTL

MCP_FSB_COMPMCP_CPU_COMP MCP_BCLK_VML_COMP_VDDMCP_50S

MCP_FSB_COMPMCP_CPU_COMP MCP_BCLK_VML_COMP_GNDMCP_50S

MCP_FSB_COMPMCP_CPU_COMP MCP_CPU_COMP_VCCMCP_50S

MCP_FSB_COMPMCP_CPU_COMP MCP_CPU_COMP_GNDMCP_50S

FSB_CLK_CPU FSB_CLK_CPU_PCLK_FSBCLK_FSB_100D

FSB_CLK_CPU FSB_CLK_CPU_NCLK_FSBCLK_FSB_100D

FSB_CLK_ITP CLK_FSBCLK_FSB_100D FSB_CLK_ITP_P

FSB_CLK_ITP CLK_FSB_100D CLK_FSB FSB_CLK_ITP_N

FSB_CLK_MCP CLK_FSBCLK_FSB_100D FSB_CLK_MCP_P

FSB_CLK_MCP CLK_FSBCLK_FSB_100D FSB_CLK_MCP_N

CPU_IERR_L CPU_50S CPU_IERR_L

CPU_50SPM_DPRSLPVR CPU_AGTL PM_DPRSLPVR

CPU_50S CPU_AGTL IMVP_DPRSLPVR

CPU_GTLREF CPU_GTLREFCPU_50S CPU_GTLREF

CPU_COMP CPU_50S CPU_COMP<3>CPU_COMP

CPU_COMP CPU_COMP<2>CPU_27P4S CPU_COMP

CPU_COMP CPU_COMP<1>CPU_50S CPU_COMP

CPU_COMP CPU_COMPCPU_27P4S CPU_COMP<0>

XDP_TDI CPU_50S CPU_ITP XDP_TDI

XDP_TDO CPU_50S CPU_ITP XDP_TDO

XDP_TMS CPU_50S CPU_ITP XDP_TMS

XDP_TCK CPU_50S CPU_ITP XDP_TCK

XDP_TRST_L CPU_50S CPU_ITP XDP_TRST_L

XDP_BPM_L CPU_50S XDP_BPM_L<4..0>CPU_ITP

XDP_BPM_L5 CPU_50S CPU_ITP XDP_BPM_L<5>

XDP_CPURST_LCPU_ITPCPU_50S

CPU_VCCSENSE CPU_27P4S CPU_VCCSENSE CPU_VCCSENSE_P

CPU_VCCSENSE CPU_27P4S CPU_VCCSENSE CPU_VCCSENSE_N

CPU_VCCSENSE IMVP6_VSEN_NCPU_27P4S

CPU_27P4S CPU_VCCSENSE IMVP6_VSEN_P

CPU_50S IMVP6_VID<6..0>CPU_8MIL

CPU_VID<6..0>CPU_50S CPU_8MIL

FSB_ADSTBFSB_50S FSB_ADSTB_L<0>FSB_ADSTB0

FSB_DSTB_L_N<1>FSB_DSTB_50S FSB_DSTBFSB_DSTB1

FSB_50S FSB_DATAFSB_DATA_GROUP2 FSB_D_L<47..32>

CPU_50SCPU_ASYNC CPU_A20M_LCPU_AGTL

FSB_50SFSB_1X FSB_1X FSB_LOCK_L

FSB_DATA_GROUP0 FSB_50S FSB_DINV_L<0>FSB_DATA

=2:1_SPACING ?*CPU_ITP

TOP,BOTTOM ?CLK_FSB =4x_DIELECTRIC

=50_OHM_SE=50_OHM_SE =50_OHM_SE=50_OHM_SECPU_50S =STANDARD=STANDARD*

CPU_27P4S 7 MIL 7 MIL=27P4_OHM_SE=27P4_OHM_SE* =27P4_OHM_SE =27P4_OHM_SE

=STANDARD* ?CPU_AGTL

* ?CPU_8MIL 8 MIL

25 MIL*CPU_COMP ?

?*CPU_GTLREF 25 MIL

CLK_FSB_100D * =100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF =100_OHM_DIFF=100_OHM_DIFF =100_OHM_DIFF

*CLK_FSB ?=3x_DIELECTRIC

25 MIL ?CPU_VCCSENSE *

=STANDARD=STANDARD* =50_OHM_SE =50_OHM_SE=50_OHM_SEMCP_50S =50_OHM_SE

MCP_FSB_COMP ?* 8 MIL

=2x_DIELECTRIC* ?FSB_ADSTB

* ?FSB_1X =STANDARD

?FSB_ADDR * =STANDARD

=3x_DIELECTRIC*FSB_DSTB ?

=2x_DIELECTRIC ?*FSB_DATA

=3x_DIELECTRIC ?TOP,BOTTOMFSB_1X

=3x_DIELECTRIC ?TOP,BOTTOMFSB_ADDR

=5x_DIELECTRIC ?FSB_DSTB TOP,BOTTOM

* =1:1_DIFFPAIR =1:1_DIFFPAIRFSB_DSTB_50S =50_OHM_SE =50_OHM_SE =50_OHM_SE =50_OHM_SE


CPU/FSB Constraints

051-8071 B

9888

=2x_DIELECTRICTOP,BOTTOM ?CPU_AGTL

=4x_DIELECTRICFSB_DATA ?TOP,BOTTOM

=50_OHM_SE =STANDARD=50_OHM_SE=50_OHM_SEFSB_50S =STANDARD* =50_OHM_SE

=4x_DIELECTRIC ?FSB_ADSTB TOP,BOTTOM

14 10 7

14 10 7

14 10 7

14 10 7

14 10 7

14 10 7

14 10 7

14 10 7

14 10 7

14 10 7

14 10 7

14 10 7

14 10 7

14 10 7

14 10 7

14 10 7

14 10 7

14 10 7

14 10 9

14

14 10

14 10

14 10 7

14 10

14 10 7

14 10 7

14 10 7

14 13 10 9

14 10

14 10

10 9

14 10

14 10

14 10

14 10 9

14 10 9

61 42 14 10

14 13 10

14 10

14 10

42 14 10

14 10

14 10

61 14 10 9

14 10

14

14

14

14

14 10

14 10

14 13

14 13

14

14

10

61 21

61

26 10

10

10

10

10

13 10 6

10 6

13 10 6

13 10 6

13 10 6

13 10

13 10

13

61 11

61 11

61

61

61 9

11 9

14 10 7

14 10 7

14 10 7

14 10

14 10 7

14 10 7



APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD

TABLE_SPACING_ASSIGNMENT_ITEM






















































DDR2:

DDR3:

SOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Section 6.2

SOURCE: MCP79 Interface DG (DG-03328-001_v0D), Section 2.3

MCP MEM COMP Signal Constraints

SOURCE: MCP79 Interface DG (DG-03328-001_v0D), Section 2.3.4

A/BA/cmd signals should be matched within 5 ps of CLK pairs.

CLK intra-pair matching should be within 1 ps, inter-pair matching should be within 2 ps.

No DQS to clock matching requirement.

DQS intra-pair matching should be within 1 ps, inter-pair matching shoulw be within 180 ps

DQ signals should be matched within 5 ps of associated DQS pair.

DQ/A/BA/cmd signal spacing is 3x dielectric, DQS/CLK is 4x dielectric.

DQ/A/BA/cmd signal spacing is 3x dielectric, DQS/CLK is 4x dielectric.

Need to support MEM_*-style wildcards!

Memory Bus Spacing Group Assignments

All memory signals maximum length is 1.005 ps. CLK minimum length is 594 ps (lengths include substrate).

All memory signals maximum length is 1.005 ps. CLK minimum length is 594 ps (lengths include substrate).

Memory Bus Constraints

PHYSICALELECTRICAL_CONSTRAINT_SET SPACING

NET_TYPE

A/BA/cmd signals should be matched within 75 ps, no CLK matching requirement.

CLK intra-pair matching should be within 1 ps, inter-pair matching should be within 140 ps.

All DQS pairs should be matched within 100 ps of clocks.

DQS intra-pair matching should be within 1 ps, no inter-pair matching requirement.

DQ signals should be matched within 20 ps of associated DQS pair.

Memory Net Properties

MEM_40S_VDD MEM_CTRLMEM_B_CNTL MEM_B_CKE<3..0>

MEM_CLKMEM_A_CLK MEM_A_CLK_P<5..0>MEM_70D_VDD

MEM_40S_VDDMEM_A_CNTL MEM_CTRL MEM_A_CKE<3..0>

MEM_CLKMEM_A_CLK MEM_A_CLK_N<5..0>MEM_70D_VDD

MEM_40S_VDDMEM_A_CNTL MEM_A_ODT<3..0>MEM_CTRL

MEM_40S_VDDMEM_A_CNTL MEM_A_CS_L<3..0>MEM_CTRL

MEM_40SMEM_A_DQ_BYTE2 MEM_DATA MEM_A_DM<2>

MEM_40SMEM_A_DQ_BYTE3 MEM_A_DM<3>MEM_DATA




MEM_70D MEM_DQS MEM_A_DQS_P<3>MEM_A_DQS3


MEM_70D MEM_DQS MEM_A_DQS_N<0>MEM_A_DQS0


MEM_DQSMEM_A_DQS1 MEM_A_DQS_P<1>MEM_70D


MEM_DQS MEM_A_DQS_N<2>MEM_A_DQS2 MEM_70D





MEM_DQS MEM_A_DQS_P<6>MEM_A_DQS6 MEM_70D


MEM_40S_VDD MEM_CMDMEM_A_CMD MEM_A_BA<2..0>


MEM_40S MEM_A_DQ<7..0>MEM_A_DQ_BYTE0 MEM_DATA


MEM_40S MEM_DATA MEM_A_DQ<63..56>MEM_A_DQ_BYTE7

MEM_40S_VDDMEM_A_CMD MEM_CMD MEM_A_CAS_L

MEM_40SMEM_A_DQ_BYTE3 MEM_A_DQ<31..24>MEM_DATA

MEM_40S_VDD MEM_A_WE_LMEM_A_CMD MEM_CMD

MEM_40S MEM_DATA MEM_A_DQ<23..16>MEM_A_DQ_BYTE2


MEM_40S_VDD MEM_CMD MEM_A_RAS_LMEM_A_CMD

MEM_40SMEM_A_DQ_BYTE4 MEM_DATA MEM_A_DQ<39..32>

MEM_40SMEM_A_DQ_BYTE5 MEM_DATA MEM_A_DQ<47..40>

MEM_DATAMEM_40S MEM_B_DQ<47..40>MEM_B_DQ_BYTE5

MEM_DATA MEM_B_DQ<39..32>MEM_40SMEM_B_DQ_BYTE4



MEM_40S_VDD MEM_CMD MEM_B_WE_LMEM_B_CMD





MEM_DATAMEM_40S MEM_B_DM<0>MEM_B_DQ_BYTE0

MEM_40S_VDD MEM_CMD MEM_B_BA<2..0>MEM_B_CMD

MEM_DQSMEM_70D MEM_B_DQS_N<6>MEM_B_DQS6

MEM_DQSMEM_70D MEM_B_DQS_P<7>MEM_B_DQS7




MEM_DQS MEM_B_DQS_N<4>MEM_70DMEM_B_DQS4


















MEM_40S_VDD MEM_CTRLMEM_B_CNTL MEM_B_ODT<3..0>MEM_40S_VDD MEM_CTRLMEM_B_CNTL MEM_B_CS_L<3..0>

MEM_B_CLK MEM_B_CLK_N<5..0>MEM_CLKMEM_70D_VDD

MEM_B_CLK MEM_CLK MEM_B_CLK_P<5..0>MEM_70D_VDD

MCP_MEM_COMP_VDDMCP_MEM_COMPMCP_MEM_COMPMCP_MEM_COMP

MCP_MEM_COMP_GNDMCP_MEM_COMPMCP_MEM_COMPMCP_MEM_COMP



MEM_40S_VDD MEM_CMD MEM_B_CAS_LMEM_B_CMD

MEM_40S_VDD MEM_CMD MEM_B_RAS_LMEM_B_CMD

MEM_40S_VDD MEM_B_A<14..0>MEM_CMDMEM_B_CMD

MEM_40S_VDD MEM_A_A<14..0>MEM_CMDMEM_A_CMD


MEM_A_DQS_P<0>MEM_70D MEM_DQSMEM_A_DQS0


MEM_CMDMEM_DQS MEM_DQS2MEM*

MEM_DATA2MEM =3:1_SPACING* ?

25 MILMEM_2OTHER * ?

?=3:1_SPACINGMEM_DQS2MEM *

MEM_CMD * MEM_CMD2MEMMEM_CLK

MEM_CLK2MEM * ?=4:1_SPACING

MEM_DATA2DATA * ?=1.5:1_SPACING

*MEM_CMD MEM_CMD2MEMMEM_CTRL

*MEM_CMD MEM_CMD MEM_CMD2CMD

*MEM_CMD MEM_CMD2MEMMEM_DATA

MEM_CMD2MEMMEM_CMD *MEM_DQS

* MEM_DATA2MEMMEM_DATA MEM_CLK

=70_OHM_DIFF=70_OHM_DIFF* =70_OHM_DIFF=70_OHM_DIFF=70_OHM_DIFF =70_OHM_DIFFMEM_70D_VDD

MEM_CMD2MEM * ?=3:1_SPACING


Memory Constraints

89 98

B051-8071

MEM_CLK * MEM_DQS2MEMMEM_DQS

MEM_CTRL * MEM_DQS2MEMMEM_DQS

=70_OHM_DIFF=70_OHM_DIFF =70_OHM_DIFF =70_OHM_DIFF* =70_OHM_DIFF =70_OHM_DIFFMEM_70D

MEM_40S =STANDARD* =STANDARD=40_OHM_SE =40_OHM_SE =40_OHM_SE =40_OHM_SE

MEM_40S_VDD =40_OHM_SE=40_OHM_SE=40_OHM_SE =STANDARD* =STANDARD=40_OHM_SE

=1.5:1_SPACINGMEM_CMD2CMD * ?

MEM_CTRL2CTRL =2:1_SPACING* ?

MEM_CTRL2MEM * ?=2.5:1_SPACING

MEM_CTRL2CTRLMEM_CTRL *MEM_CTRL

MEM_DATA MEM_CTRL2MEM*MEM_CTRL

MEM_DQSMEM_CTRL * MEM_CTRL2MEM

MEM_DATA * MEM_DATA2MEMMEM_CTRL

MEM_CMD * MEM_CTRL2MEMMEM_CTRL

MEM_DATA *MEM_CLK MEM_CLK2MEM

MEM_DATA * MEM_DQS2MEMMEM_DQS

MEM_DQSMEM_DQS MEM_DQS2MEM*

=STANDARD7 MIL7 MILYMCP_MEM_COMP * =STANDARD =STANDARD

MCP_MEM_COMP 8 MIL* ?

MEM_2OTHERMEM_DQS **

MEM_DQS MEM_CLK2MEMMEM_CLK *

MEM_CMD MEM_CLK2MEMMEM_CLK *

MEM_CLK MEM_CTRL MEM_CLK2MEM*

MEM_CLK MEM_CLK MEM_CLK2MEM*

MEM_2OTHERMEM_DATA * *

MEM_2OTHERMEM_CTRL * *

MEM_2OTHERMEM_CLK **

MEM_DATA2MEMMEM_DATA *MEM_CMD

MEM_DATA MEM_DATA2DATAMEM_DATA *

MEM_DATA2MEMMEM_DATA *MEM_DQS

MEM_CTRL MEM_CTRL2MEMMEM_CLK *

MEM_2OTHERMEM_CMD **

28 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

27 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

28 15

16

16

27 15

27 15

28 15

28 15

28 15

27 15

27 15

27 15

27 15





APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D






































Digital Video Signal Constraints

- 50-ohm from first to second termination resistor.

SOURCE: MCP79 Interface DG (DG-03328-001_v0D), Section 2.7.1.

SOURCE: MCP79 Interface DG (DG-03328-001_v0D), Sections 2.5.3 & 2.5.4.

CRT signal single-ended impedence varies by location:

- 37.5-ohm from MCP to first termination resistor.

SATA Interface Constraints

- 75-ohm from output of three-pole filter to connector (if possible).

DisplayPort/TMDS intra-pair matching should be 5 ps. Inter-pair matching should be within 150 ps.

DIsplayPort AUX CH intra-pair matching should be 5 ps. No relationship to other signals.

Max length of LVDS/DisplayPort/TMDS traces: 12 inches.

LVDS intra-pair matching should be 5 mils. Pairs should be within 100 mils of clock length.


R/G/B signals should be matched as close as possible and < 10 inches.

Analog Video Signal Constraints

SOURCE: MCP79 Interface DG (DG-03328-001_v0D), Section 2.4


NET_TYPE

SPACINGPHYSICAL

PCI-Express

DISPLAYPORTDP_AUX_CH DP_100D DP_IG_AUX_CH_N

DISPLAYPORT DP_IG_ML_N<3..0>DP_ML DP_100D

TMDS_IG_TXD_P<2..0>DISPLAYPORTDP_100DTMDS_IG_TXD

PCIE_90D PCIE_EXCARD_R2D_C_NPCIE

PCIE_EXCARD_R2D PCIEPCIE_90D PCIE_EXCARD_R2D_C_P

PCIE_90D PCIE_EXCARD_D2R_NPCIE

PEG_CLK100M_PCLK_PCIE_100DMCP_PE0_REFCLK CLK_PCIE

CLK_PCIE PEG_CLK100M_NCLK_PCIE_100D

MCP_DV_COMP MCP_IFPAB_RSETMCP_IFPAB_RSET

MCP_IFPAB_VPROBE MCP_IFPAB_VPROBE

SATA_HDD_R2D_C_NSATASATA_100D

SATA_HDD_R2D SATA_100D SATA SATA_HDD_R2D_C_P

SATA_HDD_R2D_NSATASATA_100D

SATASATA_100D SATA_HDD_R2D_P

SATA_HDD_D2R SATA_HDD_D2R_PSATASATA_100D

SATA_HDD_D2R_C_PSATASATA_100D

SATA_HDD_D2R_NSATASATA_100D

SATA_ODD_R2D SATA_ODD_R2D_C_PSATASATA_100D

SATA_HDD_D2R_C_NSATASATA_100D

SATA_ODD_R2D_C_NSATASATA_100D

SATA_100D SATA_ODD_R2D_NSATA

SATA_100D SATA_ODD_R2D_PSATA

SATA_100D SATA_ODD_D2R_NSATA

SATA_ODD_D2R SATA_100D SATA SATA_ODD_D2R_P

SATA_100D SATA_ODD_D2R_C_PSATA

SATA_ODD_D2R_C_NSATASATA_100D

MCP_SATA_TERMP SATA_TERMP MCP_SATA_TERMP

DP_IG_AUX_CH_PDP_AUX_CH DP_100D DISPLAYPORT

LVDS_IG_B_CLK LVDS_100D LVDS LVDS_IG_B_CLK_N

LVDS_IG_B_DATA_P<3>LVDS_IG_B_DATA3 LVDS_100D LVDS

LVDS_IG_B_DATA_N<3>LVDS_IG_B_DATA3 LVDS_100D LVDS

LVDS_IG_A_DATA_P<3>LVDS_IG_A_DATA3 LVDS_100D LVDS

LVDS_IG_A_DATA_N<3>LVDS_IG_A_DATA3 LVDS_100D LVDS

LVDS_IG_A_DATA_N<2..0>LVDSLVDS_100DLVDS_IG_A_DATA

LVDS_IG_A_DATA_P<2..0>LVDSLVDS_100DLVDS_IG_A_DATA

LVDS_IG_B_DATA_N<2..0>LVDSLVDS_IG_B_DATA LVDS_100D

LVDS_IG_B_DATA_P<2..0>LVDS_IG_B_DATA LVDS_100D LVDS

LVDS_IG_B_CLK LVDS_100D LVDS LVDS_IG_B_CLK_P

CLK_PCIE PCIE_CLK100M_MINI_NCLK_PCIE_100D

PCIE_FW_R2D_C_NPCIE_90D PCIE

PEG_D2R_C_N<15..0>PCIE_90D PCIE

MCP_HDMI_VPROBEMCP_HDMI_VPROBE MCP_DV_COMP

CRT_SYNC CRT_50S CRT_IG_HSYNCCRT_SYNC

PCIE_MINI_R2D_NPCIE_90D PCIE

PCIE_90DPCIE_MINI_R2D PCIE PCIE_MINI_R2D_C_P

LVDS_IG_A_CLK_NLVDS_IG_A_CLK LVDS_100D LVDS

MCP_HDMI_RSETMCP_DV_COMPMCP_HDMI_RSET

DP_IG_ML_P<3..0>DISPLAYPORTDP_ML DP_100D

DP_100D DISPLAYPORT TMDS_IG_TXD_N<2..0>TMDS_IG_TXD

MCP_TV_DAC_VREFMCP_DAC_COMPMCP_DAC_VREF

MCP_TV_DAC_RSETMCP_DAC_COMPMCP_DAC_RSET

CRT_IG_VSYNCCRT_SYNC CRT_50S CRT_SYNC

CRT_IG_B_COMP_PBCRT_BLUE CRTCRT_50S

CRT_GREEN CRT_50S CRT_IG_G_Y_YCRT

CRT_RED CRT_IG_R_C_PRCRTCRT_50S

PCIE_90D PCIE_MINI_R2D_C_NPCIE

PCIE_90D PCIE PCIE_FW_R2D_P

PCIE_90D PCIE PCIE_FW_D2R_C_P

CLK_PCIE_100DMCP_PE1_REFCLK CLK_PCIE PCIE_CLK100M_MINI_P

MCP_PE2_REFCLK PCIE_CLK100M_FW_PCLK_PCIE_100D CLK_PCIE

PCIE_CLK100M_FW_NCLK_PCIECLK_PCIE_100D

PCIE_90DPCIE_EXCARD_D2R PCIE_EXCARD_D2R_PPCIE

PCIE_90D PCIE PCIE_FW_D2R_C_N

PCIE_90D PCIE PCIE_FW_D2R_NPCIE_90D PCIE PCIE_FW_D2R_PPCIE_FW_D2R

PCIE_90D PCIE PCIE_FW_R2D_C_PPCIE_FW_R2D

PCIE_90D PCIE PCIE_FW_R2D_N

PCIE_90D PCIE PEG_R2D_N<15..0>

PEG_D2R_P<15..0>PCIE_90D PCIEPEG_D2R

PEG_D2R_C_P<15..0>PCIE_90D PCIE

PEG_R2D_C_P<15..0>PCIE_90DPEG_R2D PCIE

PCIE_MINI_R2D_PPCIE_90D PCIE

PCIE_90D PCIE PEG_R2D_C_N<15..0>

PCIE_90DPCIE_MINI_D2R PCIE_MINI_D2R_PPCIE

PCIE_MINI_D2R_NPCIE_90D PCIE

PCIE_90D PCIE PEG_D2R_N<15..0>

PCIE_90D PCIE PEG_R2D_P<15..0>

PCIEPCIE_90D PCIE_EXCARD_R2D_N

PCIE_EXCARD_R2D_PPCIE_90D PCIE

CLK_PCIECLK_PCIE_100DMCP_PE3_REFCLK PCIE_CLK100M_EXCARD_P

MCP_PEX_CLK_COMPMCP_PEX_COMPMCP_PEX_CLK_COMP

TMDS_IG_TXC_NDP_100D DISPLAYPORTTMDS_IG_TXC

LVDS_IG_A_CLK_PLVDS_IG_A_CLK LVDS_100D LVDS

TMDS_IG_TXC_PDISPLAYPORTDP_100DTMDS_IG_TXC

PCIE_CLK100M_EXCARD_NCLK_PCIECLK_PCIE_100D

* ?CRT_2CRT =STANDARD

=100_OHM_DIFF=100_OHM_DIFFCLK_PCIE_100D =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF* =100_OHM_DIFF

50 MILCRT_2CLK * ?

DISPLAYPORT ?=4x_DIELECTRICTOP,BOTTOM

TOP,BOTTOM =4x_DIELECTRICLVDS ?

?*CRT =4:1_SPACING

PCIE =3X_DIELECTRIC ?*

8 MILMCP_PEX_COMP ?*

90 98

B051-8071


MCP Constraints 1

20 MILCLK_PCIE ?*

PCIE ?TOP,BOTTOM =4X_DIELECTRIC

PCIE_90D =90_OHM_DIFF =90_OHM_DIFF =90_OHM_DIFF =90_OHM_DIFF* =90_OHM_DIFF=90_OHM_DIFF

=3x_DIELECTRICLVDS * ?

MCP_DV_COMP =STANDARD=STANDARD=STANDARD20 MIL20 MILY*

=2:1_SPACING ?*MCP_DAC_COMP

16 MIL* ?CRT_SYNC

250 MILCRT_2SWITCHER ?*

*SATA =4x_DIELECTRIC ?

DISPLAYPORT ?* =3x_DIELECTRIC

=50_OHM_SE=50_OHM_SE =50_OHM_SE =STANDARD* =STANDARD=50_OHM_SECRT_50S

CRT CRT * CRT_2CRT

8 MILSATA_TERMP ?*

=100_OHM_DIFF=100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF* =100_OHM_DIFF=100_OHM_DIFFSATA_100D

=3x_DIELECTRICTOP,BOTTOM ?SATA

=100_OHM_DIFF =100_OHM_DIFFDP_100D =100_OHM_DIFF* =100_OHM_DIFF=100_OHM_DIFF =100_OHM_DIFF

=100_OHM_DIFF =100_OHM_DIFF=100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF*LVDS_100D =100_OHM_DIFF

81 18

81 9

31 17

31 17

31 17 7

69 17

69 17

24 18

24 18

38 20

38 20

38 7

38 7

38 20

38 7

38 20

38 20

38 7

38 20

38 7

38 7

38 20

38 20

38 7

38 7

20

81 18

18 9

18 9

18 9

18 9

18 9

84 18

84 18

84 18

84 18

18 9

30 17

35 17

69

24 18

24 18

30 7

30 17

84 18

24 18

81 9

24 18

24 18

24 18

24 18

24 18

24 18

30 17

35

35

30 17

35 17

35 17

31 17 7

35

35 17

35 17

35 17

35

69

69 9

69

69 9

30 7

69 9

30 17 7

30 17 7

69 9

69

31 7

31 7

31 17

17

84 18

31 17








APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D






































SMBus Interface Constraints

HD Audio Interface Constraints


SIO Signal Constraints

SOURCE: MCP79 Interface DG (DG-03328-001_v0D), Section 2.13.

SPI Interface Constraints


ELECTRICAL_CONSTRAINT_SET PHYSICAL

NET_TYPE

SPACING



USB 2.0 Interface Constraints


LPC Bus Constraints

PCI Bus Constraints

SMBUS_MCP_1_DATA SMBUS_MCP_1_DATASMBSMB_55S

SMBUS_MCP_1_CLK SMBUS_MCP_1_CLKSMBSMB_55S

MCP_HDA_COMP MCP_HDA_PULLDN_COMPMCP_HDA_PULLDN_COMP

HDA_SDOUT_RHDAHDA_55S

PCI_AD24 PCI PCI_AD<24>PCI_55S

PCI PCI_C_BE_L<3..0>PCI_55SPCI_C_BE_L

PCIPCI_AD PCI_PARPCI_55S

PCI_CNTL PCI PCI_IRDY_LPCI_55S

PCI_CNTL PCI PCI_PERR_LPCI_55S

PCIPCI_CNTL PCI_55S PCI_STOP_LPCI_CNTL PCI PCI_SERR_LPCI_55S

PCI_CNTL PCIPCI_55S PCI_TRDY_L

PCI_REQ0_L PCI PCI_REQ0_LPCI_55S

PCIPCI_CNTL PCI_FRAME_LPCI_55S

PCIPCI_REQ1_L PCI_REQ1_LPCI_55S

PCI PCI_GNT0_LPCI_55SPCI_GNT0_L

PCIPCI_GNT1_L PCI_GNT1_LPCI_55S

PCI PCI_INTX_LPCI_55SPCI_INTX_L

PCI_INTW_L PCI PCI_INTW_LPCI_55S

PCI_INTZ_L PCI PCI_INTZ_LPCI_55S

PCI_INTY_L PCI_INTY_LPCI_55S PCI

PCI_CLK33M_MCPCLK_PCI_55S CLK_PCI

MCP_PCI_CLK2 PCI_CLK33M_MCP_RCLK_PCI_55S CLK_PCI

LPC_55S LPCLPC_FRAME_L LPC_FRAME_LLPC_55SLPC_AD LPC LPC_AD<3..0>

LPC_55SLPC_RESET_L LPC LPC_RESET_L

MCP_LPC_CLK0 LPC_CLK33M_SMC_RCLK_LPC_55S CLK_LPC

LPC_CLK33M_SMCCLK_LPC_55S CLK_LPC

USB_EXTA_PUSB_90D USBUSB_EXTA

LPC_CLK33M_LPCPLUSCLK_LPC_55S CLK_LPC

USB_90D USB_EXTA_NUSB

USB_EXTA_MUXED_PUSB_90D USB

USB_EXTA_MUXED_NUSBUSB_90D

USB_MINI_PUSB_MINI USB_90D USB

USB_90D USB USB_MINI_N

USB_90D USB_EXTD_PUSBUSB_EXTD

USB_90D USB_EXTD_NUSB

USB_CAMERA_PUSBUSB_CAMERA USB_90D

USB_CAMERA_NUSB_90D USB

USB_BT_PUSB_BT USB_90D USB

USB_BT_NUSB_90D USB

USB_TPAD USB_TPAD_PUSB_90D USB

USB_TPAD_NUSB_90D USB

USB_IR USB_90D USB USB_IR_P

USB_IR_NUSB_90D USB

USB_EXTB_PUSB_EXTB USBUSB_90D

USB_EXTB_NUSBUSB_90D

USB_EXCARD_PUSB_EXCARD USBUSB_90D

HDA_SYNCHDAHDA_SYNC HDA_55S

HDA_BIT_CLK_RHDAHDA_55S

HDA_RST_R_LHDAHDA_55SHDA_RST_L

HDA_SYNC_RHDAHDA_55S

HDA_SDIN_CODECHDAHDA_55S

MCP_DEBUG<7..0>MCP_DEBUG PCIPCI_55S

PCI_AD<23..8>PCI_AD PCIPCI_55S

PCI_CNTL PCIPCI_55S PCI_DEVSEL_L

PCI_AD PCI_AD<31..25>PCIPCI_55S

SPI_CLK_RSPISPI_CLK SPI_55S

SPI SPI_CLKSPI_55S

MCP_SUS_CLK CLK_SLOW_55S CLK_SLOW PM_CLK32K_SUSCLK_R

SMB SMBUS_MCP_0_CLKSMBUS_MCP_0_CLK SMB_55S

HDA_BIT_CLKHDA_BIT_CLK HDAHDA_55S

SMB SMBUS_MCP_0_DATASMBUS_MCP_0_DATA SMB_55S

MCP_USB_RBIAS_GNDMCP_USB_RBIASMCP_USB_RBIAS

USB_EXCARD_NUSBUSB_90D

HDA_SDOUTHDAHDA_SDOUT HDA_55S

HDA_SDIN0HDA_SDIN0 HDAHDA_55S

HDA_RST_LHDAHDA_55S

SPISPI_55S SPI_CS0_L

USB_90D USB_EXTC_NUSB

USB_EXTC_PUSB_EXTC USBUSB_90D

SPISPI_55SSPI_CS0 SPI_CS0_R_LSPISPI_55S SPI_MISO_RSPISPI_MISO SPI_55S SPI_MISO

SPI_MOSISPISPI_55S

SPI_MOSI_RSPI_MOSI SPISPI_55S

CLK_SLOWCLK_SLOW_55S PM_CLK32K_SUSCLK

=2x_DIELECTRIC ?*SMB

* ?PCI =STANDARD

* ?CLK_PCI 8 MIL

=STANDARD* =STANDARD=55_OHM_SE =55_OHM_SE =55_OHM_SEPCI_55S =55_OHM_SE

=STANDARD =STANDARDCLK_SLOW_55S =55_OHM_SE =55_OHM_SE =55_OHM_SE =55_OHM_SE*

* =STANDARD=STANDARDHDA_55S =55_OHM_SE =55_OHM_SE =55_OHM_SE=55_OHM_SE

051-8071 B

9891


MCP Constraints 2

?* 8 MILCLK_LPC

* ?LPC 6 MIL

=STANDARD =STANDARD=55_OHM_SE =55_OHM_SE =55_OHM_SE =55_OHM_SECLK_LPC_55S *

=55_OHM_SE=55_OHM_SE=55_OHM_SE =STANDARDCLK_PCI_55S * =55_OHM_SE =STANDARD

=STANDARD=STANDARD* =55_OHM_SE =55_OHM_SE =55_OHM_SESPI_55S =55_OHM_SE

*SPI ?8 MIL

* ?USB =2x_DIELECTRIC

MCP_USB_RBIAS 8 MIL 8 MIL =STANDARD=STANDARD =STANDARD =STANDARD*

USB_90D =90_OHM_DIFF =90_OHM_DIFF =90_OHM_DIFF =90_OHM_DIFF=90_OHM_DIFF* =90_OHM_DIFF

=55_OHM_SE* =STANDARD =STANDARDSMB_55S =55_OHM_SE =55_OHM_SE =55_OHM_SE

=2x_DIELECTRICHDA * ?

?* 8 MILMCP_HDA_COMP

*CLK_SLOW ?8 MIL

USB ?TOP,BOTTOM =4x_DIELECTRIC

=STANDARD*LPC_55S =55_OHM_SE =55_OHM_SE =55_OHM_SE =55_OHM_SE =STANDARD

44 21

44 21

21

21

19

19

19

19

84 43 41 19 7

84 43 41 19 7

84 25 19

25 19

41 25

39 20

43 25 7

39 20

20 9

20 9

20 9

20 9

30 20

30 20

30 20

30 20

49 20

49 20

40 20

40 20

39 20

39 20

31 20

53 21

21

21

21

19 13

43 21

52

25 21

44 21 13 7

21 9

44 21 13 7

20

31 20

53 21

53 21

53 21

98 96 20

98 96 20

43 21

52

43 21

52

43 21

41 25













APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

SPACING

MCP RGMII (Ethernet) ConstraintsNET_TYPE

PHYSICALELECTRICAL_CONSTRAINT_SET

88E1116R (Ethernet PHY) Constraints

SOURCE: MCP73 Interface DG (DG-02974-001_v01), Sections 2.7.2 & 2.7.4


MCP_MII_COMP MCP_MII_COMP_VDDMCP_MII_COMP

ENET_MIIENET_MII_55S ENET_RXD_R<3..0>ENET_RXCLK ENET_MIIENET_MII_55S ENET_CLK125M_RXCLK

ENET_MII_55S ENET_MII ENET_CLK125M_RXCLK_R

ENET_MII_55S MCP_BUF0_CLK MCP_CLK25M_BUF0_RMCP_CLK25M_BUF0

MCP_MII_COMP MCP_MII_COMP_GNDMCP_MII_COMP

ENET_MIIENET_MII_55S ENET_RX_CTRLENET_RXD

ENET_TXCLK ENET_MIIENET_MII_55S ENET_CLK125M_TXCLK

ENET_TXD ENET_MII_55S ENET_MII ENET_TXD<3..1>ENET_TXD0 ENET_MIIENET_MII_55S ENET_TXD<0>

ENET_RESET_LENET_MII_55S ENET_MII

ENET_TXD ENET_TX_CTRLENET_MIIENET_MII_55S

ENET_MDI_100D ENET_MDI_N<3..0>ENET_MDI

ENET_MDI ENET_MDI_100D ENET_MDI_P<3..0>ENET_MDI

ENET_MIIENET_MII_55S ENET_RXD<3..1>ENET_RXD_STRAP

ENET_MIIENET_MII_55S ENET_RXD<0>ENET_RXD

ENET_MII_55S ENET_MDIOENET_MDIO ENET_MII

ENET_MIIENET_MII_55SENET_PWRDWN_L ENET_PWRDWN_LENET_MII_55S ENET_MIIENET_MDC ENET_MDC

ENET_MII ENET_INTR_LENET_MII_55SENET_INTR_L

ENET_MII_55S MCP_BUF0_CLK RTL8211_CLK25M_CKXTAL1

ENET_MDI * ?25 MIL

=100_OHM_DIFF =100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF* =100_OHM_DIFFENET_MDI_100D

* =STANDARD=STANDARDENET_MII_55S =55_OHM_SE =55_OHM_SE =55_OHM_SE =55_OHM_SE

MCP_MII_COMP * =STANDARD 7.5 MIL =STANDARD=STANDARD=STANDARD7.5 MIL

MCP_BUF0_CLK ?* =3:1_SPACING

12 MILENET_MII * ?

051-8071 B

9892

Ethernet ConstraintsSYNC_MASTER=M98_MLB SYNC_DATE=04/01/2008

18

32

32 18

32

33 18

18

32 18

32 18

32 18

32 18

32 18

32 18

34 32

34 32

32 18

32 18

32 18

32 18

33 32






APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D


FireWire Net Properties

SPACING

NET_TYPE

FireWire Interface Constraints

PHYSICAL

Port 2 Not Used

FW_TPFW_110D FW_P0_TPA_PFW_P0_TPA

FW_110D FW_TP FW_P0_TPA_NFW_P0_TPA

FW_110D FW_TP FW_P0_TPB_PFW_P0_TPB

FW_110D FW_TP FW_P0_TPB_NFW_P0_TPB

FW_P1_TPB_NFW_110D FW_TPFW_P1_TPB

FW_P1_TPB_PFW_110D FW_TPFW_P1_TPB

FW_P1_TPA_NFW_110D FW_TPFW_P1_TPA

FW_P1_TPA_PFW_110D FW_TPFW_P1_TPA


FireWire Constraints

93 98

B051-8071

=110_OHM_DIFF* =110_OHM_DIFF =110_OHM_DIFF =110_OHM_DIFFFW_110D =110_OHM_DIFF =110_OHM_DIFF

FW_TP ?=3:1_SPACING*

37 35

37 35

37 35

37 35

37 35

37 35

37 35

37 35




APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D

SMBus Charger Net Properties


NET_TYPE

PHYSICAL SPACING

SMC SMBus Net Properties

SPACINGPHYSICAL

NET_TYPE


1TO1_DIFFPAIR CHGR_CSO_NCHGR_CSO 1TO1_DIFFPAIR CHGR_CSO_P

CHGR_CSI 1TO1_DIFFPAIR CHGR_CSI_P

1TO1_DIFFPAIR CHGR_CSI_N

SMBSMBUS_SMC_A_S3_SCL SMBUS_SMC_A_S3_SCLSMB_55S

SMBSMBUS_SMC_A_S3_SDA SMBUS_SMC_A_S3_SDASMB_55S

SMB_55S SMBSMBUS_SMC_BSA_SDA SMBUS_SMC_BSA_SDA

SMB_55S SMBUS_SMC_MGMT_SDASMBUS_SMC_MGMT_SDA SMB

SMBUS_SMC_MGMT_SCL SMB_55S SMBUS_SMC_MGMT_SCLSMB

SMB_55S SMBUS_SMC_BSA_SCLSMBUS_SMC_BSA_SCL SMB

SMB_55S SMBSMBUS_SMC_0_S0_SDA SMBUS_SMC_0_S0_SDASMB_55S SMB SMBUS_SMC_0_S0_SCLSMBUS_SMC_0_S0_SCL

SMB_55S SMBUS_SMC_B_S0_SDASMBUS_SMC_B_S0_SDA SMB

SMB_55S SMBUS_SMC_B_S0_SCLSMBUS_SMC_B_S0_SCL SMB


SMC Constraints

94 98

B051-8071

1TO1_DIFFPAIR =STANDARD =STANDARD* 0.1 MM0.1 MM=STANDARD=STANDARD

60

60

60

60

44 7

44 7

44 7

44

44

44 7

44

44

44

44

















APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D






G96 Net Properties

(CK505_DOT96)

PHYSICAL

GDDR3 FB C/D Net Properties


NET_TYPE

From T18 MXM:

Digital Video Signal Constraints

SPACING

NET_TYPE

SPACINGPHYSICAL

NET_TYPE

GDDR3 FB A/B Net Properties

ELECTRICAL_CONSTRAINT_SET PHYSICAL

SPACING

NET_TYPE

PHYSICALELECTRICAL_CONSTRAINT_SET

MUXGFX Net Properties


Max length of LVDS/DisplayPort/TMDS traces: 12 inches.

GDDR3 Frame Buffer Signal Constraints

LVDS intra-pair matching should be 5 mils. Pairs should be within 100 mils of clock length.

DisplayPort/TMDS intra-pair matching should be 5 ps. Inter-pair matching should be within 150 ps.

DIsplayPort AUX CH intra-pair matching should be 5 ps. No relationship to other signals.

SPACING

GDDR3_40SEFB_C_DQM1 FB_B_DQM_L<1>GDDR3_DATA

GDDR3_40SEFB_D_WDQS1 GDDR3_DQS FB_B_WDQS<5>

GDDR3_40R55SE GDDR3_CMDFB_CD_CS1 FB_B_CS1_L

FB_B_CS0_LGDDR3_CMDFB_CD_CS0 GDDR3_40R55SE

GDDR3_40SE FB_A_DQ<7..0>GDDR3_DATAFB_A_DQ_BYTE0

GDDR3_40SE FB_A_DQ<31..24>GDDR3_DATAFB_A_DQ_BYTE3

GDDR3_40SE GDDR3_DATA FB_A_DQM_L<1>FB_A_DQM1

GDDR3_40SE GDDR3_DQSFB_B_WDQS0 FB_A_WDQS<4>

GDDR3_40SE FB_A_WDQS<5>FB_B_WDQS1 GDDR3_DQS

GDDR3_40SE FB_A_WDQS<6>GDDR3_DQSFB_B_WDQS2

FB_A_WDQS<7>GDDR3_40SE GDDR3_DQSFB_B_WDQS3

GDDR3_DQS FB_A_RDQS<4>GDDR3_40SEFB_B_RDQS0

FB_A_RDQS<5>GDDR3_40SE GDDR3_DQSFB_B_RDQS1

GDDR3_40SE FB_A_DQM_L<6>GDDR3_DATAFB_B_DQM2

FB_A_DQM_L<7>FB_B_DQM3 GDDR3_40SE GDDR3_DATA

GDDR3_CMDGDDR3_40R55SEFB_AB_CS1 FB_A_CS1_L

FB_AB_CS0 FB_A_CS0_LGDDR3_CMDGDDR3_40R55SE

GDDR3_DATAGDDR3_40SEFB_B_DQ_BYTE2 FB_A_DQ<55..48>

GDDR3_40SE FB_A_DQM_L<4>GDDR3_DATAFB_B_DQM0

GDDR3_CMD FB_A_DRAM_RSTFB_AB_CMD_PD GDDR3_40R55SE

GDDR3_CMDGDDR3_40SEFB_A_CMD FB_A_LMA<5..2>

GDDR3_40R55SE FB_B_DRAM_RSTFB_CD_CMD_PD GDDR3_CMD

GDDR3_40SE FB_B_LMA<5..2>FB_C_CMD GDDR3_CMD

GDDR3_40SE GDDR3_CMDFB_D_CMD FB_B_UMA<5..2>

GDDR3_40SEFB_C_WDQS0 GDDR3_DQS FB_B_WDQS<0>




GDDR3_40SEFB_C_RDQS0 GDDR3_DQS FB_B_RDQS<0>

GDDR3_40SE FB_B_RDQS<1>FB_C_RDQS1 GDDR3_DQS

GDDR3_40SE FB_B_RDQS<2>FB_C_RDQS2 GDDR3_DQS

GDDR3_40SE GDDR3_DATA FB_B_DQ<7..0>FB_C_DQ_BYTE0

GDDR3_40SE FB_B_DQ<23..16>FB_C_DQ_BYTE2 GDDR3_DATA


GDDR3_40SE FB_B_DQM_L<2>FB_C_DQM2 GDDR3_DATA

GDDR3_40SE FB_B_DQM_L<3>FB_C_DQM3 GDDR3_DATA




GDDR3_40SEFB_D_RDQS1 FB_B_RDQS<5>GDDR3_DQS

GDDR3_40SEFB_D_RDQS2 GDDR3_DQS FB_B_RDQS<6>

GDDR3_40SE GDDR3_DQS FB_B_RDQS<7>FB_D_RDQS3

GDDR3_40SE FB_B_DQ<39..32>GDDR3_DATAFB_D_DQ_BYTE0

GDDR3_40SEFB_D_DQ_BYTE1 FB_B_DQ<47..40>GDDR3_DATA

GDDR3_DATAGDDR3_40SE FB_B_DQM_L<4>FB_D_DQM0

FB_D_DQM1 GDDR3_40SE FB_B_DQM_L<5>GDDR3_DATA

FB_D_DQM2 FB_B_DQM_L<6>GDDR3_40SE GDDR3_DATA

FB_D_DQM3 GDDR3_40SE FB_B_DQM_L<7>GDDR3_DATA

DP_ML DP_EG_ML_P<3..0>DP_EG_ML_P<3..0>DISPLAYPORTDP_100D

DP_EG_ML_N<3..0>DP_100DDP_ML DP_EG_ML_N<3..0>DISPLAYPORT

DP_AUX_CH DISPLAYPORT DP_EG_AUX_CH_PDP_100D

DP_EG_AUX_CH_NDP_100DDP_AUX_CH DISPLAYPORT

DP_EG_AUX_CH_C_PDP_100D DISPLAYPORT

DP_EG_AUX_CH_C_NDP_100D DISPLAYPORT

LVDS_EG_B_DATA LVDS_100D LVDS LVDS_EG_B_DATA_N<2..0>

LVDS_EG_B_DATA LVDS_100D LVDS LVDS_EG_B_DATA_P<2..0>

FB_A_DQM_L<5>GDDR3_DATAGDDR3_40SEFB_B_DQM1

GDDR3_40SE GDDR3_DATA FB_A_DQ<47..40>FB_B_DQ_BYTE1

GDDR3_40SE FB_A_DQ<39..32>GDDR3_DATAFB_B_DQ_BYTE0

GDDR3_DATA FB_A_DQM_L<2>FB_A_DQM2 GDDR3_40SE

FB_A_DQM_L<0>GDDR3_40SE GDDR3_DATAFB_A_DQM0

FB_A_DQ<23..16>GDDR3_40SEFB_A_DQ_BYTE2 GDDR3_DATA

FB_A_DQ_BYTE1 GDDR3_40SE FB_A_DQ<15..8>GDDR3_DATA

GDDR3_40SE GDDR3_DQSFB_A_RDQS3 FB_A_RDQS<3>

FB_A_WDQS<3>GDDR3_DQSGDDR3_40SEFB_A_WDQS3

GDDR3_40SE GDDR3_DQS FB_A_WDQS<2>FB_A_WDQS2

FB_A_WDQS<1>GDDR3_DQSGDDR3_40SEFB_A_WDQS1

GDDR3_CMDGDDR3_40SE FB_A_UMA<5..2>FB_B_CMD

FB_A_CKEGDDR3_40R55SE GDDR3_CMDFB_AB_CMD_PD

LVDS_100D LVDS LVDS_B_DATA_P<2..0>LVDS_B_DATA

LVDSLVDS_100D LVDS_CONN_B_CLK_F_P

LVDS_100D LVDS LVDS_CONN_A_DATA_N<2..0>

LVDS_100D LVDS LVDS_CONN_B_CLK_P

LVDS_100D LVDS LVDS_CONN_B_CLK_F_N

LVDS_100D LVDS LVDS_CONN_A_DATA_P<2..0>

LVDS_100D LVDS LVDS_CONN_B_CLK_N

DP_ML_N<3..0>DISPLAYPORTDP_100D DP_ML_N<3..0>

DP_ML_CONN_N<3..0>DISPLAYPORTDP_100D

DP_ML_CONN_P<3..0>DP_ML DISPLAYPORTDP_100D

DP_ML DISPLAYPORTDP_100D DP_ML_C_P<3..0>

DISPLAYPORTDP_100D DP_ML_C_N<3..0>

DP_100DDP_ML DISPLAYPORT DP_ML_P<3..0>DP_ML_P<3..0>

LVDS_100D LVDS LVDS_CONN_B_DATA_P<2..0>

LVDSLVDS_100D LVDS_CONN_B_DATA_N<2..0>

LVDSLVDS_100D LVDS_CONN_A_CLK_N

LVDS_100D LVDS LVDS_CONN_A_CLK_P

LVDS_100D LVDS LVDS_CONN_A_CLK_F_P

LVDS_100D LVDS LVDS_CONN_A_CLK_F_N

DP_AUX_CH_C_NDISPLAYPORTDP_AUX_CH DP_100D

DP_AUX_CH_C_PDP_100DDP_AUX_CH DISPLAYPORT

GPU_CLK27M_SSCLK_SLOW_55SCK505_CLK27MSS CLK_SLOW

LVDS_100DLVDS_EG_A_CLK LVDS_EG_A_CLK_PLVDS

LVDS_100DLVDS_EG_A_CLK LVDS_EG_A_CLK_NLVDS

CLK_SLOW GPU_CLK27MCLK_SLOW_55S

FB_B_RDQS3 GDDR3_40SE FB_A_RDQS<7>GDDR3_DQS

GDDR3_40SE FB_A_RDQS<6>GDDR3_DQSFB_B_RDQS2

GDDR3_CLK FB_B_CLK_P<0>FB_C_CLK_P GDDR3_80D

GDDR3_40SE GDDR3_DQSFB_C_RDQS3 FB_B_RDQS<3>

GDDR3_40SEFB_D_RDQS0 GDDR3_DQS FB_B_RDQS<4>

GDDR3_40SE GDDR3_DQSFB_A_RDQS2 FB_A_RDQS<2>

FB_A_RDQS<1>GDDR3_40SE GDDR3_DQSFB_A_RDQS1

GDDR3_40SE GDDR3_DQS FB_A_RDQS<0>FB_A_RDQS0

GDDR3_CMDGDDR3_40R55SE FB_A_WE_LFB_AB_CMD

FB_A_RAS_LGDDR3_CMDGDDR3_40R55SEFB_AB_CMD

FB_A_BA<2..0>GDDR3_40R55SEFB_AB_CMD GDDR3_CMD

FB_A_MA<12..6>GDDR3_CMDGDDR3_40R55SEFB_AB_CMD

FB_A_CLK_P<0>GDDR3_CLKGDDR3_80DFB_A_CLK_P

FB_A_CLK_N<0>GDDR3_80D GDDR3_CLK

GDDR3_DQS FB_A_WDQS<0>GDDR3_40SEFB_A_WDQS0

GDDR3_CLK FB_B_CLK_N<0>GDDR3_80D

GDDR3_CLK FB_B_CLK_P<1>FB_D_CLK_P GDDR3_80D

GDDR3_CLK FB_B_CLK_N<1>GDDR3_80D

GDDR3_CMD FB_B_MA<1..0>FB_CD_CMD GDDR3_40R55SE

GDDR3_CMD FB_B_BA<2..0>FB_CD_CMD GDDR3_40R55SE

GDDR3_CMDFB_CD_CMD GDDR3_40R55SE FB_B_MA<12..6>

GDDR3_CMD FB_B_RAS_LFB_CD_CMD GDDR3_40R55SE

GDDR3_CMD FB_B_WE_LFB_CD_CMD GDDR3_40R55SE

GDDR3_CMD FB_B_CAS_LFB_CD_CMD GDDR3_40R55SE

GDDR3_CMD FB_B_CKEGDDR3_40R55SEFB_CD_CMD_PD


GDDR3_40SEFB_C_DQM0 FB_B_DQM_L<0>GDDR3_DATA

FB_D_DQ_BYTE3 FB_B_DQ<63..56>GDDR3_DATAGDDR3_40SE

FB_D_DQ_BYTE2 FB_B_DQ<55..48>GDDR3_DATAGDDR3_40SE

FB_A_CLK_P<1>GDDR3_80DFB_B_CLK_P GDDR3_CLK

GDDR3_CMDGDDR3_40R55SEFB_AB_CMD FB_A_MA<1..0>

GDDR3_CLK FB_A_CLK_N<1>GDDR3_80D

GDDR3_CMDGDDR3_40R55SEFB_AB_CMD FB_A_CAS_L

LVDS_A_CLK LVDS LVDS_A_CLK_PLVDS_100D

LVDS_B_CLK LVDS_100D LVDS_B_CLK_NLVDS

LVDS LVDS_B_DATA_N<2..0>LVDS_B_DATA LVDS_100D

LVDS_A_DATA_N<2..0>LVDS_A_DATA LVDS_100D LVDS

LVDS_A_DATA_P<2..0>LVDS_A_DATA LVDSLVDS_100D

LVDS_100DLVDS_A_CLK LVDS_A_CLK_NLVDS

LVDS_B_CLK_PLVDS_B_CLK LVDSLVDS_100D

LVDS_EG_A_DATA LVDS_100D LVDS LVDS_EG_A_DATA_N<2..0>

LVDS_EG_A_DATA LVDS_100D LVDS LVDS_EG_A_DATA_P<2..0>

GDDR3_DATAGDDR3_40SE FB_A_DQ<63..56>FB_B_DQ_BYTE3

FB_A_DQM_L<3>GDDR3_DATAFB_A_DQM3 GDDR3_40SE

?*LVDS =3x_DIELECTRIC

?GDDR3_DQS * =2.5:1_SPACING

=2.5:1_SPACING ?GDDR3_CMD *

=2.5:1_SPACING* ?GDDR3_CLK

=100_OHM_DIFF=100_OHM_DIFF =100_OHM_DIFF*LVDS_100D =100_OHM_DIFF =100_OHM_DIFF=100_OHM_DIFF

=4x_DIELECTRICDISPLAYPORT TOP,BOTTOM ?

=100_OHM_DIFFDP_100D =100_OHM_DIFF =100_OHM_DIFF* =100_OHM_DIFF=100_OHM_DIFF =100_OHM_DIFF

=3x_DIELECTRIC* ?DISPLAYPORT

=4x_DIELECTRICLVDS ?TOP,BOTTOM


95 98

B051-8071

SYNC_MASTER=M98_MLB

GPU (G96) Constraints

0.095 MM=80_OHM_DIFF=80_OHM_DIFFGDDR3_80D =80_OHM_DIFF* =80_OHM_DIFF =80_OHM_DIFF

0.095 MM=40_OHM_SE=40_OHM_SE =40_OHM_SEGDDR3_40SE * =STANDARD =STANDARD

0.095 MM*GDDR3_40R55SE =55_OHM_SE =STANDARD=STANDARD=40_OHM_SE 12.7 MM

=2.5:1_SPACING ?*GDDR3_DATA

I205I204

I203

I202

I201

I200

I199

I198

I197

I196

I195

I194

I193

I192

I191

I190

I185

I184

I183

I182

I161

I160

I159

I158

I157

I155

I153

I152

I149

I148

I145

I144

I143

I142

I139

I138

80 73 71

80 73 71

80 71

73 71 7

79 72 71 7

79 72 71 7

79 72 71

79 72 71

79 72 71

79 72 71

79 72 71

79 72 71

79 72 71

79 72 71

79 72 71

79 71

72 71

79 72 71 7

79 72 71

79 72 71

79 72 71

80 73 71

80 73 71

80 73 71

80 73 71

80 73 71

80 73 71

80 73 71

80 73 71

80 73 71

80 73 71

80 73 71 7

80 73 71 7

80 73 71 7

80 73 71

80 73 71

80 73 71

80 73 71

80 73 71

80 73 71

80 73 71

80 73 71

80 73 71 7

80 73 71 7

80 73 71

80 73 71

80 73 71

80 73 71

81 76

81 76

81 76

81 76

81

81

84 76

84 76

79 72 71

79 72 71 7

79 72 71 7

79 72 71

79 72 71

79 72 71 7

79 72 71 7

79 72 71

79 72 71

79 72 71

79 72 71

79 72 71

79 72 71

84 81 7

78 7

81 78 7

81 78

78 7

81 78 7

81 78

82 81

82

82

82

82

82 81

81 78 7

81 78 7

81 78

81 78

78 7

78 7

82 81

82 81

75

84 76

84 76

75

79 72 71

79 72 71

80 73 71

80 73 71

80 73 71

79 72 71

79 72 71

79 72 71

79 72 71

79 72 71

79 72 71

79 72 71

79 72 71

79 72 71

79 72 71

80 73 71

80 73 71

80 73 71

80 73 71

80 73 71 7

80 73 71 7

80 73 71

80 73 71

80 73 71 7

80 73 71

80 73 71 7

80 73 71

80 73 71 7

80 73 71 7

79 72 71

79 72 71

79 72 71

79 72 71

84 81

84 81

84 81 7

84 81 7

84 81 7

84 81

84 81 7

84 76 7

84 76

79 72 71 7

79 72 71



PHYSICAL_RULE_SETAREA_TYPENET_PHYSICAL_TYPETABLE_PHYSICAL_ASSIGNMENT_HEAD

OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE







TABLE_PHYSICAL_ASSIGNMENT_ITEM



















APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D



























































FLASH MEMORY BUS CONSTRAINTS

Alternate diffpair width/gap through BGA fanout areas (95-ohm diff)

Graphics ,SATA Constraint Relaxations

Forces power-referenced memory signals (CLK,ADDR,CTRL) to not route on ISL3, ISL4 & ISL10(GND-referenced planes).

Ground-referenced memory signals (DQ,DQM,DQS) MAY route on ISL9 (VDD-referenced plane)but not next to VDD island.

(USB_EXTA)

(USB_EXTA)

(USB_EXTA)

(USB_EXTD)

(USB_EXTD)

(USB_CAMERA)

(USB_CAMERA)

M99 Specific Net Properties

ELECTRICAL_CONSTRAINT_SETPHYSICAL

NET_TYPE

SPACING SPACING

NET_TYPE

PHYSICAL

(USB_EXTA)

Memory Constraint Relaxations

Allow 0.127 mm necks for >0.127 mm lines for GMCH fanout.

M99 Specific Net Properties


CLK_PCIE PCIE_CLK100M_FC_PCLK_PCIE_100DMCP_PE4_REFCLK

CLK_PCIECLK_PCIE_100D PCIE_CLK100M_FC_N

PCIE_90D PCIE PCIE_FC_R2D_C_PPCIE_FC_R2D

PCIE_90D PCIE PCIE_FC_R2D_C_N

PCIE_FC_D2R_PPCIE_FC_D2R PCIEPCIE_90D

SPKRAMP_L1_OUT_NAUDIODIFFPAIR

SPKRAMP_L2_OUT_NAUDIODIFFPAIR

USB_LT3_PUSB_90D USB

ASIC_CNTRLMEM2 FLSH_55S NF_CLE

ASIC_CNTRLMEM2 FLSH_55S NF_ALE

ASIC_CNTRLMEM2 FLSH_55S NF_CE0_L

ASIC_CNTRLMEM2 FLSH_55S NF_RE0_L

FLSH_55SASIC_CNTRLMEM2 NF_WE0_L

USB_90D USB_LT3_NUSB

AUDIO SPKRAMP_R1_OUT_NDIFFPAIR

PCIE_CLK100M_EXCARD_CONN_NCLK_PCIE_100D CLK_PCIE

PCIE_FC_R2D_NPCIE_90D PCIE

PCIE_90D PCIE_FC_R2D_PPCIE

SPK_OUT SPKRAMP_R1_OUT_PAUDIODIFFPAIR

CHGR_CSO_R_P1TO1_DIFFPAIR

CHGR_CSO_R_N1TO1_DIFFPAIR

USB_90D USB USB2_EXTA_MUXED_P

USB_90D USB2_LT1_PUSB

USB_90D USB USB2_LT1_N

USB_90D USB USB_CAMERA_CONN_P

USB_CAMERA_CONN_NUSBUSB_90D

CONN_USB2_BT_PUSBUSB_90D

USB2_EXCARD_CONN_PUSB_90D USB

USB2_EXCARD_CONN_NUSBUSB_90D

DISPLAYPORTDP_100D DP_IG_AUX_CH_C_P

DP_100D DISPLAYPORT DP_IG_AUX_CH_C_N

USB_90D USB CONN_TPAD_USB_P

USB_90D USB CONN_TPAD_USB_N

CONN_USB2_BT_NUSB_90D USB

NF_WE0_L_RFLSH_55SASIC_CNTRLMEM2

NF_RE0_L_RFLSH_55SASIC_CNTRLMEM2

ASIC_CNTRLMEM2 NF_CE1_L_RFLSH_55S

SPKRAMP_R2_OUT_NAUDIODIFFPAIR

SPKRAMP_R2_OUT_PAUDIOSPK_OUT DIFFPAIR

SENSE_1TO1_55SSENSE_DIFFPAIR DDRISNS_PSENSE

SENSE_1TO1_55S SENSE DDRISNS_N

SENSE_1TO1_55S SENSESENSE_DIFFPAIR P1V8GPU_P

P1V8GPU_NSENSE_1TO1_55S SENSE

SENSE_1TO1_55SSENSE_DIFFPAIR SENSE ISNS_CPU_P

SENSE_1TO1_55S SENSESENSE_DIFFPAIR DDRISNS_R_P

SENSE_1TO1_55S SENSE GPUISENS_N

USB_90D USB USB2_EXTA_MUXED_N

USB_LT2_PUSB_90D USB

SENSE DDRISNS_R_NSENSE_1TO1_55S

SENSE_1TO1_55S ISNS_CPU_NSENSE

CHGR_CSI_R_P1TO1_DIFFPAIR

CHGR_CSI_R_N1TO1_DIFFPAIR

SENSE_DIFFPAIR SENSE GPUISENS_PSENSE_1TO1_55S

CLK_PCIE PCIE_CLK100M_MINI_CONN_PCLK_PCIE_100D

PCIE_CLK100M_MINI_CONN_NCLK_PCIE_100D CLK_PCIE

THERM_1TO1_55S THERM CPU_THERMD_N

SENSE_1TO1_55S SENSE 1V05CPU_N

SENSE 1V05CPUISNS_R_NSENSE_1TO1_55S

MCPTHMSNS_D_NTHERMTHERM_1TO1_55S

MCPTHMSNS_D_PTHERM_1TO1_55S THERMMCPTHMSNS_D_DP

SENSESENSE_DIFFPAIR P1V8GPUISNS_R_PSENSE_1TO1_55S

SENSE P1V8GPUISNS_NSENSE_1TO1_55S

SENSESENSE_1TO1_55S P1V8GPUISNS_PSENSE_DIFFPAIR

PP1V5_S0SB_POWER

SB_POWER PP3V3_S0

ASIC_CNTRLMEM3 FLSH_55S NF_RE0_L

ASIC_CNTRLMEM2 FLSH_55S NF_CE1_L


NF_CLE_RFLSH_55SASIC_CNTRLMEM2

FLSH_55S NF_ALEASIC_CNTRLMEM3

FLSH_55S NF_CE0_LASIC_CNTRLMEM3

FLSH_55S NF_CE1_LASIC_CNTRLMEM3

ASIC_CNTRLMEM1 NF_CLE_RFLSH_55S

ASIC_CNTRLMEM1 NF_ALE_RFLSH_55S


ASIC_CNTRLMEM1 FLSH_55S NF_CE1_L_R

ASIC_CNTRLMEM1 NF_RE0_L_RFLSH_55S

ASIC_CNTRLMEM1 NF_WE0_L_RFLSH_55S

SENSE P1V8GPUISNS_R_NSENSE_1TO1_55S

SENSESENSE_1TO1_55S 1V05CPUISNS_R_PSENSE_DIFFPAIR

MCP_THMDIODE_PMCP_THERMD_DP THERMTHERM_1TO1_55S

THERM_1TO1_55S MCP_THMDIODE_NTHERM

ASIC_CNTRLMEM3 NF_WE0_LFLSH_55S

FLSH_55S NF_CLEASIC_CNTRLMEM3

NF_ALE_RFLSH_55SASIC_CNTRLMEM2

SENSE_DIFFPAIR 1V05CPU_PSENSESENSE_1TO1_55S

PCIE_CLK100M_EXCARD_CONN_PCLK_PCIE_100D CLK_PCIE

PCIE_FC_D2R_NPCIEPCIE_90D

USB_LT2_NUSB_90D USB

SPKRAMP_L1_OUT_PAUDIOSPK_OUT DIFFPAIR

SPKRAMP_L2_OUT_PAUDIOSPK_OUT DIFFPAIR

PP3V3_S5SB_POWER

SATA SATA_ODD_R2D_UF_PSATA_100D

SATA SATA_HDD_R2D_UF_NSATA_100D

THERMTHERM_1TO1_55S GPUTHMSNS_D_N

THERM GPU_TDIODE_PTHERM_1TO1_55SGPU_THERMD_DP

GPUTHMSNS_D_DP THERMTHERM_1TO1_55S GPUTHMSNS_D_P

THERM_1TO1_55S THERMCPU_THERMD_DP CPU_THERMD_P

THERMTHERM_1TO1_55S CPUTHMSNS_D2_N

SENSESENSE_1TO1_55S MCPCOREISNS_N

SATA SATA_HDD_R2D_UF_PSATA_100D

SATASATA_100D SATA_HDD_D2R_UF_N

SATA_HDD_D2R_UF_PSATA_100D SATA

SATA_100D SATA SATA_ODD_D2R_UF_N

SATA_ODD_D2R_UF_PSATA_100D SATA

SATA SATA_ODD_R2D_UF_NSATA_100D

ENETCONN_P<3..0>ENET_MDI_100D ENETCONN

ENETCONN ENETCONN_N<3..0>ENET_MDI_100D

SENSE_DIFFPAIR SENSESENSE_1TO1_55S MCPCOREISNS_P

THERM GPU_TDIODE_NTHERM_1TO1_55S

THERMTHERM_1TO1_55S CPUTHMSNS_D2_PCPUTHMSNS_D2_DP

USB_90D USB_EXTC_PUSB

SPKRAMP_LFE_OUT_NAUDIODIFFPAIR

SPKRAMP_LFE_OUT_PSPK_OUT AUDIODIFFPAIR

USB_EXTC_NUSBUSB_90D

GND GND

*GNDCLK_PCIE GND_P2MM

* GND_P2MMGNDPCIE

* GND_P2MMLVDS GND

SATA PWR_P2MMSB_POWER *

SB_POWER *CLK_PCIE PWR_P2MM

GND_P2MMUSB *GND

*GNDSATA GND_P2MM

* ?ENETCONN 25 MILS

Project Specific Constraints


96 98

B051-8071

SENSE_1TO1_55S =1:1_DIFFPAIR=55_OHM_SE* =55_OHM_SE=1:1_DIFFPAIR =1:1_DIFFPAIR=55_OHM_SE

GND_P2MM*CPU_GTLREF GND

*CPU_COMP GND_P2MMGND

ENET_MDI GND * GND_P2MM

CPU_VCCSENSE GND_P2MMGND *

ISL3,ISL10 NMEM_70D_VDD

MEM_CMD GND_P2MMGND *

FSB_DSTB * GND_P2MMFSB_DSTB

=STANDARD=55_OHM_SE =55_OHM_SE =STANDARD=55_OHM_SE* =55_OHM_SEFLSH_55S100_DIFF_BGASATA_100D BGA

DP_100D BGA 100_DIFF_BGA

LVDS_100D 100_DIFF_BGABGA

1000*GND_P2MM 0.20 MM

GND_P2MMCLK_FSB *GND

GND ?* =STANDARD

BOTTOM 0.127 MMMEM_70D 6.35 MM

PWR_P2MMUSB *SB_POWER

PP1V8_MEM * ?=STANDARD

MEM_40S * 100 MIL0.09 MM

100 MIL0.09 MM*MEM_40S_VDD

*MEM_70D 0.09 MM 100 MIL

*MEM_70D_VDD 0.09 MM 100 MIL

0.1 MMTOPUSB_90D 500 MIL

PCIE_90D 0.09 MM* 100 MIL

0.1 MMTOPMCP_DV_COMP 500 MIL

0.1 MMTOPMCP_MEM_COMP 500 MIL

0.1 MMTOPMCP_MII_COMP 500 MIL

MEM_70D ISL4,ISL9

MEM_40S_VDD NISL3,ISL10

ISL4,ISL9MEM_40S

0.1 MMMCP_USB_RBIAS TOP 500 MIL

CPU_27P4S 0.23 MMBOTTOM 100 MIL

MCP_DV_COMP * 0.25 MM 250 MIL

* 1000PWR_P2MM 0.20 MM

=1:1_DIFFPAIR =55_OHM_SE*THERM_1TO1_55S =1:1_DIFFPAIR =1:1_DIFFPAIR=55_OHM_SE=55_OHM_SE

DIFFPAIR * =1:1_DIFFPAIR =1:1_DIFFPAIR =1:1_DIFFPAIR =1:1_DIFFPAIR

* ?SENSE =2:1_SPACING

* ?AUDIO =2:1_SPACING

?THERM * =2:1_SPACING

MEM_CLK GND_P2MMGND *

MEM_CTRL GND_P2MM*GND

MEM_DATA GND_P2MMGND *

GND_P2MMMEM_DQS *GND

I248

I247

I246

I245

I244

I243

I242

I241

I240

I239

I238

I237

I236

I235

I234

I233

I232

I231

I230

I229

I228

I227

I226

I225

I224

I223

I212

I211

I210

I209

I207

I206

I202

I201

I200

I199

I198

I197

I196

I195

I194

I193

I192

I191

I190

I189

I188

I187

I186

I185

I184

I183

I182

I181

I180

I179

I178

I177

I176

I175

I174

I173

I172

I171

I170

I169

I168

I167

I166

I165

I160

I159

I158

I157

I156

I155

I154

I153

I152

I151

I150

I149

I148

I147

I146

I145

I144

I143

I142

I141

I140

I139

I138

I137

I136

I135

I134

I133

I132

I131

I130

I129

I128

I127

I126

I125

I124

57 56 7

57 56 7

98 7

96

96

96

96

96

98 7

57 56 7

31 7

57 56 7

60 45

60 45

39

39 7

39 7

30 7

30 7

30 7

31 7

31 7

81

81

30 7

96

96

96

57 56 7

57 56 7

46

46

46

46

45

46

46

39

39 7

46

45

60

60

46

30 7

30 7

47 10

65 46

46

47 7

47 7

46

9 8 7

96

96

96

96

96

96

96

96

96

96

96

96

96

46

46

47 21

47 21

96

96

96

65 46

31 7

39 7

57 56 7

57 56 7

8 7

38

38

47

75 47

47

47 10

47

64 46

38

38

38

38

38

38

34

34

64 46

75 47

47

98 91 20

57 56 7

57 56 7

98 91 20


















TABLE_PHYSICAL_RULE_ITEM TABLE_SPACING_RULE_ITEM
















































APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D























TABLE_BOARD_INFO

VERSIONALLEGRO

(MIL or MM)BOARD UNITSBOARD LAYERS BOARD AREAS

NOTE:From T18 MLB, changed to reflect M99 stackup.

NOTE: 100_DIFF_BGA is 100-ohms differential impedance on outer layers and 95-ohms on inner layers.

M99 Board-Specific Spacing & Physical Constraints

=STANDARD0.250 MM0.250 MM =STANDARD27P4_OHM_SE Y* =STANDARD

0.095 MM0.310 MM27P4_OHM_SE YTOP,BOTTOM

=STANDARD=STANDARD =STANDARD110_OHM_DIFF * =STANDARD=STANDARDN

0.330 MM0.077 MMISL3,ISL4 0.077 MM110_OHM_DIFF 0.330 MMY

0.089 MM 0.089 MMTOP,BOTTOM100_OHM_DIFF Y 0.220 MM0.220 MM

0.089 MMY100_OHM_DIFF ISL2,ISL11 0.220 MM 0.220 MM0.089 MM

BGA BGA_P2MM*CLK_FSB

?*3:1_SPACING 0.3 MM

2.5:1_SPACING ?* 0.25 MM

2:1_SPACING ?0.2 MM*

=DEFAULT* ?BGA_P3MM

0.1 MM*DEFAULT ?

BGA* BGA_P2MMMEM_CLK

CLK_SLOW * BGA_P2MMBGA

FSB_DSTB BGA_P3MMFSB_DSTB BGA

0.280 MM*4X_DIELECTRIC ?

0.210 MM3X_DIELECTRIC * ?

TOP,ISL2,ISL3,ISL4,ISL5,ISL6,ISL7,ISL8,ISL9,ISL10,ISL11,BOTTOM 15.5.1MMNO_TYPE,BGA

=50_OHM_SEY* 0 MMDEFAULT 0 MM=50_OHM_SE 10 MM

0.090 MM55_OHM_SE TOP,BOTTOM Y 0.090 MM

=STANDARD=STANDARD0.090 MM* Y50_OHM_SE =STANDARD0.090 MM

0.160 MM0.160 MM 0.175 MM0.175 MMY70_OHM_DIFF ISL3,ISL4

=STANDARDN =STANDARD80_OHM_DIFF * =STANDARD =STANDARD=STANDARD

0.190 MM 0.190 MM0.140 MM80_OHM_DIFF TOP,BOTTOM Y 0.095 MM

0.140 MM 0.190 MM0.190 MM0.140 MM80_OHM_DIFF ISL2,ISL11 Y

0.180 MM 0.180 MM0.125 MM0.125 MM80_OHM_DIFF YISL9,ISL10

0.180 MM0.180 MM0.125 MM0.125 MMYISL3,ISL480_OHM_DIFF

0.135 MM =STANDARD0.135 MM =STANDARD =STANDARD*40_OHM_SE Y

0.160 MM0.160 MM 0.175 MM 0.175 MMY70_OHM_DIFF ISL9,ISL10

5X_DIELECTRIC 0.350 MM* ?

97 98

B051-8071


PCB Rule Definitions

BGA BGA_P1MM* *

* =DEFAULTBGA_P2MM ?

=DEFAULT ?BGA_P1MM *

STANDARD * =DEFAULT ?=DEFAULT=DEFAULT* =DEFAULT =DEFAULTSTANDARD Y 10 MM

0.076 MM0.076 MM =STANDARD=STANDARD* =STANDARD55_OHM_SE Y

1.8:1_SPACING 0.18 MM ?*YTOP,BOTTOM50_OHM_SE 0.095 MM0.110 MM

0.095 MMTOP,BOTTOM 0.165 MMY40_OHM_SE

=STANDARD =STANDARD=STANDARD*70_OHM_DIFF N =STANDARD =STANDARD

0.150 MM0.150 MM0.170 MMY70_OHM_DIFF ISL2,ISL11 0.170 MM

0.170 MM 0.150 MM 0.150 MMTOP,BOTTOM Y70_OHM_DIFF 0.095 MM

=STANDARD =STANDARD 0.1 MM 0.1 MMY*1:1_DIFFPAIR =STANDARD

0.140 MM ?*2X_DIELECTRIC

1.5:1_SPACING ?* 0.15 MM

0.102 MM 0.102 MM 0.220 MMISL9,ISL1090_OHM_DIFF Y 0.220 MM

0.102 MMISL3,ISL490_OHM_DIFF Y 0.102 MM 0.220 MM 0.220 MM

=STANDARD=STANDARD=STANDARD=STANDARD =STANDARDN*90_OHM_DIFF

BGACLK_PCIE * BGA_P2MM

=100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF* =100_OHM_DIFF=100_OHM_DIFF100_DIFF_BGA

0.075 MM 0.125 MM 0.125 MMISL3,ISL4 Y 0.075 MM100_DIFF_BGA

0.075 MM 0.125 MM 0.125 MMYISL9,ISL10 0.075 MM100_DIFF_BGA

Y110_OHM_DIFF TOP,BOTTOM 0.077 MM 0.077 MM 0.330 MM 0.330 MM

0.077 MMISL2,ISL11110_OHM_DIFF Y 0.330 MM 0.330 MM0.077 MM

0.077 MM 0.330 MMY 0.077 MM110_OHM_DIFF 0.330 MMISL9,ISL10

?* 0.4 MM4:1_SPACING

0.200 MM0.080 MM 0.200 MMY100_OHM_DIFF ISL9,ISL10 0.080 MM

0.080 MMYISL3,ISL4100_OHM_DIFF 0.200 MM0.200 MM0.080 MM

=STANDARD =STANDARD100_OHM_DIFF * N =STANDARD=STANDARD=STANDARD

0.115 MM90_OHM_DIFF TOP,BOTTOM Y 0.230 MM0.230 MM0.095 MM

0.115 MM90_OHM_DIFF ISL2,ISL11 Y 0.115 MM 0.230 MM 0.230 MM

OUT

BI

SYM_VER-1

BI

IO

IO

NC

GND

VBUS

NC

TPAD

OUT1

GND

OC*

EN*

IN2

IN1

OUT2

OUT3

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1






DRAWING NUMBER

SHT OF

SIZE

D


Port Power Switch

PLACE LC320 AND LC325 AT CONNECTOR PIN

ENABLE TIED LOW SO INPUT POWER SOURCE MUST BE S3!!!

LEFT USB PORT C

USB_EXTC_N

PP5V_S3_RTUSB_C_ILIM


=PP5V_S3_RTUSB

USB_EXTC_P

USB_EXTC_OC_L

PP5V_S3_RTUSB_C_FMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.375 mmVOLTAGE=5V

USB_LT3_P

USB_LT3_N

JC3201 CONN,RCPT,USB,HB,4P514-0638 CRITICAL

PROJECT SPECIFIC CONNS

98 98

B051-8071

SYNC_MASTER=N/A SYNC_DATE=N/A

9

8

7

6

5

3

2

1

4

UC380TPS2068

MSOP

CRITICAL

8

7

6

5

4

3

2

1

JC320

OMIT

USB

CRITICAL

F-RT-TH-M97-3

6

32 45

1

DC320

SLP1210N6

RCLAMP0502N

CRITICAL

21

LC325CRITICAL

0603

FERR-220-OHM-2.5A

20 91 96

2

1CC325

16V

402CERM

0.01uF20%

4 3

21

LC320CRITICAL

DLP11S90-OHM-100MA

20 91 96

2

1 CC386

CASE-B2-SM

6.3VPOLY-TANT

100UF20%

CRITICAL

2

1CC385

20%

603X5R

6.3V

10UF

20

2

1 CC3810.1UF20%10VCERM402

2

1CC380

6.3V20%

X5R

10UF

603

8 39 7

7 96

7 96

schematic,folsten mbp17 · 2018-09-13 · pg 71 conn pg 71 conn j4520 pg 17 (up to 12 devices) 4...

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