scalabilty: from prototypes to instruments · scalability: from prototypes to instruments •...
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Scalability:
From Prototypes to Instruments
Sven Herrmann
DOE BES Neutron & Photon Detectors Workshop, August 1-3, 2012
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Scalability: From Prototypes to Instruments
Scalability: from Prototypes to Instruments 2
usually results in significant
challenges for:
• power supply (and biasing)
• cooling
• data transport and handling
• crosstalk
• reliability
increased complexity which is handled by tradeoffs, ideas and manpower
SCALING UP
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Outline
Scalability: from Prototypes to Instruments
• Detector scaling: historic mindset
• Development philosophy that helps
• Scaling ASICs
• Scaling modules
• Scaling cameras
• Ease of use
looking into examples
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Scaling UP of detector systems: the historical mindset
Scalability: from Prototypes to Instruments
• ASIC size practically limited by reticle
• Scaling paradigm: tile !
• bumping multiple ASICs to PAD detectors
• excessive module tiling “normal”
• parallel readout part of the concept
->backend often data bottleneck
• CCDs size limited by wafer size
• Scaling paradigm : get bigger !
• XMM pnCCD 4’’ wafers
• CAMP pnCCD 6’’ wafers
• CCDs work serially
->frontend often the bottleneck
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Needs, Specs and the definition of Quality
Scalability: from Prototypes to Instruments
American Society for Quality:
• The characteristics of a product or service that bear on its ability
to satisfy stated or implied needs.
Needs from whom ?
• User and beamline scientists
• Detector and DAQ group
• Many others which interact with the “detector system”
Needs are diverse :
• raw performance numbers
• scalability / modularity
• ease of deployment / ease of use
• reliability / effective uptime
will your detector system
be fit for its purpose ?
QM
Quality can be
designed :
the needs of the final camera have to be addressed early on
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The development path from the small to the big –
platform strategy
Scalability: from Prototypes to Instruments
We want a quick development path and efficient scaling up !
We don’t want to design a special set of PCBs / DAQ / software blocks
• for every prototype
• one for the small cameras
• and another one for the big cameras
Instead utilize a common platform strategy
Effort gets focused into the design of a flexible, general purpose system
concept which gets used early on in the development process.
• Hardware can grow with the development
• Software and Firmware gains maturity from real use
• System can be used early on in real experiments
• Experience gained can go back into the development
early prototypes have to use the (almost) final
IO interfaces -> need flexible, abstract interfaces
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Example of a Platform:
CSPAD ASIC tests / CSPAD hutch use
Scalability: from Prototypes to Instruments
Same hardware and software can be used for ASIC development
and for experiments !
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The development path from the small to the big –
on chip debugging
Scalability: from Prototypes to Instruments
Circuit simulations have to be complemented by real measurements:
debugging capability should be a integral part of the detector design
• to aid the development
• to aid the troubleshooting at the hutch !
• system should support housekeeping
• digital read back capability of all internal registers
• observability of (analog) intermediate signals
(debugging of complex performance issues, radiation effects, …)
(compare this trend to the development of on chip in circuit emulator technology
for microcontrollers by the end of the 90s … or chipscope for the FPGA guys)
abstract, flexible, protocol based interfaces to get
this information out of the front end chips
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Example on observability: MPI-HLL VERITAS & pnCCD
Scalability: from Prototypes to Instruments
pnCCD
shift and readout
pnCCD JFET
source voltage
VERITAS
preamp
output
electrons shifted
to pnCCD anode
pnCCD autoreset
system debugging features aid
• understanding detector behavior
• determination of optimal detector operating conditions
-> therefore the development of detectors
is accelerated by this FE ASICs
Herrmann Sven, Asteroid and Veritas, presented at the FEE2011
pnCCD clocked reset
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Scalability of ASICs - IO Interfaces
Scalability: from Prototypes to Instruments
To ease the combination of multiple ASICs on a single module
the front end interfaces should be compact:
• small pin count
• busing capability (slow control)
• serialized high speed data interfaces
• minimize the need for PCB support electronics
Electronics integrated into the balcony is often
cheaper and more reliable than having it on the PCBs.
(biases and references, ramps, various different clocks)
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Scalability of ASICs - power and cooling
Scalability: from Prototypes to Instruments
Power scales against us:
• larger ASICs need more total current
• have larger power distribution resistance (balcony!)
• increased pixel density and raw performance pushes power
demand of ASICs
larger voltage drops & potential power crosstalk (PSRR)
Module technology has to take care of this !
Cooling of modules gets more and more demanding:
• ASICs power demand
• larger modules
• less dead area
heat has to go out -
but first the power has to go in !
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Module carriers and printed circuit boards
Scalability: from Prototypes to Instruments
The carrier has to hold the detector module, bring in the power, provide
the communication wiring and take out the heat load.
Compact designs with small gaps for tiling modules are desired.
Various options available:
• aluminum oxide or aluminum nitride ceramic circuit boards
technologies: thin film, thick film, LTCC, HTCC
• PCBs in FR4, FR5, polyimide, PTFE with glass or ceramic
• (rigid -) flex PCBs in polyimide (and FR4)
• aluminum, ceramic (ALO, ALN), kovar, carbon fiber,
silicon, silicon nitride, silicon carbide, …
as thermal / mechanical interface
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Examples for Modules: PSI - PILATUS I
Scalability: from Prototypes to Instruments
http://pilatus.web.psi.ch/pilatus.htm
• 16 ASICs
• 217um pixel size
• 366 x 157 pixels/sensor
• flex PCB glued and bended over
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Examples for modules: PSI - PILATUS II
Scalability: from Prototypes to Instruments
http://pilatus.web.psi.ch/pilatus.htm
• 16 ASICs
• 172um pixel size
• 195 x 487 pixels/sensor
• stiffened flex PCB with connector
soldered on the back side
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Examples for modules : SOLEIL - XPAD3
Scalability: from Prototypes to Instruments
• 7 ASICs
• 130um pixel size
• 120 x 560 pixels/sensor
• flex PCB glued and bended over
support electronics on module PCB
www.synchrotron-soleil.fr/Soleil/ToutesActualites/2012/DetecteursXPAD
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Examples for modules: LBNL - FCCD
Scalability: from Prototypes to Instruments
• 960 x 1920 pixels/sensor
• kapton flex PCB
• glued on a silicon carbide carrier
• No ASICs on the module
(cooling!)
www.aps.anl.gov/Xray_Science_Division/Detectors/Development/FCCD/
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Examples for modules : MPI HLL - pnCCD in CAMP
Scalability: from Prototypes to Instruments
• ceramic thick film technology
• pnCCDs with 512 x 1024 pixels/sensor
• 2 ceramic hybrids holding 4 ASICs each
• 2 flex leads connect to the support electronics
behind the detector
MPI-Halbleiterlabor
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Examples for modules: DESY - Medipix Lambda
Scalability: from Prototypes to Instruments
David Pennicard et al, Development of LAMBDA: Large Area Medipix-Based Detector Array, JINST 2011
• 12 ASICs
• LTCC ceramic with backside connector
• heat spreader
• also designed for use with a germanium
PAD detector at around -70C
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Examples for modules: SLAC - CSPAD
Scalability: from Prototypes to Instruments
Rigid flex PCB holds 2 ASICs
2 PCBs holding 4 ASICs
glued on an aluminum carrier
2 flex leads connect to the support electronics
CSPAD ASIC designed by Cornell University
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Scaling and module limitations
Scalability: from Prototypes to Instruments
Most current designs use wire bonding to the front end ASICs and
locate some support electronics behind the ASICs/detector
• wire bonds are dead area
• connectors and support electronics limit thermal interface area
• we might need local power regulators for next generation ASICs
• FR4 limited by thermal performance
• LTCC limited by density and cost
• FLEX circuits limited by thermal-mechanical issues
modules should enable excessive tiling
(4 side buttable) with good thermal performance
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Advanced modules of the next generation
Scalability: from Prototypes to Instruments
TIMEPIX / MEDIPIX TSV modules (RELAXD)
www.nikhef.nl/en/business-collaboration/relaxd/
Deptuch, G.W. et al
Vertically Integrated Circuits at Fermilab
IEEE NS 2010
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carrier / interposer
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Advanced modules of the next generation
Scalability: from Prototypes to Instruments
• novel detectors (edgeless, high-Z, …)
• 3D ASICs
• new interconnect technologies
ASIC-detector and ASIC-carrier
• Innovative materials for carriers
for cooling and power distribution
• advanced high speed IO interfaces
• and connectors
• clever power and cooling concepts
power / cooling and IO density likely to limit
future performance
connector
detector
ASIC tier 1
ASIC tier 2
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Examples for cameras : PSI - PILATUS II
Scalability: from Prototypes to Instruments
Christian Broennimann, The PILATUS Detector for Protein Crystallography, presented at SNIC2006
• 172um pixel size
• 195 x 487 pixels/sensor
• 6M camera
• 12.5fps @ 20bit
Detector
modules
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Examples for cameras: PSI - EIGER
Scalability: from Prototypes to Instruments
• 75um pixels
• 512 x 1024 pixels/sensor
• 4M (9M) pixel camera
• 22kHz (4bit)
Valeria Raddici, EIGER a new single photon counting detector for X Ray applications: performance of the chip,
presented at the PSD9 2011
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Examples for cameras: XFEL - DSSC
Scalability: from Prototypes to Instruments
• 200um pixels
• 100 x 100 pixels/sensor
• 1M pixel camera
• 6000fps @ 8bit
• (4.5Mfps recording rate!)
http://hasylab.desy.de/instrumentation/detectors/projects/dssc/index_eng.html
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Examples for cameras: SLAC - CSPAD
Scalability: from Prototypes to Instruments
• 110um pixels
• 185 x 388 pixels/sensor
• 2.3M pixel camera
• 120fps @ 14bit
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Examples for cameras: SACLA - MPCCD
Scalability: from Prototypes to Instruments
• 50um pixels
• 512 x 1024 pixels/sensor
• 4M pixel camera
• 60fps @ 16bit
Tetsuya Ishikawa, Status of SACLA, presented at European XFEL Users Meeting 26 January 2012
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Camera assembly concepts
Scalability: from Prototypes to Instruments
Tower concepts
• preferred (needed) for high frame rates
• very modular
• one size fits all paradigm
• lots of (expensive, redundant) PCB level electronics
Flat concepts
• suitable for moderate frame rates
• limited modularity
• dedicated PCBs for different sizes paradigm
• cost effective solution for PCB electronics
Hierarchical concepts
• preferred for huge detectors where heavy data reduction
is implemented -> HEP vertex detectors
PCB electronics scales with the camera data rate (-density)
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Ease of use of cameras: backsides
Scalability: from Prototypes to Instruments
Dectris
Pilatus-6M
12fps
MPI-HLL
pnCCD 1M
120fps
SLAC
CSPAD 2.3M
120fps
mar (rayonix)
MX325 (16M)
1fps
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Ease of use of cameras
Scalability: from Prototypes to Instruments
• low pin count
• simple vacuum feed troughs
• optical data interfaces
• easy assembly / installation
• power on test
• debugging aids
• calibration aids
compact is premium:
a compact detector can fit more
easily in a given experiment setup
(also a large area detector
can be compact !)
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Personal Summary
Scalability: from Prototypes to Instruments
• Platform strategy:
our electronics and cameras speak a common language for easy integration
• common hardware design
• common software design
• common simple fiber optic interfaces
• LCLS 120Hz frame rate can be handled by compact (flat) PCB electronics
• 2 sizes fit all:
• large 4 side buttable modules and modular PCBs for large area cameras
• smaller modules and compact PCB(s) for specialized detector assemblies
• Future cameras build upon our vacuum compatible, compact designs
with incremental improvements on
• ease of use on assembly and maintenance
• thermal performance
• active area
• R&D on advanced 4 side buttable modules with excellent cooling capabilities on the wish-list
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Scaling getting messy
Scalability: from Prototypes to Instruments