SAT Sweeping with Local Observability Don’t-Cares

Qi Zhu1 Nathan Kitchen1

Andreas Kuehlmann1,2 Alberto Sangiovanni-Vincentelli1

1 University of California at Berkeley2 Cadence Berkeley Labs

July 25, 2006

Outline

Background AND/INV Graph

SAT Sweeping

Improving SAT Sweeping with Observability Don’t-Cares Motivating Example

Observability and Local Observability

Algorithm Flow

Implementation

Experimental Results

Conclusions

Representation of Boolean functions

Consists of AND nodes and complement edges

AND/INV Graph (AIG)

V1

V2

V3

V4

V5

x1

x2

x3

321 )( xxxF

)( 4vf

)( 5vf

Pros: • Better memory efficiency than BDD-like reps

Cons: • Non-canonical• Redundant

SAT Sweeping

Simplification of AIGs can exponentially improve Boolean reasoning [Kuehlmann97].

Several techniques have been developed to simplify circuit graphs [Brand93, Kunz93, Goldberg01, Lu03].

SAT sweeping [Kuehlmann04] is fast and robust since it combines: Random simulation SAT queries Structural hashing

SAT Sweeping Example

V1

V2

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V4

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V6 V8

V9

x1

x2

x3

random simulation

refine classification

pick two vertices in same class; do SAT query

mergevertices

update simulation vec.

any class size>1?

N

Y

SAT UNSAT

end

0

0

1

0

0

0

0

0

1

0

0

1 0

V1

V3

V6

V7

V2

V5

V4

Use SAT solver to check the equivalence of v6 and v7.

Use SAT solver to check the equivalence of v2 and v5.

v7 can be merged onto v6 since f(v7)=f(v6).

V7

0

0 1

1 1

1 1

1 0

1 1

1 0

1 0

Outline

Background AND/INV Graph

SAT Sweeping

Improving SAT Sweeping with Observability Don’t-Cares Motivating Example

Observability and Local Observability

Algorithm Flow

Implementation

Experimental Results

Conclusions

V5

Motivating Example

V2

V1

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V6

V8

x1

x2

x3

V7 0 0 0 0

0 0 1 1

x1

x2 x3

0

1

00 01 11 10

V4

0 0 0 1

0 0 0 1V5

x1

x2 x3

0

1

00 01 11 10

0 0 0 0

1 0 0 1

x1

x2 x3

0

1

00 01 11 10V6

V6

V5 V4

??

Observability

Observability for AIGs without reconverging paths:

Full observability computation is VERY expensive!

v

v’

other(v’, v)

… …

otherwisevvotherf )),'((vobs )'((

Ovif

1

vobs )(vFOv )(' )

k levels of observability: obs(v, k)

Criterion for merging vertices under local observability:

Local Observability

V

…

…

…

k=0 k=1 k=2

0),()()( kvobsvfuf

k ≥ circuit depth

Equivalence-class refinement cannot be used since the merging criterion is not an equivalence relation.

Search for merging candidates of each vertex individually. Build a dictionary of simulation vectors to find candidates

efficiently.

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x1

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x3

V7

V6

Algorithm

?

Mask simulation vectors with observability vectors.

Compare simulation vectors and observability vectors to filter candidates.

Check the merging criterion with SAT solver.

Algorithm

w

v

v’…

…

other(v’,v)

OBS(v’,1)=[1101]

OBS(v,2)=[0100]

F(w)=[0110]

0),( kvOBS)()( vFuF

otherwise(

[

)),(( vvotherF )1,( kvOBS),( kvOBS )(vFOv

0 if]11111 kOv)

update simulation vec.and candidates

Algorithm Flow

random simulation;compute obs vec.

find merging candidates from dictionary

pick candidate vertexand do SAT query

mergevertices

candidates exist?

N

Y

UNSATSAT

for each vertex

V5

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V8

x1

x2

x3

V7

111 1

110

Dictionary

001

110

110

110

0

0

0

0

1

V4

V6

V1

V2

?

1-level observability

Dictionary Implementation

Use a binary trie. Simulation vectors of vertices are stored in leaf nodes.

bit 4

bit 3

1

0

0

1F(v4)=0101

F(v3)=1110

F(v5)=0100

F(v2)=0110

OBS(v1, k) = 1 0 1 0

F(v1) = 0 1 0 0

F(v5)=0100

F(v4)=0101

Dictionary Implementation

Search for merging candidates along the trie using simulation vectors and observability vectors.

F(v3)=1110

F(v2)=0110

candidates for v1

are v4, v5

bit 4

bit 3

1

0

0

1

Reconverging Structure

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V4

V5

x1

x2

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0 0 1 1

0 0 1 1

x1

x2 x3

0

1

00 01 11 10

V2

1 1 1 1

1 1 1 1

x1

x2 x3

0

1

00 01 11 10

1

0 0 0 0

0 0 1 1

x1

x2 x3

0

1

00 01 11 10

V4

V4

Can v2 be merged to constant 1 if k=2?

The controlling value at v4 changes!

Reconverging structure causes the problem.

We use a conservative approximation of observability to avoid this problem.

Outline

Background AND/INV Graph

SAT Sweeping

Improving SAT Sweeping with Observability Don’t-Cares Motivating Example

Observability and Local Observability

Algorithm Flow

Implementation

Experimental Results

Conclusions

Percentage of Vertices Merged

k (levels of observability)No ODCs

Experimental Results

15 designs from IWLS 2005 benchmark set(synthesized from OpenCores repository)

Size from 200 to 48K AND vertices in AIG(200 to 30K Gates)

Basic SAT sweeping

Runtime Relative to Basic SSW

k (levels of observability)No ODCs

Experimental Results

Our approximation of observability is tight. Compared with exact local observability:

k=2 : 0.1% fewer vertices merged on average k=5 : 0.5% fewer vertices merged on average

Application to bounded model checking Simplified unrolled frames; compared local-ODC-based SAT

sweeping with basic SAT sweeping

Algorithm

Average reduction of vertices in each frame (%)

1 2 3 4 5

Basic 3.5 14.0 16.6 17.6 18.0

ODC 16.3 27.4 30.0 30.1 30.1

Conclusions

ODC-based SAT sweeping simplifies AIGs significantly more than basic version 5.4X more vertices merged with 3 levels of observability than with

basic SAT sweeping (4.4X runtime)

Greatest benefits from few levels of observability Captures 90% of mergers with 3 levels of observability

Broadly applicable for Boolean reasoning Synthesis (combinational and sequential) Verification (bounded model checking, equivalence checking)

Available at www.openedatools.org/projects/oagear

ODC-based SAT sweeping is simple and inexpensive, and greatly speeds up Boolean reasoning.

Acknowledgments

Steve Teig, Andy Caldwell for initiating the project idea

Ellen Sentovich, Christoph Albrecht for valuable discussion

Thank you!