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©2018 by System Plus Consulting | Samsung ePLP for the Exynos 9110 1

22 bd Benoni Goullin44200 NANTES - FRANCE +33 2 40 18 09 16 [email protected] www.systemplus.fr

Samsung ePLP for the Exynos 9110First multi die HVM FOPLP in a PoP configuration for consumer application

Packaging report by Stéphane ELISABETHNovember 2018 – version 1

REVERSE COSTING® – STRUCTURAL, PROCESS & COST REPORT

http://www.systemplus.fr/



Table of Contents

Overview / Introduction 4

o Executive Summary

o Reverse Costing Methodology

Company Profile 8

o Samsung

o Fan-Out Packaging

o Samsung’s FOPLP Technology

o Samsung Galaxy Watch Teardown

Market Analysis 21

o Samsung Positions among Players

o FOPLP Market Forecast

Physical Analysis 24

o Summary of the Physical Analysis 25

o Package Assembly 27

Module Views & Dimensions

RDL Deprocessing

Package X-Ray Views

Memory Package Opening

Package Opening: PCB Frame, Dies

Board Cross-Section

Package Cross-Section: PCB Frame, RDLs, UBMs

FOPLP Process

o APE Die 58

Die View & Dimensions

Die Cross-Section

Die Process Characteristic

o PMIC Die 65

Die View & Dimensions

Die Cross-Section

Die Process Characteristic

Physical Comparison: Samsung ePLP vs. PoP and FO SiP 70

o PoP Techonlogy: Shinko’s MCeP, TSMC’s inFO

o FO-SiP: Nepes’s RCP SiP

Manufacturing Process 80

o APE Die Front-End Process & Fabrication Unit

o PMIC Die Front-End Process & Fabrication Unit

o ePLP packaging Process Flow

o Final Test & Packaging Fabrication unit

o Summary of the main parts

Cost Analysis 93

o Summary of the cost analysis 94

o Yields Explanation & Hypotheses 96

o APE & PMIC die 98

Front-End Wafer Cost

Wafer Preparation Cost

Die Cost

o ePLP Package Cost 106

Package Manufacturing Cost

Package manufaturing cost per steps

Components Cost

Feedbacks 110

SystemPlus Consulting services 123




Overview / Introductiono Executive Summaryo Reverse Costing Methodologyo Glossary

Company Profile & Supply Chain

Market Analysis

Physical Analysis

Physical Comparison

Manufacturing Process Flow

Cost Analysis

Related Reports

About System Plus

Executive Summary

This full reverse costing study has been conducted to provide insight on technology data, manufacturing cost and selling priceof the Samsung Exynos 9110.

This complete tiny solution is integrated on the main board of the Samsung Galaxy Watch. The module includes the Exynos9110 application processor, and a Samsung’s Power management system all in a single package smaller than 80 mm². This is the second multi die fan-out device than we have found in the market, but the first from such large company which could be a key milestone for Fan-Out SiP technology.

The system uses an innovative panel-level packaging developed by Samsung. It has innovative interconnections, enabling a Package-on-package (PoP) configuration with Samsung’s in-house DRAM memory Chip. A Fan-Out substrate used in a panel configuration allows memory stacking. The Fan-Out Substrate, the PMIC and the APE are embedded in a mold substrate on four redistribution layers (RDL).

Dedicated to a smart watch application, the module has to be extremely power efficient with a low z-height and a good thermal dissipation feature. Thanks to the ePLP packaging technology applied to this SiP, Samsung could realize the smaller form factor, lowest power and highest performance solution on the market.

The report will include a complete analysis of the SiP, featuring die analyses, processes and package cross-sections. It will also include a comparison with Nepes’ Redistributed Chip Packaging (RCP) technology applied in the NXP SCM-i.MX6Q, TSMC’s inFOtechnology applied to the Apple A11 and Shinko’s MCeP applied to the Qualcomm Snapdragon 845.




Overview / Introduction

Company Profile & Supply Chain o Samsungo Exynos 9 Serieso Fan-Out Packagingo Samsung’s ePLPo Samsung Galaxy Watch

Teardown

Market Analysis

Physical Analysis

Physical Comparison


Cost Analysis

Related Reports

About System Plus

Samsung FO-PLP Packaging





Company Profile & Supply Chain o Samsungo Exynos 9 Serieso Fan-Out Packagingo Samsung’s ePLPo Samsung Galaxy Watch

Teardown

Market Analysis

Physical Analysis

Physical Comparison


Cost Analysis

Related Reports

About System Plus

Samsung Galaxy Watch Teardown






Market Analysis o Samsung Positiono FOPLP Market Forecast

Physical Analysis

Physical Comparison


Cost Analysis

Related Reports

About System Plus

FOPLP Market Forecast






Market Analysis

Physical Analysis o Package Assembly

o Views & Dimensionso RDL Deprocessingo Openingo Cross-Sectiono Process & Synthesis

o APE Dieo Views & Dimensionso Die Cross-section

o PMIC Dieo Views & Dimensionso Die Cross-section

Physical Comparison


Cost Analysis

Related Reports

About System Plus

Summary of the Physical Analysis






Market Analysis





Physical Comparison


Cost Analysis

Related Reports

About System Plus

Package Veiw & Dimensions






Market Analysis





Physical Comparison


Cost Analysis

Related Reports

About System Plus

Package Overview – RDL #1






Market Analysis





Physical Comparison


Cost Analysis

Related Reports

About System Plus

Memory Package Opening






Market Analysis





Physical Comparison


Cost Analysis

Related Reports

About System Plus

Board Cross-Section






Market Analysis





Physical Comparison


Cost Analysis

Related Reports

About System Plus

Package Cross-Section – RDL






Market Analysis





Physical Comparison


Cost Analysis

Related Reports

About System Plus

FOPLP Process






Market Analysis





Physical Comparison


Cost Analysis

Related Reports

About System Plus

APE Die Cross-Section – Transistors






Market Analysis





Physical Comparison


Cost Analysis

Related Reports

About System Plus

PMIC Die Views & Marking






Market Analysis

Physical Analysis

Physical Comparisono PoP Solution

o Shinko’s MCePo TSMC’s inFO

o PoP Technology Synthesiso FO-SiP Soution

o Nepes’s RCP SiP


Cost Analysis

Related Reports

About System Plus

Comparison with PoP Solutions – TSMC’s inFO






Market Analysis

Physical Analysis




o Nepes’s RCP SiP


Cost Analysis

Related Reports

About System Plus

Package Comparison – PoP Technology






Market Analysis

Physical Analysis




o Nepes’s RCP SiP


Cost Analysis

Related Reports

About System Plus

Package Comparison – FO-SiP






Market Analysis

Physical Analysis

Physical Comparison

Manufacturing Process Flowo APE Die Front-End Processo APE Fabrication Unito PMIC Die Front-End Processo PMIC Fabrication Unito ePLP Package Process Flowo Final Test & Assembly Unit

Cost Analysis

Related Reports

About System Plus

Packaging Process Flow






Market Analysis

Physical Analysis

Physical Comparison

Manufacturing Process Flowo APE Die Front-End Processo APE Fabrication Unito PMIC Die Front-End Processo PMIC Fabrication Unito ePLP Package Process Flowo Final Test & Assembly Unit

Cost Analysis

Related Reports

About System Plus

FOPLP – Process Flow (2/5)






Market Analysis

Physical Analysis

Physical Comparison


Cost Analysiso Cost Analysis Summaryo Yields Explanation &

Hypotheseso APE & PMIC Wafer FE Costo APE & PMIC Prep. Wafer Costo APE & PMIC Die Costo ePLP Packaging Costo Component Cost

Related Reports

About System Plus

ePLP Packaging process






Market Analysis

Physical Analysis

Physical Comparison


Cost Analysis

Related Reports

About System Plus

REVERSE COSTING ANALYSES - SYSTEM PLUS CONSULTING

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MARKET AND TECHNOLOGY REPORTS - YOLE DÉVELOPPEMENT

ADVANCED PACKAGING• 3D TSV and 2.5D Business Update - Market and Technology Trends 2017• Equipment and Materials for 3D TSV Applications 2017

PATENT ANALYSIS - KNOWMADE

ADVANCED PACKAGING• TSV Stacked Memory Patent Landscape Analysis

REVERSE COSTING ANALYSES - SYSTEM PLUS CONSULTING

PACKAGING• NXP SCM-iMX6Q RCP Fan-Out SiP• Apple A11 with second generation of TSMC’s inFO• Samsung Galaxy S9’s Application Processor: Exynos 9810 vs. Qualcomm Snapdragon 845• Intel’s Embedded Multi-Die Interconnect Bridge (EMIB)



https://www.i-micronews.com/advanced-packaging-report/product/p3d-tsv-and-2-5d-business-update-market-and-technology-trends-2017.html

https://www.i-micronews.com/advanced-packaging-report/product/equipment-and-materials-for-3d-tsv-applications-2017.html

http://www.knowmade.com/downloads/tsv-stacked-memory-patent-landscape/

https://www.systemplus.fr/reverse-costing-reports/nxp-scm-i-mx6-quad-high-density-fan-out-wafer-level-system-in-package/

https://www.systemplus.fr/reverse-costing-reports/second-generation-of-tsmcs-integrated-fan-out-info-packaging-for-the-apple-a11-found-in-the-iphone-x/

https://www.systemplus.fr/reverse-costing-reports/samsungs-galaxy-s9-plus-processor-packages-samsungs-ipop-vs-qualcommshinko-mcep/

https://www.systemplus.fr/reverse-costing-reports/intels-embedded-multi-die-interconnect-bridge-emib/










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