rtax-s qualification and reliability data september 7-9, 2005 2005 mapld international conference...

RTAX-S Qualification and Reliability Data

September 7-9, 2005

2005 MAPLD International Conference

Minal Sawant

Ravi Pragasam

Solomon Wolday

Ken O’Neill

2Sawant, Wolday, Pragasam, O’Neill RTAX-S Qualification and Reliability Data MAPLD 2005 - # 1032

Outline Design Overview

MIL-STD-883B Enhanced Antifuse Qualification (EAQ)

Sample Size and Test Sequence

Results MIL-STD-883B Enhanced Antifuse Qualification (EAQ)

Enhanced Lot Acceptance (ELA) Plan Results

Terminology:

EAQ = ELA (both processes use the same design)

Group C = High Temperature Operating Life (HTOL) = Dynamic Programmed Burn In (DPBI)


Design Overview

MIL-STD-883B Uses the QBI (Qualification

Burn In) design Goal: Device Feature

Maximum Utilization of logic cells

Test all IO standards Test all macro offering

(Carry chain, buffys etc) Test RAM feature Test for propagation delay

Note: QBI = QCMON

EAQ Uses the EAQ design Goal: Antifuse Reliability

Tests all possible antifuse type

Based on NASA style design Test for delay perceptibility


Top Level QBI Design EAQ Design

FIFO Test OK

CombinatorialBlock

FIFO Block

RAM Block

I/O Block

MonitorCircuit

Global Test

Monitor

Combo Test OK

I/O Test OK

RAM Test OK

ALU Block

ALU Test OK

Reset_n

Set_n

ShiftFreq[1:0]

A_Pattern_length[2:0]

A_Pattern_type

2

3

Array Test Block(1458 bit SR)

Tile 1-3 (Row 1)


Tile 4-6 (Row 2)


Tile 7-9 (Row 3)

Array Clock

IO Test Block375 I/Os

(1125 I/O Regs)IO_Pattern_length[2:0]

IO_Pattern_type3

IO Clock

RAM Test Block(nine 1x16384 ram)

IO_ResetSyncD

Delay Chain(8 X 1300 NAND)

IO_pin[0]

IO_pin[374]

Delay_sel [1:0]

Delay_in2

8 Delay_out [7:0]

Array_out [0]

Array_out [1]

Array_out [2]

Ram out [8:0]

Ram Monitor

IO_Monitor

3

13

Array Monitor

Global Monitor

Array Monitor

Global Monitor

TOG_n

Clk Spine

Clk Spine

Clk Spine

Error Flags [2:0]

Error Flag

Error Flag [8:0] 9


Delay Paths QBI includes one small

delay chain EAQ includes 8 delay chains

Q

QSET

CLR

D

Q

QSET

CLR

D

Q

QSET

CLR

D

Q

QSET

CLR

D

Delay_in Delay_out

22 Stages: ~ 36 ns

0123

Delay_out [3]

delay_sel_n[1]delay_sel_n[0]

Delay_in

IO_ResetSyncD

Sliding Decoder

Q

CLR

D

EIO_clk

Q

CLR

D

E

Q

CLR

D

E

Q

CLR

D

E

3264 128

1,300 NAND4 gateDelay Line

Delay_out [2]

Delay_out [1]

Delay_out [0]

Delay_out [4]

Delay_out [5]

Delay_out [6]

Delay_out [7]


Design Summary QBI

I/O’s are configured with all the different combinations of I/O standards, slew and pull-up resistor (I/O standards LVTTL, PCI, and PCIX, LVPECL, and Vref are used)

EAQ (RTAX1000S-CG624)

SEQUENTIAL (R-cells) Used: 5768 / 6048 95.37% 9965 / 10752 92.68%COMB (C-cells) Used: 12091 / 12096 99.95% 21437 / 21504 99.69%LOGIC (R+C cells) Used: 17859 / 18144 98.43% 31402 / 32256 97.35%

RAM/FIFO Used: 36 / 36 100% 64 / 64 100%IO w/Clocks Used: 196 / 198 99% 196 / 198 99%

HCLOCK (Hardwired) Used: 4 / 4 100% 4 / 4 100%CLOCK (Routed) Used: 4 / 4 100% 4 / 4 100%

RTAX1000S-CQ352 RTAX2000S-CQ352

SEQUENTIAL (R-cells) Used: 6010 / 6048 99.37%

COMB (C-cells) Used: 12029 / 12096 99.45%

LOGIC (R+C cells) Used: 18039 / 18144 99.42%

RAM/FIFO Used: 36 / 36 100%

IO w/Clocks Used: 418 / 418 100%

HCLOCK (Hardwired) Used: 4 / 4 100%

CLOCK (Routed) Used: 2 / 4

(2 of the unused RCLK's resources are divided into

spine networks and utilized as global Set/Reset signals)


Antifuse Utilization

EAQ

F 14458 24752 16998 Between module output segment & short vertical segment

H 6306 10900 5608 Antifuse between two horizontal tracks

I 238718 414683 240638 Between short horizontal segments & module input segment

SD 13869 24894 15737 Semi-direct antifuse

V 3214 4784 1640 Antifuse between two vertical tracks

X 92569 161448 92300 Antifuse Between short horizontal & vertical segments

C 984 1728 0 Between short vertical segments & hclockmux modules input segment

CSR 6256 8272 6256 Antifuse for I/O configuration options

SSR1 12 9 8 Silicon Signature antifuse in silicon signature words

LDH 48 226 54 Horizontal inter-tile antifuse

LDV 66 135 70 Vertical inter-tile antifuse

DB 3873 6831 85 Between local segment (DB inverter output) & input segment

LL 15338 26474 15550 Between RX/TX input/output module segment & long horizontal/vertical segment

QBI

Total 394,944

RTAX1000SAntifuse Type RTAX1000S RTAX2000S Description

395,711 685,136


Sample Size QBI :

129 equivalent RTAX2000S-CQ352B devices used at 125°C

Additional 78 devices of RTAX1000S-CQ352B used for LTOL (Low Temperature Operating Life) experiment at -55°C

EAQ : 300 devices of RTAX1000S-CG624 used

Equivalent 129 Devices (LTPD =3)

RTAX2000S-CQ352

84 Units

Equivalent RTAX2000S-CQ352

45 Units

RTAX1000S-CQ352

90 units

2 Units (RTAX1000S) = 1 unit (RTAX2000S)

RTAX1000S-CG624 300 UNITS

AXS1150 Units

AXS2150 Units

AXS1A94 units

AXS1B56 units


Test Sequence QBI : HTOL

QBI : LTOL

EAQ : AXS1

EAQ : ASX2

Program with QBI design

Pre Burn In ATE test (25°C,-55°C,

125°C)

Burn In (1000 hr)at -55°C (with

various pullpoints)

ATE Test at 25°C (at various

pullpoints)

Final Post Burn In ATE (after 1000 hr) test (25°C,-55°C,

125°C)

Program with QBI design

Pre Burn In ATE test (25°C,-55°C,

125°C)

Burn In (1000 hr)at 125°C (with

various pullpoints)


pullpoints)

Final Post Burn In ATE (after 1000 hr) test (25°C,-55°C,

125°C)

Program with EAQ design

Pre Burn In ATE test (25°C)


various pullpoints)


pullpoints)

Post Burn In ATE (after 1000 hr) test (25°C)

Burn In (250 hr)at -55°C

Final Post Burn In ATE test

(25°C)

Program with EAQ design

Pre Burn In ATE test (25°C)


pullpoints) Final Post Burn In ATE (after 1000 hr) test

(25°C)

Burn In (250 hr)at -55°C

Post Burn In ATE test (25°C)


various pullpoints)


QBI Summary

QBI For RTAX2000S (87 units) = 84 + 3 spares For RTAX1000S (98 units) = 90 + 8 spares 7 failures were observed during the HTOL and LTOL tests

Product Package Wafer lot# Group Design UnitsBI

(hours)AF

failuresOther

FailuresTotal

(hours)TA

(C)

VCCA

(V)

VCCI

(V)Comments

RTAX2000S CQ352 D1L9R1 Qual(M026) QBI 87 1000 0 2 85000 125 1.6 3.6 ESDRTAX1000S CQ352 D1GAH1 Qual(M026) QBI 98 1000 0 4 94000 125 1.6 3.6 ESDRTAX1000S CQ352 D1GAH1 Qual(M026) QBI 78 1000 0 1 77000 -55 1.6 3.6 ESD

RTAXS


QBI FA Investigation & Conclusions All the 7 failures* observed from the (QBI) devices indicated

identical failure signature due to equipment induced ESD

Physical Failure analysis indicated damage to the ESD circuit

Duplication of failure mode with MM testing indicated identical failure signature

ESD zap is due to the charge buildup on the CQ352 socket lid This charge does not exist on the CG624 package Thus no failures observed in the EAQ experiment

No additional failures due to ESD have been observed since the use of ESD friendly and staticide treated socket lids

De-processing of a second failed device showed the same failure signature

RTAXS Passed ESD at 2000 V HBM

RTAXS Passed ESD at 250 V MM

*Failure analysis report available upon request


EAQ Summary

EAQ 9 failures were observed during the HTOL and LTOL tests

8 Failures had identical failure signature 1* (HTOL after 1000 hrs) unit has a different failure signature

Failure Analysis under progress Antifuse has been eliminated as a potential cause

No Antifuse failures observed

EAQ experiment will be continued for an extra 1000 hours of HTOL on a sample size of 120 units from above lot Results expected by Mid October 2005


(hours)AF

failuresOther

FailuresTotal

(hours)TA

(C)

VCCA

(V)

VCCI

(V)Comments

RTAX1000S CG624 D1GAH1 AXS1 EAQ 150 1000 0 6 144000 125 1.6 3.6 Cont failure due to BIB

RTAX1000S CG624 D1GAH1 AXS2 EAQ 148 1000 0 1* 147000 125 1.6 3.6Device at FA, suspect

CMOSRTAX1000S CG624 D1GAH1 AXS1 EAQ 144 250 0 0 36000 -55 1.6 3.6RTAX1000S CG624 D1GAH1 AXS2 EAQ 150 250 0 2 37000 -55 1.6 3.6 Cont failure due to BIB

RTAXS


EAQ FA Investigation Conclusions Analysis and testing showed that all 8 failures* were on the

same output pin “AE16” All 8 devices came from burn-in board locations D1 and D2

Failure analysis indicated that the damage was on the output buffer pull-down transistor

Damage was due to contention problem on the burn-in boards The -1V on the output, with over 300 mA current, exceeded the

absolute worst case condition for extended periods

No additional failures have been observed since the contention was eliminated AXS1 completed 250 hrs of LTOL and AXS2 completed 1000 hrs of

HTOL with no failures

De-processing of a second failed device showed the same failure signature

*Failure analysis report available upon request


ELA Plan Uses the same high perceptive design as EAQ

ELA is the EAQ design used in the production flow of RTAX-S devices

A sample of units will be tested per each wafer lot before shipment This will qualify the lot for shipment

Units will be programmed to the ELA design Units will be sent for 168 hours of Burn in at 125°C 100% yield is required to qualify lot for shipment

Product # of UnitsRTAX2000S 14RTAX1000S 24RTAX250S 100


ELA ResultsResults to date – No Antifuse failures

Shipping RTAX-S to Space Flight Applications today


(hours)AF

failuresOther

FailuresTotal

(hours)TA

(C)

VCCA

(V)

VCCI

(V)RTAX2000S CQ352 D1GAG1 ELA EAQ 14 168 0 0 2352 125 1.6 3.6RTAX2000S CQ352 D1N9H1 ELA EAQ 14 168 0 0 2352 125 1.6 3.6RTAX2000S CQ352 D1L9R1 ELA EAQ 14 168 0 0 2352 125 1.6 3.6RTAX250S CQ352 D1H381 ELA EAQ 100 168 0 0 16800 125 1.6 3.6

RTAX2000S CQ352 Eng HiSS 8 1000 0 0 8000 125 1.6 3.6

RTAXS


DSCC SMD Application Status SMD#

Pre-assigned SMD# for RTAX-S are 5962-04219 for RTAX250S 5962-04220 for RTAX1000S 5962-04221 for RTAX2000S

SMD Application SMDs in draft

Derived from Actel datasheet Qualification Package in preparation

Qual results, FA reports, with TRB approval minutes Qual lots attribute sheets, copies of assembly/test/burn-in travelers Silicon technology summary

with XSEM showing planarized process

Support documents Submission to DSCC being planned for the end of October 2005 Certification expected by the end of 2005


Conclusion

NO ANTIFUSE FAILURES

More than 650,000 hours of test data available now

MIL-STD-883B Qualification completed successfully

EAQ experiment completed successfully 150 units with 1000 hours of HTOL and 250 hours of LTOL 150 units with 250 hours of LTOL and 1000 hours of HTOL

Shipping RTAX-S to Space Flight Applications today Both “B” & “E” flows shipping

rtax-s qualification and reliability data september 7-9, 2005 2005 mapld international conference...

Documents

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qbi qualification

delay chains

delay pathsqbi

reliability data mapld

narray test block1458

delay perceptibility

small delay chaineaq