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Int. J. Electron. Commun. (AEÜ) 65 (2011) 458–467

Contents lists available at ScienceDirect

International Journal of Electronics andCommunications (AEÜ)

journa l homepage: www.e lsev ier .de /aeue

low power, low phase noise, square wave LC quadratureCO and its comprehensive analysis for ISM band

ojtaba Atarodi, Pooya Torkzadeh ∗, Baktash BehmaneshICAS Group, Electrical Engineering Department, Sharif University of Technology, Azadi Ave., Tehran, Iran

r t i c l e i n f o

rticle history:eceived 6 February 2010ccepted 7 July 2010

eywords:oltage-controlled oscillators (VCO)hird harmonic tankhase noise amountower consumption

a b s t r a c t

This paper presents a phase-noise reduction technique for voltage-controlled oscillators (VCOs) usinga harmonic tuned (HT) LC tank. The phase-noise suppression is achieved through almost rectangular-shaped VCO oscillating signal which effectively maximizes oscillating signal slope at zero crossing pointsresulting in-phase-noise degradation. In addition, by shortening down converted noise power aroundoscillating signal second harmonic, more phase-noise suppression has been achieved. A comprehensiveanalysis for frequency and amplitude deviations as high as 20% for third harmonic and its effect onoutput phase-noise suppression has been discussed. In the followings, a comprehensive analysis on time-variant theory of phase noise where a more simplistic time-invariant approach fails to explain numericalsimulation results even at the qualitative level has been exposed. General closed-form formulas arederived for the phase noise generated by LC tanks losses and MOS transistors noisy current. It is also shownthat by using third harmonic tank on VCO and steering coupling and coupled section current sources byquadrature signals, total phase-noise improvement will be as high as 9 dB compared to conventionalstructures. Designed harmonic tuned LC Quadrature VCO has been fabricated using 0.18 um 1P6M CMOS

technology operating at 1.8 V for frequency band of 2.4–2.6 GHz with achieved phase noise of−136 dBc/Hzat frequency offset of 3 MHz. Total current drawn by VCO is 3.9 mA making the power consumption aslow as 7 mW with the silicon area of 500 um × 500 um. Implemented HT VCO figure-of-merit (FOM) is−186 dB making the implemented VCO superior compared to the recently published VCOs. An extensivespectreRF simulation covering a wide range of operating conditions has been used to verify the theoretical analyses.

. Introduction

In the wireless industry, the great challenge is the high-levelntegration of functional blocks using low-cost CMOS technology.mong the efforts for the single-chip radio integration, the imple-entation of a low phase-noise voltage-controlled oscillator (VCO)

ttracts a lot of attention as long as VCO phase noise is one of theost critical parameters for information transfer function quality

f service (QOS). As CMOS downscaling is in progress, the cornerrequency of transistors tends to be increased resulting in moreroblems for CMOS based VCO blocks. Moreover, the integration ofhigh-LC tank is not too facile due to the low resistivity of silicon

ubstrate and this greatly affects the phase-noise performance. Inhis paper an optimization technique for decreasing phase noiseogether with keeping power consumption as low as possible wille presented. The phase-noise suppression is achieved through

∗ Corresponding author. Tel.: +98 912 3495 492; fax: +98 21 8868 5347.E-mail addresses: torkzadeh.submission@gmail.com, p torkzadeh@ee.sharif.edu

P. Torkzadeh).

434-8411/$ – see front matter © 2010 Elsevier GmbH. All rights reserved.oi:10.1016/j.aeue.2010.07.001

© 2010 Elsevier GmbH. All rights reserved.

almost rectangular-shaped cross-coupled differential pair outputsignal which effectively maximizes the slope of oscillating signal atzero crossing points. The most usual and conventional methods toimprove phase noise is increasing power consumption and chang-ing transistors parameters in usual architectures while remainingin current-limited regime and by switching current source transis-tor resulting on shifting the generated flicker noise toward upperfrequencies and decreasing phase noise [1–4]. According to pre-vious explanations, in this paper, phase-noise improvement hasbeen achieved by using rectangular-shaped oscillating signal whichincreases signal slope at zero crossing points and decreasing signalslope at signal extreme points (zeniths). On the other hand, by usinga shortening tank on second harmonic, down converted flickernoise will be eliminated resulting in less phase noise amount. In [5],the same technique without any analytical models has been pub-lished and the most possible phase-noise improvement has been

obtained. In that article, no analysis for any mismatch between fre-quency and amplitude of fundamental and third harmonics havebeen addressed which does not satisfy the general theory of usingthird harmonic specially for process variations and corner pro-cesses case. On the other hand, in [5], output frequency does not

. Commun. (AEÜ) 65 (2011) 458–467 459

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M. Atarodi et al. / Int. J. Electron

ave any tuning range and the oscillator has been designed andptimized just for a single frequency. This paper is organized asollows. Section 2 gives the phase noise minimization method andxplains the effect of any mismatch between fundamental andhird harmonic on phase-noise improvement. In this section, the

ean and standard deviation of phase-noise improvement for eachismatch will be presented. Section 3 contains the analysis of

armonic tuned LC Quadrature VCO, deriving closed-form expres-ions for phase noise generated by the most significant white noiseources. Section 4 illustrates the implemented QVCO architecturend compares it with conventional configurations. Section 5 showshe time and frequency domains simulations in spectreRF environ-

ent along with experimental measurements and finally Section 6ives the conclusion.

. Phase-noise minimization and mismatch effect onmprovement factor

.1. Phase-noise minimization

In recent years, the theory and analysis for the physical pro-esses of the phase noise in differential LC oscillators have madeignificant progress and various techniques to lower it have beenemonstrated [6,7]. The phase noise is mainly induced from var-

ous mixing phenomena of the negative switching differentialair which one of main mixing phenomena is up- and down-onversions from the thermal noise component at the base-bandnd the harmonics of the oscillation frequency. In this condition,ach existing transistor in VCO architecture behaves as a noiseource and induces its thermal noise signal on output signal result-ng in AM and PM modulations. The other source is up-conversionrom the transistors flicker noise in base-band to the phase noisen the fundamental frequency. There are many proposed theorieso analyze this phenomenon all discussed with the presumption oftationary and time invariant system, resulting in a semi-predictivehase-noise amount for output oscillating signal which are not ade-uate precise. The most precise theory and modeling for phaseoise and relation between interfering parameters is brought in [8],

n which system behavior (output signal) versus thermal and flickeroises is a Cyclo-Stationary linear time-variant system. Accordingo Hajimiri’s theory and his analysis, phase noise L(�w)(dB) gener-ted by thermal noise on specific frequency offset of �w resultedy one noise source will be

(�w)dB = 10 × Log10

(� 2

eff-rms

q2max

i2n/�f

4�w2

)(1)

here qmax is the maximum charge on tank capacitor, � Eff-RMS isoot mean square of effective impulse sensitivity function (ISF) ofscillator structure and i2n/�f is thermal noise PSD amount. ISF(x)s a dimensionless, frequency and amplitude-independent periodicunction with period 2� describing how much phase shift resultsrom applying a unit impulse at time (t). This function is dependento oscillating signal waveform or equivalently the shape of the limitycle which in turn is governed by the nonlinearity and the topologyf the oscillator and existing time of corresponding noise source.hus, this function can be shown as

eff(t) = � (t) × ˛(t) (2)

here� (t) is just dependent on signal wave form and˛(t) dependsn existing time of noise source. ˛(t) is a dimension less functionhich its magnitude is between 0 and 1 and illustrates the ON time

f each noise source versus oscillating signal. It is apparent that byecreasing the ON time of each noise source or by phase shiftinghe noise source time by 90 degree versus� (t), the total effective

Fig. 1. Transistors as noise sources in conventional VCO architecture.

amount will be decreased resulting in less phase noise. In order tocalculate � (t) from main oscillating signal, Eq. (3) can be applied:

� (t) = (∂v(t)/∂t)

((∂v(t)/∂t)2 + (∂2v(t)/∂t2)2)(3)

where v(x) is oscillator output signal. According to (3), it can beseen that � (t) is always perpendicular to v(x) (means the exist-ing phase difference of 90 degree) and by increasing the oscillatingsignal slope at zero crossing points, � (t) magnitude and its RMSamount will be decreased. Based on Eq. (3), in order to achieve theleast amount of� (t) RMS, oscillating wave form should be in squarewave form making� (t) be zero toward 2�. As long as for a symmet-ric oscillating signal (for the most conventional oscillators)� (t) hasphase difference of 90 with oscillating signal. In this condition tochoose an appropriate ˛(t), all of transistors (noise sources) shouldbe turned on in-phase with oscillating signal resulting in the leastamount of� Eff-RMS. Fig. 1 shows the noise sources in a conventionalLC coupled oscillator. In this figure, each transistor has been definedas thermal and flicker noise source corrupting the output phase in arandom process and behavior. According to this figure, by switchingeach noise source, its existing time is diminished and in the casewhich the corresponding switching is performed in proper time,(in-phase with oscillating signal) phase noise will be the least pos-sible amount. As long as cross-coupled n-mos and p-mos transistorsare turning on in-phase with output signal, these transistors are notrequired to be by-passed by extra switches. In contrary, currentsource transistor which is always ON should be switched in propertiming versus output signal. In quadrature VCOs (QVCO), couplingsection transistors derived by quadrature section are turning onin 90 phase difference with output signal which can increase thephase noise as much as possible. Thus, coupling transistors currentshould be selected at least resulting in the least thermal and flickernoise PSD. Selecting coupling transistors current as low as possi-ble, 90 degree phase difference between in-phase and quadraturesignals is corrupted. Therefore, there is a trade-off between outputphase noise and phase precision between two existing sub-cores.As long as � (t) is periodic signal, it can be expanded to its Fourier

� (t) = c02

+∞∑n=1

cn Cos(nt + �n) (4)

In this condition, phase noise generated by flicker noise from eachnoise source will be

4 . Commun. (AEÜ) 65 (2011) 458–467

L

w(wsaotweh

•

•

•

tajwoFastettnw

v

A

�

n sin

n sin

60 M. Atarodi et al. / Int. J. Electron

(�w)dB = 10 × Log10

(c2

0

q2max

i2n/�f

8�w2

w1/f

�w

), c0 = 1

�

2�∫0

� (t)˛(t)

(5)

here w1/f is device flicker noise corner frequency. According to5), the lower C0, the less phase noise resulted by flicker noiseill be. Setting output common-mode to VDD/2 in complementary

tructure, the oscillating signal generates the same slope on risingnd falling edges resulting in symmetric � (t) and the least amountf C0. If in each half cycle of output signal, one of coupled n-mosransistors and one of coupled p-mos transistor are ON, then ˛(t)ill be symmetric. In order to make a square wave on output node,

xtra tanks along with the following conditions on third and fiftharmonics should be used:

Oscillator should be able to oscillate on fundamental, third, andhigher order desired frequency bands.Oscillating signal swing at each frequency harmonic should beinversely proportional to its center frequency versus fundamen-tal frequency.

By using varactors on fundamental tank, third and higher tanksshould consist of corresponding varactor to change the higherorder harmonics center frequency related to fundamental centerfrequency.

Using higher order harmonics (5th and 7th) in addition with thehird one in VCO structure makes the oscillator more complicatednd more sensitive to process and temperature variations. Applyingust the third harmonic and shaping output signal toward square

ave, signal slopes at both edges rises and � Eff-RMS will be 0.35f traditional amount resulting in 9 dB phase-noise degradation.ig. 2 shows the output signal in traditional VCO (just fundamental)nd by using third harmonic tank and corresponding ISF for outputignal with fundamental frequency of 2.4 GHz. While process andemperature variations besides the mismatch between capacitorsxist, varactors and spiral inductors are not zero and thus applying aank exactly on desired harmonic is impossible. Thus, it is preferableo extract the frequency and amplitude mismatch effect on phaseoise for third harmonic. Assuming f0 as fundamental frequencyith normalized amplitude, VCO output signal will be

(t) = cos(ω0t) − A cos(nω0t) (6)

⎧⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎨⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎩

∂�RMS

∂n= 0 ⇒

∂

√√√√√(1/2�)

2�∫0

((A

∂�RMS

∂A= 0 ⇒

∂

√√√√√(1/2�)

2�∫0

((A

ccording to (3), the time dependence of � (t) is as follows:

(t) = An sin(nω0t) − sin(ω0t)

ω0(1 + nA)2, ω0 = 2�f0 (7)

Fig. 2. Traditional and third harmonic applied output signals and ISF.

In this condition, by calculating the � RMS and its derivations withrespect to n and A, optimum parameters will be

(nω0t) − sin(ω0t)/ω0(1 + nA)2))2

∂n= 0 ⇒ n = 3

(nω0t) − sin(ω0t)/ω0(1 + nA)2))2

∂A= 0 ⇒ A = 1/3

(8)

2.2. Mismatch between fundamental and third harmonic tanks

As long as all of lumped elements such as capacitors andvaractors have a limited precision and they are altered by pro-cess variation especially in corner cases, implementing an LCtank on exact third harmonic center frequency (3f0) with sig-nal swing of A/3 is impossible. In following, frequency andamplitude deviation for a maximum of 20% mismatch errorand their effect on phase-noise improvement will be investi-gated.

Figs. 3 and 4 show the output signal for different third harmonicfrequencies and amplitudes and corresponding � RMS amount.According to these figures, it can be seen that frequency and ampli-tude mismatch affect the output signal, ISF RMS amount, andphase-noise improvement factor. Comparing these figures witheach other, amplitude mismatch exacerbates improvement fac-tor much more than frequency mismatch. Third harmonic swingdepends on inductor and capacitor quality factors as well as tran-sistors parameters. In order to extract the effect of amplitude andfrequency mismatch in complete analysis, a Monte-Carlo anal-ysis for more than 106 points (1 million points) for mismatchamount of 20% for both parameters has been performed. In thiscondition, frequency and amplitude PDF (Probability Density Func-tion) have been assumed to be in Gaussian form with standard

deviation of 20% of desired one. Table 1 shows the Monte-Carlosimulation result for third harmonic frequency and amplitude devi-ation effect on phase-noise improvement. According to this table,phase-noise improvement mean in worst condition is more than8 dB.

M. Atarodi et al. / Int. J. Electron. Commun. (AEÜ) 65 (2011) 458–467 461

Fig. 3. Third harmonic mismatch in amplitude and ISF RMS amount.

3

scactswinL

TI

Fig. 4. Third harmonic mismatch in frequency and ISF RMS amount.

. Time-variant phase-noise analysis

Presuming last section discussions, coupled and coupling tran-istors noises are totally converted into phase noise, as is indeed thease in differential oscillators. This can be performed by injectingsmall disturbance into an oscillator node (e.g., a current impulse

harging a tank capacitor) and then measuring the phase devia-ion of the perturbed waveform from a reference waveform. By

weeping the instant when the disturbance is injected across ahole oscillation period, it is possible to get quite an accurate

mage of when the phase of the waveform is most sensitive tooise. It is well known [8,12] that in a conventional differentialC tank oscillator the ISF is sinusoidal and in quadrature with the

able 1nitial frequency and swing mismatch effect on phase-noise improvement amount.

Non-ideal effect Input parameters

Mean Std PD

Center frequency 7.5 Ghz 15.5 GHz GaSwing 1/3 0.067 GaBoth effects 7.5 GHz, 1/3 1.5 GHz, 0.057 Ga

Fig. 5. Complementary LC QVCO.

voltage at the node where it is calculated and this form for theISF explains the various phase-noise contributions in such oscilla-tors. Fig. 5 shows the complementary LC QVCO composed of twodifferential LC tank oscillators coupled to each other via two addi-tional differential pairs. Quadrature oscillation is achieved by thecombination of direct-coupling and cross-coupling between twodifferential oscillators (otherwise they will oscillate in-phase, act-ing as a single differential oscillator). An analysis of the phase noisegenerated by both the switching and coupling transistors (to becalled hereafter as M1,2 and M3,4) might try to utilize what is alreadyknown about the differential LC tank oscillator. After all, each halfof shown architecture contains two differential pairs that do notinteract with each other and can therefore be treated separately.In the following, it is also assumed that the voltages at the transis-tor gates are quasi-square wave (by using fundamental and thirdharmonic tanks). We start by defining the parameter KCoupling as

KCoupling = IB,Coupling

IB,Coupled(9)

where IB,Coupling and IB,Coupled are coupling and coupled transistorcurrent sources, respectively. The parameter KCoupling is called cou-pling current co-efficient. Turning to shown architecture in Fig. 5,Fig. 6 shows the normalized phase excess, caused by a small currentimpulse injected into node I+, together with the relative node volt-age (semi-square wave), for K = 1. While the phase excess is verywell approximated by corresponding ISF function, there is a sub-stantial deviation from quadrature. In fact, the best curve fit for thedata has a 47.5 phase shift from quadrature. A good approximationof phase deviation from ideal quadrature undergone by the ISF is[13]:

= arctan(KCoupling) (10)

Therefore, the amount of phase shift for ISF function versus idealquadrature signal depends on coupling current co-efficient param-eter KCoupling. According to (2), by deviating the ISF function phase

from ideal one, total� Eff-RMS will be increased and total phase noiserises. Fig. 7 shows the effective ISF function for phase shifted signalversus ideal one for K = 1. In this figure RMS signal is shown to be1.7 times ideal one. Thus, increasing coupling current co-efficientKCoupling results in more � Eff-RMS. Assuming the node voltages ver-

Phase-noise improvement

F Mean (dB) Std (dB) PDF

ussian 8.2 1.6 N/Aussian 8.9 0.91 Gaussionussian 8 1.9 Quasi Gaussian

462 M. Atarodi et al. / Int. J. Electron. Comm

s{

T⎧⎪⎪⎨⎪⎪⎩w0fdfDpIjw(

L

wpAcb

Fig. 6. Phase shifted ISF signal for semi-square wave signal.

us phase are in the form of:

VI+(ϕ) = −VI−(ϕ) = A Sin(ϕ) − A/3 Sin(3ϕ)

VQ+(ϕ) = −VQ−(ϕ) = −ACos(ϕ) + A/3 Cos(3ϕ)(11)

hen, the approximated expressions for ISF functions will be

�I+(ϕ) = −�I−(ϕ) = Cos(ϕ + ) − Cos(3ϕ + )4N Cos( )

�Q+(ϕ) = −�Q−(ϕ) = Sin(ϕ + ) − Sin(3ϕ + )4N Cos( )

(12)

here N(=4) is the number of LC tanks in VCO and the angle≤≤ 2� is used instead of (ω1t) for simplicity. ω1t is the angular

undamental frequency of oscillating signal. According to (12), byecreasing (K), ISF denominator rises and phase shift from ideal ISFunction is decreased and results in better phase-noise condition.ue to the symmetry of the quadrature oscillator, we focus on I+art of it, all results being transferable to Q+ part via a 90 phase shift.

n fact, it is sufficient to calculate the phase-noise contribution ofust one-half of I+ part, again because of symmetry. Therefore, we

ill concentrate on what occurs at node I+ (Fig. 5), using (1) and2), the total phase noise can thereafter be calculated as [12]:

(�w)dB = 10 × Log10

(N ×

(PL,iR + PL,I+ + PL,Q−

5A2/9

))(13)

here N is the number of LC tanks in VCO, PL,X is the phase noise that2

roduces the noise power and 5A /9 is each node power amount.

ccording to Eq. (13), each tank resistance and one of coupled andoupling transistors thermal noise effect on output phase noise wille considered.

Fig. 7. Effective actual ISF signal versus ideal function.

un. (AEÜ) 65 (2011) 458–467

3.1. Tanks losses’

We start by considering the simple case of the noise generatedby the tank losses, whose stationary white noise current is givenby the well-known expression of

i2R = 4KBT1RP�f = 4KBT

Qω0L�f (14)

where KB is Boltzmann’s constant, T is the absolute temperature,RP the equivalent parallel tank resistance accounting for all tanklosses, Q tank quality factor, L tank inductance amount and w0 isangular frequency. The parameter � R is, by definition, the same asin (12); therefore, the square RMS value of � iR is

� 2iR,Eff,RMS =

∫ �

−�� 2I+()d = 1

16N2 Cos2( )(15)

Using (1), (14) and (15) and making use of the relation qmax = CA,one can write:

LiR =� 2iR,Eff,RMSi

2R/�f

4q2max�w2

= KBT

16N2C2A2Qω0L Cos2( )�w2

(16)

Replacing oscillation amplitude by

A = 12�

∫ �

−�|A Sin(ϕ) − 1/3 Sin(3ϕ)|ICoupledRPd

= 20ICoupledQω0L

9�

(17)

and

1cos2( )

= 1cos2(Arctan(KCoupling))

= 1 + K2Coupling (18)

Thus, output phase noise generated by tank loss will be

LiR (dB)|N=4 = 10 × Log10

(�2KBT(1 + K2

Coupling)

1264C2I2Coupled(Qω0L)3�w2

)(19)

Thus, according to above equation, phase noise generated by tankresistance is proportional with:⎧⎨⎩LiR ∝ (1 + K2

Coupling)

LiR ∝(

1Q3

) (20)

Thus, by increasing tank quality factor, phase noise generated by itsnoise will be degraded considerably. On the other hand, couplingcurrent co-efficient plays an important role in the total phase noise.

3.2. Coupled transistors

In this sub-section coupled transistor thermal noise effect onoutput phase noise is considered. As previously mentioned, switch-ing pair (coupled) and coupling pair are independent of each other,thus, they can be studied separately. Calling iI+ and iI− the cur-rents in the switching pair (see Fig. 5) and neglecting all parasiticcomponents at the common source, one can obtain:

iI−() + iI+() = ICoupled (21)

Using Eqs. (12) and (21), coupled transistors current as a functionof corresponding phase () will be

⎧⎪⎨⎪⎩iI+() = ˇCoupled

2A2(√

2 Sin2(ϕCoupled) − S(ϕ)2 + S(ϕ))

iI−() = ˇCoupled

2A2(√

2 Sin2(ϕCoupled) − S(ϕ)2 − S(ϕ))

(22)

. Comm

w⎧⎪⎪⎪⎪⎨⎪⎪⎪⎪⎩iartttt⎧⎪⎨⎪⎩Un

�

C

w

F

B�

w

M. Atarodi et al. / Int. J. Electron

here

ˇCoupled = nCoxWCoupled

LCoupled

Coupled = Arc sin

(ICoupled

2ˇCoupledA2

)S(ϕ) = Sin(ϕ) − 1/3 Sin(3ϕ)

(23)

n Eq. (23), ˇCoupled =nCoxWCoupled/LCoupled where n and Cox

re electron mobility and gate oxide capacitance per unit area,espectively. WCoupled and LCoupled are width and length of coupledransistors too. Coupled has been defined to specify the differen-ial pair working in saturation region, otherwise one of them inurned off. Using Eq. (22), one can calculate coupled transistorsrans-conductance values to be

gm−I+() = ˇCoupledA(√

2Sin2(ϕCoupled) − S()2 + S())

gm−I−() = ˇCoupledA(√

2Sin2(ϕCoupled) − S()2 − S())

(24)

sing result demonstrated in [14], ISF function of iI+ versus outputodes will be

i−I−(ϕ) = �I+(ϕ)2gm−I+(ϕ)

gm−I+(ϕ) + gm−I−(ϕ)(25)

onsidering (25), thermal noise power generated by in,I+ will be

i2n,I+ = 4KBT�gm−I+�f = 4KBT�ˇCoupledA

×(√

2Sin2(ϕCoupled) − S(ϕ)2 + S(ϕ))

= i′2n,I+ × ˛2(ϕ)

(26)

here

i′2n,I+ = 4KBT�ˇCoupledA�f

˛(ϕ) =√√

2Sin2(ϕCoupled) − S(ϕ)2 + S(ϕ)(27)

rom (2), (25) and (26) effective ISF of in−I+ will be drawn as

�i−I+,Eff(ϕ) = Cos(ϕ + ) − Cos(3ϕ + )4N Cos( )

× 2gm−I+()gm−I+() + gm−I−()

×√√

2Sin2(ϕCoupled) − S(ϕ)2 + S(ϕ)

(28)

y a few simplifications and mathematical manipulations,2i−I+,Eff-RMS can be written as

� 2i−I+,Eff-RMS = 1

2�

�∫−�

� 2i−I+,Eff(ϕ)dϕ

= 1

8�N2 Cos2( )× hI( ,Coupled)

(29)

here

hI( ,Coupled) =�∫

−�

(Cos(ϕ + ) − Cos(3ϕ + ))2

√

×

2Sin2(ϕCoupled) − S(ϕ)2 − S(ϕ)

2Sin2(ϕCoupled) − S(ϕ)2

×[Sin2(ϕCoupled) − S(ϕ)2]d

(30)

un. (AEÜ) 65 (2011) 458–467 463

Using the initial condition ( = 0), hI(0, Coupled) will be

hI(0, Coupled) = ICoupled

ˇCoupledA2(31)

By extending the factors Cos( + ) and Cos(3 + ), hI( , Coupled)can be achieved as{

Cos(ϕ + ) = Cos(ϕ)Cos( ) − Sin(ϕ)Sin( )

Cos(3ϕ + ) = Cos(3ϕ)Cos( ) − Sin(3ϕ)Sin( )

⇒ hI( ,Coupled) = 2Cos2( )ICoupled

ˇCoupledA2

(32)

Applying (1), (26), (29) and (32), the final phase noise generated byswitching (coupled) transistors will be

Li−I+(dB)∣∣N=4

= 10 × Log10

(� 2i−I+,Eff-RMSi

2n,I+/�f

4q2max�w2

)

= 10 × Log10

(�2KBT�

702C2I2Coupled(Qω0L)3�w2

) (33)

Eq. (31) shows that the output phase noise generated by coupledtransistors (switching transistors) thermal noise is independent ofcoupling current co-efficient (K) and is inversely proportional totank quality factor. It is interesting to note that generated phasenoise by switching transistors does not depend on transistor sizes(ˇCoupled).

3.3. Coupling transistors

Referring to Fig. 5, it is apparent that one can repeat the wholeanalyses of the previous section for the coupling pair as well, pro-vided that all equations for transistor currents, trans-conductancesand noise are time shifted by T/4 (i.e., phase shifted by 90 degree)and coupled transistors current ICoupled is substituted with ICoupling.The only equation that should not be phase shifted is�I+() in (25),as �I+() depends on output voltage signal and it is independentand same for all noise sources flowing into node I+. However, eachtransistor equation and its relative derivations are not interested tobe calculated again. The main purpose is obtaining the� 2

i−Q−,Eff-RMSparameter for achieving the final phase noise generated by cou-pling pair thermal noise. The simplest way to calculate� 2

i−Q−,Eff-RMSis just shifting the phase of � I+() →� I+( +�/2) and using otherachieved equations in previous section. In this condition each cou-pling transistor trans-conductance will be⎧⎪⎨⎪⎩gm−Q−() = ˇCouplingA(

√2Sin2(ϕCoupling) − S()2 + S())

gm−Q+() = ˇCouplingA(√

2Sin2(ϕCoupling) − S()2 − S())

(34)

where⎧⎪⎨⎪⎩ˇCoupling = nCox

WCoupling

LCoupling

Coupling = Sin−1(√

ICoupling

2ˇCouplingA2

)= Sin−1

(√KCouplingICoupled

2ˇCouplingA2

) (35)

Using Eq. (25) for coupling pair we have:

�i−Q+(ϕ) = �I+ϕ + �

22gm−Q−()

gm−Q−() + gm−Q+()(36)

2

Repeating the same sequence to achieve�i−Q−Eff-RMS as performed

in previous sub-section, we have:

� 2i−Q−,Eff-RMS =

K3CouplingICoupled

4�N2A2ˇCoupling(37)

464 M. Atarodi et al. / Int. J. Electron. Commun. (AEÜ) 65 (2011) 458–467

Idftab

L

Fthap

4

4

cicttVmhtppaAieti

Fig. 9. Proposed and implemented complementary LC QVCO.

The architecture of this block has been illustrated in Fig. 11.According to this figure, tank architecture should be symmetric toaffect the same capacitance load on output nodes. On third har-monic tuned tanks, varactor blocks can be used optional to reducemismatch between third and fundamental harmonics. External sec-

Fig. 8. Coupling current co-efficient effect on phase-noise degradation.

Li−Q−(dB)∣∣N=4

= 10 × Log10

(� 2i−Q−,Eff-RMSi

2n,Q−/�f

4q2max�w2

)

= 10 × Log10

(�2K3

CouplingKBT�

702C2I2Coupled(Qω0L)3�w2

) (38)

t is noteworthy that, Li−Q− does not depend on ˇCoupling as Li−I+id not depend on ˇCoupled. On the other hand Li−Q− is very strongunction of KCoupling, while Li−I+ is independent of it. In this condi-ion, dependency of phase noise generated by tank loss, couplednd coupling transistors versus coupling current co-efficient wille

iR : Li−I+ : Li−Q− = (1 + K2Coupling) : � : K3

Coupling� (39)

ig. 8 shows coupling current co-efficient effect on coupling transis-ors and tank resistor phase-noise degradation. According to (13),aving all of phase noise equivalent power of tank resistor, couplednd coupling transistors, one can calculate the VCO total outputhase noise.

. VCO architecture and circuit design

.1. VCO core

In order to generate the quadrature signal for QPSK applications,oupled LC oscillator has been implemented and for decreas-ng the flicker noise produced by coupled transistors, symmetricomplementary architecture with switched n-mos current sourceransistors at bottom has been used as shown in Fig. 9. Accordingo this figure, QVCO core consists of two separate complementaryCOs coupled to each other by coupling section formed by two n-os transistors (M1 and M2). As can be observed, each VCO sub-core

as p-mos and n-mos coupled transistors making the architec-ure symmetric and decrease the impact of flicker noise on outputhase noise. On the other hand, negative resistance seen by out-ut node will be greater compensating the energy loss in LC tanknd makes oscillation condition easier with less necessary current.

ccording to this figure, each sub-core and coupling section has

ts own separated current source blocks controlled by quadratureach sub-core output nodes. By controlling current source transis-ors with quadrature sub-core signals, Vs (defined in Fig. 9) will ben-phase with output signals resulting in least phase distortion at

Fig. 10. In-phase sub-core output signals versus Vs.

zero crossing points [9]. Fig. 10 depicts Vs versus output signals. Aslong as existing delay between current transistors gate node andVs is frequency independent, by tuning the frequency, phase dif-ference between output signals and Vs node is altered and in theworst condition, it will be

�T =(

12.4 GHz

)−(

12.5 GHz

)= 16.7ps⇒� = 15 deg (40)

Applying (2) and (3), the calculated 15 degree phase differenceresults in 0.2 dB phase-noise increment.

4.2. VCO tanks

Fig. 11. LC tank architecture.

M. Atarodi et al. / Int. J. Electron. Commun. (AEÜ) 65 (2011) 458–467 465

otpiptlmts(fcpCs{

HAau

5

orswtom

Fig. 13. VCO output in-phase and quadrature signals.

monic with appropriate swing level and producing lowest valueof thermal noise power spectral density and power consumption.Fig. 12 illustrates the microphotograph of fabricated HT VCO. Inthis figure, fundamental and third harmonic spirals inductors with

Fig. 12. Microphotograph of fabricated HT VCO.

nd harmonic tank in serial form has been applied to alleviatehe second harmonic spurs generated by Vs node to improve out-ut phase noise. Flicker noise from current source blocks can be

njected to output nodes and exacerbate phase-noise amount. Thishenomenon can be compensated by applying second harmonicuned tank in serial form. As long as each sub-core signal can oscil-ate in fundamental harmonic easier than third one, by choosing

ain harmonic swing amount as 1.5 V for supply voltage of 1.8 V,hird harmonic swing amount will be 0.5 V accordingly. Appliedpiral inductors in third harmonic tank with ordinary quality factorQ = 7) are so tuned resulting in oscillating signal in 7.5 GHz centerrequency with its appropriate signal level. In addition, VCO totalurrent is tuned resulting in minimum power consumption withroper swing for both harmonics. For fundamental tank, L1, C1 andVar-1 should be calculated to obtain in 200 MHz tuning range andwing of 1.5 V. Hence, it will be

CVar−1 = CVar−1−Min ⇒ foutput = 2.6 GHzCVar−1 = CVar−1−Max ⇒ foutput = 2.4 GHz

⇒ C1 + CVar−1−Max

C1 + CVar−1−Min= 1.17 (41)

C1 + CVar−1 +�CVar−1/2C1 + CVar−1 −�CVar−1/2

= 1.17 ⇒ (C1 + CVar−1)

= 6.9 ×�CVar−1 (42)

aving each varactor maximum tuning range (�CVar-1) applied asMOS varactor, one can calculate the extra capacitor versus�CVar-1nd its initial amount. Extra capacitors have been implementedsing Metal-Insulator-Metal (MIM) capacitors (Fig. 12).

. Simulation and measurement results

Proposed QVCO was fabricated by 0.l8 um 1P6M CMOS technol-gy in ADS environment. A supply voltage of 1.8 V was employedesulting in QVCO tuning voltage in the range of 0.4–1.4 V. Fig. 13

hows the main output signal which is a square wave form signalith frequency and amplitude matching of 94% and 92%, respec-

ively resulting in 1 degree phase shifting from ideal one. Basedn previous explanations, the more coupling section current, theore phase precision between in-phase and quadrature signals and

Fig. 14. Fundamental harmonic and HT VCO phase noise.

the more phase noise will be generated. By choosing coupling co-efficient as 0.2, phase precision of 1 degree is resulted. According toFig. 13, output differential signal swing is more than 2 V Peak-To-Peak which is appropriate for output buffers. In order to obtain thethird harmonic swing level equal to 1/3 of fundamental harmonic,coupled and coupling n-mos transistors sizes have been chosen byminimum possible amount resulting in VCO oscillating in third har-

Fig. 15. Current drawn by each VCO sub-core.

466 M. Atarodi et al. / Int. J. Electron. Commun. (AEÜ) 65 (2011) 458–467

Table 2Performance comparison between proposed and previous works.

Design Process Frequencyrange (GHz)

Phase noise Power(mW)

DOM (dB)

Hsia [7] 0.18 um CMOS 0.89–2.5 −139 dBc/Hz at 3 MHz 31 −178Perraud [10] 0.18 um CMOS 8.5–10.73 −96 dBc/Hz at 100 MHz 14 −183Kim [5] 0.35 um CMOS 0.8–1.1 −135 dBc/Hz at 1 MHz 15 −183Adreant [11] 0.35 um CMOS 0.9–1.2 −139 dBc/Hz at 3 MHz 12 −185.3

om7spo−sfahpcbsfopt[

F

TipQb

6

V0tstawlaewnaecsi1ob

[

[

[

[

[

This work 0.18 um CMOS 2.4–2.6

ther implemented blocks are defined. It can be seen that funda-ental inductor has 3.25 turns while third harmonic working in

.5 GHz frequency has 1.25 turns. Having selected appropriate tran-istors sizes resulting in minimum power consumption, achievedhase noise in output frequency of 2.5 GHz in frequency offsetsf 1 MHz and 3 MHz for simulated and measured VCO are −129.5,139, −125 and −136 dBc/Hz, respectively. Fig. 14 illustrates both

imulated and measured VCO output phase noise in correspondingrequency offsets in both conditions of using just fundamental tanknd harmonic tuned tank. According to this figure, by using thirdarmonic tank and adjusting its parameters resulting in appro-riate oscillating frequency and by steering coupling and coupledurrent source transistors with quadrature signals, phase noise haseen reduced as high as 9 dB in ideal condition and 6 dB for mea-ured VCO. Fig. 15 shows the drawn current by each VCO sub-corerom supply voltage of 1.8 V. According to this figure, the averagef current drawn by each VCO sub-core is 1.95 mA resulting in totalower consumption of 7 mW which is much lower compared tohe published VCOs with equal achieved phase noise. As defined in10], the figure-of-merit (FOM) of a VCO is

OM(dB) = L(Offset) + 10Log(PDC

1 mW

)− 20Log

(fOsc

fOffset

)(43)

he achieved FOM for fabricated QVCO at offset frequency of 3 MHzs −186 dB at 2.5 GHz. Table 2 shows the comparison results of theroposed and recently published VCOs. From this table, proposedVCO demonstrates an excellent performance to realize multi-and applications at low power consumption.

. Conclusion

In this article, a low power, low phase noise LC QuadratureCO operating at a 1.8 V supply for ISM band applications using.18um CMOS technology has been demonstrated. The architec-ure of proposed QVCO using third harmonic on VCO tank andteering coupling and coupled section current sources by quadra-ure signals has resulted in the lowest value of power consumptionnd output phase noise. Shaping the output signal toward squareave, increases signal slope at zero crossing points and results in

ess ISF RMS amount. A comprehensive analysis for frequency andmplitude deviations as high as 20% for third harmonic and itsffect on output phase-noise improvement was discussed and itas indicated that at worst case (most possible mismatch) phase-oise improvement corrupts by 2 dB. In addition, an extensivenalysis on time-variant theory of phase noise was performed. Gen-

ral closed-form formulas have been derived for the phase noiseaused by LC tanks losses and noisy currents in the MOS tran-istors. Designed harmonic tuned (HT) LC Quadrature VCO wasmplemented using 0.18 um 1P6M CMOS technology operating at.8 V for frequency band of 2.4–2.6 GHz with achieved phase noisef −136 dBc/Hz at frequency offset of 3 MHz. Total current drawny VCO is 3.9 mA resultinga low power consumption of 7 mW. Fab-

−136 dBc/Hz at 3 MHz 7 −186

ricated HT VCO figure-of-merit (FOM) is obtained to be −186 dB,making the implemented VCO superior compared to the previouslypublished VCOs.

References

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[2] Chiu J, Plett C. High frequency LC-VCO design with flicker noise reduction in0.13 �m CMOS. In: IEEE Proc. International Conference on Microelectronics(ICM), July. 2006. p. 57–60.

[3] Andreani P, Fard A. A 2.3 GHz LC-tank CMOS VCO with optimal phase noiseperformance. In: Solid-State Circuits, IEEE International Conference, February.2006.

[4] Shibata K, Sato H, Ishihara N. A Dynamic GHz-Band switching technique for RFCMOS VCO. In: IEEE Proc. on International Conference on Circuits and Systems.2007. p. 273–6.

[5] Kim H, Ryu S, Chung Y, Choi J, Kim B. A low phase-noise CMOS VCO with har-monic tuned LC tank. IEEE Transaction on Microwave Theory and Techniques2006;54(July (7)).

[6] Rael JJ, Abidi AA. Physical processes of phase noise in differential LC oscilla-tors. In: Proceeding of the Custom Integrated Circuit Conference, May. 2000. p.569–72.

[7] Hegazi E, Sjoland H, Abidi A. A filtering technique to lower LC oscillatorphase noise. IEEE Journal of Solid-State Circuits 2001;36(December (12)):717–24.

[8] Hajimiri A, Lee TH. A general theory of phase noise in electrical oscillators. IEEEJournal of Solid-State Circuits 1998;33(February (2)).

[9] Jeong C, Yoo C. 5-GHz low phase noise CMOS quadrature VCO. IEEE Microwaveand Wireless Components Letter 2006;16(November (11)).

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14] Andreani P, Wang X, Vandi L, Fard A. A study of phase noise in colpittsand LC-tank CMOS oscillators. IEEE Journal Solid-State Circuits 2005;40(May(5)):1107–18.

Mojtaba Atarodi received his Ph.D. degree from the Uni-versity of Southern California (USC) on the subject ofanalog IC design in 1993. He received the M.Sc. degreein electrical engineering from the University of California,Irvine, in 1987 and B.S.E.E. from Amir Kabir University ofTechnology (Tehran Polytechnic) in 1985.From 1993 to 1996 he worked with Linear TechnologyCorporation as a senior analog design engineer and pro-duced 2 IC product in the field of high frequency highdynamic range continuous-time Gm-C filters. Since then,he has been consulting with different IC companies. Heis currently an Associate professor at Sharif Universityof Technology. He has published more than 80 technical

journal and conference papers in the area of analog/RF and mixed-signal integratedcircuit design. He is the author of a book in Analog CMOS IC Design. He has managedseveral IC design projects and come up with 5 IC Products, namely: a SIMCARD IC, aSmartcard IC, a PCM CODEC etc.He holds one US patent. His main research interests are integrated bioelectronics,RF/analog/mixed-signal ICs, and integrated circuits for digital TV receivers.

. Comm

clpa

Integrated Circuit Designer with the Sharif IntegratedCircuits and Systems (SICAS) group at EE Departmentof SUT. His research interests include analog/RF circuitsfor wireless communications and low noise applications,data converters, and mixed-signal circuits for biomedical

M. Atarodi et al. / Int. J. Electron

Pooya Torkzadeh was born in Isfahan, in 1980. Hereceived the B.Sc. degree from Isfahan University of Tech-nology (IUT), Iran, in 2002 and the M.Sc. degree fromthe Sharif University of Technology (SUT), Iran, in 2004both in electrical engineering. He is currently pursu-ing the Ph.D. degree at Sharif University of Technologyin the field of analogue integrated circuits designingand developing. In 2005 he joint to Sharif IntegratedCircuit And System Group (SICAS) working on contin-uous/discrete time sigma-delta modulators with lowpower consumption for low power appliances. He has

received many patents in the field of sigma-delta mod-ulator designing and optimizing. He is the author and

oauthor of more than 15 international journal and conference publications on ana-og integrated circuits. His research interests include ADC signal converters, lowower phase locked loops (PLLs) with low phase noise amount for broad-bandppliances.

un. (AEÜ) 65 (2011) 458–467 467

Baktash Behmanesh was born in Borujerd, Iran, in 1984.He received the B.Sc. and M.Sc. degrees in electrical andelectronics engineering from the Sharif University of Tech-nology (SUT), Tehran, Iran, in 2006, and 2008, respectively.He is currently pursuing his Ph.D. in electronics engi-neering at SUT. From 2008, he is an Analog/Mixed-Signal

applications.