resumen clase 5 y 6.pdf

8/9/2019 RESUMEN CLASE 5 Y 6.pdf

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UNIVERSIDAD NACIONAL DE INGENIERA

Subtitle

FACULTAD DE INGENIERA MECNICA

PROCESADORES DIGITALES DE SEALES (MT-418)

By:

EXTRA TOPICS:

ADC

&PWM

OVERVIEW

Ing. Daniel Leonardo Barrera Esparta

Friday, 31 January, 2014


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CONTENTS

I.- OBJECTIVES

II.- ADC

III. PWM.


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I.- OBJECTIVES.

Knowledge of DSPs Interrupts and topics

Knowledge of ADC Interrupts and topics.


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III.- ADCOne of the most important peripheral units of an embedded controller is the Analogue to Digital

Converter (ADC). This unit provides an interface between the controller and the real world. Therelationship between the analogue input -voltage (Vin), the number of binary digits to represent the

digital number (n) and the digital number (D) is given by:In the case of the F2833x, the voltage VREF-

is fixed at 0V and VREF+ is connected to+3.0V. The F2833x internal ADC has a 12-bitresolution (n =12) for the digital number D.

F2833x is equipped with 16 dedicated input pins to measure analogue voltages. These 16 signals aremultiplexed internally, which means they are processed sequentially. To perform a conversion, the ADC hasto ensure that during the conversion procedure there is no change of the analogue input voltage Vin,otherwise the digital number would be erroneous. An internal sample and hold unit (s&h) takes care ofthis. The F2833x is equipped with two s&h-units, which can be used in parallel. This allows us to converttwo input signals (e.g. two currents of a 3-phase system) at the same time.


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III.- ADCDigital resolution of the converted number is 12 bits. Assuming an input voltage range from 0...+3V, weobtain a voltage resolution of 3.0V/4095 = 0.732mV per bit.

We have two Sample-and-Hold units, which can be used in parallel; the corresponding operating modeis called simultaneous sampling. Each sample and hold unit is connected to 8 multiplexed input lines.There is also an auto sequencer, which is a programmable state machine that is capable of automaticallyconverting up to 16 input signals. Each state of the auto sequencer stores a measurement in its owndedicated result register.

The fastest conversion time is 80ns per sample in a sequence and 160ns for the very first sample. Ofcourse we will have to adapt this conversion rate to the signal system that is actually used.

Sixteen individually addressable result registersTrigger sources for start-of-conversion : External trigger on pin GPIO/XINT2_ADCSOC, S/W (writedirectly) or ePWM-Modules


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III.- ADCThe ADC module can operate in different setups. An operating mode is always a combination of thethree different basic selections: Sequencer Mode

- Cascaded Sequencer Mode (16 states)- Dual Sequencer Mode (2 x 8 states) Sampling Mode- Sequential Sampling (1 channel at a time)- Simultaneous Sampling (2 channels at a time)

Start Mode

- Single Sequence Mode (stop at end of sequence)- Continuous Mode (wrap sequencer at end of sequence)


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III.- ADC Sequencer Mode- Cascaded Sequencer Mode (16 states)

One Auto-Sequencer controls the flow ofthe conversion. Before we can start aconversion, we have to setup the numberof conversions (MAX_CONV1) andwhich input line should be converted inwhich stage (CHSELxx). The results are

buffered in individual result registers(RESULT0 to RESULT15) for eachstage.

We can choose between two moreoptions: Simultaneous (S/H units are

used in paralell to convert input lines withthe same input code) and Sequentialsampling.


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III.- ADC Sequencer Mode

- Dual Sequencer Mode (2 x 8 states)

This mode splits the Auto-Sequencer intotwo independent state machines (SEQ1and SEQ2).The reason for this split mode is to havetwo independent ADCs, triggered by theirown control time base for SEQ1 and

SEQ2. In the ePWM chapter you will learnthat we can generate ePWM_SOC_A andePWM_SOC_B by various time events inany of the ePWM units. As an exampleyou can use ePWM1-3 as the controlsystem for a first 3-phase motor control

unit and ePWM4-6 for a second one. Insuch a scenario SEQ1 will be themeasurement unit for motor 1 and SEQ formotor 2.


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III.- ADC


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III.- ADC


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III.- ADC


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III.- ADC


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III.- PWMWhile some time-based control scenariois sufficient for most time-based softwareactivities, it is not suitable for hardwarerelated actions, such as switching the

control line of an output stage frompassive to active. In this case we needmuch more precise and automaticresponse to the actuator control lines,based on different events on the timeline.This is where PWM - lines come into the

play.

The main applications of PWM are: Digital Motor Control (DMC) Control of switching pulses for DigitalPower Supply (DPS) systems

Analogue Voltage Generators

The purpose of an ePWM unit is togenerate a single ended signal or a pair of output signals, called EPWMxA andEPWMxB, which are related to each other.


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III.- PWMThe central block of an ePWM unit is a 16-bittimer (register "TBCTR"), with signalSYSCLKOUT as its time-base. A clockprescaler (register TBCTL, bits 12 to 7) can be

used to reduce the input counting frequencyby a selectable factor between 1 and 1792.Register TBPRD defines the length of a periodof an output signal, in multiples of the time-period of the input signal.Another unique feature of the F2833x is its

shadow functionality of operating registers,in the case of ePWM units available for compare register A, B and period register. Forsome applications it is necessary to modifythe values inside a compare or periodregister, every period. The advantage of the

background registers is that we can preparethe values for the next period in the currentone. Without a background function we wouldhave to wait for the end of the current period,and then trigger a high prioritized interrupt.


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III.- PWMTwo hardware signals "SYNCI" (synch in) and"SYNCO" (synch out) can be used to

synchronize ePWM units to each other. For example, we could define one ePWM unit as a"master" to generate an output signal"SYNCO" each time the counter equalsperiod. Two more ePWM units could beinitialized to recognize this signal as "SYNCI"and start immediately counting, each timethey receive this signal. In such way we haveestablished a synchronous set of 3 ePWMchannels. But we can do even better. By usinganother register called "TBPHS" we canintroduce a phase shift between master, slave1 and slave 2, an absolute necessity for three-phase control systems.


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III.- PWMTimer Operating ModesEach ePWM module is able to operate in one of 3different counting modes, selected by bits 1 and 0 of register TBCTL:

count up mode count down mode count up and down modeWhich of the three modes is used is mostlydetermined by the application. The first two operatingmodes are called "Asymmetrical" because in of the

shape of the counting pattern from 0 to TBPRD (countup) or from TBPRD to 0 (count down). Also, in a threephase system, one could define three different timingevents between 0 and TBPRD to switch a phaseoutput signal to "ON" and to use the match betweenTBCNT and TBPRD to switch "OFF" all three phases

simultaneously, thus generating an asymmetricalshape of the switch signals.In "Symmetrical" waveform mode, the register TBCNTstarts from zero to count up until it equals TBPRD.Then TBCNT turns direction to count down back tozero to finish a counting period.


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III.- PWM


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III.- PWM


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III.- PWMThe module to control the active phase of a pulse pattern and the position of the switching points in a PWMis called the Compare Unit. Depending on the pre-selected operating mode of the ePWM unit, it is possibleto define 2 or 4 events within a period of the PWM - frequency, by choosing the appropriate values in CMPAand/or CMPB.


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III.- PWM


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III.- PWMWe can initialize this unit by a set of two controlregisters, AQCTLA for output line A and AQCTLB for line B. For each of the 6 events on a timescale (Zero-match; CMPA-up, CMPB - up, Period, CMPA - down

and CMPB - down) we can specify a certain action atthe corresponding signal line:

set line to high (rising edge) clear line to low (falling edge) toggle the line (low to high OR high to low)

do nothing (ignore this event)

Furthermore we can also force the corresponding lineto a certain level by executing a software instructionin one of two software force registers. In most cases,the latter option is not used, because it cannot be

synchronized with other hardware activities of thePWM unit. Sometimes however, especially for emergency routines, it is welcome to have such aforce option.


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III.- PWM


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III.- PWMMotivation for Dead - BandIn switched mode power electronics, a typical configuration to drive a 3-phase system. A typical systemconsists of a 3-phase current or voltage injection circuit, in which a pair of power switches per phase iscontrolled by a sequence of PWM - pulses. A phase current flows either from a DC bus voltage through a top

switch into the winding of a motor or via a bottom switch from the motor winding back to ground. Of course,we have to prevent both switches from conducting at the same time.


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III.- PWMMotivation for Dead - BandA minor problem arises from the fact that power switchesusually turn on faster than they turn off. If we would apply anidentical but complementary pulse pattern to the top and

bottom switch of a phase, we would end up in a short periodin time with a shoot-through situation.Dead-band control provides a convenient means of combating current shoot-through problems in a power converter. Shoot-through occurs when both the upper andlower transistors in the same phase of a power converter are

on simultaneously. This condition shorts the power supplyand results in a large current draw. Shoot-through problemsoccur because transistors (especially FETs) turn on fasterthan they turn off and also because high-side and low-sidepower converter transistors are typically switched in acomplimentary fashion. Although the duration of the shoot-

through current path is finite during PWM cycling, (i.e. thetransistor will eventually turn off), even brief periods of ashort circuit condition can produce excessive heating andstress the power converter and power supply.


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III.- PWMMotivation for Dead - BandA minor problem arises from the fact that power switchesusually turn on faster than they turn off. If we would apply anidentical but complementary pulse pattern to the top and

bottom switch of a phase, we would end up in a short periodin time with a shoot-through situation.Dead-band control provides a convenient means of combating current shoot-through problems in a power converter. Shoot-through occurs when both the upper andlower transistors in the same phase of a power converter are

on simultaneously. This condition shorts the power supplyand results in a large current draw. Shoot-through problemsoccur because transistors (especially FETs) turn on fasterthan they turn off and also because high-side and low-sidepower converter transistors are typically switched in acomplimentary fashion. Although the duration of the shoot-

through current path is finite during PWM cycling, (i.e. thetransistor will eventually turn off), even brief periods of ashort circuit condition can produce excessive heating andstress the power converter and power supply.


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III.- PWMMotivation for Dead - BandTwo basic approaches exist for controlling shoot-through:modify the transistors, or modify the PWM gate signalscontrolling the transistors. In the first case, the switch-on

time of the transistor gate must be increased so that it(slightly) exceeds the switch-off time.The hard way to accomplish this is by adding a cluster of passive components such as resistors and diodes in serieswith the transistor gate to act as low-pass filter to implementthe delay.

The second approach to shoot-through control separatestransitions on complimentary PWM signals with a fixedperiod of time. This is called dead-band. While it is possibleto perform software implementation of dead-band, the F2833xoffers on-chip hardware for this purpose that requires noadditional CPU overhead. Compared to the passive approach,

dead-band offers more precise control of gate timingrequirements.


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III.- PWM


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III.- PWM


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III.- PWM


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III.- PWM


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III.- PWMThe PWM-chopper sub module allowsa high-frequency carrier signal tomodulate the PWM waveformgenerated by the action-qualifier and

dead-band sub modules. Thiscapability is important if you needpulse transformer-based gate driversto control the power switchingelements.

The key functions of the PWM-choppersub module are: Programmable chopping (carrier)frequency Programmable pulse width of firstpulse

Programmable duty cycle of secondand subsequent pulses Can be fully bypassed if not required


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III.- PWM


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III.- PWMePWM Over Current ProtectionEach ePWM module is connected to six Trip - Zone signals (TZ1to TZ6) that are sourced from the GPIO MUX. These signalsindicate external fault or trip conditions, and the ePWM outputscan be programmed to respond accordingly when faults occur.

Trip Zone signals are usually generated by over-current sensors,which set a signal if a threshold is passed. The key functions of the Trip-Zone sub module are: Trip inputs TZ1 to TZ6 can be flexibly mapped to any ePWMmodule. Upon a fault condition, outputs EPWMxA and EPWMxB can be

forced to one of the following: High, Low, High-impedance andNo action taken One-shot trip (OSHT) mode to support major short circuits orover-current conditions. Support for cycle-by-cycle tripping (CBC) for current limitingoperation.

Each trip-zone input pin can be allocated to either one-shot orcycle-by-cycle operation. Interrupt generation is possible on any trip-zone pin. Software-forced tripping is also supported.


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III.- PWM


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III.- PWM


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III.- PWM

the event trigger sub module. It monitorsvarious event conditions, such as

Counter value TBCTR = zero Counter value TBCTR = TBPRD

Counter value TBCTR = CMPACounter value TBCTR = CMPB

and can be configured to prescale theseevents before issuing an Interrupt requestor an ADC start of conversion. The event-trigger prescaling logic can issue Interruptrequests and ADC start of conversion at:

Every event Every second event Every third event


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III.- PWMThe Event-Trigger- Sub module is initializedby a set of registers:

ETSEL - This register selects which of

the possible events will trigger an interruptor start an ADC conversionETPS - This register programs the event

prescaling options mentioned above.ETFLG - Register with flag bits to indicate

the status of the selected and prescaled

events.ETCLR - These bits allow you to clear theflag bits in the ETFLG register via software.

ETFRC - These bits allow softwareforcing of an event. Useful for debugging ors/w intervention.


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III.- PWM


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III.- PWM

resumen clase 5 y 6.pdf

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