Resonant Boost Converter DesignJustin BurkhartApril 15, 2009

Presentation OutlineProject GoalsThe Class E InverterResonant RectifierLDMOS Device ModelCompleted Boost Converter Design

Project GoalsDesign a resonant boost converter using TI LBC5 process LDMOS devicesTargeted at automotive applications with:11-16 Vdc Input30 Vdc Output10-20 WattsHighest possible switching frequency with efficiency >80% (if possible)

The Class E Inverter

L1 is large choke with only DC current

Switch is opened and closed periodically

Assumed high enough Q such that io is sinusoidal

When the switch opens, circuit is designed such that the voltage V(t) rings back to zero D*T later thus providing a ZVS opportunityAdjusted to deliver DC and AC power to the load

The Class E InverterAdjusted to deliver DC and AC power to the loadPros Zero Voltage Switching Only one ground referenced switch required

Cons High peak device voltage Large choke inductor Sensitive to load changes Limited minimum output power when C1 is constrained

Resonant Input InductorThis results with: Faster Transient Response Lower Minimum Output Power Flexibility in choice of C1To see what happens when the value of L1 is reduced break it into two hypothetical inductors, one that carries only DC current and one that carries only AC current.In this configuration, L1-AC is in parallel with C1

Equivalent Load for Class E InverterThe load of the Class E Inverter Circuit is tuned to look inductive and can be modeled by an inductor and resistorThis equivalent load provides for a simpler design procedure when the inverter will be used in a DC/DC converter

Solve for component Values Solve for the drain voltage by integrating current in the equivalent C1

Solve for the fundamental Fourier component of drain voltage

Set drain voltage and slope of drain voltage to zero at switch turn on time

Solve for phase of the voltage and current fundamental components

Solve for circuit component valuesAssume DC current in the input

Assume sinusoidal current in load

Resonant RectifierTo transform the Class E inverter into a DC/DC boost converter, the output of the inverter must be rectifiedA resonant rectifier is used since the losses incurred by a hard switched rectifier at high frequency are too high to maintain good efficiencyThe rectifier load is modeled as a constant voltage source since the complete DC/DC converter will use feedback to hold the output voltage constant

Resonant RectifierTo maintain ZVS the rectifier must present the same impedance to the Class E Inverter as the L-R load networkWhen designing the rectifier, the goal is to choose L and C such that rectifier will have the same current Io(t) as the L-R circuit. This will maintain ZVS in the inverter.

Rectifier Operation Diode turns on when Vdiode(t) goes > Vout Diode turns off when Io(t) goes < 0 Initial conditions are known, thus equations for Io(t) and Vdiode(t) can be derived Using initial conditions, ton and toff must be solved for Closed form solution is not easily arrived at since equations are non-linear and very messyVdiode(t)

Rectifier Equivalent ModelRectifierModel 1Model 2Total Current: Solid Lines DC Current: Dashed Lines

Example Of Rectifier TuningIncrease FoDecrease ZoGoal: Adjust the resonant frequency of the rectifier until the input current has the desired phase

Adjust the characteristic impedance of the rectifier until the desired output power is reached

LDMOS Device ModelTypical LDMOS Device ModelSimplified LDMOS Device ModelParasitic capacitance measurement procedure

Device Measurement DataRds-on Data Test Device only has 1 bond wire per device terminal This is a limiting factor in measuring small parasitic device resistances TI process engineers report that Rds-on for devices in this lot were measured at 165mOhm This would result with an estimate of about 475mOhm bond wire resistance

Device Measurement ResultsCoss DataCiss Data1.45 pF extra parasitic capacitance from measurement 2.3 pF extra parasitic capacitance from measurement

Simulated DC/DC Converter

Converter Efficiency.PARAM Vdc=12.PARAM F=75e6.PARAM Vout = 30.PARAM numCycles=200.PARAM numCyclesDisp=5

.PARAM ratio = 1.15.PARAM wo=2*pi*F*ratio

.PARAM zo=30.PARAM Lrect = zo/wo.PARAM Crect = 1/(zo*wo)

.PARAM Lpar = .2n.PARAM INDQ = 120Efficiency and Output PowerLoss Breakdown by ComponentGate Drive is Not Included

Future Work Device optimization Parametric variance analysis Gate driver Power section prototype Integrated controller design Complete converter