Resonance-Aware Design Approach for Reducing

Noise Coupling between Power Buses: Using

Fan-Shaped Open Stub on Printed Circuit Boards

W. T. Huang1*, C. H. Chen2 and K. W. Yang3

1Department of Computer Science and Information Engineering, Minghsin University,

Hsinchu, Taiwan 304, R.O.C.2Department of Management Information Systems, Central Taiwan University,

Taichung, Taiwan 406, R.O.C.3Department of Electronic Engineering, National Taipei University of Technology,

Taipei, Taiwan 106, R.O.C.

Abstract

Power islands are often employed in printed circuit board designs to reduce the problem of

power bus noise coupling between circuits. However, the resonances between two neighboring power

buses, which could be supplying different voltages, can increase the ground bounce noise at high

frequencies. Therefore, we propose a new resonance-aware design � a fan-shaped open stub structure

embedded in the power bus to reduce noise. Based on our simulation and experimental results, |S21| of

about -10 dB in the primitive structure could be reduced to -30 dB and -42 dB, respectively,

demonstrating that this method is effective in controlling ground bounce noise.

Key Words: Fan-Shaped Open Stub, Power Integrity, Power Bus, Resonance, PCB

1. Introduction

Lower noise interference and signal integrity (SI) are

essential characteristics of printed circuit board (PCB) de-

sign. SI, which must be unimpaired, is an important factor

in the design of a high-speed PCB [1]. Moreover, in the

high-speed PCB design, power integrity (PI) is tight rela-

tion with SI [2]. Since a pair of power-ground planes forms

a resonator which is improperly designed, then the noise

with the frequency close to the resonance could be accumu-

lated, causing more severe PI problems [3]. That is, such

improper PI design causes more noise in SI. Therefore, sta-

bilize and lower noise power source is the criterion factors

to the high-speed PCB design, and a better signal quality

also can reduce noise. When a high-speed system with

lower operation voltage makes lower tolerance of noise in-

terference progressively, this system stability is more and

more difficultly to design. In addition, power buses, which

is the partial power plane and could be supplying different

voltages, noise caused by noise interference of integrated

circuits (ICs) is also referred to as ground or power bounce

noise. Attention has gradually focused on the PI study,

since it contributes to SI problems [4].

To reduce the ground bounce of PCB having been

studied in the literals, one of them is to add the decoup-

ling capacitors around the noise source in PCB which of-

fers the ground paths [5]. Generally, most traditional

mechanisms have used decoupling capacitors to reduce

ground or power bounce noise [6,7]. Its reducing noise

effect is also limitation by the characteristic of decoup-

ling capacitors in high frequency. Therefore, the decoup-

ling capacitors can not effectively alleviate the problem

of ground or power bounce noise [6�8].

Another method is desirable to isolate relatively

noisy regions of a PCB power bus from quiet areas by di-

viding the power bus into separate regions using a small

rectangle gap between power islands [9]. Since there is a

Tamkang Journal of Science and Engineering, Vol. 12, No. 2, pp. 201�208 (2009) 201

*Corresponding author. E-mail: wthuang@must.edu.tw

side effect that this small gap will generate new reso-

nance frequencies in lower frequency band, they seri-

ously impact PI and EMI issues [10]. In other words, the

power or ground bounce noise causes the resonance be-

tween these two neighbor power buses. The resonance

cavity is also formed between two power-ground planes

when a resonance frequency may be excited by such a

structure [11]. Since this resonance cavity will propagate

the noise energy, it causes the un-stable power supply.

Then, high noise even causes the wrong operations.

Therefore, electromagnetic interference (EMI) of PCB

issue will be happened near these resonance frequencies

[4,12].

At this moment, together the power buses with their

ground plane can be as the structure of resonance cavity.

Such resonance cavity is a complete electric field con-

ductor, called perfect electric conductor, from head to

foot; and it is also a complete magnetic field conductor,

called perfect magnetic conductor, all around. Therefore,

one or some modes can be excited by such a waveguide

structure of adjacent parallel buses [12]. In this study,

from literal [9,13], as one power plane is divided into

two independent power buses by a gap, the power bus

can also be considered as a waveguide structure of adja-

cent parallel buses, and therefore, resonant frequencies

that may be excited by such a structure can be analyzed

by resonance cavity theory.

From the literal [9] and the verified by our simula-

tion, we know that there are four resonant frequencies in

this study. Also, the fan-shaped open stub (FSOS) struc-

ture has been the subject of detailed literal [14,15]. For

reducing theses resonant frequencies, we first propose

the methodology to reduce the power bus noise by using

the FSOS structure in this study. Therefore, there are de-

signed four fans, which are corresponding to these four

resonance frequencies respectively, to be applied and

then effectively reduce this noise. That is, if the im-

pendence of these designed four fans is zero which is in

the short out reason, there is no noise radiation from their

corresponding resonance frequencies. So, once the reso-

nant frequencies are known, our proposed FSOS struc-

ture can be embedded in the power buses to effectively

reduce the amount level of resonance frequency pro-

duced by two neighboring buses below -30 dB.

This paper is organized as follows. Section 2 de-

scribes the principle of basic model. Section 3 discusses

the reference test board topology. Section 4 describes

and demonstrates our proposed structure. Simulation and

experimental results are demonstrated in Section 5. Sec-

tion 6 presents our conclusions.

2. The Principle of Basic Model

In high frequency and microwave circuit, the micro-

strip line could be widely used as the structure of the

coplanar transmission line [16]. In the open stub struc-

ture, the load is open as shown in Figure 1(a). Then, as

the impendence Zin = -jZ0 cot(�d) [17], the variation rela-

tion between Zin and the length of transmission line is

shown in Figure 1(b). Let Zin be the input impedance, Z0

be the characteristic impedance, d be the length of trans-

mission line, and � be phase coefficient.

Moreover, for getting the more bandwidth, the struc-

ture of FSOS is employed here to reduce ground bounce

noise. Then, a simplified design using FSOS to explain

our methodology of reducing ground bounce noise is

shown in Figure 2. In this design, ri is the inner radius, ro

is the stub outer radius, � is the angle in radians sub-

tended by the stub, and W is the width of the transmission

line [14].

The input impendence of FSOS is shown in Eq. (1).

202 W. T. Huang et al.

Figure 1. (a) Transmission line of receiving terminal by open-ing way [17], (b) Relation between Zin and d [17].

Accordingly, parameters ri and ro predominate in mini-

mizing Zin. Moreover, the quarter-wavelength FSOS is

used in this design such that the feed points, Port 1 and

Port 2 as shown in Figure 7, can be considered as shorts

at the design frequencies [14].

(1)

Let Jm(x) be a Bessel function of the first kind of or-

der m, and Nm(x) be a Neumann function (Bessel func-

tion of the second kind) of order m. Furthermore, let h be

the thickness of the microstrip substrate and k be the

phase constant in radians/unit length [14]. Then, cot(kri,

kro) as the large radial cotangent function and Zo(ri) as

the FSOS characteristic impendence at a distance ri is

shown in Eqs. (2), (3), respectively [14].

(2)

(3)

Assume that FSOS is designed so that Zin is zero at a

frequency of f = 1.4 GHz. Then, according to Eq. (1), if

cot(kri, kro) is zero, this will force Zin to be zero, and

N0(kri)J1(kr0) – J0(kri)N1(kr0) must also be zero. Let EQZin

= N0(kri)J1(kr0) – J0(kri)N1(kr0). If � is the attenuation

constant and � is the phase coefficient or propagation

constant under the lossless transmission line, then let jk

= � + j� and k = � – j�. If � can be ignored, hence let k =

�. The relation between � and � is shown in Eqs. (4), (5)

[17], when � is in radians/unit length. In Eq. (5), �0 = c/f

is the signal wavelength in vacuum condition. Here, let

�reff = 3.6 be the effectively relative dielectric constant of

the material [18], C be the speed of light (3 � 108 m/s)

[19], and f be the propagation frequency.

(4)

(5)

For intuitionally understanding how to choose these

parameters, five steps within one complete example are

discussed to decide the dependence between ro, ri, and

Zin as follows. Assume that FSOS is designed so that Zin

is zero at a frequency of f = 1.4 GHz.

Step 1: Determine �, � = �0/�reff in Eq. (5), where �0 =

c/f. Here, let �reff = 3.6, C = 3 � 108 m/s, and f =

1.4 GHz. Hence, �0 = c/f = (3 � 108)/1.4 = 214.2

(m), and then � will be 112.89 m, since

Step 2: Determine k = � to be obtained from Eq. (4)

since � = 112.89 has been gotten from Step 1.

Step 3: Determine relation between ri, ro, and EQZin.

Substitute k = 0.0556 into EQZin. Since there are

two unknown variables, ri and ro, within one

equation, many dependent solutions exist in this

equation. Some relation solutions between ro, ri,

and EQZin are shown in Figure 3.

Step 4: From Figure 3, the relation between ri and ro, and

EQZin = [0.3, -1.0] can be gotten and shown in

Figure 4. Moreover, one, Zin = 0, of these solu-

tions is our target and to be chosen. Therefore,

2.1 ri 9 and 19 ro 34. For more precise, Zin

= 0 can be chosen and shown in Figure 5. One

proper fan size, which is dominated by ro, can be

designed here. So, ro = 25.1 mm is chosen form

one of better results and then calculated by the

numerical analysis method to get anther variable

ri = 4.3 mm of them from Eq. (1).

Resonance-Aware Design Approach for Reducing Noise Coupling between Power Buses 203

Figure 2. Theoretical model of FSOS connected to a trans-mission line of width W [14].

Step 5: As the resonance is at 1.4 GHz, then ro = 25.1

mm and ri = 4.3 mm can be gotten from above

design steps. Then, the � can be gotten from the

input impendence Eq. (1) and characteristic im-

pendence at a distance ri in Eq. (3). Substituting

h = 1.6 mm, ro = 25.1 mm, ri = 4.3 mm, and �r =

4.3 into Eq. (3), the relation between Zin and � are

shown in Figure 6. From this result, we know

that more � can get more widely bandwidth to re-

duce the noise. There are four fans to be applied

and reduce the ground bounce noise of four reso-

nance frequencies in this study, respectively.

Therefore, one fan can just get the maximum 90

(360/4) within one noise source. Also, one pro-

perly chosen parameter is to implement. From

our simulation, we learn and choose that � = 62

is a more bandwidth than others, but it could be

in the range 15�120 [20].

3. Reference Test Board Topology

Generally, a four-layer PCB structure is used; the sec-

ond and third layers are the ground and power planes, re-

spectively, while the signal traces are on the first and

fourth layers. Since the geometric structure can reduce the

noise between the PCB power buses, a two-layer power

plane structure is discussed here [21]. The reference test

board had two power conductor buses and was 6 � 4

inches in size and 1.6 mm thick [9]. The parameters of

ground and power planes was set as the perfect electric

conductor. The dielectric constant �r was 4.4, and the loss

tangent was 0.035. Since our proposed structure had two

power buses, we used a 32 mil gap to separate them in the

center of the power plane. The lumped Port 1 and Port 2

are set in the center of each power bus as shown Figure 7.

A lumped-element circuit model of Figure 7 for the

test configuration board is shown in Figure 8. The power

bus structure is modeled as a �-network comprised of

two shunt capacitors representing the inter-bus capaci-

tances of the two buses and one series capacitor repre-

senting the coplanar gap capacitance [9]. The source and

load impedances defined by the network analyzer are 50 �.

204 W. T. Huang et al.

Figure 3. 3D graph relation solutions between ri, ro, and EQZin.

Figure 6. Relation between Zin and �.

Figure 4. Relation between ri and ro as EQZin = [0.3, -1.0].

Figure 5. Relation between ri and ro as EQZin = 0.

The gap capacitance is generally on the order of several

picofarads and is much lower than the inter-bus capaci-

tance.

There is little coupling at very low frequencies due

to the isolation provided by Cgap. There is also little cou-

pling at very high frequencies due to the low impedance

of Cbus. For the values of resistance and capacitance in

Figure 8, the coupling peaks at 30 MHz. This coupling is

greater for larger values of Cgap.

The calculated |S21| of our board based on circuit

model with different capacitance values, 3.1 pF, 2.5 pF,

1.7 pF, 1.1 pF, 0.75 pF, 0.58 pF, and 0.48 pF, as a function

of frequency and simulation |S21| of our board with dif-

ferent gap widths, 16 mil, 64 mil, 125 mil, 250 mil, 500

mil, and 1000 mil, as a function of frequency for the test

board are shown in Figure 9. From these results, we

know that one gap between two buses is corresponding

to one capacitor. Moreover, the isolation between two

buses is a function of the gap width. Wider gap with

lower |S21| provides better isolation due to smaller gap

capacitance. The uppermost curve in Figure 9 corre-

sponds to a 16-mil gap. Each time the gap width is dou-

bled additional isolation is achieved.

As the circuit model in Figure 8 suggests, isolation is

also a function of the inter-bus capacitance and hence a

function of the spacing between the power buses. Larger

values of inter-bus capacitance divert more source cur-

rent causing less current to reach the other island. From

our simulation and following to the original design one

[9], a 32-mil gap width, whose |S21| is about �40 dB, be-

tween 2 buses with 63 mils thick is enough used in our

design.

Then, using the simulation software to simulate the

reference test board as shown in Figure 7, it is to study

the resonance frequency phenomenon between two power

buses. Since there is a perfect resonance cavity between

these power planes, the voltage wave is nearly limited

among them. The simulation and experiment results are

shown in Figures 10 and 11, respectively. Therefore, all

of these results show the resonance frequencies on fact

that the energy of specification frequencies is transmitted

from Port 1 to Port 2. In the study, |S21| is used to ob-

serve the level of the ground bounce noise. A lower level

of |S21| implies better isolation for reducing the ground

bounce noise [9]. On the contrary, a high level of |S21| im-

Resonance-Aware Design Approach for Reducing Noise Coupling between Power Buses 205

Figure 7. Reference test board [9].

Figure 8. A lumped-element circuit model of the test con-figuration [9].

Figure 9. Calculated |S21| of our board with different capaci-tance values based on circuit model and simulation|S21| of our board with different gap widths. Figure 10. |S21| of reference test board [9].

plies the poor isolation of ground bounce noise. Follow-

ing the problem of literal [9], since there are four reso-

nant frequencies during 1�3 GHz and there is no reso-

nance during 0�1 GHz, there is no strategy to deal below

1 GHz.

4. Our proposed Structure

From [9], we know that four resonant frequencies

exist in the two reference power buses shown in Figure

10. They are approximately 1.4, 1.8, 2.3, and 2.8 GHz.

FSOS with four fans embedded in the power bus is de-

signed to reduce these four different bands of ground

bounce noise, as shown in Table 1. The result indicated

that |S21| of the reference board simulation was about -10

dB from resonance in the primitive structure, as shown in

Figure 13(I). Then, FSOS with four fans embedded in the

power bus is designed to reduce these four different

bands of ground bounce noise, as shown in Table 1.

When these parameters are employed in our simulated

structure as shown in Figure 12(a), the simulation |S21|

was reduced below -30 dB in the range 1�3 GHz as also

shown in Figure 13(III).

5. Simulation and Experimental Results

Our experiments without and with the FSOS two-

layer PCB are shown in Figure 7 and Figure 12(b), in size

and 1.6 mm (63 mils) thick isolated thick isolated by

FR4 PCB material with �r = 4.3 [22] in our experiment

boards are used. A 32 mil gap, which is added between

two power buses to isolate them, was cut in the middle of

the power plane forming two isolated power buses. Port

1 and Port 2 are connected to two independent power

buses with SMAs (SubMiniature Version A Connector).

Two 85-mil diameter semi-rigid coaxial probes were at-

tached to the center of the power islands. The transient

voltage is fed into Port1 of the test board as the noise in-

put of SSN, and Port 2 is as the received port. The volt-

age transfer coefficient |S21| [23] between these two ports

was measured using an Advantest R3767CG network

analyzer with 8 GHz bandwidth. The magnitude of S21

206 W. T. Huang et al.

Figure 11. |S21| of experiment board.

Table 1. FSOS parameters at different frequencies

Parameter fan-shaped a fan-shaped b fan-shaped c fan-shaped d

f (GHz) 1.4 1.8 2.3 2.8

ro (mm) 25.00 11.50 19.50 14.50

rI (mm) 4.3 4.5 6.0 5.5

� 62 70 55 80

Figure 12. (a) Simulation schematic for our proposed FSOSwith four fan shapes. (b) Physical dimensions ofour experimental board.

is the ratio of transmitted signal at Port 2 to the incident

signal at Port 1 and provides a good indication of the iso-

lation between the two ports [6]. Lower levels of |S21| im-

ply better isolation. Our results show that |S21| of the

primitive structure is similar to the simulation result with

a value of about -10 dB from resonance [9], as shown in

line (I) of Figure 13. Line (IV) in Figure 13 indicates that

for FSOS with four fans, |S21| can be reduced to -42 dB in

the range 1�3 GHz.

6. Conclusion

We used resonance cavity theory to analyze the reso-

nant frequency between two neighboring power buses in

the reference test board. Our proposed fan-shaped open

stub with different dimensions included in the power bus

can effectively reduce the corresponding resonance fre-

quencies. Since four such frequencies exist, we applied

four different dimensions of FSOS. The values for ro, ri,

and � used in our experiment are shown in Table 1. In

this study, |S21| of about -10 dB in the primitive structure

can be effectively reduced to -30 and -42 dB in our simu-

lated and experimental structures, respectively. There-

fore, we believe that our proposed FSOS can be applied

to PI systems to effectively decrease the power bus noise

quite.

Acknowledgment

The authors would like to thank the National Science

Council of the Republic of China for financially support-

ing this research under Contract No. NSC 96-2218-E-

027-001-, NSC 97-2218-E-159-002-, and NSC 97-2622-

E-027-009-CC3.

References

[1] Bogatin, E., “Signal Integrity - Simplified,” Prentice

Hall (2003).

[2] Hwang, J. N. and Wu, T. L., “Coupling of the Ground

Bounce Noise to the Signal Trace with via Transition

in Partitioned Power Bus of PCB,” IEEE Int. Sym. on

Electromagnetic Compatibility, Vol. 2, pp. 733�736

(2002).

[3] Chang, T. H., “Minimizing the Switching Noise in a

Power Distribution Network Using External Coupled

Resistive Termination,” IEEE Trans. Adv. Packag.,

Vol. 28, pp. 754�760 (2005).

[4] Wu, T. L., Chen, S. T., Huang, J. N. and Lin, Y. H.,

“Numerical and Experimental Investigation of Radia-

tion Caused by the Switching Noise on the Partitioned

DC Reference Planes of High Speed Digital PCB,”

IEEE Transactions on Electromagnetic Compatibility,

Vol. 46, pp. 33�45 (2004).

[5] Hubing, T., “Effective Strategies for Choosing and

Locating Printed Circuit Board. Decoupling Capaci-

tors,” IEEE Transactions on Electromagnetic Com-

patibility, Vol. 2, pp. 632�637 (2005).

[6] Chen, J. and He, L., “Efficient In-Package Decoupling

Capacitor Optimization for I/O Power Integrity,”

IEEE Transactions on Computer-Aided Design of In-

tegrated Circuits and Systems, Vol. 26, pp. 734�738

(2007).

[7] Meng, X., Arabi, K. and Saleh, R., “Novel Decoupling

Capacitor Designs for Sub-90 nm CMOS Techno-

logy,” IEEE Quality Electronic Design, 2006. ISQED

‘06. 7th International Symposium on, pp. 27�29 (2006).

[8] Tang, K. T. and Friedman, E. G., “On-Chip I Noise

in the Power Distribution Networks of High Speed

CMOS Integrated Circuits,” IEEE ASIC/SOC Confer-

ence, pp. 53�57 (2000).

[9] Chen, J., Hubing, T. H., Van Doren, T. P. and DuBroff,

R. E., “Power Bus Isolation Using Power Islands in

Printed Circuit Boards,” IEEE Transactions on Elec-

tromagnetic Compatibility, Vol. 44, pp. 373�380 (2002).

[10] Lin, Y. H. and Wu, T. L., “Investigation of Signal

Resonance-Aware Design Approach for Reducing Noise Coupling between Power Buses 207

Figure 13. |S21| of the reference test board [9] indicated by line(I), |S21| of the experimental board indicated by line(II), |S21| of our proposed FSOS with four fan shapesindicated by line (III), and |S21| of our experimentmeasurement with four fan shapes indicated by line(IV).

Quality and Radiated Emission of Microstrip Line on

Imperfect Ground Plane: FDTD Analysis and Mea-

surement,” in Proc. of IEEE Int. Symp. on EMC, Vol. 1,

pp. 319�324 (2001).

[11] Berghe, S. V., Olyslager, F., Zutter, D. D., Moerloose,

J. D. and Temmerman, W., “Study of the Ground

Bounce Caused by Power Plane Resonances,” IEEE

Trans. On Electromagnetic Compatibility, Vol. 40, pp.

111�119 (1998).

[12] Radu, S. and Hockanson, D., “An Investigation of

PCB Radiated Emissions from Simultaneous Switch-

ing Noise,” IEEE Int. Sym. on Electromagnetic Com-

patibility, Vo1. 2, pp. 893�898 (1999).

[13] Cui, W., Fan, J., Sha, H. and Drewniak, J. L., “DC

Power Bus Noise Isolation with Power Islands,” IEEE

International Symposium on EMC, pp. 899�903 (2001).

[14] March, S. L., “Analyzing Lossy Radial-Line Stubs,”

IEEE Trans. Microwave Theory Tech., Vol. 33, pp.

269�271 (1985).

[15] Vinding, J. P., “Radial Line Stubs as Elements in Strip

Line Circuits,” NEREM Rec., pp. 108�109 (1967).

[16] Wen, C. P., “Coplanar Waveguide: A Surface Strip

Transmission Line Suitable for Nonreciprocal Gyro-

manetic Device Application,” IEEE Trans. Microwave

Theory Tech., Vol. 17, pp. 1087�1090 (1969).

[17] Pozar, D. M., “Microwave Engineering,” 3rd ed., New

York: John Wiley & Sons (2005).

[18] Sobol, H., “Applications of Integrated Circuit Tech-

nology to Microwave Frequencies,” Proc. IEEE, Vol.

59, pp. 1200�1211 (1971).

[19] Hall, S. H., Hall, G. W. and McCall, J. A., “High-

Speed Digital System. Design, A Handbook of Inter-

connect Theory and Design Practices,” Hoboken, NJ:

Wiley (2000).

[20] Giannini, F., Ruggeri, M. and Vrba, J., “Shunt Con-

nected Microstrip Radial Stub,” IEEE Trans. Micro-

wave Theory Tech., Vol. 34, pp. 363�366 (1986).

[21] Hwang, J. N. and Wu, T. L., “The Bridging Effect of

the Isolation Moat on the EMI Caused by Ground

Bounce Noise between Power/Ground Planes of PCB,”

In Proc. of IEEE Int. Symp. on EMC, Vol. 1, pp. 471�

474 (2001).

[22] Gonzalez, G., “Microwave Transistor Amplifiers –

Analysis and Design,” Prentice-Hall (1984).

[23] Shi, H., Sha, F., Drewniak, J. L., Van Doren, T. P. and

Hubing, T. H., “An Experimental Procedure for Cha-

racterizing Interconnects to the DC Power Bus on a

Multilayer Printed Circuit Board,” IEEE Transactions

on Electromagnetic Compatibility, Vol. 39, pp. 279�

285 (1997).

Manuscript Received: Nov. 28, 2007

Accepted: Jan. 13, 2009

208 W. T. Huang et al.