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Hindawi Publishing CorporationInternational Journal of Microwave Science and TechnologyVolume 2013 Article ID 328406 6 pageshttpdxdoiorg1011552013328406
Research ArticleCMOS Ultra-Wideband Low Noise Amplifier Design
K Yousef1 H Jia2 R Pokharel3 A Allam1 M Ragab1 H Kanaya3 and K Yoshida3
1 Electronics and Communications Engineering Department Egypt-Japan University of Science and TechnologyNew Borg Al-Arab 21934 Alexandria Egypt
2 E-JUST Center Kyushu University Nishi-ku Fukuoka 819-0395 Japan3 Graduate School of ISSE Kyushu University Nishi-ku Fukuoka 819-0395 Japan
Correspondence should be addressed to K Yousef khalilyousefejustedueg
Received 29 November 2012 Accepted 26 March 2013
Academic Editor Mohammad S Hashmi
Copyright copy 2013 K Yousef et alThis is an open access article distributed under the Creative CommonsAttribution License whichpermits unrestricted use distribution and reproduction in any medium provided the original work is properly cited
This paper presents the design of ultra-wideband low noise amplifier (UWB LNA) The proposed UWB LNA whose bandwidthextends from 25GHz to 16GHz is designed using a symmetric 3D RF integrated inductorThis UWB LNA has a gain of 11 plusmn 10 dBand aNF less than 33 dBGood input and output impedancematching and good isolation are achieved over the operating frequencybandThe proposed UWB LNA is driven from a 18 V supplyThe UWB LNA is designed and simulated in standard TSMC 018 120583mCMOS technology process
1 Introduction
CMOS technology is one of the most prevailing technologiesused for the implementation of radio frequency integratedcircuits (RFICs) due to its reduced cost and its compat-ibility with silicon-based system on chip [1] The use ofultra-wideband (UWB) frequency range (31ndash106GHz) forcommercial applications was approved in February 2002by the Federal Communications Commission Low costreduced power consumption and transmission of data athigh rates are the advantages of UWB technology UWBtechnology has many applications such as wireless sensorand personal area networks ground penetrating radars andmedical applications [2]
Low noise amplifier is considered the backbone of theUWB front-end RF receiver It is responsible for signalreception and amplification over the UWB frequency rangeLNA has many desired design specifications such as low andflat noise figure high and flat power gain good input andoutput wide impedancematching high reverse isolation andreduced DC power consumption [1 3]
Nowadays one of the most suitable configurationssuggested for LNA implementation is current reuse cascaded
amplifier This LNA configuration can attain low DC powerconsumption high flattened gain minimized NF and excel-lent reverse isolation while achieving wide input and outputimpedance matching [1ndash3]
Radio frequency integrated inductors play a significantrole in radio frequency integrated circuits (RFICs) imple-mentation Design development and performance improve-ment of RF integrated inductors represent a challengingwork Achieving high integration level and costminimizationof RFICs are obstructed because of the difficulties facingthe RF integrated inductors designers which are related toobtaining high quality factors [4ndash6]
In this paper the implementation of LNAs using 3Dintegrated inductors will be investigated A symmetric 3Dstructure is proposed as a new structure of integrated induc-tors for RFICs
This paper discusses the design procedure of currentreuse cascaded UWB LNA and its bandwidth expansionIn addition the employment of suggested symmetric 3DRF integrated inductor will be demonstrated This paperis organized as follows Section 2 introduces the suggestedUWB LNA circuit Section 3 gives simulation results anddiscussion Conclusion is driven in Section 4
2 International Journal of Microwave Science and Technology
2 Circuit Description
As shown in Figure 1 the proposed UWB LNA is a currentreuse cascaded core based on a common source topologywitha shunt resistive feedback technique implemented over theinput stage
This current reuse cascaded amplifier achieved goodwideband input impedance matching through the use ofsource degeneration input matching technique Figure 2shows the small signal equivalent circuit of this LNA inputstage The input port of this UWB LNA is desired tomatch source impedance 119877
119904at resonance frequency 120596
119900 This
matching circuit bandwidth is defined through the qualityfactors of source degeneration and gain-peaking inductors(119871119904and 119871
119892) where the input impedance is given by
119885in = 119895120596 (119871 119904 + 119871119892) +1
119895120596119862gs+ 120596119879119871119904
= 119895120596 (119871119904+ 119871119892) +
1
119895120596119862gs+ 119877119904
(1)
where 119885in is the UWB LNA input impedance and 120596119879is the
current-gain cut-off frequency where 120596119879= 119892119898119862gs and 119892119898
and119862gs are the input stage transconductance and gate-sourcecapacitance respectively 119881
119904represents the RF signal source
119877119904is the output impedance of 119881
119904
Although the shunt resistive feedback loop leads toLNA noise performance degradation [7] it is widely usedin recently proposed LNAs due to its superior widebandcharacteristics Shunt capacitive-resistive feedback techniqueis employed to widen the input-matching bandwidth andincrease the LNA stability
Shunt-peaked amplifiers are known to have wide gainbandwidth and high low frequency power gain [8] To havea high flattened gain of the proposed UWB LNA shunt-peaking technique is used In addition the gate-peaking tech-nique is used to enhance the LNA gain at high frequenciesBesides the shunt- and gate-peaking techniques the shuntresistive feedback loop is used in gain flattening [2 8] TheLNA approximate gain is given by
119860 cong119881out119881119904
cong
11989211989811198921198982[119877119871 (1198771198892+ 1198781198711198892)] [119878119871
1198891]
2 sdot 119878119862gs1 [119878 (119871 1199041 + 1198711198921) + 1119878119862gs1]
(2)
Ultra-wideband applications require good noise perfor-mance in addition to high and flat gain Low noise designtechniques which are suitable for narrowband applicationscannot be used for wideband applicationsMain contributionof cascaded matched stages noise figure is due to first stage[9]The reduction of noise figure of input stagewill lead to thereduction of the overall noise figure of the proposed designOptimization and control of factors affecting the NF willimprove this UWB LNA noise performance An equivalentcircuit of the input stage for noise factor calculation is shownin Figure 3 [1]
An estimated value of the noise figure (NF = 10 log10119891)
of this topology is given in [1] where 119891 is the noise factor ofthe UWB LNAThe noise factor 119891 can be given by
119891 = 1 +
119877119892+ 119877lg + 119877ss + 119877ls
119877119904
+
1205751205721205962
1198622
gs1119877119904
51198921198981
+
119877FB ((1198711198921 + 119871 1199041) 119862gs1)2
119877119904(1198921198981119877FB minus 1)
2
sdot
10038161003816100381610038161003816100381610038161003816
1199042
+ 119904 (
120596119900rfbn
119876rfbn) + 120596
2
119900rfbn
10038161003816100381610038161003816100381610038161003816
2
+
1205741198921198981(119877FB + 119877119904)
2
((1198711198921+ 1198711199041) 119862gs1)
2
120572119877119904(1198921198981119877FB minus 1)
2
sdot
10038161003816100381610038161003816100381610038161003816
1199042
+ 119904 (
120596119900dn
119876dn) + 120596
2
119900dn
10038161003816100381610038161003816100381610038161003816
2
(3)
119891 = 1 +
119877119892+ 119877lg + 119877ss + 119877ls
119877119904
+ 119891gn + 119891rfbn + 119891dn (4)
where
120596119900rfbn = radic
1 + 1198921198981119877119904
(1198711198921+ 1198711199041) 119862gs1
119876rfbn =1
119877119904+ 12059611987911198711199041
sdot radic(1 + 119892
1198981119877119904) (1198711198921+ 1198711199041)
119862gs1
120596119900rfbn = radic
1
(1198711198921+ 1198711199041) 119862gs1
119876dn =1
(119877119904|| 119877FB) + 1205961198791119871 1199041
sdot radic(1198711198921+ 1198711199041)
119862gs1
(5)
where119891gn119891dn and119891rfbn are gate drain and feedback resistornoise factors respectively and 120572 120575 and 120574 are constants equalto 085 41 and 221 respectively
It is clear from (4) that to reduce the noise figure highquality factors of 119871
1199041and 119871
1198921are desired It can also be noted
that the noise factor is inversely proportional to feedbackresistor119877
119891 In otherwords weak feedback topology decreases
the noise factor value while strong feedback implementationdegrades the noise performance of the suggested UWB LNA
In addition the noise factor formula given by (4) statesthat the noise figure is also inversely proportional to thetransconductance of the input stage (119892
1198981) This goes along
with the known fact that noise performance trades off withpower consumption
For output matching the series resonance of the shuntpeaking technique is used to match the proposed UWB LNAto the load impedance119877
119871while the series drain resistance119877
1198892
is used to extend the output matching bandwidthThis proposedUWBLNA (LNA1) has an operating band-
width of 31ndash106GHzThe proposed LNA2 whose schematic
International Journal of Microwave Science and Technology 3
1198711199041
1198711198891
1198711198892
1198711198921
1198711198922
11986211198622
119877119891119862119891
1198771198662
119881in
1198771198661
1198811198661
119881119889119889
119881out1198722
1198721
1198771198892
119877119871
Figure 1 Current reuse UWB LNA (LNA1)
119871119904
119871119892
119885in
119877119904
119881119904
119903119900119862 119892119898119881gs gs
Figure 2 Input stage small signal equivalent circuit
119877
1198942
1198902119904
119877119878
1198711198661 119877 1198902 1198902
1198942119892119862 1
119881 1
119877119904
1198902
1198711199041
119877
1198902
1198921198981119881 1 1198942
119889 1198942119899out
119877
+
minus
FB
rfb
119892 rg
gs
rs
ls
lg lg
gs
ls
gs
Figure 3 Equivalent circuit of the fisrt stage for noise calculation[1]
1198711199041
1198711198891
1198711198892
1198711198921
1198711198922
1198621
1198622
119877119891119862119891
1198771198662
119881in
1198771198661
1198811198661
119881119889119889
1198623
1198711199043
1198771198893119862out
119871out
119877out
119881out
1198722
1198721
1198723
1198811198663
Figure 4 Schematic circuit of LNA2
Metal 6
Port 2(Metal 6)
Metal 2
Port 1(Metal 6)
Metal 4
Figure 5 3D view of the symmetric 3D proposed structure
25 35 45 55 65 75 85 95 105 115Frequency (GHz)
200
180
160
140
120
100
80
60
40
20
00
Gai
n an
d N
F (d
B)
GainNoise figure
Figure 6 11987821(dB) and NF (dB) of LNA1
4 International Journal of Microwave Science and Technology
20 35 50 65 80 95 110 125 140 155 170Frequency (GHz)
150
100
50
0
minus50
minus100
Gai
n (d
B)
LNA2 (planar Ind)LNA2 (3D Ind)
Figure 7 11987821(dB) of LNA2
20 35 50 65 80 95 110 125 140 155 170Frequency (GHz)
60
50
40
30
20
10
00
Noi
se fi
gure
(dB)
LNA2 (planar Ind)LNA2 (3D Ind)
119878-parameter response
Figure 8 NF (dB) of LNA2
circuit is shown in Figure 4 is an extended version of LNA1 Ithas a wider operating band of frequency which extends from25GHz to 16GHz
Input impedance match has a special importance andconsideration especially in wideband sensitive circuitsdesign Input impedance matching bandwidth is broadenedby the use of a weaker shunt capacitive-resistive feedbackloop which mainly leads to quality factor reduction of theinput matching circuit Weakness of shunt feedback strengthnot only reduces the input reflection coefficient over thiswide bandwidth but it also reduces the input side injectedthermal noise which decreases the proposed LNA2 noise
25 35 45 55 65 75 85 95 105 115Frequency (GHz)
0
minus50
minus100
minus150
minus200
minus250
minus300
minus350
Refle
ctio
n co
effici
ents
(dB)
11987811
11987822
Figure 9 11987811(dB) and 119878
22(dB) of LNA1
20 35 50 65 80 95 110 125 140 155 170Frequency (GHz)
0
minus25
minus50
minus75
minus100
minus125
minus150
minus175
LNA2 (planar Ind)LNA2 (3D Ind)
11987811
(dB)
Figure 10 11987811(dB) of LNA2
figure indicating the enhanced noise performance of thesuggested design
Shunt-peaking technique increases the low frequencygain and hence decreases the gain flatnesswhile having awideoperating bandwidth In spite of shunt-peaking drawbacks itmainly facilitates LNA output impedance to load matchingLNA2 bandwidth extension and gain flatness over its operat-ing band of frequency are achieved through the removal ofshunt peaking Moreover the control of gate peaking is usedto enhance the current reuse amplifier core gain
For wideband output impedance matching a unity com-mon gate (CG) matching topology in addition to series
International Journal of Microwave Science and Technology 5
20 35 50 65 80 95 110 125 140 155 170Frequency (GHz)
0
minus25
minus50
minus75
minus100
minus125
minus150
minus175
minus200
LNA2 (planar Ind)LNA2 (3D Ind)
11987822
(dB)
Figure 11 11987822(dB) of LNA2
resonance circuit consisting of capacitor 119862out and inductor119871out is used to match the LNA2 output impedance to its load(succeeding RF stage) The resistive termination 119877out is usedto control the load-output impedance match bandwidth
A planar RF on-chip spiral inductor (1198711198891) having an
inductance of 145 nH and a maximum quality factor of 80 isneeded as a load of the input CS stage to improve the currentreuse stages matching This RF integrated inductor occupiesan area of 428 120583m times 425 120583m which represents a considerablepart of the UWB LNA total die area
One of the well-known difficulties facing the develop-ment of RFICs is inductors large area relative to other passiveand active components This area problem becomes moresevere with the recent intensive shrinking of active devicesand competitive reduction of fabrication cost [10]
Inductors quality factor (119876) reduction is another limitingfactor of RFICs performance enhancement The reduction ofinductor119876 factor is due to ohmic and substrate losses Ohmiclosses can be decreased by using a high conductive metalfor inductor implementation On the other hand placing ahigh resistive layer underneath the inductor can minimizethe substrate losses Lately optimized 3D structures andimplementations of RF integrated inductors are suggestedto overcome all of these limitations and improve the RFintegrated inductors performance [4 5]
For LNA2 circuit area reduction and RF inductor char-acteristics improvement a symmetric 3D structure for RFintegrated inductor implementation is suggested to replacethe planar RF integrated inductor (119871
1198891) Similar to the design
of planar RF inductor 3D metallic structure layout shouldbe drawn on a substrate to design and test a 3D integratedinductor [11] 3D RF inductors structures are mainly consist-ing of serially connected different metal layers spirals havingthe same current flowdirectionThis 3D structure inductance
is dependent on these different spirals inductances and thepositive mutual coupling they have [11]
For 1P6M CMOS technology which has six differentmetal layers the proposed symmetric 3D RF integratedinductor has a complete spiral inductor on the highest metallayer (1198726) Half of the lower spiral is implemented usingfourth metal layer (1198724) to increase its inductance value dueto the increased mutual coupling The second metal layer(1198722)which is distant from the topmetal layer is employed toimplement the lower spiral other half to reduce the parasiticcomponents of that 3D metal structure and increase itsquality factor The suggested symmetric 3D inductor has aninductance of 145 nH a quality factor of 85 and an areaof 185 120583m times 165 120583m 80 of planar inductor area is savedthrough this symmetric 3D structure while achieving thesame inductance value and higher quality factor Figure 5shows a 3D view of the proposed symmetric RF integratedinductor
3 Simulation Results and Discussion
The proposed UWB LNA (LNA1 and LNA2) circuits aredesigned in TSMC CMOS 018 120583m technology process usingAgilent Advanced Design System (ADS) Electromagneticsimulation is verified by the post-layout simulation resultswhich are obtained using the Cadence design environmentThe suggested symmetric 3D structure is designed and testedusing Momentum simulation software and verified usingCadence design environment The LNAs simulation resultsare given below
31 Power Gain and Noise Figure LNA1 has a gain of 17 plusmn15 dB as shown in Figure 6 It also has a noise figure less than23 dB over its operating band of frequency (31ndash106GHz)11987821(dB) of LNA2 is higher than 10 dB with a maximum
value of 12 dB over the desired band of frequency (25ndash16GHz) This high and flat gain is due to the use of inductivegain-peaking technique in addition to the control of the unitygain current cut-off frequencies of LNA2 Figure 7 showsthat the proposed LNA2 employing the symmetric 3D RFintegrated inductor achieves a gain of 11 plusmn 10 dB
The proposed UWB LNA2 has an enhanced LNA noiseperformance LNA2 NF ranges from 25 dB to 33 dB overthe operating bandwidth (25ndash16GHz) This NF reduction isaccomplished due to the optimization of the LNAnoise factorgiven by (4) and the use of weak shunt capacitive-resistivefeedback implemented over the input stage LNA2 achievesa NF less than 33 dB over the operating band of frequency asshown in Figure 8
32 Input and Output Impedance Matching LNA1 input andoutput ports have good matching conditions to its sourceand load respectively Simulation results of input and outputreflection coefficients of LNA1 are shown in Figure 9 LNA1has 11987811and 11987822less than minus11 dB and minus10 dB respectively over
the UWB range of frequenciesThe proposed UWB LNA2 achieves good input im-
pedance matching as shown in Figure 10 Good impedance
6 International Journal of Microwave Science and Technology
Table 1 Proposed UWB LNA performance summery in compari-son to recently published UWB LNAs
Reference BW(GHz)
Gain(dB)
NF(dB)
11987811
(dB)11987822
(dB)This work (LNA2)lowast 25sim16 11 plusmn 10 lt33 ltminus7 ltminus725This work (LNA1)lowast 31sim106 17 plusmn 15 lt23 ltminus11 ltminus10LNA-1 [1] 17sim59 112 plusmn 23 lt47 ltminus118 ltminus127LNA-2 [1] 15sim117 122 plusmn 06 lt48 ltminus86 ltminus10[2] 3sim106 15 lt44 ltminus7 NA[12] 31sim106 108 plusmn 17 lt6 ltminus10 ltminus93[13] 1sim5 127 plusmn 02 lt35 ltminus8 NAlowastPost-layout simulation results
match between LNA2 and its source is obtained using theseries-resonant input matching technique The input returnloss (119878
11) is less thanminus70 dB over this wide range of frequency
(25ndash16GHz)Figure 11 shows that better output impedance matching is
obtained using the planar integrated inductor while simulat-ing LNA2 Good output impedance matching of LNA2 overits operating band of frequency (25ndash16GHz) is accomplisheddue to the optimization of the CG outputmatching stage withthe aid of the output LC resonant circuit 119877out termination isused to widen the matching bandwidth The output returnloss (119878
22) shown in Figure 11 is less than minus725 dB for LNA2
using the planar inductor while it is less than minus60 dB forLNA2 employing the proposed 3D inductor over the desiredfrequency band (25ndash16GHz)
33 DC Power Reverse Isolation and Stability LNA1 andLNA2 consume DC power of 128mW and 20mW respec-tively froma 18Vpower sourceThe increasedDCconsump-tion of LNA2 is due to having enough driving bias for the CGoutput match stage
Both of the proposed UWB LNA1 and LNA2 have areverse isolation factor (119878
12) less thanminus28 dBover each design
bandwidthThe proposed UWB LNAs (LNA1 and LNA2) areunconditionally stable over their bandwidths
Table 1 shows a summary of the proposed UWB LNAsperformance in comparison to other recently publishedUWBLNAs implemented in 018120583m CMOS technology
4 Conclusion
In this paper two different UWBLNAswere presented LNA1has high gain minimized noise figure and good impedancematch over the UWB range of frequencies LNA2 has awide range of operating frequency (25 GHzndash16GHz) UWBLNA2 consists of a current reuse cascaded amplifier withshunt resistive feedback followed by a CG output stage withresistive termination LNA2 input stage use series-resonantimpedancematching technique and employs a symmetric 3DRF integrated inductor as a load The post-layout simulationresults of LNA1 and LNA2 demonstrate the performanceimprovement achieved through theses designs The next step
is to implement these UWB LNAs to have a comparisonbetween post-layout simulation results andmeasured results
References
[1] Y S Lin C Z Chen H Y Yang et al ldquoAnalysis and designof a CMOS UWB LNA with dual-RLC-branch wideband inputmatching networkrdquo IEEE Transactions on Microwave Theoryand Techniques vol 58 no 2 pp 287ndash296 2010
[2] A I A Galal R K Pokharel H Kanay and K Yoshida ldquoUltra-wideband low noise amplifier with shunt resistive feedbackin 018 120583m CMOS processrdquo in Proceedings of the 10th TopicalMeeting on Silicon Monolithic Integrated Circuits in RF Systems(SiRF rsquo10) pp 33ndash36 January 2010
[3] K Yousef H Jia R Pokharel A Allam M Ragab and KYoshida ldquoA 2ndash16GHz CMOS current reuse cascaded ultra-wideband low noise amplifierrdquo in Proceedings of the Saudi Inter-national Electronics Communications and Photonics Conference(SIECPC rsquo11) April 2011
[4] K Yousef H Jia R Pokharel A Allam M Ragab andK Yoshida ldquoDesign of 3D Integrated Inductors for RFICsrdquoin Proceeding of 2012 Japan Egypt Conference on ElectronicsCommunications and Computers (JECECC rsquo12) pp 22ndash25
[5] X N Wang X L Zhao Y Zhou X H Dai and B C CaildquoFabrication and performance of novel RF spiral inductors onsiliconrdquo Microelectronics Journal vol 36 no 8 pp 737ndash7402005
[6] A M Niknejad and R G Meyer ldquoAnalysis design andoptimization of spiral inductors and transformers for Si RFICrsquosrdquo IEEE Journal of Solid-State Circuits vol 33 no 10 pp1470ndash1481 1998
[7] T H Lee The Design of CMOS Radio-Frequency IntegratedCircuits Cambridge University Press 2nd edition 2004
[8] S S Mohan M Del Mar Hershenson S P Boyd and T HLee ldquoBandwidth extension in CMOS with optimized on-chipinductorsrdquo IEEE Journal of Solid-State Circuits vol 35 no 3 pp346ndash355 2000
[9] H T Friis ldquoNoise figure of radio receiversrdquo Proceedings of theIRE vol 32 no 7 pp 419ndash422 1944
[10] H Y Tsui and J Lau ldquoExperimental results and die area efficientself-shielded on-chip vertical solenoid inductors for multi-GHzCMOS RFICrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits (RFIC) Symposium pp 243ndash246 June 2003
[11] H Garcia S Khemchndai R Puildo A Lturri and J Pino ldquoAWideband active feedback LNA with a Modified 3D inductorrdquoMicrowave andOptical Technology Letters vol 52 pp 1561ndash15672010
[12] P Sun Sh Liao H Lin Ch Yang and Y Hsiao ldquoDesign of 31 to106 GHz ultra-wideband low noise amplifier with current reusetechniques and low power consumptionrdquo in Proceedings of theProgress In Electromagnetics Research Symposium pp 901ndash905Beijing China March 2009
[13] A I A Galal R K Pokharel H Kanaya and K Yoshidaldquo1-5GHz wideband low noise amplifier using active inductorrdquoin 2010 IEEE International Conference on Ultra-WidebandICUWB2010 pp 193ndash196 chn September 2010
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2 International Journal of Microwave Science and Technology
2 Circuit Description
As shown in Figure 1 the proposed UWB LNA is a currentreuse cascaded core based on a common source topologywitha shunt resistive feedback technique implemented over theinput stage
This current reuse cascaded amplifier achieved goodwideband input impedance matching through the use ofsource degeneration input matching technique Figure 2shows the small signal equivalent circuit of this LNA inputstage The input port of this UWB LNA is desired tomatch source impedance 119877
119904at resonance frequency 120596
119900 This
matching circuit bandwidth is defined through the qualityfactors of source degeneration and gain-peaking inductors(119871119904and 119871
119892) where the input impedance is given by
119885in = 119895120596 (119871 119904 + 119871119892) +1
119895120596119862gs+ 120596119879119871119904
= 119895120596 (119871119904+ 119871119892) +
1
119895120596119862gs+ 119877119904
(1)
where 119885in is the UWB LNA input impedance and 120596119879is the
current-gain cut-off frequency where 120596119879= 119892119898119862gs and 119892119898
and119862gs are the input stage transconductance and gate-sourcecapacitance respectively 119881
119904represents the RF signal source
119877119904is the output impedance of 119881
119904
Although the shunt resistive feedback loop leads toLNA noise performance degradation [7] it is widely usedin recently proposed LNAs due to its superior widebandcharacteristics Shunt capacitive-resistive feedback techniqueis employed to widen the input-matching bandwidth andincrease the LNA stability
Shunt-peaked amplifiers are known to have wide gainbandwidth and high low frequency power gain [8] To havea high flattened gain of the proposed UWB LNA shunt-peaking technique is used In addition the gate-peaking tech-nique is used to enhance the LNA gain at high frequenciesBesides the shunt- and gate-peaking techniques the shuntresistive feedback loop is used in gain flattening [2 8] TheLNA approximate gain is given by
119860 cong119881out119881119904
cong
11989211989811198921198982[119877119871 (1198771198892+ 1198781198711198892)] [119878119871
1198891]
2 sdot 119878119862gs1 [119878 (119871 1199041 + 1198711198921) + 1119878119862gs1]
(2)
Ultra-wideband applications require good noise perfor-mance in addition to high and flat gain Low noise designtechniques which are suitable for narrowband applicationscannot be used for wideband applicationsMain contributionof cascaded matched stages noise figure is due to first stage[9]The reduction of noise figure of input stagewill lead to thereduction of the overall noise figure of the proposed designOptimization and control of factors affecting the NF willimprove this UWB LNA noise performance An equivalentcircuit of the input stage for noise factor calculation is shownin Figure 3 [1]
An estimated value of the noise figure (NF = 10 log10119891)
of this topology is given in [1] where 119891 is the noise factor ofthe UWB LNAThe noise factor 119891 can be given by
119891 = 1 +
119877119892+ 119877lg + 119877ss + 119877ls
119877119904
+
1205751205721205962
1198622
gs1119877119904
51198921198981
+
119877FB ((1198711198921 + 119871 1199041) 119862gs1)2
119877119904(1198921198981119877FB minus 1)
2
sdot
10038161003816100381610038161003816100381610038161003816
1199042
+ 119904 (
120596119900rfbn
119876rfbn) + 120596
2
119900rfbn
10038161003816100381610038161003816100381610038161003816
2
+
1205741198921198981(119877FB + 119877119904)
2
((1198711198921+ 1198711199041) 119862gs1)
2
120572119877119904(1198921198981119877FB minus 1)
2
sdot
10038161003816100381610038161003816100381610038161003816
1199042
+ 119904 (
120596119900dn
119876dn) + 120596
2
119900dn
10038161003816100381610038161003816100381610038161003816
2
(3)
119891 = 1 +
119877119892+ 119877lg + 119877ss + 119877ls
119877119904
+ 119891gn + 119891rfbn + 119891dn (4)
where
120596119900rfbn = radic
1 + 1198921198981119877119904
(1198711198921+ 1198711199041) 119862gs1
119876rfbn =1
119877119904+ 12059611987911198711199041
sdot radic(1 + 119892
1198981119877119904) (1198711198921+ 1198711199041)
119862gs1
120596119900rfbn = radic
1
(1198711198921+ 1198711199041) 119862gs1
119876dn =1
(119877119904|| 119877FB) + 1205961198791119871 1199041
sdot radic(1198711198921+ 1198711199041)
119862gs1
(5)
where119891gn119891dn and119891rfbn are gate drain and feedback resistornoise factors respectively and 120572 120575 and 120574 are constants equalto 085 41 and 221 respectively
It is clear from (4) that to reduce the noise figure highquality factors of 119871
1199041and 119871
1198921are desired It can also be noted
that the noise factor is inversely proportional to feedbackresistor119877
119891 In otherwords weak feedback topology decreases
the noise factor value while strong feedback implementationdegrades the noise performance of the suggested UWB LNA
In addition the noise factor formula given by (4) statesthat the noise figure is also inversely proportional to thetransconductance of the input stage (119892
1198981) This goes along
with the known fact that noise performance trades off withpower consumption
For output matching the series resonance of the shuntpeaking technique is used to match the proposed UWB LNAto the load impedance119877
119871while the series drain resistance119877
1198892
is used to extend the output matching bandwidthThis proposedUWBLNA (LNA1) has an operating band-
width of 31ndash106GHzThe proposed LNA2 whose schematic
International Journal of Microwave Science and Technology 3
1198711199041
1198711198891
1198711198892
1198711198921
1198711198922
11986211198622
119877119891119862119891
1198771198662
119881in
1198771198661
1198811198661
119881119889119889
119881out1198722
1198721
1198771198892
119877119871
Figure 1 Current reuse UWB LNA (LNA1)
119871119904
119871119892
119885in
119877119904
119881119904
119903119900119862 119892119898119881gs gs
Figure 2 Input stage small signal equivalent circuit
119877
1198942
1198902119904
119877119878
1198711198661 119877 1198902 1198902
1198942119892119862 1
119881 1
119877119904
1198902
1198711199041
119877
1198902
1198921198981119881 1 1198942
119889 1198942119899out
119877
+
minus
FB
rfb
119892 rg
gs
rs
ls
lg lg
gs
ls
gs
Figure 3 Equivalent circuit of the fisrt stage for noise calculation[1]
1198711199041
1198711198891
1198711198892
1198711198921
1198711198922
1198621
1198622
119877119891119862119891
1198771198662
119881in
1198771198661
1198811198661
119881119889119889
1198623
1198711199043
1198771198893119862out
119871out
119877out
119881out
1198722
1198721
1198723
1198811198663
Figure 4 Schematic circuit of LNA2
Metal 6
Port 2(Metal 6)
Metal 2
Port 1(Metal 6)
Metal 4
Figure 5 3D view of the symmetric 3D proposed structure
25 35 45 55 65 75 85 95 105 115Frequency (GHz)
200
180
160
140
120
100
80
60
40
20
00
Gai
n an
d N
F (d
B)
GainNoise figure
Figure 6 11987821(dB) and NF (dB) of LNA1
4 International Journal of Microwave Science and Technology
20 35 50 65 80 95 110 125 140 155 170Frequency (GHz)
150
100
50
0
minus50
minus100
Gai
n (d
B)
LNA2 (planar Ind)LNA2 (3D Ind)
Figure 7 11987821(dB) of LNA2
20 35 50 65 80 95 110 125 140 155 170Frequency (GHz)
60
50
40
30
20
10
00
Noi
se fi
gure
(dB)
LNA2 (planar Ind)LNA2 (3D Ind)
119878-parameter response
Figure 8 NF (dB) of LNA2
circuit is shown in Figure 4 is an extended version of LNA1 Ithas a wider operating band of frequency which extends from25GHz to 16GHz
Input impedance match has a special importance andconsideration especially in wideband sensitive circuitsdesign Input impedance matching bandwidth is broadenedby the use of a weaker shunt capacitive-resistive feedbackloop which mainly leads to quality factor reduction of theinput matching circuit Weakness of shunt feedback strengthnot only reduces the input reflection coefficient over thiswide bandwidth but it also reduces the input side injectedthermal noise which decreases the proposed LNA2 noise
25 35 45 55 65 75 85 95 105 115Frequency (GHz)
0
minus50
minus100
minus150
minus200
minus250
minus300
minus350
Refle
ctio
n co
effici
ents
(dB)
11987811
11987822
Figure 9 11987811(dB) and 119878
22(dB) of LNA1
20 35 50 65 80 95 110 125 140 155 170Frequency (GHz)
0
minus25
minus50
minus75
minus100
minus125
minus150
minus175
LNA2 (planar Ind)LNA2 (3D Ind)
11987811
(dB)
Figure 10 11987811(dB) of LNA2
figure indicating the enhanced noise performance of thesuggested design
Shunt-peaking technique increases the low frequencygain and hence decreases the gain flatnesswhile having awideoperating bandwidth In spite of shunt-peaking drawbacks itmainly facilitates LNA output impedance to load matchingLNA2 bandwidth extension and gain flatness over its operat-ing band of frequency are achieved through the removal ofshunt peaking Moreover the control of gate peaking is usedto enhance the current reuse amplifier core gain
For wideband output impedance matching a unity com-mon gate (CG) matching topology in addition to series
International Journal of Microwave Science and Technology 5
20 35 50 65 80 95 110 125 140 155 170Frequency (GHz)
0
minus25
minus50
minus75
minus100
minus125
minus150
minus175
minus200
LNA2 (planar Ind)LNA2 (3D Ind)
11987822
(dB)
Figure 11 11987822(dB) of LNA2
resonance circuit consisting of capacitor 119862out and inductor119871out is used to match the LNA2 output impedance to its load(succeeding RF stage) The resistive termination 119877out is usedto control the load-output impedance match bandwidth
A planar RF on-chip spiral inductor (1198711198891) having an
inductance of 145 nH and a maximum quality factor of 80 isneeded as a load of the input CS stage to improve the currentreuse stages matching This RF integrated inductor occupiesan area of 428 120583m times 425 120583m which represents a considerablepart of the UWB LNA total die area
One of the well-known difficulties facing the develop-ment of RFICs is inductors large area relative to other passiveand active components This area problem becomes moresevere with the recent intensive shrinking of active devicesand competitive reduction of fabrication cost [10]
Inductors quality factor (119876) reduction is another limitingfactor of RFICs performance enhancement The reduction ofinductor119876 factor is due to ohmic and substrate losses Ohmiclosses can be decreased by using a high conductive metalfor inductor implementation On the other hand placing ahigh resistive layer underneath the inductor can minimizethe substrate losses Lately optimized 3D structures andimplementations of RF integrated inductors are suggestedto overcome all of these limitations and improve the RFintegrated inductors performance [4 5]
For LNA2 circuit area reduction and RF inductor char-acteristics improvement a symmetric 3D structure for RFintegrated inductor implementation is suggested to replacethe planar RF integrated inductor (119871
1198891) Similar to the design
of planar RF inductor 3D metallic structure layout shouldbe drawn on a substrate to design and test a 3D integratedinductor [11] 3D RF inductors structures are mainly consist-ing of serially connected different metal layers spirals havingthe same current flowdirectionThis 3D structure inductance
is dependent on these different spirals inductances and thepositive mutual coupling they have [11]
For 1P6M CMOS technology which has six differentmetal layers the proposed symmetric 3D RF integratedinductor has a complete spiral inductor on the highest metallayer (1198726) Half of the lower spiral is implemented usingfourth metal layer (1198724) to increase its inductance value dueto the increased mutual coupling The second metal layer(1198722)which is distant from the topmetal layer is employed toimplement the lower spiral other half to reduce the parasiticcomponents of that 3D metal structure and increase itsquality factor The suggested symmetric 3D inductor has aninductance of 145 nH a quality factor of 85 and an areaof 185 120583m times 165 120583m 80 of planar inductor area is savedthrough this symmetric 3D structure while achieving thesame inductance value and higher quality factor Figure 5shows a 3D view of the proposed symmetric RF integratedinductor
3 Simulation Results and Discussion
The proposed UWB LNA (LNA1 and LNA2) circuits aredesigned in TSMC CMOS 018 120583m technology process usingAgilent Advanced Design System (ADS) Electromagneticsimulation is verified by the post-layout simulation resultswhich are obtained using the Cadence design environmentThe suggested symmetric 3D structure is designed and testedusing Momentum simulation software and verified usingCadence design environment The LNAs simulation resultsare given below
31 Power Gain and Noise Figure LNA1 has a gain of 17 plusmn15 dB as shown in Figure 6 It also has a noise figure less than23 dB over its operating band of frequency (31ndash106GHz)11987821(dB) of LNA2 is higher than 10 dB with a maximum
value of 12 dB over the desired band of frequency (25ndash16GHz) This high and flat gain is due to the use of inductivegain-peaking technique in addition to the control of the unitygain current cut-off frequencies of LNA2 Figure 7 showsthat the proposed LNA2 employing the symmetric 3D RFintegrated inductor achieves a gain of 11 plusmn 10 dB
The proposed UWB LNA2 has an enhanced LNA noiseperformance LNA2 NF ranges from 25 dB to 33 dB overthe operating bandwidth (25ndash16GHz) This NF reduction isaccomplished due to the optimization of the LNAnoise factorgiven by (4) and the use of weak shunt capacitive-resistivefeedback implemented over the input stage LNA2 achievesa NF less than 33 dB over the operating band of frequency asshown in Figure 8
32 Input and Output Impedance Matching LNA1 input andoutput ports have good matching conditions to its sourceand load respectively Simulation results of input and outputreflection coefficients of LNA1 are shown in Figure 9 LNA1has 11987811and 11987822less than minus11 dB and minus10 dB respectively over
the UWB range of frequenciesThe proposed UWB LNA2 achieves good input im-
pedance matching as shown in Figure 10 Good impedance
6 International Journal of Microwave Science and Technology
Table 1 Proposed UWB LNA performance summery in compari-son to recently published UWB LNAs
Reference BW(GHz)
Gain(dB)
NF(dB)
11987811
(dB)11987822
(dB)This work (LNA2)lowast 25sim16 11 plusmn 10 lt33 ltminus7 ltminus725This work (LNA1)lowast 31sim106 17 plusmn 15 lt23 ltminus11 ltminus10LNA-1 [1] 17sim59 112 plusmn 23 lt47 ltminus118 ltminus127LNA-2 [1] 15sim117 122 plusmn 06 lt48 ltminus86 ltminus10[2] 3sim106 15 lt44 ltminus7 NA[12] 31sim106 108 plusmn 17 lt6 ltminus10 ltminus93[13] 1sim5 127 plusmn 02 lt35 ltminus8 NAlowastPost-layout simulation results
match between LNA2 and its source is obtained using theseries-resonant input matching technique The input returnloss (119878
11) is less thanminus70 dB over this wide range of frequency
(25ndash16GHz)Figure 11 shows that better output impedance matching is
obtained using the planar integrated inductor while simulat-ing LNA2 Good output impedance matching of LNA2 overits operating band of frequency (25ndash16GHz) is accomplisheddue to the optimization of the CG outputmatching stage withthe aid of the output LC resonant circuit 119877out termination isused to widen the matching bandwidth The output returnloss (119878
22) shown in Figure 11 is less than minus725 dB for LNA2
using the planar inductor while it is less than minus60 dB forLNA2 employing the proposed 3D inductor over the desiredfrequency band (25ndash16GHz)
33 DC Power Reverse Isolation and Stability LNA1 andLNA2 consume DC power of 128mW and 20mW respec-tively froma 18Vpower sourceThe increasedDCconsump-tion of LNA2 is due to having enough driving bias for the CGoutput match stage
Both of the proposed UWB LNA1 and LNA2 have areverse isolation factor (119878
12) less thanminus28 dBover each design
bandwidthThe proposed UWB LNAs (LNA1 and LNA2) areunconditionally stable over their bandwidths
Table 1 shows a summary of the proposed UWB LNAsperformance in comparison to other recently publishedUWBLNAs implemented in 018120583m CMOS technology
4 Conclusion
In this paper two different UWBLNAswere presented LNA1has high gain minimized noise figure and good impedancematch over the UWB range of frequencies LNA2 has awide range of operating frequency (25 GHzndash16GHz) UWBLNA2 consists of a current reuse cascaded amplifier withshunt resistive feedback followed by a CG output stage withresistive termination LNA2 input stage use series-resonantimpedancematching technique and employs a symmetric 3DRF integrated inductor as a load The post-layout simulationresults of LNA1 and LNA2 demonstrate the performanceimprovement achieved through theses designs The next step
is to implement these UWB LNAs to have a comparisonbetween post-layout simulation results andmeasured results
References
[1] Y S Lin C Z Chen H Y Yang et al ldquoAnalysis and designof a CMOS UWB LNA with dual-RLC-branch wideband inputmatching networkrdquo IEEE Transactions on Microwave Theoryand Techniques vol 58 no 2 pp 287ndash296 2010
[2] A I A Galal R K Pokharel H Kanay and K Yoshida ldquoUltra-wideband low noise amplifier with shunt resistive feedbackin 018 120583m CMOS processrdquo in Proceedings of the 10th TopicalMeeting on Silicon Monolithic Integrated Circuits in RF Systems(SiRF rsquo10) pp 33ndash36 January 2010
[3] K Yousef H Jia R Pokharel A Allam M Ragab and KYoshida ldquoA 2ndash16GHz CMOS current reuse cascaded ultra-wideband low noise amplifierrdquo in Proceedings of the Saudi Inter-national Electronics Communications and Photonics Conference(SIECPC rsquo11) April 2011
[4] K Yousef H Jia R Pokharel A Allam M Ragab andK Yoshida ldquoDesign of 3D Integrated Inductors for RFICsrdquoin Proceeding of 2012 Japan Egypt Conference on ElectronicsCommunications and Computers (JECECC rsquo12) pp 22ndash25
[5] X N Wang X L Zhao Y Zhou X H Dai and B C CaildquoFabrication and performance of novel RF spiral inductors onsiliconrdquo Microelectronics Journal vol 36 no 8 pp 737ndash7402005
[6] A M Niknejad and R G Meyer ldquoAnalysis design andoptimization of spiral inductors and transformers for Si RFICrsquosrdquo IEEE Journal of Solid-State Circuits vol 33 no 10 pp1470ndash1481 1998
[7] T H Lee The Design of CMOS Radio-Frequency IntegratedCircuits Cambridge University Press 2nd edition 2004
[8] S S Mohan M Del Mar Hershenson S P Boyd and T HLee ldquoBandwidth extension in CMOS with optimized on-chipinductorsrdquo IEEE Journal of Solid-State Circuits vol 35 no 3 pp346ndash355 2000
[9] H T Friis ldquoNoise figure of radio receiversrdquo Proceedings of theIRE vol 32 no 7 pp 419ndash422 1944
[10] H Y Tsui and J Lau ldquoExperimental results and die area efficientself-shielded on-chip vertical solenoid inductors for multi-GHzCMOS RFICrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits (RFIC) Symposium pp 243ndash246 June 2003
[11] H Garcia S Khemchndai R Puildo A Lturri and J Pino ldquoAWideband active feedback LNA with a Modified 3D inductorrdquoMicrowave andOptical Technology Letters vol 52 pp 1561ndash15672010
[12] P Sun Sh Liao H Lin Ch Yang and Y Hsiao ldquoDesign of 31 to106 GHz ultra-wideband low noise amplifier with current reusetechniques and low power consumptionrdquo in Proceedings of theProgress In Electromagnetics Research Symposium pp 901ndash905Beijing China March 2009
[13] A I A Galal R K Pokharel H Kanaya and K Yoshidaldquo1-5GHz wideband low noise amplifier using active inductorrdquoin 2010 IEEE International Conference on Ultra-WidebandICUWB2010 pp 193ndash196 chn September 2010
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DistributedSensor Networks
International Journal of
International Journal of Microwave Science and Technology 3
1198711199041
1198711198891
1198711198892
1198711198921
1198711198922
11986211198622
119877119891119862119891
1198771198662
119881in
1198771198661
1198811198661
119881119889119889
119881out1198722
1198721
1198771198892
119877119871
Figure 1 Current reuse UWB LNA (LNA1)
119871119904
119871119892
119885in
119877119904
119881119904
119903119900119862 119892119898119881gs gs
Figure 2 Input stage small signal equivalent circuit
119877
1198942
1198902119904
119877119878
1198711198661 119877 1198902 1198902
1198942119892119862 1
119881 1
119877119904
1198902
1198711199041
119877
1198902
1198921198981119881 1 1198942
119889 1198942119899out
119877
+
minus
FB
rfb
119892 rg
gs
rs
ls
lg lg
gs
ls
gs
Figure 3 Equivalent circuit of the fisrt stage for noise calculation[1]
1198711199041
1198711198891
1198711198892
1198711198921
1198711198922
1198621
1198622
119877119891119862119891
1198771198662
119881in
1198771198661
1198811198661
119881119889119889
1198623
1198711199043
1198771198893119862out
119871out
119877out
119881out
1198722
1198721
1198723
1198811198663
Figure 4 Schematic circuit of LNA2
Metal 6
Port 2(Metal 6)
Metal 2
Port 1(Metal 6)
Metal 4
Figure 5 3D view of the symmetric 3D proposed structure
25 35 45 55 65 75 85 95 105 115Frequency (GHz)
200
180
160
140
120
100
80
60
40
20
00
Gai
n an
d N
F (d
B)
GainNoise figure
Figure 6 11987821(dB) and NF (dB) of LNA1
4 International Journal of Microwave Science and Technology
20 35 50 65 80 95 110 125 140 155 170Frequency (GHz)
150
100
50
0
minus50
minus100
Gai
n (d
B)
LNA2 (planar Ind)LNA2 (3D Ind)
Figure 7 11987821(dB) of LNA2
20 35 50 65 80 95 110 125 140 155 170Frequency (GHz)
60
50
40
30
20
10
00
Noi
se fi
gure
(dB)
LNA2 (planar Ind)LNA2 (3D Ind)
119878-parameter response
Figure 8 NF (dB) of LNA2
circuit is shown in Figure 4 is an extended version of LNA1 Ithas a wider operating band of frequency which extends from25GHz to 16GHz
Input impedance match has a special importance andconsideration especially in wideband sensitive circuitsdesign Input impedance matching bandwidth is broadenedby the use of a weaker shunt capacitive-resistive feedbackloop which mainly leads to quality factor reduction of theinput matching circuit Weakness of shunt feedback strengthnot only reduces the input reflection coefficient over thiswide bandwidth but it also reduces the input side injectedthermal noise which decreases the proposed LNA2 noise
25 35 45 55 65 75 85 95 105 115Frequency (GHz)
0
minus50
minus100
minus150
minus200
minus250
minus300
minus350
Refle
ctio
n co
effici
ents
(dB)
11987811
11987822
Figure 9 11987811(dB) and 119878
22(dB) of LNA1
20 35 50 65 80 95 110 125 140 155 170Frequency (GHz)
0
minus25
minus50
minus75
minus100
minus125
minus150
minus175
LNA2 (planar Ind)LNA2 (3D Ind)
11987811
(dB)
Figure 10 11987811(dB) of LNA2
figure indicating the enhanced noise performance of thesuggested design
Shunt-peaking technique increases the low frequencygain and hence decreases the gain flatnesswhile having awideoperating bandwidth In spite of shunt-peaking drawbacks itmainly facilitates LNA output impedance to load matchingLNA2 bandwidth extension and gain flatness over its operat-ing band of frequency are achieved through the removal ofshunt peaking Moreover the control of gate peaking is usedto enhance the current reuse amplifier core gain
For wideband output impedance matching a unity com-mon gate (CG) matching topology in addition to series
International Journal of Microwave Science and Technology 5
20 35 50 65 80 95 110 125 140 155 170Frequency (GHz)
0
minus25
minus50
minus75
minus100
minus125
minus150
minus175
minus200
LNA2 (planar Ind)LNA2 (3D Ind)
11987822
(dB)
Figure 11 11987822(dB) of LNA2
resonance circuit consisting of capacitor 119862out and inductor119871out is used to match the LNA2 output impedance to its load(succeeding RF stage) The resistive termination 119877out is usedto control the load-output impedance match bandwidth
A planar RF on-chip spiral inductor (1198711198891) having an
inductance of 145 nH and a maximum quality factor of 80 isneeded as a load of the input CS stage to improve the currentreuse stages matching This RF integrated inductor occupiesan area of 428 120583m times 425 120583m which represents a considerablepart of the UWB LNA total die area
One of the well-known difficulties facing the develop-ment of RFICs is inductors large area relative to other passiveand active components This area problem becomes moresevere with the recent intensive shrinking of active devicesand competitive reduction of fabrication cost [10]
Inductors quality factor (119876) reduction is another limitingfactor of RFICs performance enhancement The reduction ofinductor119876 factor is due to ohmic and substrate losses Ohmiclosses can be decreased by using a high conductive metalfor inductor implementation On the other hand placing ahigh resistive layer underneath the inductor can minimizethe substrate losses Lately optimized 3D structures andimplementations of RF integrated inductors are suggestedto overcome all of these limitations and improve the RFintegrated inductors performance [4 5]
For LNA2 circuit area reduction and RF inductor char-acteristics improvement a symmetric 3D structure for RFintegrated inductor implementation is suggested to replacethe planar RF integrated inductor (119871
1198891) Similar to the design
of planar RF inductor 3D metallic structure layout shouldbe drawn on a substrate to design and test a 3D integratedinductor [11] 3D RF inductors structures are mainly consist-ing of serially connected different metal layers spirals havingthe same current flowdirectionThis 3D structure inductance
is dependent on these different spirals inductances and thepositive mutual coupling they have [11]
For 1P6M CMOS technology which has six differentmetal layers the proposed symmetric 3D RF integratedinductor has a complete spiral inductor on the highest metallayer (1198726) Half of the lower spiral is implemented usingfourth metal layer (1198724) to increase its inductance value dueto the increased mutual coupling The second metal layer(1198722)which is distant from the topmetal layer is employed toimplement the lower spiral other half to reduce the parasiticcomponents of that 3D metal structure and increase itsquality factor The suggested symmetric 3D inductor has aninductance of 145 nH a quality factor of 85 and an areaof 185 120583m times 165 120583m 80 of planar inductor area is savedthrough this symmetric 3D structure while achieving thesame inductance value and higher quality factor Figure 5shows a 3D view of the proposed symmetric RF integratedinductor
3 Simulation Results and Discussion
The proposed UWB LNA (LNA1 and LNA2) circuits aredesigned in TSMC CMOS 018 120583m technology process usingAgilent Advanced Design System (ADS) Electromagneticsimulation is verified by the post-layout simulation resultswhich are obtained using the Cadence design environmentThe suggested symmetric 3D structure is designed and testedusing Momentum simulation software and verified usingCadence design environment The LNAs simulation resultsare given below
31 Power Gain and Noise Figure LNA1 has a gain of 17 plusmn15 dB as shown in Figure 6 It also has a noise figure less than23 dB over its operating band of frequency (31ndash106GHz)11987821(dB) of LNA2 is higher than 10 dB with a maximum
value of 12 dB over the desired band of frequency (25ndash16GHz) This high and flat gain is due to the use of inductivegain-peaking technique in addition to the control of the unitygain current cut-off frequencies of LNA2 Figure 7 showsthat the proposed LNA2 employing the symmetric 3D RFintegrated inductor achieves a gain of 11 plusmn 10 dB
The proposed UWB LNA2 has an enhanced LNA noiseperformance LNA2 NF ranges from 25 dB to 33 dB overthe operating bandwidth (25ndash16GHz) This NF reduction isaccomplished due to the optimization of the LNAnoise factorgiven by (4) and the use of weak shunt capacitive-resistivefeedback implemented over the input stage LNA2 achievesa NF less than 33 dB over the operating band of frequency asshown in Figure 8
32 Input and Output Impedance Matching LNA1 input andoutput ports have good matching conditions to its sourceand load respectively Simulation results of input and outputreflection coefficients of LNA1 are shown in Figure 9 LNA1has 11987811and 11987822less than minus11 dB and minus10 dB respectively over
the UWB range of frequenciesThe proposed UWB LNA2 achieves good input im-
pedance matching as shown in Figure 10 Good impedance
6 International Journal of Microwave Science and Technology
Table 1 Proposed UWB LNA performance summery in compari-son to recently published UWB LNAs
Reference BW(GHz)
Gain(dB)
NF(dB)
11987811
(dB)11987822
(dB)This work (LNA2)lowast 25sim16 11 plusmn 10 lt33 ltminus7 ltminus725This work (LNA1)lowast 31sim106 17 plusmn 15 lt23 ltminus11 ltminus10LNA-1 [1] 17sim59 112 plusmn 23 lt47 ltminus118 ltminus127LNA-2 [1] 15sim117 122 plusmn 06 lt48 ltminus86 ltminus10[2] 3sim106 15 lt44 ltminus7 NA[12] 31sim106 108 plusmn 17 lt6 ltminus10 ltminus93[13] 1sim5 127 plusmn 02 lt35 ltminus8 NAlowastPost-layout simulation results
match between LNA2 and its source is obtained using theseries-resonant input matching technique The input returnloss (119878
11) is less thanminus70 dB over this wide range of frequency
(25ndash16GHz)Figure 11 shows that better output impedance matching is
obtained using the planar integrated inductor while simulat-ing LNA2 Good output impedance matching of LNA2 overits operating band of frequency (25ndash16GHz) is accomplisheddue to the optimization of the CG outputmatching stage withthe aid of the output LC resonant circuit 119877out termination isused to widen the matching bandwidth The output returnloss (119878
22) shown in Figure 11 is less than minus725 dB for LNA2
using the planar inductor while it is less than minus60 dB forLNA2 employing the proposed 3D inductor over the desiredfrequency band (25ndash16GHz)
33 DC Power Reverse Isolation and Stability LNA1 andLNA2 consume DC power of 128mW and 20mW respec-tively froma 18Vpower sourceThe increasedDCconsump-tion of LNA2 is due to having enough driving bias for the CGoutput match stage
Both of the proposed UWB LNA1 and LNA2 have areverse isolation factor (119878
12) less thanminus28 dBover each design
bandwidthThe proposed UWB LNAs (LNA1 and LNA2) areunconditionally stable over their bandwidths
Table 1 shows a summary of the proposed UWB LNAsperformance in comparison to other recently publishedUWBLNAs implemented in 018120583m CMOS technology
4 Conclusion
In this paper two different UWBLNAswere presented LNA1has high gain minimized noise figure and good impedancematch over the UWB range of frequencies LNA2 has awide range of operating frequency (25 GHzndash16GHz) UWBLNA2 consists of a current reuse cascaded amplifier withshunt resistive feedback followed by a CG output stage withresistive termination LNA2 input stage use series-resonantimpedancematching technique and employs a symmetric 3DRF integrated inductor as a load The post-layout simulationresults of LNA1 and LNA2 demonstrate the performanceimprovement achieved through theses designs The next step
is to implement these UWB LNAs to have a comparisonbetween post-layout simulation results andmeasured results
References
[1] Y S Lin C Z Chen H Y Yang et al ldquoAnalysis and designof a CMOS UWB LNA with dual-RLC-branch wideband inputmatching networkrdquo IEEE Transactions on Microwave Theoryand Techniques vol 58 no 2 pp 287ndash296 2010
[2] A I A Galal R K Pokharel H Kanay and K Yoshida ldquoUltra-wideband low noise amplifier with shunt resistive feedbackin 018 120583m CMOS processrdquo in Proceedings of the 10th TopicalMeeting on Silicon Monolithic Integrated Circuits in RF Systems(SiRF rsquo10) pp 33ndash36 January 2010
[3] K Yousef H Jia R Pokharel A Allam M Ragab and KYoshida ldquoA 2ndash16GHz CMOS current reuse cascaded ultra-wideband low noise amplifierrdquo in Proceedings of the Saudi Inter-national Electronics Communications and Photonics Conference(SIECPC rsquo11) April 2011
[4] K Yousef H Jia R Pokharel A Allam M Ragab andK Yoshida ldquoDesign of 3D Integrated Inductors for RFICsrdquoin Proceeding of 2012 Japan Egypt Conference on ElectronicsCommunications and Computers (JECECC rsquo12) pp 22ndash25
[5] X N Wang X L Zhao Y Zhou X H Dai and B C CaildquoFabrication and performance of novel RF spiral inductors onsiliconrdquo Microelectronics Journal vol 36 no 8 pp 737ndash7402005
[6] A M Niknejad and R G Meyer ldquoAnalysis design andoptimization of spiral inductors and transformers for Si RFICrsquosrdquo IEEE Journal of Solid-State Circuits vol 33 no 10 pp1470ndash1481 1998
[7] T H Lee The Design of CMOS Radio-Frequency IntegratedCircuits Cambridge University Press 2nd edition 2004
[8] S S Mohan M Del Mar Hershenson S P Boyd and T HLee ldquoBandwidth extension in CMOS with optimized on-chipinductorsrdquo IEEE Journal of Solid-State Circuits vol 35 no 3 pp346ndash355 2000
[9] H T Friis ldquoNoise figure of radio receiversrdquo Proceedings of theIRE vol 32 no 7 pp 419ndash422 1944
[10] H Y Tsui and J Lau ldquoExperimental results and die area efficientself-shielded on-chip vertical solenoid inductors for multi-GHzCMOS RFICrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits (RFIC) Symposium pp 243ndash246 June 2003
[11] H Garcia S Khemchndai R Puildo A Lturri and J Pino ldquoAWideband active feedback LNA with a Modified 3D inductorrdquoMicrowave andOptical Technology Letters vol 52 pp 1561ndash15672010
[12] P Sun Sh Liao H Lin Ch Yang and Y Hsiao ldquoDesign of 31 to106 GHz ultra-wideband low noise amplifier with current reusetechniques and low power consumptionrdquo in Proceedings of theProgress In Electromagnetics Research Symposium pp 901ndash905Beijing China March 2009
[13] A I A Galal R K Pokharel H Kanaya and K Yoshidaldquo1-5GHz wideband low noise amplifier using active inductorrdquoin 2010 IEEE International Conference on Ultra-WidebandICUWB2010 pp 193ndash196 chn September 2010
International Journal of
AerospaceEngineeringHindawi Publishing Corporationhttpwwwhindawicom Volume 2014
RoboticsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Active and Passive Electronic Components
Control Scienceand Engineering
Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
International Journal of
RotatingMachinery
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporation httpwwwhindawicom
Journal ofEngineeringVolume 2014
Submit your manuscripts athttpwwwhindawicom
VLSI Design
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Shock and Vibration
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Civil EngineeringAdvances in
Acoustics and VibrationAdvances in
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Electrical and Computer Engineering
Journal of
Advances inOptoElectronics
Hindawi Publishing Corporation httpwwwhindawicom
Volume 2014
The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014
SensorsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Modelling amp Simulation in EngineeringHindawi Publishing Corporation httpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Chemical EngineeringInternational Journal of Antennas and
Propagation
International Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Navigation and Observation
International Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
DistributedSensor Networks
International Journal of
4 International Journal of Microwave Science and Technology
20 35 50 65 80 95 110 125 140 155 170Frequency (GHz)
150
100
50
0
minus50
minus100
Gai
n (d
B)
LNA2 (planar Ind)LNA2 (3D Ind)
Figure 7 11987821(dB) of LNA2
20 35 50 65 80 95 110 125 140 155 170Frequency (GHz)
60
50
40
30
20
10
00
Noi
se fi
gure
(dB)
LNA2 (planar Ind)LNA2 (3D Ind)
119878-parameter response
Figure 8 NF (dB) of LNA2
circuit is shown in Figure 4 is an extended version of LNA1 Ithas a wider operating band of frequency which extends from25GHz to 16GHz
Input impedance match has a special importance andconsideration especially in wideband sensitive circuitsdesign Input impedance matching bandwidth is broadenedby the use of a weaker shunt capacitive-resistive feedbackloop which mainly leads to quality factor reduction of theinput matching circuit Weakness of shunt feedback strengthnot only reduces the input reflection coefficient over thiswide bandwidth but it also reduces the input side injectedthermal noise which decreases the proposed LNA2 noise
25 35 45 55 65 75 85 95 105 115Frequency (GHz)
0
minus50
minus100
minus150
minus200
minus250
minus300
minus350
Refle
ctio
n co
effici
ents
(dB)
11987811
11987822
Figure 9 11987811(dB) and 119878
22(dB) of LNA1
20 35 50 65 80 95 110 125 140 155 170Frequency (GHz)
0
minus25
minus50
minus75
minus100
minus125
minus150
minus175
LNA2 (planar Ind)LNA2 (3D Ind)
11987811
(dB)
Figure 10 11987811(dB) of LNA2
figure indicating the enhanced noise performance of thesuggested design
Shunt-peaking technique increases the low frequencygain and hence decreases the gain flatnesswhile having awideoperating bandwidth In spite of shunt-peaking drawbacks itmainly facilitates LNA output impedance to load matchingLNA2 bandwidth extension and gain flatness over its operat-ing band of frequency are achieved through the removal ofshunt peaking Moreover the control of gate peaking is usedto enhance the current reuse amplifier core gain
For wideband output impedance matching a unity com-mon gate (CG) matching topology in addition to series
International Journal of Microwave Science and Technology 5
20 35 50 65 80 95 110 125 140 155 170Frequency (GHz)
0
minus25
minus50
minus75
minus100
minus125
minus150
minus175
minus200
LNA2 (planar Ind)LNA2 (3D Ind)
11987822
(dB)
Figure 11 11987822(dB) of LNA2
resonance circuit consisting of capacitor 119862out and inductor119871out is used to match the LNA2 output impedance to its load(succeeding RF stage) The resistive termination 119877out is usedto control the load-output impedance match bandwidth
A planar RF on-chip spiral inductor (1198711198891) having an
inductance of 145 nH and a maximum quality factor of 80 isneeded as a load of the input CS stage to improve the currentreuse stages matching This RF integrated inductor occupiesan area of 428 120583m times 425 120583m which represents a considerablepart of the UWB LNA total die area
One of the well-known difficulties facing the develop-ment of RFICs is inductors large area relative to other passiveand active components This area problem becomes moresevere with the recent intensive shrinking of active devicesand competitive reduction of fabrication cost [10]
Inductors quality factor (119876) reduction is another limitingfactor of RFICs performance enhancement The reduction ofinductor119876 factor is due to ohmic and substrate losses Ohmiclosses can be decreased by using a high conductive metalfor inductor implementation On the other hand placing ahigh resistive layer underneath the inductor can minimizethe substrate losses Lately optimized 3D structures andimplementations of RF integrated inductors are suggestedto overcome all of these limitations and improve the RFintegrated inductors performance [4 5]
For LNA2 circuit area reduction and RF inductor char-acteristics improvement a symmetric 3D structure for RFintegrated inductor implementation is suggested to replacethe planar RF integrated inductor (119871
1198891) Similar to the design
of planar RF inductor 3D metallic structure layout shouldbe drawn on a substrate to design and test a 3D integratedinductor [11] 3D RF inductors structures are mainly consist-ing of serially connected different metal layers spirals havingthe same current flowdirectionThis 3D structure inductance
is dependent on these different spirals inductances and thepositive mutual coupling they have [11]
For 1P6M CMOS technology which has six differentmetal layers the proposed symmetric 3D RF integratedinductor has a complete spiral inductor on the highest metallayer (1198726) Half of the lower spiral is implemented usingfourth metal layer (1198724) to increase its inductance value dueto the increased mutual coupling The second metal layer(1198722)which is distant from the topmetal layer is employed toimplement the lower spiral other half to reduce the parasiticcomponents of that 3D metal structure and increase itsquality factor The suggested symmetric 3D inductor has aninductance of 145 nH a quality factor of 85 and an areaof 185 120583m times 165 120583m 80 of planar inductor area is savedthrough this symmetric 3D structure while achieving thesame inductance value and higher quality factor Figure 5shows a 3D view of the proposed symmetric RF integratedinductor
3 Simulation Results and Discussion
The proposed UWB LNA (LNA1 and LNA2) circuits aredesigned in TSMC CMOS 018 120583m technology process usingAgilent Advanced Design System (ADS) Electromagneticsimulation is verified by the post-layout simulation resultswhich are obtained using the Cadence design environmentThe suggested symmetric 3D structure is designed and testedusing Momentum simulation software and verified usingCadence design environment The LNAs simulation resultsare given below
31 Power Gain and Noise Figure LNA1 has a gain of 17 plusmn15 dB as shown in Figure 6 It also has a noise figure less than23 dB over its operating band of frequency (31ndash106GHz)11987821(dB) of LNA2 is higher than 10 dB with a maximum
value of 12 dB over the desired band of frequency (25ndash16GHz) This high and flat gain is due to the use of inductivegain-peaking technique in addition to the control of the unitygain current cut-off frequencies of LNA2 Figure 7 showsthat the proposed LNA2 employing the symmetric 3D RFintegrated inductor achieves a gain of 11 plusmn 10 dB
The proposed UWB LNA2 has an enhanced LNA noiseperformance LNA2 NF ranges from 25 dB to 33 dB overthe operating bandwidth (25ndash16GHz) This NF reduction isaccomplished due to the optimization of the LNAnoise factorgiven by (4) and the use of weak shunt capacitive-resistivefeedback implemented over the input stage LNA2 achievesa NF less than 33 dB over the operating band of frequency asshown in Figure 8
32 Input and Output Impedance Matching LNA1 input andoutput ports have good matching conditions to its sourceand load respectively Simulation results of input and outputreflection coefficients of LNA1 are shown in Figure 9 LNA1has 11987811and 11987822less than minus11 dB and minus10 dB respectively over
the UWB range of frequenciesThe proposed UWB LNA2 achieves good input im-
pedance matching as shown in Figure 10 Good impedance
6 International Journal of Microwave Science and Technology
Table 1 Proposed UWB LNA performance summery in compari-son to recently published UWB LNAs
Reference BW(GHz)
Gain(dB)
NF(dB)
11987811
(dB)11987822
(dB)This work (LNA2)lowast 25sim16 11 plusmn 10 lt33 ltminus7 ltminus725This work (LNA1)lowast 31sim106 17 plusmn 15 lt23 ltminus11 ltminus10LNA-1 [1] 17sim59 112 plusmn 23 lt47 ltminus118 ltminus127LNA-2 [1] 15sim117 122 plusmn 06 lt48 ltminus86 ltminus10[2] 3sim106 15 lt44 ltminus7 NA[12] 31sim106 108 plusmn 17 lt6 ltminus10 ltminus93[13] 1sim5 127 plusmn 02 lt35 ltminus8 NAlowastPost-layout simulation results
match between LNA2 and its source is obtained using theseries-resonant input matching technique The input returnloss (119878
11) is less thanminus70 dB over this wide range of frequency
(25ndash16GHz)Figure 11 shows that better output impedance matching is
obtained using the planar integrated inductor while simulat-ing LNA2 Good output impedance matching of LNA2 overits operating band of frequency (25ndash16GHz) is accomplisheddue to the optimization of the CG outputmatching stage withthe aid of the output LC resonant circuit 119877out termination isused to widen the matching bandwidth The output returnloss (119878
22) shown in Figure 11 is less than minus725 dB for LNA2
using the planar inductor while it is less than minus60 dB forLNA2 employing the proposed 3D inductor over the desiredfrequency band (25ndash16GHz)
33 DC Power Reverse Isolation and Stability LNA1 andLNA2 consume DC power of 128mW and 20mW respec-tively froma 18Vpower sourceThe increasedDCconsump-tion of LNA2 is due to having enough driving bias for the CGoutput match stage
Both of the proposed UWB LNA1 and LNA2 have areverse isolation factor (119878
12) less thanminus28 dBover each design
bandwidthThe proposed UWB LNAs (LNA1 and LNA2) areunconditionally stable over their bandwidths
Table 1 shows a summary of the proposed UWB LNAsperformance in comparison to other recently publishedUWBLNAs implemented in 018120583m CMOS technology
4 Conclusion
In this paper two different UWBLNAswere presented LNA1has high gain minimized noise figure and good impedancematch over the UWB range of frequencies LNA2 has awide range of operating frequency (25 GHzndash16GHz) UWBLNA2 consists of a current reuse cascaded amplifier withshunt resistive feedback followed by a CG output stage withresistive termination LNA2 input stage use series-resonantimpedancematching technique and employs a symmetric 3DRF integrated inductor as a load The post-layout simulationresults of LNA1 and LNA2 demonstrate the performanceimprovement achieved through theses designs The next step
is to implement these UWB LNAs to have a comparisonbetween post-layout simulation results andmeasured results
References
[1] Y S Lin C Z Chen H Y Yang et al ldquoAnalysis and designof a CMOS UWB LNA with dual-RLC-branch wideband inputmatching networkrdquo IEEE Transactions on Microwave Theoryand Techniques vol 58 no 2 pp 287ndash296 2010
[2] A I A Galal R K Pokharel H Kanay and K Yoshida ldquoUltra-wideband low noise amplifier with shunt resistive feedbackin 018 120583m CMOS processrdquo in Proceedings of the 10th TopicalMeeting on Silicon Monolithic Integrated Circuits in RF Systems(SiRF rsquo10) pp 33ndash36 January 2010
[3] K Yousef H Jia R Pokharel A Allam M Ragab and KYoshida ldquoA 2ndash16GHz CMOS current reuse cascaded ultra-wideband low noise amplifierrdquo in Proceedings of the Saudi Inter-national Electronics Communications and Photonics Conference(SIECPC rsquo11) April 2011
[4] K Yousef H Jia R Pokharel A Allam M Ragab andK Yoshida ldquoDesign of 3D Integrated Inductors for RFICsrdquoin Proceeding of 2012 Japan Egypt Conference on ElectronicsCommunications and Computers (JECECC rsquo12) pp 22ndash25
[5] X N Wang X L Zhao Y Zhou X H Dai and B C CaildquoFabrication and performance of novel RF spiral inductors onsiliconrdquo Microelectronics Journal vol 36 no 8 pp 737ndash7402005
[6] A M Niknejad and R G Meyer ldquoAnalysis design andoptimization of spiral inductors and transformers for Si RFICrsquosrdquo IEEE Journal of Solid-State Circuits vol 33 no 10 pp1470ndash1481 1998
[7] T H Lee The Design of CMOS Radio-Frequency IntegratedCircuits Cambridge University Press 2nd edition 2004
[8] S S Mohan M Del Mar Hershenson S P Boyd and T HLee ldquoBandwidth extension in CMOS with optimized on-chipinductorsrdquo IEEE Journal of Solid-State Circuits vol 35 no 3 pp346ndash355 2000
[9] H T Friis ldquoNoise figure of radio receiversrdquo Proceedings of theIRE vol 32 no 7 pp 419ndash422 1944
[10] H Y Tsui and J Lau ldquoExperimental results and die area efficientself-shielded on-chip vertical solenoid inductors for multi-GHzCMOS RFICrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits (RFIC) Symposium pp 243ndash246 June 2003
[11] H Garcia S Khemchndai R Puildo A Lturri and J Pino ldquoAWideband active feedback LNA with a Modified 3D inductorrdquoMicrowave andOptical Technology Letters vol 52 pp 1561ndash15672010
[12] P Sun Sh Liao H Lin Ch Yang and Y Hsiao ldquoDesign of 31 to106 GHz ultra-wideband low noise amplifier with current reusetechniques and low power consumptionrdquo in Proceedings of theProgress In Electromagnetics Research Symposium pp 901ndash905Beijing China March 2009
[13] A I A Galal R K Pokharel H Kanaya and K Yoshidaldquo1-5GHz wideband low noise amplifier using active inductorrdquoin 2010 IEEE International Conference on Ultra-WidebandICUWB2010 pp 193ndash196 chn September 2010
International Journal of
AerospaceEngineeringHindawi Publishing Corporationhttpwwwhindawicom Volume 2014
RoboticsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Active and Passive Electronic Components
Control Scienceand Engineering
Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
International Journal of
RotatingMachinery
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporation httpwwwhindawicom
Journal ofEngineeringVolume 2014
Submit your manuscripts athttpwwwhindawicom
VLSI Design
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Shock and Vibration
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Civil EngineeringAdvances in
Acoustics and VibrationAdvances in
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Electrical and Computer Engineering
Journal of
Advances inOptoElectronics
Hindawi Publishing Corporation httpwwwhindawicom
Volume 2014
The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014
SensorsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Modelling amp Simulation in EngineeringHindawi Publishing Corporation httpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Chemical EngineeringInternational Journal of Antennas and
Propagation
International Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Navigation and Observation
International Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
DistributedSensor Networks
International Journal of
International Journal of Microwave Science and Technology 5
20 35 50 65 80 95 110 125 140 155 170Frequency (GHz)
0
minus25
minus50
minus75
minus100
minus125
minus150
minus175
minus200
LNA2 (planar Ind)LNA2 (3D Ind)
11987822
(dB)
Figure 11 11987822(dB) of LNA2
resonance circuit consisting of capacitor 119862out and inductor119871out is used to match the LNA2 output impedance to its load(succeeding RF stage) The resistive termination 119877out is usedto control the load-output impedance match bandwidth
A planar RF on-chip spiral inductor (1198711198891) having an
inductance of 145 nH and a maximum quality factor of 80 isneeded as a load of the input CS stage to improve the currentreuse stages matching This RF integrated inductor occupiesan area of 428 120583m times 425 120583m which represents a considerablepart of the UWB LNA total die area
One of the well-known difficulties facing the develop-ment of RFICs is inductors large area relative to other passiveand active components This area problem becomes moresevere with the recent intensive shrinking of active devicesand competitive reduction of fabrication cost [10]
Inductors quality factor (119876) reduction is another limitingfactor of RFICs performance enhancement The reduction ofinductor119876 factor is due to ohmic and substrate losses Ohmiclosses can be decreased by using a high conductive metalfor inductor implementation On the other hand placing ahigh resistive layer underneath the inductor can minimizethe substrate losses Lately optimized 3D structures andimplementations of RF integrated inductors are suggestedto overcome all of these limitations and improve the RFintegrated inductors performance [4 5]
For LNA2 circuit area reduction and RF inductor char-acteristics improvement a symmetric 3D structure for RFintegrated inductor implementation is suggested to replacethe planar RF integrated inductor (119871
1198891) Similar to the design
of planar RF inductor 3D metallic structure layout shouldbe drawn on a substrate to design and test a 3D integratedinductor [11] 3D RF inductors structures are mainly consist-ing of serially connected different metal layers spirals havingthe same current flowdirectionThis 3D structure inductance
is dependent on these different spirals inductances and thepositive mutual coupling they have [11]
For 1P6M CMOS technology which has six differentmetal layers the proposed symmetric 3D RF integratedinductor has a complete spiral inductor on the highest metallayer (1198726) Half of the lower spiral is implemented usingfourth metal layer (1198724) to increase its inductance value dueto the increased mutual coupling The second metal layer(1198722)which is distant from the topmetal layer is employed toimplement the lower spiral other half to reduce the parasiticcomponents of that 3D metal structure and increase itsquality factor The suggested symmetric 3D inductor has aninductance of 145 nH a quality factor of 85 and an areaof 185 120583m times 165 120583m 80 of planar inductor area is savedthrough this symmetric 3D structure while achieving thesame inductance value and higher quality factor Figure 5shows a 3D view of the proposed symmetric RF integratedinductor
3 Simulation Results and Discussion
The proposed UWB LNA (LNA1 and LNA2) circuits aredesigned in TSMC CMOS 018 120583m technology process usingAgilent Advanced Design System (ADS) Electromagneticsimulation is verified by the post-layout simulation resultswhich are obtained using the Cadence design environmentThe suggested symmetric 3D structure is designed and testedusing Momentum simulation software and verified usingCadence design environment The LNAs simulation resultsare given below
31 Power Gain and Noise Figure LNA1 has a gain of 17 plusmn15 dB as shown in Figure 6 It also has a noise figure less than23 dB over its operating band of frequency (31ndash106GHz)11987821(dB) of LNA2 is higher than 10 dB with a maximum
value of 12 dB over the desired band of frequency (25ndash16GHz) This high and flat gain is due to the use of inductivegain-peaking technique in addition to the control of the unitygain current cut-off frequencies of LNA2 Figure 7 showsthat the proposed LNA2 employing the symmetric 3D RFintegrated inductor achieves a gain of 11 plusmn 10 dB
The proposed UWB LNA2 has an enhanced LNA noiseperformance LNA2 NF ranges from 25 dB to 33 dB overthe operating bandwidth (25ndash16GHz) This NF reduction isaccomplished due to the optimization of the LNAnoise factorgiven by (4) and the use of weak shunt capacitive-resistivefeedback implemented over the input stage LNA2 achievesa NF less than 33 dB over the operating band of frequency asshown in Figure 8
32 Input and Output Impedance Matching LNA1 input andoutput ports have good matching conditions to its sourceand load respectively Simulation results of input and outputreflection coefficients of LNA1 are shown in Figure 9 LNA1has 11987811and 11987822less than minus11 dB and minus10 dB respectively over
the UWB range of frequenciesThe proposed UWB LNA2 achieves good input im-
pedance matching as shown in Figure 10 Good impedance
6 International Journal of Microwave Science and Technology
Table 1 Proposed UWB LNA performance summery in compari-son to recently published UWB LNAs
Reference BW(GHz)
Gain(dB)
NF(dB)
11987811
(dB)11987822
(dB)This work (LNA2)lowast 25sim16 11 plusmn 10 lt33 ltminus7 ltminus725This work (LNA1)lowast 31sim106 17 plusmn 15 lt23 ltminus11 ltminus10LNA-1 [1] 17sim59 112 plusmn 23 lt47 ltminus118 ltminus127LNA-2 [1] 15sim117 122 plusmn 06 lt48 ltminus86 ltminus10[2] 3sim106 15 lt44 ltminus7 NA[12] 31sim106 108 plusmn 17 lt6 ltminus10 ltminus93[13] 1sim5 127 plusmn 02 lt35 ltminus8 NAlowastPost-layout simulation results
match between LNA2 and its source is obtained using theseries-resonant input matching technique The input returnloss (119878
11) is less thanminus70 dB over this wide range of frequency
(25ndash16GHz)Figure 11 shows that better output impedance matching is
obtained using the planar integrated inductor while simulat-ing LNA2 Good output impedance matching of LNA2 overits operating band of frequency (25ndash16GHz) is accomplisheddue to the optimization of the CG outputmatching stage withthe aid of the output LC resonant circuit 119877out termination isused to widen the matching bandwidth The output returnloss (119878
22) shown in Figure 11 is less than minus725 dB for LNA2
using the planar inductor while it is less than minus60 dB forLNA2 employing the proposed 3D inductor over the desiredfrequency band (25ndash16GHz)
33 DC Power Reverse Isolation and Stability LNA1 andLNA2 consume DC power of 128mW and 20mW respec-tively froma 18Vpower sourceThe increasedDCconsump-tion of LNA2 is due to having enough driving bias for the CGoutput match stage
Both of the proposed UWB LNA1 and LNA2 have areverse isolation factor (119878
12) less thanminus28 dBover each design
bandwidthThe proposed UWB LNAs (LNA1 and LNA2) areunconditionally stable over their bandwidths
Table 1 shows a summary of the proposed UWB LNAsperformance in comparison to other recently publishedUWBLNAs implemented in 018120583m CMOS technology
4 Conclusion
In this paper two different UWBLNAswere presented LNA1has high gain minimized noise figure and good impedancematch over the UWB range of frequencies LNA2 has awide range of operating frequency (25 GHzndash16GHz) UWBLNA2 consists of a current reuse cascaded amplifier withshunt resistive feedback followed by a CG output stage withresistive termination LNA2 input stage use series-resonantimpedancematching technique and employs a symmetric 3DRF integrated inductor as a load The post-layout simulationresults of LNA1 and LNA2 demonstrate the performanceimprovement achieved through theses designs The next step
is to implement these UWB LNAs to have a comparisonbetween post-layout simulation results andmeasured results
References
[1] Y S Lin C Z Chen H Y Yang et al ldquoAnalysis and designof a CMOS UWB LNA with dual-RLC-branch wideband inputmatching networkrdquo IEEE Transactions on Microwave Theoryand Techniques vol 58 no 2 pp 287ndash296 2010
[2] A I A Galal R K Pokharel H Kanay and K Yoshida ldquoUltra-wideband low noise amplifier with shunt resistive feedbackin 018 120583m CMOS processrdquo in Proceedings of the 10th TopicalMeeting on Silicon Monolithic Integrated Circuits in RF Systems(SiRF rsquo10) pp 33ndash36 January 2010
[3] K Yousef H Jia R Pokharel A Allam M Ragab and KYoshida ldquoA 2ndash16GHz CMOS current reuse cascaded ultra-wideband low noise amplifierrdquo in Proceedings of the Saudi Inter-national Electronics Communications and Photonics Conference(SIECPC rsquo11) April 2011
[4] K Yousef H Jia R Pokharel A Allam M Ragab andK Yoshida ldquoDesign of 3D Integrated Inductors for RFICsrdquoin Proceeding of 2012 Japan Egypt Conference on ElectronicsCommunications and Computers (JECECC rsquo12) pp 22ndash25
[5] X N Wang X L Zhao Y Zhou X H Dai and B C CaildquoFabrication and performance of novel RF spiral inductors onsiliconrdquo Microelectronics Journal vol 36 no 8 pp 737ndash7402005
[6] A M Niknejad and R G Meyer ldquoAnalysis design andoptimization of spiral inductors and transformers for Si RFICrsquosrdquo IEEE Journal of Solid-State Circuits vol 33 no 10 pp1470ndash1481 1998
[7] T H Lee The Design of CMOS Radio-Frequency IntegratedCircuits Cambridge University Press 2nd edition 2004
[8] S S Mohan M Del Mar Hershenson S P Boyd and T HLee ldquoBandwidth extension in CMOS with optimized on-chipinductorsrdquo IEEE Journal of Solid-State Circuits vol 35 no 3 pp346ndash355 2000
[9] H T Friis ldquoNoise figure of radio receiversrdquo Proceedings of theIRE vol 32 no 7 pp 419ndash422 1944
[10] H Y Tsui and J Lau ldquoExperimental results and die area efficientself-shielded on-chip vertical solenoid inductors for multi-GHzCMOS RFICrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits (RFIC) Symposium pp 243ndash246 June 2003
[11] H Garcia S Khemchndai R Puildo A Lturri and J Pino ldquoAWideband active feedback LNA with a Modified 3D inductorrdquoMicrowave andOptical Technology Letters vol 52 pp 1561ndash15672010
[12] P Sun Sh Liao H Lin Ch Yang and Y Hsiao ldquoDesign of 31 to106 GHz ultra-wideband low noise amplifier with current reusetechniques and low power consumptionrdquo in Proceedings of theProgress In Electromagnetics Research Symposium pp 901ndash905Beijing China March 2009
[13] A I A Galal R K Pokharel H Kanaya and K Yoshidaldquo1-5GHz wideband low noise amplifier using active inductorrdquoin 2010 IEEE International Conference on Ultra-WidebandICUWB2010 pp 193ndash196 chn September 2010
International Journal of
AerospaceEngineeringHindawi Publishing Corporationhttpwwwhindawicom Volume 2014
RoboticsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Active and Passive Electronic Components
Control Scienceand Engineering
Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
International Journal of
RotatingMachinery
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporation httpwwwhindawicom
Journal ofEngineeringVolume 2014
Submit your manuscripts athttpwwwhindawicom
VLSI Design
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Shock and Vibration
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Civil EngineeringAdvances in
Acoustics and VibrationAdvances in
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Electrical and Computer Engineering
Journal of
Advances inOptoElectronics
Hindawi Publishing Corporation httpwwwhindawicom
Volume 2014
The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014
SensorsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Modelling amp Simulation in EngineeringHindawi Publishing Corporation httpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Chemical EngineeringInternational Journal of Antennas and
Propagation
International Journal of
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Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Navigation and Observation
International Journal of
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DistributedSensor Networks
International Journal of
6 International Journal of Microwave Science and Technology
Table 1 Proposed UWB LNA performance summery in compari-son to recently published UWB LNAs
Reference BW(GHz)
Gain(dB)
NF(dB)
11987811
(dB)11987822
(dB)This work (LNA2)lowast 25sim16 11 plusmn 10 lt33 ltminus7 ltminus725This work (LNA1)lowast 31sim106 17 plusmn 15 lt23 ltminus11 ltminus10LNA-1 [1] 17sim59 112 plusmn 23 lt47 ltminus118 ltminus127LNA-2 [1] 15sim117 122 plusmn 06 lt48 ltminus86 ltminus10[2] 3sim106 15 lt44 ltminus7 NA[12] 31sim106 108 plusmn 17 lt6 ltminus10 ltminus93[13] 1sim5 127 plusmn 02 lt35 ltminus8 NAlowastPost-layout simulation results
match between LNA2 and its source is obtained using theseries-resonant input matching technique The input returnloss (119878
11) is less thanminus70 dB over this wide range of frequency
(25ndash16GHz)Figure 11 shows that better output impedance matching is
obtained using the planar integrated inductor while simulat-ing LNA2 Good output impedance matching of LNA2 overits operating band of frequency (25ndash16GHz) is accomplisheddue to the optimization of the CG outputmatching stage withthe aid of the output LC resonant circuit 119877out termination isused to widen the matching bandwidth The output returnloss (119878
22) shown in Figure 11 is less than minus725 dB for LNA2
using the planar inductor while it is less than minus60 dB forLNA2 employing the proposed 3D inductor over the desiredfrequency band (25ndash16GHz)
33 DC Power Reverse Isolation and Stability LNA1 andLNA2 consume DC power of 128mW and 20mW respec-tively froma 18Vpower sourceThe increasedDCconsump-tion of LNA2 is due to having enough driving bias for the CGoutput match stage
Both of the proposed UWB LNA1 and LNA2 have areverse isolation factor (119878
12) less thanminus28 dBover each design
bandwidthThe proposed UWB LNAs (LNA1 and LNA2) areunconditionally stable over their bandwidths
Table 1 shows a summary of the proposed UWB LNAsperformance in comparison to other recently publishedUWBLNAs implemented in 018120583m CMOS technology
4 Conclusion
In this paper two different UWBLNAswere presented LNA1has high gain minimized noise figure and good impedancematch over the UWB range of frequencies LNA2 has awide range of operating frequency (25 GHzndash16GHz) UWBLNA2 consists of a current reuse cascaded amplifier withshunt resistive feedback followed by a CG output stage withresistive termination LNA2 input stage use series-resonantimpedancematching technique and employs a symmetric 3DRF integrated inductor as a load The post-layout simulationresults of LNA1 and LNA2 demonstrate the performanceimprovement achieved through theses designs The next step
is to implement these UWB LNAs to have a comparisonbetween post-layout simulation results andmeasured results
References
[1] Y S Lin C Z Chen H Y Yang et al ldquoAnalysis and designof a CMOS UWB LNA with dual-RLC-branch wideband inputmatching networkrdquo IEEE Transactions on Microwave Theoryand Techniques vol 58 no 2 pp 287ndash296 2010
[2] A I A Galal R K Pokharel H Kanay and K Yoshida ldquoUltra-wideband low noise amplifier with shunt resistive feedbackin 018 120583m CMOS processrdquo in Proceedings of the 10th TopicalMeeting on Silicon Monolithic Integrated Circuits in RF Systems(SiRF rsquo10) pp 33ndash36 January 2010
[3] K Yousef H Jia R Pokharel A Allam M Ragab and KYoshida ldquoA 2ndash16GHz CMOS current reuse cascaded ultra-wideband low noise amplifierrdquo in Proceedings of the Saudi Inter-national Electronics Communications and Photonics Conference(SIECPC rsquo11) April 2011
[4] K Yousef H Jia R Pokharel A Allam M Ragab andK Yoshida ldquoDesign of 3D Integrated Inductors for RFICsrdquoin Proceeding of 2012 Japan Egypt Conference on ElectronicsCommunications and Computers (JECECC rsquo12) pp 22ndash25
[5] X N Wang X L Zhao Y Zhou X H Dai and B C CaildquoFabrication and performance of novel RF spiral inductors onsiliconrdquo Microelectronics Journal vol 36 no 8 pp 737ndash7402005
[6] A M Niknejad and R G Meyer ldquoAnalysis design andoptimization of spiral inductors and transformers for Si RFICrsquosrdquo IEEE Journal of Solid-State Circuits vol 33 no 10 pp1470ndash1481 1998
[7] T H Lee The Design of CMOS Radio-Frequency IntegratedCircuits Cambridge University Press 2nd edition 2004
[8] S S Mohan M Del Mar Hershenson S P Boyd and T HLee ldquoBandwidth extension in CMOS with optimized on-chipinductorsrdquo IEEE Journal of Solid-State Circuits vol 35 no 3 pp346ndash355 2000
[9] H T Friis ldquoNoise figure of radio receiversrdquo Proceedings of theIRE vol 32 no 7 pp 419ndash422 1944
[10] H Y Tsui and J Lau ldquoExperimental results and die area efficientself-shielded on-chip vertical solenoid inductors for multi-GHzCMOS RFICrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits (RFIC) Symposium pp 243ndash246 June 2003
[11] H Garcia S Khemchndai R Puildo A Lturri and J Pino ldquoAWideband active feedback LNA with a Modified 3D inductorrdquoMicrowave andOptical Technology Letters vol 52 pp 1561ndash15672010
[12] P Sun Sh Liao H Lin Ch Yang and Y Hsiao ldquoDesign of 31 to106 GHz ultra-wideband low noise amplifier with current reusetechniques and low power consumptionrdquo in Proceedings of theProgress In Electromagnetics Research Symposium pp 901ndash905Beijing China March 2009
[13] A I A Galal R K Pokharel H Kanaya and K Yoshidaldquo1-5GHz wideband low noise amplifier using active inductorrdquoin 2010 IEEE International Conference on Ultra-WidebandICUWB2010 pp 193ndash196 chn September 2010
International Journal of
AerospaceEngineeringHindawi Publishing Corporationhttpwwwhindawicom Volume 2014
RoboticsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Active and Passive Electronic Components
Control Scienceand Engineering
Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
International Journal of
RotatingMachinery
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporation httpwwwhindawicom
Journal ofEngineeringVolume 2014
Submit your manuscripts athttpwwwhindawicom
VLSI Design
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Shock and Vibration
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Civil EngineeringAdvances in
Acoustics and VibrationAdvances in
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Electrical and Computer Engineering
Journal of
Advances inOptoElectronics
Hindawi Publishing Corporation httpwwwhindawicom
Volume 2014
The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014
SensorsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Modelling amp Simulation in EngineeringHindawi Publishing Corporation httpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Chemical EngineeringInternational Journal of Antennas and
Propagation
International Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Navigation and Observation
International Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
DistributedSensor Networks
International Journal of
International Journal of
AerospaceEngineeringHindawi Publishing Corporationhttpwwwhindawicom Volume 2014
RoboticsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Active and Passive Electronic Components
Control Scienceand Engineering
Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
International Journal of
RotatingMachinery
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporation httpwwwhindawicom
Journal ofEngineeringVolume 2014
Submit your manuscripts athttpwwwhindawicom
VLSI Design
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Shock and Vibration
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Civil EngineeringAdvances in
Acoustics and VibrationAdvances in
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Electrical and Computer Engineering
Journal of
Advances inOptoElectronics
Hindawi Publishing Corporation httpwwwhindawicom
Volume 2014
The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014
SensorsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Modelling amp Simulation in EngineeringHindawi Publishing Corporation httpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Chemical EngineeringInternational Journal of Antennas and
Propagation
International Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Navigation and Observation
International Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
DistributedSensor Networks
International Journal of