real time image encryption with rsa algorithmpeople.bu.edu/tyyang/rsa.pdfboston university slideshow...

Real Time Image Encryption with

RSA Algorithm RSA Group

Final Presentation Date: 4/30/2014

Boston University Slideshow Title Goes Here

Real Time Image Encryption with RSA Algorithm

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Team Members

§  Jing Zheng §  Abantika Ghosh §  Akash Kadakia §  Tianyu Yang §  Sumeet Sharma



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BASIC FUNCTIONALITY

Milestone 1 Milestone 2



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RSA ALGORITHM KEY GENERATION

•  PUBLIC KEY 1: N=P*Q will be calculated.

•  PUBLIC KEY 2: Calculate Euler’s Totient Z=(P-1)*(Q-1). Choose any number e such that 1 < e < Z and e is coprime to Z.

•  PRIVATE KEY:

ENCRYPTION

d.e=1(modφ(n)))

DECRYPTION

•  c=m^e (mod n)

•  m=c^d (mod n)



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VERILOG STRUCTURE

MODULE GEN_KEY

MODULE ENCRYPTION

MODULE

DECRYPTION

MODULE DIVISION

MODULE POWER

MODULE MOD

PUB_KEY1

PUB_KEY1

PUB_KEY2

PRI_KEY

𝑐= 𝑚↑𝑒 (mod n)

𝑚= c↑𝑑 (mod n)

PRI_KEY

PUB_KEY2



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MODULE GEN_KEY INPUTS •  CLOCK •  RESET •  P (prime no.1) •  Q (prime no.2) OUTPUTS •  PUBLIC KEY 1 •  PUBLIC KEY 2 •  PRIVATE KEY •  READY

Behavior simulation result of GEN_KEY



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SUB MODULES GEN_KEY



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MODULE ENCRYPTION INPUTS •  CLK,RST,ENABLE •  DATA_IN •  PUBLIC KEY 1 •  PUBLIC KEY 2 •  PRIVATE KEY

OUTPUTS •  DATA_OUT •  READY Behavior simulation result of Encryption



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MODULE DECRYPTION INPUTS •  CLK,RST,ENABLE •  DATA_IN •  PUBLIC KEY 1 •  PUBLIC KEY 2 •  PRIVATE KEY

OUTPUTS •  DATA_OUT •  READY Behavior simulation result of Decryption



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SUB MODULES ENCRYPTION



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MODULE POWER INPUTS •  CLOCK,RESET •  BASE •  EXPONENT

OUTPUTS •  DATA_OUT •  READY

Behavior simulation result of Power Function



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SUB MODULES POWER



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MODULE MOD INPUTS •  CLOCK,RESET •  DIVIDEND •  DIVIDER

OUTPUTS •  DATA_OUT •  READY

Behavior simulation result of MODULUS



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SUB MODULES MOD



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MODULE DIV INPUTS •  CLOCK,RESET •  DIVIDEND •  DIVIDER

OUTPUTS •  QUOTIENT •  REMAINDER •  READY Behavior simulation result of DIVIDE



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PUTTING IT ALL TOGETHER

•  All the sub-modules were tested individually. •  The input data vector is loaded into the top module from a .txt file. •  The test bench stores the output in another .txt file. •  To test our design we input all numbers from 0 to 15. •  The input and output text file consist of an image stored in binary

format. •  This is done using two functions in MATLAB to convert an image into

it’s binary equivalent and vice-versa. •  One function converts the image into binary from and acts as the input

which is then encrypted. •  Another function converts the decrypted text output into an image.


Matlab functions

00000110 00000100 00000100 00001010 00010010 00100100 00100010 10010110 10101010 00101101 11001000 00101001

; ; ;

Trustees Presentation

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Function: Image2Data

Function: Data2Image



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MODULE RSA ENCRYPTION INPUTS •  CLOCK,RESET •  ENABLE •  DATA_IN •  P •  Q

OUTPUTS •  READY •  DATA_OUT

Behavior simulation result of RSA ENCRYPTION



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MODULE RSA DECRYPTION INPUTS •  CLOCK,RESET •  ENABLE •  DATA_IN •  P •  Q

OUTPUTS •  READY •  DATA_OUT

Behavior simulation result of RSA DECRYPTION



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RESULT

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

0 1 8 24 13 11 39 31 2 15 37 29 6 4 44 9

DATA IN ENCRYPTED DATA DECRYPTED DATA

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15



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RSA CHIP GRAPH



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POST-ROUTE CLOCK TREE



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CLOCK TREE WITH DELAY



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CLOCK TREE WITH DELAY



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CLOCK TREE MIN MAX DELAY



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CHIP LAYOUT

Chip size :

145.725 um * 144.185 um



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PERFORMANCE ANALYSIS

Critical Path

Other end arrival time 0.245

Setup 0.292

Phase Shift 20

Required time 19.953

Arrival Time 19.772

Slack Time 0.181

Clock Rise Edge 0.000

Clock Network Latency(Pro) 0.272

Begin point Arrival Time 0.272 ��

Critical path of the Design



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CHALLENGES FACED

•  Calculating the modulus of equal values was giving erroneous results. This bug was later fixed.

•  Very long time to process a number as big as 255.

•  Small glitch in the divide module during synthesis.

•  And of course, the NANGATE Library.



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real time image encryption with rsa algorithmpeople.bu.edu/tyyang/rsa.pdfboston university slideshow...

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