P09141 Satellite Thermal Heater Controller

System Level Design Review Package

Document Revision: 02

Document Date: 01/15/2009

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Table of ContentsTable of Contents......................................................................................................................... 21 Introduction............................................................................................................................ 3

1.1 Vision.............................................................................................................................. 3

1.2 Background..................................................................................................................... 3

1.3 Objectives....................................................................................................................... 3

1.4 Deliverables.................................................................................................................... 3

1.5 Expected Project Benefits...............................................................................................3

1.6 Core Team Members......................................................................................................3

2 Strategy & Approach.............................................................................................................42.1 Assumptions & Constraints.............................................................................................4

2.2 Issues & Risks................................................................................................................. 4

3 System Level Architecture....................................................................................................54 Communications.................................................................................................................... 6

4.1 Modulation/Demodulation...............................................................................................6

4.2 Protocol........................................................................................................................... 9

5 Interface Board Architecture..............................................................................................116 Enclosure............................................................................................................................. 127 Project Plan.......................................................................................................................... 12

7.1 Cost Analysis................................................................................................................12

7.2 Scheduling and Workload Analysis...............................................................................12

7.3 Risk Assessment...........................................................................................................13

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1 Introduction

1.1 VisionThe mission of this project is to design, build and test a scalable prototype of a thermal heater controller for the Space Systems Division of ITT. The controller will be subsystem in future satellite-imaging systems.

1.2 BackgroundThe Satellite Thermal Heater Controller (STHC) is a single master multiple slave system that can be arrayed in a distributed fashion with centralized control. The system can be described as a group of distributed, autonomous thermal control units that share the same power input, which will also serve for communication. This controller may be used in satellite applications to control the temperature of critical optical subsystems.

1.3 Objectives1. Achieve communications between the master and slaves through the power lines.2. Design and layout of the controller circuit board, for usability as a master or slave.3. Selecting components that will minimize power consumption, weight and cost.4. Program DSP for efficient communication.

1.4 Deliverables Demonstrate an enhancement to ITT's current distributed autonomous thermal controller. Create a more competitive thermal controller that is lightweight, scalable, modular, reliable, cost effective

and power efficient. Demonstrate the ability to thermally control, stabilize and enable critical optical subsystems.

1.5 Expected Project Benefits The STHC shall be launched and deployed in space by ITT to regulate the temperature of a variety of

satellite payloads. The STHC might be used by other groups that are involved in satellite imaging applications. Reinforce the engineering programs at RIT.

1.6 Core Team Members Anthony Berwin Scott Rioux Greg Pawlowski Sarmad Abedin John Scipione

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2 Strategy & Approach

2.1 Assumptions & Constraints1. There is a time constraint of 22 weeks where the project must be completed.2. Lead times for parts components and materials. Incorporate lead times into scheduling.3. Lead time for printed circuit boards. Incorporate lead times into scheduling.4. Controller from the Texas Instruments (28x family).5. Access to the Hybrid Heater Controller (HHC).

2.2 Issues & Risks Acquiring the DSP Learning development board functions. Acquiring and learning Code Composer or equivalent software suite. Acquiring the HHC Acquiring the Equipment Specifications Testing Equipment

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3 System Level Architecture

Figure 3.1: System Level Architecture

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4 Communications

4.1 Modulation/DemodulationFSK MATLAB AnalysisSpec: Worst case, Full-duplex transmission:

20ms -> 50 Hz

We chose to use the FSK modulation technique because Chuck Moon suggested it. We investigated using PAM, or PSK but found that we can meet the specs using FSK so we went with Chuck’s suggestion. PAM will not work well because we need to stay in 10mV RMS amplitude. PSK would work but we chose not to use it because it does not provide a significant advantage over using FSK in this application.

The system will be inherently half-duplex based on the fact that the single master must communicate with 256 slaves. Providing a full-duplex signal using 256 slaves would require 2 frequencies (one for 0 and one for 1) per slave plus 2 frequencies for the master for a grand total of 514 frequencies. Modulating and Demodulating 514 frequencies would push us out of the frequency range we have available over the power line. The message will be transmitted at 5ms, or 200Hz. Binary FSK (frequency shift keying) will be used to modulate and transmit the signal. Based on this one bit will be transmitted at a time, so for one bit of information 5ms divided by 32 bits gives a transmit time of 52us or 19200Hz per bit. Using the Nyquist frequency, the per-bit frequency will be divided by 2 to get a bandwidth of 38400Hz. The separation between frequencies will be 19200Hz to make sure the signals are orthogonal. A Matlab program was written to demonstrate the modulation of a random 6 bits.

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Figure 4.1.1 Random 6 bits “0, 1, 1, 0, 1, 0”

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Figure 4.1.2 Frequency one to transmit a “0”, F = 38400 Hz

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Figure 4.1.3 Frequency one to transmit a “1”, F = 57600 Hz

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Figure 4.1.4 Modulated FSK signal represents “0, 1, 1, 0, 1, 0”

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Figure 4.1.5 Modulated signal with AWGN, SNR = 10dB

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4.2 ProtocolMaster-Slave Communication Protocol Explanation for the STHC, 32-bit wide

Bits Description Values

B0-B1 Start indicator “00”

B2 Transmit/receive bit Tx=’0’ Rx=’1’

B3-B10 Slave ID number 00000000 to 11111111 (256)

B11 Read/Set Read=’0’ Set=’1’

B12 Read/Set Temperature/Heater State Temp=’0’ Heater State=’1’

B13-B24 Temperature Value/Heater State Value 18C-32C res=0.003148C/B24=’0’: off, B24=’1’: on

B25-B30 Checksum B25=’0’ always No. of 0s from B2-B24 generated by master in binary

B31 Stop bit ‘1’

Table 4.2: Communication Protocol

Communication is bidirectional, but only the master or slave can communicate at any time (half-duplex). The master sends out requests to a slave and then waits for a response for a designated amount of time. If it does not receive a response from the slave in the response time window that probably means there was an error so it resends the message to the slave and waits for a response. The slave never sends to the master unless asked first.

First the master or slave wait for a start indicator of 00. When they receive a start indicator they store the next 30 bits into a register. B31 is checked to make sure that it is set to ‘1’ which indicates a complete message was received. Then the master/slave checks B2 to see if the message is for them--if B2=0 the message is intended for the slave, if B2=1 the message is intended for the master. Next B3-B10 are checked to see if the message is intended for the slave of that ID number in the case of a transmit, or indicates the slave number that sent the message in the case of a receive. Next the checksum is checked. The number of zeros in B2-B24 are added up and the integer value of the sum is compared against the integer value of the checksum. If the sums match then the signal is valid. Next B11 is checked if 0 a read is desired, if 1, a set is desired. Next B12 is checked to decide if the temperature or heater state will be set or read. B13-B24 will hold either the temperature to be set or read or in the case of B12=1 B24 indicates the state of the heater (0=off, 1=on) and B13-B23 are meaningless.

Alternative Plan If we use the SCI protocol built into the TI 3202 DSP our protocol becomes 1 start bit, 8 word data bits, 1 parity bit, and 2 stop bits. This is a total of 12 bits to send 1 8-bit message

We need to send a total of 23 bits--8 slave id bits, 3 control bits, and 12 temperature bits. This means that we would have to send three transmissions rather than 1 to send a complete message. However, all of the error handling would be done by the DSP and we would not need to write logic to do that part in the DSP.

However this does change the frequencies that we would be able to use in order to meet the specification that the master to slave communication time be <=20ms to send a message and receive it. We need to send 3 transmissions from the master to the slave then wait 2 transmission times for a response. Then the slave sends 3 transmissions back to the master, for a total of 8 transmissions. If a time to send a transmission in 2.5ms than for 12 bits/transmission we need a speed of 4800 bits/sec. Assuming that there will be some error and we will need to resend we quadruple that rate to 19200 bits/sec. That gives us a bandwidth of 19200Hz. Our frequencies become 34800Hz and 57600Hz respectively. The total message send and receive time becomes 5ms. That is four times less than the spec of 20ms. Assuming 1 error the time increases to 8.125ms to send and receive a message. Assuming 2 errors the rate increases to 11.25ms to send and receive a message. Assuming 3 errors the rate increases to 14.375ms to send and receive a message. Assuming 4 errors the rate increases to 17.5ms to send and receive a message. Assuming 5 errors the rate increases to 20.0625ms to send and receive a message which takes us out of spec. Considering the error rate specification is 1 every 1x10^6 bits, the likelihood of receiving 5 consecutive errors is very small.

Most of the above logic above still needs to be done to check the slave ID number, check the parity bit, check the control bits, and poll the HHC to get the temperature or state.

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Figure 4.2: Slave-Master Rx Flow

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5 Interface Board Architecture

Figure 5.1: Interface Board Architecture

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6 EnclosureThe enclosure design will be based off of a simple rectangular design. The material that was chosen is Aluminum. It was chosen based on a variety of metrics. The cost of the material itself is low based upon the cost of other materials that were reviewed. Handling the material is simple and can be machined quickly and easily even at RIT. The material itself is extremely simple to acquire, it is even available at some local retailers. It is also a light material and has adequate thermal dissipation capabilities.

For the vibration testing we are going to use a potting compound to secure the components in place when the testing is taking place. For our initial vibe testing phase a removable potting compound will be used, and for final specs a void less, thermally dissipative compound will be selected once the vibration test requirements have been satisfied.

The design of the enclosure will have a few distinct characteristics. The enclosure itself will be in direct contact with some components on the board to act as a thermal dissipation vessel. The lid will be screw on, since this is easily adaptable and simple. The enclosure will also have holes for the connectors to travel through. These holes for the connectors will also provide the venting needed for the air to escape in space. Combining these holes will help keep more structural integrity, and also minimize production costs.

7 Project Plan

7.1 Cost AnalysisThe budget that was set initially was a broad range which left room for material requirements, and component selection. The main cost for the project will be the acquisition of the TI DSP kits, with an average purchase price of approximately $500 each. We will need 3 of them to complete the final design. The majority of the project can be done with only one of them for the proof of concept and testing stages. If the code and software written on the first one works, then we can apply it to the other two DSP’s. The next major cost would be the design and development of the enclosure. Having sourced some suppliers with RFI and EMI shielded aluminum enclosures the costs ranges from 60-130 dollars depending on the size requirements. The other option will be to create our own enclosure which would require the purchase of billet aluminum; the cost depends on the size of the enclosure which can range between 100-300 dollars. The rest of the cost of the project will just be the purchase of breadboards and other electrical components. This could range from 80-140 dollars depending on the amount of material needed. The total cost of the project could range from 1740 to 2070 dollars. The team firmly believes that the budget will be met will within our target specs and if complications do come up or occur they will be brought up immediately with the customer.

7.2 Scheduling and Workload AnalysisThe team believes that this project encompasses quite a bit, there are a lot of smaller tasks we have to complete along with the major deliverables required for the project. Our main hurdle is the acquisition of the DSP’s, without these basic development and programming will be hard to complete. The DSP is the most integral part of the project as it will be doing the signal processing between the master and slaves. The knowledge base that the team has is quite broad and shallow, meaning we all know introductory basics of each part, but not one single person is entirely secure with their own knowledge on how to do a particular part. There will be some learning required in the programming and modulation/demodulation techniques that are going to be used. The major time constraint will be to get the communications programming completed when we get the DSP so we can have more than enough time to test and troubleshoot the operation of the master and slave power communications. Overall the team’s time frame is completely dependent on the delivery of the DSP’s and HHC modules so testing and final prototyping can begin. The team would like this to start as soon as possible so testing and troubleshooting can be completed within the time frame of the project.

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7.3 Risk AssessmentThe potential risks that are involved in this project are detailed clearly in the risk assessment table below.

Risk Item1 Level2 Owner Status and/or Contingency Plans

Acquiring DSP and Programming Suite

5 Anthony, Greg

Buying one ourselves, the TMS320, If code composer cannot be acquired, the Eclipse IDE with plug-ins will be used.

Acquiring HHC 5 Anthony Customer interaction, leads to advisor involvement.

Acquiring Equipment Specifications

4 Anthony Customer interaction, leads to advisor involvement.

Programming Difficulty 3 John, Greg, Sarmad

Research and analytical methods first, then consultation with professionals and faculty.

Protocol Communication 4 John, Greg Research and analytical methods first, then consultation with professionals and faculty.

Hardware Modulation 5 Greg Research and analytical methods first, then consultation with professionals and faculty.

Testing Equipment 5 Anthony Utilizing testing equipment for thermo and vibration applications. Consulting faculty and Chuck Moon to obtain equipment required.

Table 7.3: Risk Assessment1Risks are often categorized on the basis of risk type or impact to the project, to help teams organize and insure completeness of the risk assessment. Risks impact projects in 3 primary ways: performance (features, functionality, and quality), schedule, or cost. Types of risk include: technical, quality, or performance (e.g. high-risk technologies or changes in standards, unrealistic features or performance goals); project management risks (e.g. time and resource allocation, poor planning); organizational risks (e.g. inconsistent team priorities); external risks (e.g. regulatory, customer priority changes, weather). Some risks fall into multiple categories, so you may want to use a categorization scheme only as an aid to completing the assessment.

2Choose a meaningful scale (e.g. High, Med, Low; or 1=Critical, 2=High, 3=Med, 4=Low).

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