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Properties and Barrier Material Interactions of Electroless Copper used for Seed Enhancement C. Witt a,b , K. Pfeifer a,c a International Sematech, Austin, Texas b Infineon Technologies, Munich, Germany c Philips Semiconductors, Eindhoven, Netherlands Abstract The conventionally used sequence for copper damascene metallization consists of barrier deposi- tion, physical vapor deposition (PVD) Cu seed and electroplated copper. Due to the limited step coverage of PVD copper, the extendibility of this sequence to feature dimensions below 90 nm is at risk. To reduce the risk of pinch-off of very small features, the PVD layer thickness will be reduced well below 100 nm, the drawback being poor seed coverage at the bottom of the features. Void free fill by electroplating is hence at risk by both pinch-off and discontinuous seed coverage (3-5). In this paper, the use of a conformal metal deposition method, electroless copper, to enhance PVD seed layers as thin as 10 nm is presented. It is demonstrated that sparse, discontinuous copper films provide a catalytic surface for electroless copper deposition. With electroless copper, void-free cop- per fill of 12.5 aspect ratio (AR) trenches (70 nm width) and 8.3 AR vias is achieved. Furthermore, 6 nm thin electroless copper films were integrated in a dual damascene process and electrically characterized. A yield of approximately 85% was achieved on via chains (360000 links, 0.25 by 1.1 μm vias), with 10 nm PVD seed. This was comparable to the yield when using 100 nm PVD seed. Hydrogen, generated as a byproduct during the electroless copper ion reduction, was found in the copper deposits as well as in the barrier films underneath. In some cases, spontaneous blistering in the plated copper film was observed, and is believed to be due to hydrogen incorporation. The inter- action of electroless copper films with various barrier materials (PVD Ta, PVD TaN, CVD TiN(Si) and combinations) is discussed. Electromigration test results presented in this paper indicate that the failure mechanism is not qualitatively different from reference samples with the conventional PVD seed. Introduction The extendibility of conventional Cu PVD technology to future interconnect dimensions (1) is at risk due to its limited step coverage. Hence, a conformal deposition method is desired that can deal with damascene features smaller than 80nm. To avoid the high cost of chemical vapor deposition (CVD) copper equipment and development, an alternative route was proposed (2,3) that utilizes PVD by adding a thin, conformal Cu layer to it. This seed enhancement is attractive as established PVD technology will be further used, however, an extra process step will increase manufacturing complexity. This paper describes efforts to evaluate the concept of using thin, conformal electroless Cu deposition. for seed enhancement. For electroless Cu, generally, alkaline chemistries are utilized to prevent seed dissolution. Inherently, an electroless process is independent of the electrical continu- ity of the substrate and provides a uniform deposition across large substrates. The evaluation is bro- ken into blanket film properties, fill enhancement in single damascene structures and electrical characterization using dual damascene test structures. Finally, electromigration test results are de- scribed as initial reliability assessment. E1.4.1 Mat. Res. Soc. Symp. Proc. Vol. 766 © 2003 Materials Research Society

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Page 1: Properties and Barrier Material Interactions of ... · Properties and Barrier Material Interactions of Electroless Copper used for Seed Enhancement C. Witta,b,K.Pfeifera,c a International

Properties and Barrier Material Interactions of Electroless Copperused for Seed Enhancement

C. Witta,b, K. Pfeifera,c

a International Sematech, Austin, Texasb Infineon Technologies, Munich, Germany

c Philips Semiconductors, Eindhoven, Netherlands

Abstract

The conventionally used sequence for copper damascene metallization consists of barrier deposi-tion, physical vapor deposition (PVD) Cu seed and electroplated copper. Due to the limited stepcoverage of PVD copper, the extendibility of this sequence to feature dimensions below 90 nm is atrisk. To reduce the risk of pinch-off of very small features, the PVD layer thickness will be reducedwell below 100 nm, the drawback being poor seed coverage at the bottom of the features. Void freefill by electroplating is hence at risk by both pinch-off and discontinuous seed coverage (3-5). Inthis paper, the use of a conformal metal deposition method, electroless copper, to enhance PVDseed layers as thin as 10 nm is presented. It is demonstrated that sparse, discontinuous copper filmsprovide a catalytic surface for electroless copper deposition. With electroless copper, void-free cop-per fill of 12.5 aspect ratio (AR) trenches (70 nm width) and 8.3 AR vias is achieved. Furthermore,6 nm thin electroless copper films were integrated in a dual damascene process and electricallycharacterized. A yield of approximately 85% was achieved on via chains (360000 links, 0.25 by 1.1µm vias), with 10 nm PVD seed. This was comparable to the yield when using 100 nm PVD seed.Hydrogen, generated as a byproduct during the electroless copper ion reduction, was found in thecopper deposits as well as in the barrier films underneath. In some cases, spontaneous blistering inthe plated copper film was observed, and is believed to be due to hydrogen incorporation. The inter-action of electroless copper films with various barrier materials (PVD Ta, PVD TaN, CVD TiN(Si)and combinations) is discussed. Electromigration test results presented in this paper indicate that thefailure mechanism is not qualitatively different from reference samples with the conventional PVDseed.

Introduction

The extendibility of conventional Cu PVD technology to future interconnect dimensions (1) is atrisk due to its limited step coverage. Hence, a conformal deposition method is desired that can dealwith damascene features smaller than 80nm. To avoid the high cost of chemical vapor deposition(CVD) copper equipment and development, an alternative route was proposed (2,3) that utilizesPVD by adding a thin, conformal Cu layer to it. This seed enhancement is attractive as establishedPVD technology will be further used, however, an extra process step will increase manufacturingcomplexity.

This paper describes efforts to evaluate the concept of using thin, conformal electroless Cudeposition. for seed enhancement. For electroless Cu, generally, alkaline chemistries are utilized toprevent seed dissolution. Inherently, an electroless process is independent of the electrical continu-ity of the substrate and provides a uniform deposition across large substrates. The evaluation is bro-ken into blanket film properties, fill enhancement in single damascene structures and electricalcharacterization using dual damascene test structures. Finally, electromigration test results are de-scribed as initial reliability assessment.

E1.4.1Mat. Res. Soc. Symp. Proc. Vol. 766 © 2003 Materials Research Society

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ExperimentalA. Blanket filmsBlanket films used in this study were 25nm PVD Ta, 10nm PVD seed, 12nm electroless copper and1 µm electrochemically deposited (ECD) copper, all deposited on SiO2 substrates. Details of thebath used for electroless deposition were described previously (3).

B. Damascene structures and test procedureTo study fill enhancement, single damascene structures were generated in 1µm thick SiO2 dielectricfilms on a Si3N4 etch stop layer. Following via etch and clean, some samples received a 50nm thinconformal LPCVD Si3N4 layer in order to increase the aspect ratios. On these samples, a 25nmPVD Ta barrier and 40nm PVD copper seed layer was deposited without vacuum break. The viaswere subsequently filled by electrochemical deposition (ECD). On the samples with seed enhance-ment, 6nm thin electroless copper films were deposited prior to ECD fill. To study sparse PVD seedmorphology, via samples were fabricated with the same sequence but using 10nm PVD Cu.

Electrical test samples consisted of dual damascene structures using SiO2 as interlayer di-electric and Si3N4 as etch stop layers. Excess copper removal after electroplating was achieved bychemical mechanical polishing (CMP). Total thickness of the upper dual damascene layer was 1.5µm including ~0.4µm line thickness and ~1.1 µm via level thickness. After etch and clean, wafersreceived 25nm PVD Ta or TaN, or bilayers of 12.5/12.5nm Ta/TaN or TaN/Ta, or 5 nm of CVDTiSiN prior to PVD Cu seed deposition. PVD Cu seed thicknesses of 10nm and 100nm were ap-plied. No variation in the metallization sequence was introduced in the underlying metal 1 layer.Electrical measurements were performed after CMP at metal 2 (referred to as M2 test), and afterfinal SiO2/Si3N4 passivation, bond pad opening and Al bond pad metallization (referred to as finaltest). Electrical tests were performed on at least 4 wafers per process condition (split). Electromigra-tion testing was performed on diced and packaged samples at a test temperature of 325°C and aconstant current density of 2.6 MA/cm2. The failure time criterion was 30% resistance change.

Results and DiscussionA. Fill enhancementFigure 1 (a-c) shows the morphology of electroless Cu films deposited on sparse, discontinuousPVD seed. A continuous, conformal film formed on roughly 2/3 of the via. No electroless deposi-tion occurred in the lowest section of the vias where no PVD Cu was detected by cross sectionalTEM and EELS. This suggests that a minimal Cu nucleus density is required for the autocatalyticelectroless Cu ion reduction. The effect of electroless seed enhancement on ECD fill of 8.3 AR vias(0.12 µm diameter) is also shown in Figure 1. Voids are visible at the bottom of all features. No fillvoids are observed in the seed enhancement samples. This result demonstrates that these voids areindicative of poor seed coverage. Another type of void can also occur after ECD due to pinch-off atthe top of features or due to an insufficient bottom-up fill process. Such voids are commonly ob-served along the center axis of the features (2-4). This void type was not observed with the Cuthicknesses used for this paper. Trenches with an aspect ratio (AR) of 12.5 (width 0.08 µm) werealso filled void free (no image) using seed enhancement but showed bottom voids without en-hancement.

B. Film properties: resistivity and hydrogen incorporationTo study the effect of the seed enhancement layer on ECD film growth, 1µm Cu films were platedwith and without electroless Cu pre-coating. Next, the films were annealed for 30 min at 150°C topromote grain growth. After annealing, sheet-resistivity along with thickness measurements using

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FIB cross-sections and SEM inspection were used to determine bulk resistivity. In both cases, filmswith and without electroless Cu, the specific resistivity was approximately 1.8 µΩcm.

Hydrogen is generated as by-product during electroless deposition by oxidizing the reducingagent, in this case glyoxilic acid, and incorporates in the deposit (6-9). To characterize the hydrogencontent in seed enhanced films, desorbing species were detected by residual gas analysis (RGA) in avacuum chamber, as a function of temperature. RGA data collection was performed during the en-tire temperature cycle that consisted of heating to 150°C (4°/min), holding 150°C for 30 min, andcooling (4°/min). Figure 2a shows hydrogen partial pressure of a wafer that had a 10nm PVD seedlayer and 1µm ECD copper (reference sample). The hydrogen content in the residual gas was monitoredto be between 1E-07 and 1E-06 Torr during the entire cycle. This measurement was repeated on a sam-ple wafer that had 12nm electroless copper deposited prior to 1µm ECD Cu. Compared to the referencesample (solid line in figure 2a), this film stack exhibited significant hydrogen desorption (1E-5 Torr)upon heating at ~100°C. After holding 150°C/30 min, a low hydrogen level of 1E-07 Torr was reached.This suggests that most of the non-residual hydrogen enclosed in the film stack had diffused out.

To verify whether hydrogen incorporates into the underlying Ta, two sample wafers were pre-pared as in the experiment described above. Prior to heat treatment, the Cu has been etched entirely offthe Ta using nitric acid. The thermal desorption measurement results are shown in Figure 2b. Clearly,the Ta film on which electroless was applied previously exhibited significant hydrogen desorption.

D. Blister FormationBlister formation is a known phenomenon in electroless copper deposition (6) and is generally attrib-uted to coalescence of hydrogen bubbles (8). Hydrogen can furthermore lead to high porosity and lowductility in electroless films due to enclosed gas bubbles (8). On some samples prepared during thiswork, it was observed that dome shaped blisters could form after ECD deposition. The number ofblisters depended on details of the electroless bath (temperature, composition, additives). Samples thathad thicker (i.e. 100nm) PVD seed never showed blistering. Furthermore, it was found that the filmdelamination at the blister occurred at the barrier-substrate interface. Optimisation of electroless filmthickness (<20nm) and deposition conditions resulted in a blister free process.

D. Electrical characterization: via yield enhancementTo show the effect of electroless seed enhancement on the electrical performance of dual damas-cene copper vias and lines, the resistance of 0.25µm wide via chains containing 360000 links wasmeasured as shown in figure 3. When the PVD seed thickness is reduced from 100nm (control) to10nm, the via chain yield reduces from nearly 80% to 40% both measured at after M2 CMP.

The application of 6nm electroless seed enhancement on M2 level test structures with 10nmPVD seed resulted in a via chain yield of nearly 80% at M2, which is comparable to the 100nmPVD control split. Furthermore, all wafers with PVD only seed layers exhibited a drop in yield be-tween the post CMP readout (M2) and the measurement after final passivation (final) of approxi-mately 10-20%. The wafers with enhancement did not exhibit such drop, which may be due to theconformal nature of electroless Cu.

D. Barrier material interactionsTo show the effect of electroless Cu on via resistance with various barrier metals, the resistance dis-tributions of 360000 0.25µm via chains are shown for Ta, TaN, bilayers of Ta/TaN, and TiSiN infigure 4. The resistance per contact increased significantly when using electroless Cu for certainbarrier choices: in the case of Ta, seed enhancement on 10nm PVD Cu led to increase in medianresistance of approximately 0.25Ω compared to the 100nm PVD Cu control group. When TaN wasused, the difference between 10nm PVD Cu with enhancement and 100nm without was on the other

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hand only ~0.05Ω. The bilayer samples showed an intermediate shift of roughly 0.1Ω independentof the layer order (Ta or TaN first). In the case of 5nm thick TiSIN, the contact resistance distribu-tion of wafers with 100nm PVD seed and no enhancement and 10nm PVD seed with enhancementwas not different. The via chain result for 10nm PVD on TiSiN seed with no enhancement is alsoshown in figure 4. The yield was in this case lower than 5% indicating significant voiding due toseed failure during ECD Cu fill.

The resistance shifts for Ta, and the lack of it for TaN and TiSiN can be explained bychemical attack of the barrier by hydrogen intrusion. Hydrogen, diffused into the barrier at the viabottom during electroless deposition can form TaH if enough metallic Ta is available. TaN andTiSiN are chemically more inert and not attacked. This is substantiated by the observation that bi-layers show an intermediate resistance shift and the fact that the shift is independent of the Ta/TaNorder. This suggests that the total amount of Ta vs. TaN in the film is more important than the im-pact of electroless on one of the barrier/Cu interfaces.

E. Reliability: electromigration testingFigure 5a shows median electromigration (EM) lifetime for samples with 10nm PVD seed and en-hancement was approximately half that of the control samples. The distribution widths, however,were not significantly different. Figures 5b and c show portions of a seed enhanced sample aftertest. Both, the cathode side void (5b) and the anode side extrusion (5c) are located at the upperSi3N4 dielectric barrier. This is a typical EM failure mode and occurred in similar fashion on controlsamples. The impact of seed enhancement on electromigration is not fully understood at this point.

ConclusionsElectroless copper films were integrated into a dual damascene metallization sequence to enhancePVD seed. In terms of via chain yield, with seed enhancement PVD Cu seed thickness could be re-duced to from 100nm to 10nm without penalty. Features with sizes that will be used for 45nm tech-nology and potentially beyond were filled void free. A potential threat is the spontaneous formationof blisters, which is believed to be caused by hydrogen incorporation in the copper during deposi-tion, which can be avoided by careful choice of process conditions. The barrier materials testedshowed different contact resistance responses to seed enhancement. The results suggest that, in con-trast to Ta, TaN and TiSiN are chemically inert to hydrogen attack. This may limit applicability ofthis seed enhancement technique with regard to barrier selection. The electromigration test resultsdo not indicate that the failure mode alters substantially with the use of seed enhancement.

References(1) International Technology Roadmap for Semiconductors 2001 Edition, Interconnect, SIA, San

Jose, CA, 2001, http://public.itrs.net, pp 9-14.(2) C. Witt, A. Frank, E. Webb, J. Reid, K. Pfeifer, Proc. Of the IITC conf. 2002(3) T. Andryuschenko and J. Reid, Proc. Of the IITC conf. 2000(4) T. Ritzdorf, D. Fulton, L. Chen, Advanced Metallization Conference Proc. , p. 101, M. Gross et

al. Eds., MRS, 1999(5) T. Moffat, J.E. Bonevich, W. H. Hiber, A. Stanishevsky, D. R. Kelly, G. R. Stafford, and D.

Josell, J. Electrochem. Soc., 147, p. 4524 (2000)(6) S. Nakahara and Y. Okinaka, Acta metall. 31, No.5, pp. 713-724, 1982(7) Y. Shacham-Diamand et.al, Thin Solid Films 262, pp. 93-103, 1995(8) S. Nakahara, Acta metall. 36, No. 7, pp. 1669-1681,1988(9) M. Paunovic in Electrochemistry in Transition, O. J. Murphy et al. Eds. Plenum Press, New

York 1992

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Figure 1. Morphology and fill effect ofelectroless Cu: (a) TEM close-up of (b)discontinuous PVD seed in 0.18x1µmvias, (c) SEM of after 6nm electrolessdeposition. 0.12 µm diameter by 1 µmdeep vias are shown without (d) and withseed enhancement (e) and subsequentECD Cu fill.

Figure 2. Thermal hydrogen desorp-tion upon temperature: The hydro-gen partial pressure in the residualgas (right axis) is shown for a) 1 µmECD copper film on 10nm copperseed and 1µm ECD copper on 12nmelectroless on 10nm PVD seed. b)shows hydrogen desorption of theTa barrier of 2 similar sampleswhere the Cu has been stripped be-fore the temperature cycle. c) showsa blister in a 1µm ECD film with12nm electroless Cu under it.

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TiSiN10 Cu w SR100 Cu w/o SR

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Figure 3. Yield of 360k 0.25µm via chainsfor 100nm and 10nm PVD copper seed. Theyield of wafers with seed enhancement on10nm PVD seed is also shown. Yield isshown for both, after CMP and at final test.Yield criterion was 1 Ω per link.

Figure 4. Via chain readoutsfor various barriers with andwith out seed enhancement.Thickness values for the PVDCu seed films in the annotationsare given in nm. Ta, TaN referto 25nm thickness, Ta/TaN andTaN/Ta refer to 12.5/12.5nmbilayers. All TiSiN films were5nm thick.

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