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Data Communication Lab (EE-421-E)

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Practical Manual

Lab: Data Communication (EE-421-E)

EXPERIMENT NO:-1

AIM:- STUDY OF SERIAL COMMUNICATION

Deptt.of Electronics &Communication Engg.

(ECE)

RAO PAHALD SINGH GROUP OF

INSTITUTIONS

BALANA(MOHINDER GARH)123029

Prepared By. Checked By.


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Mr.SANDEEP KUMAR Mr.PANKAJ SONI

OBJECTIVE: To study Basics of serial communication ports and protocols.

EQUIPMENTS:

DCT-03 Kit 9 Pin D connector Cables – 2 Nos.

Computers – 2 nos. Connecting Chords.

Power Supply.

THEORY: Need for Serial Communication:

Within a system data is transferred in parallel because it is the fastest way to do so. For transferring data over long distances, however,

parallel data transfer requires too many wires. Therefore, data to be

send long distances is usually converted to serial form from parallel form so that it can be sent on a single wire or a pair of wires. Serial

data received from a distance source is converted to parallel form so that it can be easily transferred to system bus. Three terms often

encountered in serial communication are simplex, half-duplex and full duplex. A simplex data line can transmit data only in one direction.

Amouse sending data to CPU is an example of simplex communication. Half-Duplex transmission means that the communication can take

place in either direction between two systems but only one at a time. An example of Half-Duplex communication is the walky-talky system.

The term full duplex means that each system can send and receive data at the same time. A normal phone conversation is an example of

a full duplex operation


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EIA-RS232 Standard:

Topology

RS-232 standard is defined for a point-to-point communication. The data transfer is defined between DTE (Data Terminal Equipment) and

the DCE (Data Communication Equipment) • DCE - Data Communication Equipment such as modem in

analog network or Network Terminating Unit in digital network. It is regarded as the boundary of a network. Please note that a

minicomputer can be a DCE if it is located at network boundary.

• DTE - Data Terminating equipment such as computer port or computer terminal in a network


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Electrical Characteristics

Voltages of -3v to -25v with respect to signal ground are considered logic '1' (the marking condition), whereas voltages of +3v to +25v are

considered logic '0' (the spacing condition). The range of voltages between -3v and +3v is considered a transition region for which a

signal state is not assigned. Logic states are assigned to the voltage ranges shown here. Note that this is a "negative logic" convention,

which is the reverse of that used in most modern digital designs. Most contemporary applications will show an open-circuit signal

voltage of -8 to -14 volts for logic '1' (mark), and +8 to +14 volts for logic '0' (space). Voltage magnitudes will be slightly less when the


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generator and receiver are connected (when the DTE and DCE devices

are connected with a cable).

1. A "Space" (Logic 0) will be between +3 and +25 Volts. (Open circuit)

2. A "Mark" (Logic 1) will be between -3 and -25 Volts. (Open circuit) 3. The region between +3 and -3 volts is undefined.

4. An open circuit voltage should never exceed 25 volts.(In Reference to GND) 5. A short circuit current should not exceed 500mA. The driver should

be able to handle this without damage. (Take note of this one!)

Protocol RS-232 communication is asynchronous. That is a clock signal is not

sent with the data. Each word is synchronized using it's start bit, and an internal clock on each side, keeps tabs on the timing.

The diagram above shows the expected waveform from the UART

(Universal Asynchronous Transmitter Receiver) when using the common 8N1 format. 8N1 signify 8 Data bits, No Parity and 1 Stop Bit.

The RS-232 line, when idle is in the Mark State (Logic 1). A transmission starts with a start bit, which is (Logic 0). Then each bit is

sent down the line, one at a time. The LSB (Least Significant Bit) is sent first. A Stop Bit (Logic 1) is then appended to the signal to

make up the transmission. The diagram shows the next bit after the Stop Bit to be Logic 0. This must mean another word is following, and

this is its Start Bit. If there is no more data coming then the receive

line will stay in its idle state (logic 1). We have encountered something called a "Break" Signal. This is when the data line is held in Logic 0

state for a time long enough to send an entire word. Therefore if you don't put the line back into an idle state, the receiving end will

interpret this as a break signal. The data sent using this method, is said to be framed. That is the data

is framed between a Start and Stop Bit. Should the Stop Bit be received as Logic 0, then a framing error will occur. This is common,

when both sides are communicating at different speeds. The above diagram is only relevant for the signal immediately at the

UART. RS-232 logic levels uses +3 to +15 volts to signify a "Space"


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(Logic 0) and -3 to -15 volts for a "Mark" (logic 1). Any voltage in

between these regions (i.e. between +3 and -3 Volts) is undefined. Therefore this signal is put through a "RS-232 Level Converter". This is

the signal present on the RS-232 Port of your computer, shown below.

The above waveform applies to the Transmit and Receive lines on the

RS-232 port. These lines carry serial data, hence the name Serial Port. There are other lines on the RS-232 port, which, in essence are

Parallel lines. These lines (RTS, CTS, DCD, DSR, DTR, RTS and RI) are also at RS-232 Logic Levels.

Simple Error Detection There are many approaches to overcoming the problems of noise and

distortion. The simplest method is to add a parity bit to be transmitted

with each character. There are two types of parity, odd parity and even parity. In the following discussion we shall assume that even

parity is in use. In even parity the total number of 1's in a transmitted character and

parity bit together is always an even number. If, for example, there were 3 1's in a 7 bit character the parity bit would be set to 1 If, on

the other hand there were 4 1's the parity bit would be set to 0. This is illustrated in the figure below.

At the receiver the number of 1's in a received character is added up. If there are an odd number of 1's (in an even parity system) then at

least one bit of the character must have been corrupted. If 2 bits had been corrupted by noise this would not be detected by the parity bit


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and herein lies the weakness of the parity method of detecting the

effects of error in received character.

Bits/Sec and Bauds These two terms are usually misused significantly.

Type Description

Bits/Sec Refers to the Actual information Transfer rate that Can be achieved on A given channel. It is the result of different coding

Level and signaling rate.

Baud Rate

Refers to the fundamental signaling rate used on the circuit.

For example, the V22 modem as listed above; the carrier frequency is

600 Hertz. The fundamental signaling rate again is 600 baud and an information transfer rate is 1200 bits/sec. Note that it carries 2 bits for

each operating cycle.

Baud rate refers to the symbol per unit time of which a symbol might consist of two levels (one bit), four levels (two bits) or even more.

Bit/s refers to the actual measurement of data transmission.

An Introduction to Serial communication • As the name implies, in the Serial communication you send bits of data

serially i.e. one bit at a time.

• Normally we predefine rate of transfer such as • 2400 bits/sec. (2400bps)

• 56,000 bits/sec. (56 kbps) • And then depending upon this rate we interpret bits boundaries.

Example of Serial Waveform

• For example you receive following waveform from serial port of your PC and it is stated that data rate is 2400bps


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Methods of timing used to find bit boundaries:

1) Synchronous communication

2) Asynchronous Communication • In Asynchronous communication the sender and receiver

decide a data rate before communication. They decide upon signaling used for start and stop of data transmission.

• Both sender and receiver use a precise timing reference internally to divide serial received data into bits.

Basics of Serial Communication

• Baud Rate

• The baud rate is simply “the rate of data transmission expressed in bits per second, kilo Bits per second or Mega bits per second

etc”.


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Advantage of Start / Stop bits:

Start bit and Stop bit differentiates two different adjacent data words being transmitted and will also let receiver know when data word

starts and ends. • The sender and receiver decide upon no of bits in one data word

such as 8 bits (1byte). More over they decide that: • A first bit before transmission of data word will always be 0 (or

1) after which data bits will follow. It is called start bit. • The last bit followed by data bits will always be 1(or 0) after

which it requires start bit for transmission of next word. This bit is called stop bit.

Some measures for error detection: Parity is of two types

1. Even parity 2. Odd parity

• Suppose your data word is 8 bit in length i.e. one byte.

• The sender, before transmitting byte, determines whether the no of bits in the byte to be sent are even. Suppose sender wants to

send 10011101 • In which there are 5 “1’s” and 3 “0’s”.

• To keep the no. of 1’s even the sender adds an extra bit at the end of byte so that the total no. of 1’s are 6 (an even no.). This

extra bits is called parity bit.


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Since this bit keeps the no. of 1’s even, so it is called even parity.

Overview of total bits with Parity:

START

1

2

3

4

5

6

7

8

P

STOP

Odd Parity:

Odd parity is added to keep the no. of 1’s odd in transmission. For example for above case of data being

10011101 The odd parity will be added as 0 as no of 1’s are already 5 (an odd no.)

EIA RS232C Serial Interface Standard:

• A “Space” (logic 0) will be between 3 and 25 volts. • A “Mark” (logic 1) will be between -3 and -25 volts.

• The region between 3 and -3 volts is undefined. • Maximum data rates may be up to 115 kbps.

• Maximum serial cable length may be 15 meters. • The reason to study RS-232C is that the serial port (Com port)

found in PC’S uses this standard.

• Above are the sufficient points to start implementation of the serial interfacing on PC.

PROCEDURE:

1) Connect the power supply with proper polarity to the Kit DCT- 03 and while connecting, ensure that it is off.

2) Keep all switch faults in off position. 3) Connect 9 Pin D connector Cable between one computer COM

port and CN3 connector and second 9 Pin D connector Cable between another computer COM port and CN4 connector.

4) Connect the TD1 post to RD2 post. 5) Connect the RD1 post to TD2 post.

6) Keep the switch setting of SW4 towards ON position. 7) Switch ON the power supply and both the computers.

8) Run DCT-03 software on both computers. 9) Select Serial Communication Software link on both computers.

This will provide link to hyper terminal software. A new Window

will Open, where in you Double Click on HYPERTERM,


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10) Two Windows will open, one at the background and another

(small window) with title Connection Description which will be Active.

11) Enter the name in the box by which you would like to store your Connection, for e.g. (PC1 or pc2), and Click OK. Also you could select the Icon provided below. The background window title will change to the name Provided by you.

12) Then specify connect using: by selecting Direct to COM1 or port where your cable is connected and then click on OK. (NOTE: Please check the Port you have selected and the Ports you are connecting).

13) Now Window with Title COM 1 Properties will appear where Port Setting should be done as shown above and click on OK.

14) Put the flow control on XON / XOFF & repeat the procedure of file transfer using the X-MODEM, Y-MODEM, Z-MODEM, KERMIT protocol.

15) To observe ASCII equivalent of keyboard data transmitted connect the TD1 post to DATA IN post.

16) From the hyper terminal window of PC1 type any character and observe its ASCII equivalent on 8-bit LED display.


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Practical Manual

Lab: DC (EE-421-E)

EXPERIMENT NO:-2

AIM:-

STUDY OF PARALLEL COMMUNICATION.


(ECE)


INSTITUTIONS





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OBJECTIVE: The objective of this experiment is to study PC to Printer handshaking.

EQUIPMENTS:

DCT-03 Kit 25 Pin D connector Cables – 2 Nos.

Power Supply.

Printer Computers – PC, Intel Celeron and above

- 2 nos. (Minimum Configuration).

THEORY: Windows software is provided to access parallel port of computer, for

Hand shaking of signals and for data transfer between two computers. Software enables user to communicate between two computers with

three different types of protocols namely, stop and wait, go back to N and selective repeat. Transfer request, request acknowledgement,

packets transfer, packets receipt, packet verification, error report, satisfied data report, are indications of this process.


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WORKING OF PROTOCOL

Stop and Wait Protocol The stop and wait protocol builds on the unrestrained protocol by

limiting the frequency at which frames are sent and by informing the sender whether the last frame was damaged or not. Again the protocol

can be divided into sender and receiver terminals: • The sender sends a frame and then waits for the receiver to

acknowledge it with something called an ack. If the acknowledgement states that the last frame was damaged it

will re-send it. It will then wait again for an acknowledgement and will continue to do this until the acknowledgement states

that the frame arrived undamaged and then loops back to the start to send the next frame.

• The receiver waits for an incoming frame and upon its arrival; it checks the frame for errors. It defines an error field in the

record structure called ack. If the frame is undamaged it will

set ack to 0, otherwise if the frame arrives in a damaged state it will set ack to 1, ignore the damaged frame and send the

acknowledgement back to the sender. It will only pass a frame on to the patron if it arrives undamaged.

Some of the disadvantages associated with this protocol are: • If the receivers acknowledgement is damaged, the sender may

draw the wrong conclusion and make the protocol fail; and • It is very slow as it always has to wait for an acknowledgement.

Sliding Window Protocols

The sliding window protocol is a compromise between the previous two. It allows multiple but not necessarily all frames to be sent before

receiving acknowledgements for each. It also uses error checking to detect damaged frames. Frames in the sliding window are numbered

between 0 and some maximum number, which for now is called N. The

frames are numbered such that it is possible to check frames arrive in the correct order. Usually N is set less than the total number of frames

to be sent. It would not make sense to number every frame individually if sending thousands and it also saves memory space.

So frames are numbered 0 for the first frame through to N - 1 for the Nth frame. Frame N + 1 is numbered 0 again - thus the frames are

numbered consecutively modulo N. This does put certain restrictions on the sliding window protocols as will be explained shortly. If the

window contains x frames numbered starting with s (where x and start are integers) then the following statements hold:

• Every frame numbered less than s has been sent and acknowledged;


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• No frame greater than or equal to s + x has been sent; and

• Any frame in the window has been sent but may not yet have been acknowledged. Such frames are called 'outstanding

frames'.

Initially the window contains frames starting with frame 0. As the patron provides the station with packets, the window expands until the

limit on outstanding frames is reached. When this limit is reached, no more packets are accepted from the patron. As outstanding frames are

acknowledged, the window shrinks to exclude those frames acknowledged. Thus the window can expand again to include new

frames. So frames are excluded from the sliding window in the same order as they were included. As the window moves on the previous

conditions must always be met. Also if frame s + 1 is acknowledged but frame s is not, the window will not move until frame s is

acknowledged. Sliding window protocols are also capable of acting as

both a sender and a receiver. The sliding window protocol can be implemented in two different ways:

• The go - back - n protocol; and • The selective repeat protocol.

Go back N Protocol This is the simpler of the two selective repeat protocols as the receiver

rejects every frame except the one it is supposed to receive. There are several identifying features to this protocol, which are:

• Frame numbers lie between 0 and N - 1 if there are more than N frames,frame numbers are duplicated. So frames are numbered

consecutively modulo N; • The receiving station always expects to receive frames in order

of frame number. If a frame is received out of order it sends a negative acknowledgement (nak) for the one it wanted and waits

for the correct one to arrive;

• If a frame arrives damaged, it is ignored and a nak is sent for it;

• A receiving station will not necessarily acknowledge each frame explicitly,but if a sending station receives an acknowledgement

for frame j it assumes all frames up to j have been received correctly. This reduces the number of acknowledgements that

need to be sent; • Each time a frame is received undamaged an ack timer is set

that counts down and only stops if there is an outgoing frame. If the timer expires before a frame is sent, an empty frame is sent

out with just an acknowledgement attached;


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• The sending station buffers the packets from all outgoing frames

in the sliding window in case it has to re-send them. Packets are removed from the buffer as they are acknowledged to allow the

sliding window to advance; and • Each outgoing frame has an associated frame timer that is set

when the frame is sent. So if the station does not receive an acknowledgement for a frame by the time its frame timer has

expired, it assumes something has gone wrong and resends every frame in the window. So if there are n frames in the

window, the sending station goes back n frames and resends them all.

• A record is kept of the most recently sent nak so that the same nak is not repeatedly sent.

Selective Repeat Protocol: The selective repeat protocol unlike the go - back - n protocol defines

a second sliding window. Now not only does it buffer outgoing frames until they are acknowledged but it also uses its new second window to

buffer incoming frames should they arrive out of order. The selective repeat protocol is similar to the go back - n protocol for the following

reasons: • The frame format is similar;

• It uses piggybacked acknowledgements where possible and does not acknowledge every frame explicitly. If a frame is

acknowledged the sending station assumes all prior frames have also been received;

• Naks are used for damaged frames and frames received out of order;

• Ack timers and frame timers are used.

However there are also several differences with the Selective Repeat

protocol: • It defines a second sliding window to buffer incoming frames. So

should a frame arrive out of order, it is buffered until its predecessors arrive - frames must be delivered to the patron in

the correct order; • If a frame arrives whose frame number is in the window it is

accepted and passed on to the patron only once all of its predecessors have arrived;

• If a frame arrives whose frame number is in the window but whose predecessors have not yet arrived, it is still accepted but

a nak is sent for the one it expected;


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• If a frame timer expires, only the timed out frame is resent – the

rational for this is that the other frames may have arrived out of order;

• If a nak is received, only the number specified is resent; • An acknowledgement is not necessarily sent for every frame

received. So if an ack is received all frames prior to the number specified can be assumed to be received correctly.

Getting the protocols to fail One of the interesting features of this simulator is that it allows you to

make the different protocols fail. The following details how to make each of the protocols fail:

Stop and Wait Protocol This protocol copes well with problem situations and will work with

most of the scenarios available including pressing the damage frame

button.

Go back N Protocol This protocol can handle most problems that arise, however its

weakness is its sliding window. If the sliding window size is set to be the same as the value entered under 'frames to be numbered

consecutively modulo...' then the protocol may fail - especially when running under any of the scenarios concerning acknowledgements. For

example if frames are numbered consecutively modulo 6 and the sliding window size is set to 6 so frames 0 to 5 are sent. Now if the

only acknowledgement returned is that for 5 and this acknowledgement becomes lost or damaged, the frame timer at the

sender's end should expire as none of the frames have been acknowledged. Therefore all the frames in the window are resent. The

receiver not realising that the frames are duplicates accepts the

frames (as they have the correct numbering - again 0 to 5) and delivers them.Thus this protocol has failed.

Selective Repeat Protocol

This protocol can be made to fail in a similar way to the previous protocol provided the sum of the incoming and outgoing frames are

set greater than or equal to the value entered under 'frames to be numbered consecutively modulo...'

Rules for each protocol used in this software are as described

below.


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STOP AND WAIT PROTOCOL:

1.1) The Receiver’s and Transmitter’s window size is 1. 1.2) ACK (n):- If a ACK (n) is received it is assumed that all packets

up to the number (including n) have been received correctly. 1.3) NACK (n):- If a NACK (n) is received it is assumed that all

packets prior to the number have been received correctly. The packet number n is corrupted or discarded by the receiver.

1.4) The Transmitter transmits the packets and waits for any Response from Receiver side till it time outs.

1.5) The Transmitter maintains a timer which it resets or starts after transmitting a packet.

1.6) The Receiver sends ACK of the packet if received correctly. 1.7) The Receiver DISCARDS and sends NACK of the packet if received corrupt or out of sequence.

GO BACK N PROTOCOL: 2.1) The Receiver’s window size is 1.

2.2) The Transmitter’s window size can be anything from 1 to 7. 2.3) ACK (n):- If a ACK (n) is received it is assumed that all packets

up to the number (including n) have been received correctly. 2.4) NACK (n):- If a NACK (n) is received it is assumed that all

packets prior to the number have been received correctly. The packet number n is corrupted or discarded by the receiver.

2.5) The Transmitter transmits the packets if the packets are available in the window for transmission.

2.6) The Transmitter slides its window depending upon the ACK

received and grows up to the MAX_WINDOW_SIZE. 2.7) The Transmitter maintains timers for each packet within its

window which it resets or starts after transmitting the packet. 2.8) The transmitter starts retransmitting all the packets once again

from the packets of which NACK is received or the timer times out. 2.9) The Transmitter stores all the packets until its ACK is received.

2.10) The Receiver sends ACK of the packet if received correctly and advances its window to receive the next packet.

2.11) The Receiver DISCARDS and sends NACK of the packet if received corrupt or out of sequence.

SELECTIVE REPEAT PROTOCOL:

3.1) The Receiver’s window size can be anything from 1 to 4. 3.2) The Transmitter’s window size can be anything from 1 to 4.

3.3) ACK (n):- If a ACK (n) is received it is assumed that all packets

up to the number (including n) have been received correctly. 3.4) NACK (n):- If a NACK (n) is received it is assumed that the

packet number n is corrupted or discarded by the receiver.


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3.5) The Transmitter transmits the packets if the packets are

available in the window for transmission. 3.6) The Transmitter slides its window depending upon the ACK

received and grows up to the MAX_WINDOW_SIZE. 3.7) The Transmitter maintains timers for each packet within its

window which it resets or starts after transmitting the packet. 3.8) The transmitter retransmits the packets of which NACK is

received or the timer times out. 3.9) The Receiver sends ACK of the packet if received correctly and

advances its window to receive the next packet. 3.10) The Receiver DISCARDS and sends NACK of the packet if

received corrupt. 3.11) The Receiver stores all the packets till its ACK is send. PROCEDURE: 1 Refer to the fig. and connect the power supply with proper polarity to the 2 kit DCT-03 and while connecting, ensure that it is off. 3 Keep all switch faults in off position. 4 Keep switches SW6 in PC mode. 5 Connect LPT/parallel port of one PC to connector CN1 using 25-25 D cable. Similarly connect printer port cable from printer to connector CN2. 6 Keep the switch settings for SW1, SW2 & SW3 in ON position. 7 Switch ON the power supply and both the computers. 8 Run DCT-03 software on computer and Select parallel Communication

Software link both the computers.]


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9 Clicking on Port Setting will show you three ports (i.e. LPT1, LPT2, and LPT3), select the port from the user machine through which the data transfer has to occur. For example Clicking on LPT1 will set the LPT1 as the active port on the machine for the data transfer. 10 Clicking on Protocols will show you three protocols namely Stop and Wait Protocol, Go Back to N Protocol and Selective Repeat protocol. Select Stop and Wait Protocol on both PC.


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11. The screen shown below will appear at transmitter side. 12 Select one PC in transmit mode and another PC in receive mode.


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13 After the user has selected the file. The PC shows the No of Packets and Size of the file in the boxes on the top. The Packets with their packet sequence is also shown. 14 You can change delay duration between two adjacent packets as per requirement. 15 Click on Transmit file button. 16 On the remote PC click on receive file button. 17 Status of file transfer will be indicated on screen. 18 Once the transfer starts and the client computer acknowledges the packets it sends the signal back to the transmitting PC. Any acknowledge positive or negative with their packet sequence is displayed below the Current Packet No. 19 Any positive acknowledge received is displayed as ACK(0) and any negative acknowledge is displayed as NACK(0) along with their packet sequence in brackets. 20 Once the packet has been acknowledged and signal shown the next packet is transmitted and so on till the whole file gets transmitted On the right hand top shows frame info. The frame info consists of different color packets. Each color specifies different status of the packet. 21 Observe the effect on file transfer by introducing error in data bits use switch SW2 to introduce error for a moment. 22 Any acknowledge that is transmitted back can be also made to lost by just clicking Lost button. Thus the Transmitter side will not receive any acknowledge. 23 The third button DISCARD/LOST can be clicked to discard and to lose any acknowledge sending back to the Transmitter simultaneously.


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24 Once the file transfer gets complete you will be prompted by file transfer successful at transmitter.

25 At the receiver a selection window will popup to indicate location for the received file to be saved.

26 Verify the received file with transmitted file, this shows end of file transfer with success. 27 Click on Protocols menu and select Go Back to N Protocol on both PCs. 28 Select one PC in transmit mode and another PC in receive mode. 29 Select the file to be sent on transmitter side. 30 After the user has selected the file. The PC shows the No of Packets and 31 Size of the file in the boxes on the top. The Packets with their packet sequence is also shown. 32 You can change delay duration between two adjacent packets as per requirement. 33 You can change window size of the packet frame as per requirement. 34 Click on Transmit file button.


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35 On the remote PC click on receive file button. 36 Status of file transfer will be indicated on screen. 37 Once the transfer starts and the client computer acknowledges the packets it sends the signal back to the transmitting PC. Any acknowledge positive or negative with their packet sequence is displayed below the Current Packet No. 38 Any positive acknowledge received is displayed as ACK(0) and any negative acknowledge is displayed as NACK(0) along with their packet sequence in brackets. 39 Once the packet has been acknowledged and signal shown the next packet is transmitted and so on till the whole file gets transmitted. 40 The right hand top shows frame info. The frame info consists of different color packets. Each color specifies different status of the packet. 41 Observe the effect on file transfer by introducing error in data bits use switch SW2 to introduce error for a moment. 42 The receiving packets can be discarded or killed by clicking the Discard button. 43 Any acknowledge that is transmitted back can be also made to lost by just clicking lost button. Thus the Transmitter side will not receive any acknowledge. 44 The third button NACK/LOST can be clicked to discard and to lose any acknowledge sending back to the Transmitter simultaneously. 45 Once the file transfer gets complete you will be prompted by file transfer successful at transmitter. 46 At the receiver a selection window will popup to indicate location for the received file to be saved. 47 Verify the received file with transmitted file, this shows end of file transfer with success. 48 Clicking on Protocols menu and select selective repeat Protocol on both PC. 49 Select one PC in transmit mode and another PC in receive mode. 50 Select the file to be sent on transmitter side. 51 After the user has selected the file. The PC shows the No of Packets and 52 Size of the file in the boxes on the top. The Packets with their packet sequence is also shown. 53 You can change delay duration between two adjacent packets as per requirement. 54 You can change window size of the packet frame as per requirement. 55 Click on Transmit file button. 56 On the remote PC click on receive file button. 57 Status of file transfer will be indicated on screen. 58 Once the transfer starts and the client computer acknowledges the packets it sends the signal back to the transmitting PC. Any acknowledge positive or negative with their packet sequence is displayed below the Current Packet No. 59 Any positive acknowledge received is displayed as ACK (0) and any


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negative acknowledge is displayed as NACK (0) along with their packet sequence in brackets. 60 Once the packet has been acknowledged and signal shown the next packet is transmitted and so on till the whole file gets transmitted. 61 The right hand top shows frame info. The frame info consists of different color packets. Each color specifies different status of the packet. 61 Observe the effect on file transfer by introducing error in data bits use switch SW2 to introduce error for a moment. 62 The receiving packets can be discarded or killed by clicking the Discard button. 63 Any acknowledge that is transmitted back can be also made to lose by just clicking lost button. Thus the Transmitter side will not receive any acknowledge. 64 The third button NACK/LOST can be clicked to discard and to lose any acknowledge sending back to the Transmitter simultaneously. 65 Once the file transfer gets complete you will be prompted by file transfer successful at transmitter. 66 At the receiver a selection window will popup to indicate location for the received file to be saved. 67 Verify the received file with transmitted file, this shows end of file transfer with success.


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Practical Manual

Lab: DC (EE-421-E)

EXPERIMENTNO: - 3

AIM:- STUDY OF MODEM COMMUNICATION


(ECE)


INSTITUTIONS





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OBJECTIVE: Study of FSK Modem. Study of Modem interfacing with PC. EQUIPMENTS: DCT-03 Kit. 9 Pin D connector Cables – 2 Nos, Modem interface cable. Power Supply. Telephone Link. Computers – PC, Intel Celeron and above - 2 nos. (Minimum Configuration). THEORY: FSK MODEM: The name modem is a contraction of the term Modulator and demodulator. When used in the transmitting mode, the modem accepts digital data and converts it to analog signals for use in modulating a carrier signal. At the receiver end of the systems, the carrier is demodulated to recover the data.


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FSK MODULATION: In this form of modulation, the sine wave carrier assumes two values of frequency, determined by the binary data signal. Logic high or mark and logic low or spaces are assigned two different carrier frequencies. The carrier frequency shifts between two frequencies corresponding to the mark or space level at the i/p of modulator. FSK DEMODULATION: The most common circuit for demodulating FSK signals is the PLL. The FSK signal at the PLL input has two values of frequency. The error voltage at the output of the phase comparator follows these frequency shifts, thus providing a two-level signal corresponding to the original binary data stream. The PLL demodulator is followed by a low pass filter, which removes the residual carrier components, and by a pulse forming circuit which restores the correct shape of the data signal. The main aspects of FSK are:

• Less error rate than ASK.

• if FB is the bit transmission speed, the minimum spectrum Bw of the modulated signal is higher than Fb

• the transmission efficiency, defined as the ratio of Fb and Bw, is less than1

• the “Baud” or “Baud rate”, defined as the “modulation speed” or “symbol speed” Modem data transmission speed: Modems are generally classified according to the important characteristic of transmission speed as follows: MODEM CLASSIFICATION DATA RATE HANDLED (BPS) Low-speed Up to 600 Medium-speed 600 to 2400 High-speed 2400 to about 10,800 All of the above modems can operate within a single 300- to 3400-Hz (4-kHz) telephone channel. As speed increases beyond approximately 19,000 bps, a wideband modem is needed, as is a wideband channel. Modem modulation methods: Modem utilizes various types of modulation methods, the most common being frequency-shift keying (FSK), which shifts a carrier frequency to indicate a mark or a space. Encoded data can be transferred through communication systems for voice transmission because the frequency shifting is limited to the 4-KHz bandwidth of the voice-grade channel. The FSK signal is also analog in nature,


29

enhancing it’s compatibility with communications circuits. Modem Interfacing: RS-232 interface is a standard interconnection between business machine and modem. The RS-232 interface has been defined by the Electronic Industries Association (EIA) to ensure compatibility between data sets and terminal equipment. The RS-232 interface specifications limit the interconnecting cable to a length of 50 ft (15 m) The interface also specifies the voltage levels with which data and control signals are exchanged between data sets and business machines. Each pin in the 25-pin connector will carry either a binary 0 or a I to indicate activation or deactivation control functions or data values. A binary 1 is used for making and signifies OFF while the 0 is used for spacing and signifies ON. Modem interconnection: The majority of data circuits utilize telephone channels provided by public carriers. These channels generally pass through switching facilities and are provided with equipment designed to enhance the use of the channel for voice application. This type of equipment is not designed specifically for data transmission, so that the modem must be designed to compensate for any inadequate of the voice-grade channel. The two broad types of modems are available for this type of service, the hard-wired modem and the acoustically coupled data set. The one limitation of the hard-wired modem is that it precludes mobility since, being hard-wired; the equipment must remain connected to the circuit terminals. The acoustically coupled modem solves the mobility problem. Using this device, a person is able to interconnect with any computer system which has dial-up interconnect capability.


30

PROCEDURE: 1 Refer to the fig. and connect the power supply with proper polarity to the kit DCT-03 and while connecting, ensure that it is off. 2 Keep all switch faults in off position. 3 Connect 9 Pin D connector Cable between one computer COM port and CN3 connector and second 9 Pin D connector Cable between another computer COM port and CN4 connector. 4 Connect the TD1 post to IN post of FSK MODULATOR. 5 Connect the telephone wire link between the RJ11 connectors on FSK modulator and demodulator block. 6 Connect the OUT post of FSK DEMODULATOR to RD2 post. 7 Connect the RD1 post to TD2 post. 8 Keep the switch setting of SW4 towards ON position. 9 Switch ON the power supply and both the computers. 10 Run DCT-03 software on both computers. 11 Select Serial Communication Software link on both computers. 12 This will provide link to hyper terminal software. 13 Open the previously stored connection (e.g. pc1 or pc2). 14 To start communicating between the two PCs Click on the TRANSFER Menu and again click on Send File. A window will be prompted having title Send File with File Name and Protocol. 15 Select Browse for the file, which you would like to send to the PC connected, select the file and Click on Open, the file name and address will be displayed in the small window. Then select the Protocol, (optional use protocols are X modem, Y modem and 1K Xmodem, etc.) 16 To receive the file on the PC Click on the TRANSFER Menu and again click on Receive File. A window will be prompted having title Receive File with Location at which you want to store the Received file and Receiving Protocol. 17 Select Browse for the location where you would like to store the received file, select the folder and Click OK, the folder name and address will be displayed in the small window. Protocol to be selected should be same as kept at transmitting PC. 18 On the PC from which the selected file to be transmitted, Click SEND button. A window will open showing file transfer status. Immediately at the Receiving PC Click Receive (otherwise Time Out Error will be displayed and communication will fail) .You will see a window showing file is being received in the form of packets. 19 Remove telephone wire from detector and observe effect. File transmission stops. 20 Connect the removed telephone wire again file transfer resumes. 21 After file is transferred both the windows in the (transmitting & receiving PCs) will close. Check for the received file in the folder where the file is stored.


31

Practical Manual

Lab: DC (EE-421-E)

EXPERIMENT NO:-4

AIM:- STUDY OF WIRELESS COMMUNICATION


(ECE)


INSTITUTIONS





32

OBJECTIVE: The objective of this experiment is to connect the RS-232 ports of two computers using IR transmitter and IR receiver, transmit data from one computer and receive the same data on the other computer. EQUIPMENTS: DCT-03 Kit 9 Pin D connector Cables – 2 Nos. Power Supply. Computers – PC, Intel Celeron and above - 2 nos. (Minimum Configuration). THEORY: Infrared wireless communication is achieved using transmitters/receivers (transceivers) that modulate noncoherent infrared light. Transceivers must be within the line of sight of each other either directly or via reflection from a light colored surface such as the ceiling of a room. In wireless communication, the serial data is modulated at a carrier frequency of 38 KHz. The RS-232 serial data is simply controls the carrier frequency by turning the carrier ON/OFF according to the DC level of the serial data. A 38 KHz carrier frequency is available during the ON time or high level of i/p where as no carrier during OFF time or low level of i/p. This modulated signal is fed to IR LED using a transistorized driver circuit. The receiver is a IR detector module, which filters out the 38 KHz carrier from the IR signal waves. Thus at the TTL OUT post of IR receiver section, the actual serial data is being re-constructed with no carrier present. Using this experimental set up a baud rate of 110 bps to 2400 bps can be achieved on RS- 232 serial port. The free air IR data transmission, IR remote control as well as the most opto electronic sensors and light barrier systems work with a wavelength between 870nm and 950nm. The emitter and detector components are highly efficient in this near IR wavelength band and can be manufactured at low cost. Data transmission in free space places a high demand for interference immunity on the IR receiving modules. The receiver unit (waiting to receive signals) is loaded with different optical and electromagnetic disturbances, omni–present in the ambient environment or generated by the electrical appliance itself. All optical sources with an emission spectrum in the receiving bandwidth (830nm –1100nm) of the detector can be considered as disturbing sources. These are mainly fluorescent lamps, incandescent lamps and sunlight. Sometimes also plasma displays emit significantly in the optical band of the IR transmission. As emitter for the IR signal there are various IR emitting diodes with high brightness and efficiency available. The IR emitter with a wavelength of 950nm matches best with the TSOP IR receivers. The maximum possible transmission distance of an IR remote control system depends on various parameters. Mainly it is the radiant intensity of the emitter (Ie) and the sensitivity of the receiver (Eemin). Additionally the distance is influenced by the reflective conditions of the test room, the optical


33

transmittance of windows or light guides in front of the receiver and the disturbance conditions. Of course, also the minimum possible. .


34

PROCEDURE: 1 Refer to the fig. and connect the power supply with proper polarity to the kit DCT-03 and while connecting, ensure that it is off. 2 Keep all switch faults in off position. 3 Connect 9 Pin D connector Cable between one computer COM port and CN3 connector and second 9 Pin D connector Cable between another computer COM port and CN4 connector. 4 Connect the TD1 post to TX post of Fiber Optic transmitter. 6 Connect the TTL OUT post of IR receiver to RD2 post. 7 Connect the RD1 post to TD2 post. 8 Keep the switch setting of SW4 towards ON position. 9 Switch ON the power supply and both the computers. 10 Run DCT-03 software on both computers. 11 Select Serial Communication Software link on both computers. 12 This will provide link to hyper terminal software. 13 Open the previously stored connection (e.g. pc1 or pc2) 14 To start communicating between the two PCs Click on the TRANSFER Menu and again click on Send File. A window will be prompted having title Send File with File Name and Protocol. 15 Select Browse for the file, which you would like to send to the PC connected, select the file and Click on Open, the file name and address will be displayed in the small window. Then select the Protocol, (optional use protocols are X modem, Y modem and 1K Xmodem, etc.) 16 To receive the file on the PC Click on the TRANSFER Menu and again click on Receive File. A window will be prompted having title Receive File with Location at which you want to store the Received file and Receiving Protocol. 17 Select Browse for the location where you would like to store the received file, select the folder and Click OK, the folder name and address will be displayed in the small window. Protocol to be selected should be same as kept at transmitting PC. 18 On the PC from which the selected file to be transmitted, Click SEND button. A window will open showing file transfer status. Immediately at the Receiving PC Click Receive (otherwise Time Out Error will be displayed and communication will fail) .You will see a window showing file is being received in the form of packets. 19 Put obstruction between IR transmitter and detector and observe effect. File transmission stops. 20 Remove obstruction file transfer resumes. 21 After file is transferred both the windows in the (transmitting & receiving PCs) will close. Check for the received file in the folder where the file is stored.


35

Practical Manual

Lab: DC (EE-421-E)

EXPERIMENT NO:-5

AIM:- STUDY OF FIBER OPTIC COMMUNICATION


(ECE)


INSTITUTIONS





36

OBJECTIVE: The objective of this experiment is to connect the RS-232 ports of two computers using Optical Fiber Digital Link, transmit data from one computer over this link and receive the same data on the other computer. EQUIPMENTS: DCT-03 Kit 9 Pin D connector Cables – 2 Nos. Power Supply. 1 Meter Fiber cable. Computers – PC, Intel Celeron and above - 2 nos. (Minimum Configuration). THEORY: Fiber Optic Links can be used for transmission of digital as well as analog signals. Basically a fiber optic link contains three main elements, a transmitter, an optical fiber and a receiver. The transmitter module takes the input signal in electrical form and then transforms it into optical (light) energy containing the same information. The optical fiber is the medium which carries this energy to the receiver. At the receiver, light is converted back into electrical form with the same pattern as originally fed to the transmitter.


37

TRANSMITTER: Fiber optic transmitters are typically composed of a buffer, driver and optical source. The buffer provides both an electrical connection and isolation between the transmitter and the electrical system supplying the data. The driver electronics provides electrical power to the optical source in a fashion that duplicates the pattern of data being fed to the transmitter. Finally the optical source (LED) converts the electrical current to light energy with the same pattern. The LED SFH756V supplied with the kit operates inside the visible light spectrum. Its optical output is centered at near visible wavelength of 660 nm. The emission spectrum is broad, so a dark red glow can usually be seen when the LED is on. RECEIVER: The function of the receiver is to convert the optical energy into electrical form which is then conditioned to reproduce the transmitted electrical signal in its original form. We have used a photo detector SFH551V having TTL type output. Usually it consists of PIN photodiode, transimpedance amplifier and level shifter. BLOCK DIAGRAM FOR STUDY OF FIBER OPTIC COMMUNICATION.

PROCEDURE: 1 Refer to the fig. and connect the power supply with proper polarity to the kit DCT-03 and while connecting, ensure that it is off. 2 Keep all switch faults in off position. 3 Connect 9 Pin D connector Cable between one computer COM port and CN3 connector and second 9 Pin D connector Cable between another computer COM port and CN4 connector.


38

4Connect the TD1 post to TX post of Fiber Optic transmitter. 5Slightly unscrew the cap of LED SFH 756(660nm) on kit. Do not remove the cap from connector. Once the cap is loosened, insert the fiber into cap, now tight the cap by screwing it back. 6 Connect the other end of fiber cable to detector SFH551V. 7 Connect the TTL OUT post of Fiber Optic receiver to RD2 post. 8Connect the RD1 post to TD2 post. 9 Keep the switch setting of SW4 towards ON position. 10 Switch ON the power supply and both the computers. 11 Run DCT-03 software on both computers. 12 Select Serial Communication Software link on both computers. 13 This will provide link to hyper terminal software. 14 Open the previously stored connection (e.g. pc1 or pc2) 15 To start communicating between the two PCs Click on the TRANSFER Menu and again click on Send File. A window will be prompted having title Send File with File Name and Protocol. 16 Select Browse for the file, which you would like to send to the PC connected, select the file and Click on Open, the file name and address will be displayed in the small window. Then select the Protocol, (optional use protocols are X modem, Y modem and 1K Xmodem, etc.) 17 To receive the file on the PC Click on the TRANSFER Menu and again click on Receive File. A window will be prompted having title Receive File with Location at which you want to store the Received file and Receiving Protocol. 18 Select Browse for the location where you would like to store the received file, select the folder and Click OK, the folder name and address will be displayed in the small window. Protocol to be selected should be same as kept at transmitting PC. 19 On the PC from which the selected file to be transmitted, Click SEND button. A window will open showing file transfer status. Immediately at the Receiving PC Click Receive (otherwise Time Out Error will be displayed and communication will fail) .You will see a window showing file is being received in the form of packets. 20 Remove fiber cable from detector and observe effect. File transmission stops. 21 Connect the removed fiber again file transfer resumes. 22 After file is transferred both the windows in the (transmitting & receiving PCs) will close. Check for the received file in the folder where the file is stored.


39

Practical Manual

Lab: DC (EE-421-E)

EXPERIMENT NO:-6

AIM:- TRIBIT DATA CODING TECHNIQUE OF NRZ-L DATA FORMAT


(ECE)


40


INSTITUTIONS




OBJECTIVE:

To study tribit coding techniques for Non-Return to Zero data format .

EQUIPMENT: Experimentor Kits ADCL-05

Connecting Chords.

Power supply. e-Lab.


41

THEORY:

FIG. 2 WAVEFORMS FOR THE TRIBIT CODING. NON - RETURN TO ZERO signal are the easiest formats that can be

generated.These signals do not return to zero with the clock. The frequency component associated with these signals are half that of the

clock frequency. Non-return to zero encoding is commonly used in slow speed communications interfaces for both synchronous and

asynchronous transmission. Using NRZ, logic 1 bit is sent as a high value and logic 0 bit is sent as a low value. The mechanism by which a

bit stream b(t) generates a QAM signal for transmission is shown in

fig. 1 and relevant waveforms are shown in fig. 2 In these waveforms


42

we have arbitrarily assumed that in every case the active edge of the

clock waveform is the upward edge. The D flip-flop generates three clock waveforms. These clocks have period 3Tb. The active edge of

one of the clocks and the active edge of the other are separated by the bit time Tb. The bit stream b(t) is applied as the data input to type-D

flip-flops, driven by the three different clock waveform. Each flip-flop registers bits during positive transition of its clock in the bit stream

b(t) and holds each such registered bit for three bit intervals that is for the time 3Tb. In fig. 2 we have numbered the bits in the stream b (t).

Note that the bit stream I bit (which is the output of the flip-flop driven by the I clock) registers bit 1 and holds that bit for time 3Tb,

then register bit 4 for time 3Tb, then bit 7 for 3Tb, etc. The next bit stream Q bit holds, for times 3Tb each, the bits numbered

2, 5, 8, etc. similarly the C bit stream holds the data bit numbered 3, 6, 9 for the bit interval 3Tb


43

PROCEDURE: 1 Refer to Block Diagram & Carry out the following connections and

switchsettings.


44

2 Connect power supply in proper polarity to the kit ADCL-05 &

switch it on. 3 Select Data pattern of simulated data using switch SW1, SW2,

SW3. 4 Connect SDATA generated to DATA IN of NRZ-L CODER.

5 Connect the NRZ-L coded data at DATA OUT to the DATA IN of the TRIBIT CODER.

6 Connect the clock generated SCLOCK to CLK IN of TRIBIT CODER by means of the connecting chords provided.

7 Observe the coded signal I BIT, Q BIT and C BIT on the oscilloscope with respect to SCLOCK.

8 Observe the coded signal I BIT, Q BIT and C BIT on the oscilloscope with respect to SDATA.

OBSERVATIONS:

Transmitter clock SCLOCK.

Simulated data SDATA. Coding clock I CLK.

Coding clock Q CLK. Coding clock C CLK.

Coded data I BIT. Coded data Q BIT.

Coded data C BIT.

CONCLUSION: The data are coded in Tribit, which generates, A data signal I (in

phase) consisting in voltage levels corresponding to the value of the first bit of the considered data, for a period equal to 3 bit intervals. A

data signal Q (in quadrature) consisting in voltage levels corresponding to the value of the second bit of the data, for duration

equal to 3 bit intervals. A data signal C consisting in voltage levels

corresponding to the value of the third bit of the data, for duration equal to 3 bit intervals.


45


46


47

Practical Manual

Lab: DC (EE-421-E)

EXPERIMENT NO:-7

AIM:- QUADRATURE AMPLITUDE MODULATION TECHNIQUES


(ECE)


INSTITUTIONS





48

OBJECTIVE:

Study of Carrier Modulation Techniques by Quadrature amplitude method.

. EQUIPMENT:

Experimentor Kits ADCL-05

Connecting Chords. Power supply.

e-Lab.


49

THEORY:

QAM MODULATOR In BPSK, QPSK we transmit, in any symbol

interval, one signal or another which are distinguished from one another in phase but are all of the same amplitude. Now we have noted that our

ability to distinguish one signal vector from another in the presence of noise will depend on the distance between the vector end points. It is

hence rather apparent that we shall be able to improve the noise immunity of a system by allowing the signal vectors to differ, not only in

their phase but also in amplitude. We now describe such amplitude and phase shift keying system. Like QPSK it involves direct modulation of

carriers in quadrature and hence might be abbreviated QAPSK.

However, the accepted abbreviation is simply QASK or QAM. The QAM is a digital modulation where the information is contained

into the phase as well as the amplitude of the transmitted carrier. In the 8-QAM the data are divided into the group of 3 bits (tribit), one of

which will varies the amplitude of the carrier, the last two the phase. The modulated signal can take 4 different phases and 2 different

amplitudes, for a total of 8 different states. Similarly in the 16-QAM the data are divided into group of 4 bits (quad bit). The 16 possible

combinations change amplitude and phase of the carrier, which can take 16 different states A generator of 8-QAM signals for 3-bit symbol

is shown in fig. 1. For 8-QAM the main data source is divided into 3 bits called I bit, Q bit and C bit. These three bits are called TRIBIT.

These tribit together generates a symbol. We can have 2^3=8 possible symbols. Among the 3 bits I and Q bit is responsible for phase

modulation and the last bit (C bit) performs the amplitude modulation.

The effect of each symbol on the final QAM signal is shown in the fig. 2.

QAM MODULATOR


50

The block diagram of the modulator used on the module is shown in

the diagram four 500KHz sine carriers, shifted between them of 90 deg, are applied to modulator. The data (signal I, Q AND C) reach the

modulator from the Tribit coder. The instantaneous value of I, Q and C data bit generates a symbol. Since I, Q and C can take either 0 or 1

value, maximum 8 possible symbols can begenerated as shown in the above table. According to the symbol generated one of the four-sine

carriers will be selected. The relation between the symbol generated and sine carrier is shown in fig.2. A receiver for the QAM signal is

shown in diagram Synchronous detection is required and hence it is necessary to locally regenerate the carriers. The scheme for carrier

regeneration is similar to BPSK. In that earlier case we squared the incoming signal, extracted the waveform at twice the carrier frequency

by filtering, and recovered the carrier by frequency dividing by two. In the present case, it is required that the incoming signal be raised to

the fourth power after which filtering recovers a waveforms at four

times the carrier. The incoming signal also applied to the sampler followed by an adder

and envelope detectors. Two adders add the sampled QAM signal, sampled by the Clock having different phases. At the output of adder

the signals consisting the envelope corresponds to the I and Q bit. Envelope detector then filters the high Frequency components and


51

recovers I and Q bit. These recovered I and Q bits having exactly

same phase and frequency compared to transmitter I and Q bit Pattern. The C bit is recovered simply by passing the QAM

modulated data through envelope detector. These recovered I, Q and C bits then applied to data decoder logic to recover the original NRZ-L

data.


switch settings. 2 Connect power supply in proper polarity to the kit ADCL-05 and

ADCL-06 switch it on.

3 Select Data pattern of simulated data using switch SW1, SW2, SW3. 4 Connect SDATA generated to DATA IN of NRZ-L CODER.

5 Connect the NRZ-L coded data at DATA OUT to the DATA IN of the TRIBIT CODER.

6 Connect the clock generated SCLOCK to CLK IN of TRIBIT CODER. 7 Connect the tribit data I BIT, Q BIT & C BIT to control input C1, C2

and C3 of CARRIER MODULATOR respectively. 8 Connect sine carrier to input of CARRIER MODULATOR as follows:

SIN 1 to IN 1. SIN 2 to IN 2.

SIN 3 to IN 3. SIN 4 to IN 4.

9 Connect QAM modulated signal MOD OUT on ADCL-05 to the MOD IN Of the QAM DEMODULATOR on ADCL-06.

10 Connect I BIT, Q BIT & C BIT outputs of QAM Demodulator to I BIT

IN, Q BIT IN & C BIT IN posts of Data Decoder. 11 Put switch SW1 on QAM mode.

12 Observe the decoded data at DATA OUT post of data decoder. Compare the decoded data with SDATA on ADCL-05.


52

OBSERVATIONS:

Input NRZ-L coded Data at DATA OUT of NRZ-L coder. Tribit coded data I BIT, Q BIT & C BIT at the output of tribit coder.

Carrier signal SIN 1 to SIN 4. QAM modulated signal at MOD OUT of carrier modulator.

ON KIT ADCL-06.

Output of first squarer at SQUARER 1. Output of second squarer at SQUARER 2.

Recovered carrier of 2MHz at PLL. Four sampling clocks at the output of SAMPLING CLOCK GENERATOR.

Two added outputs at the output of ADDER. Recovered data bits (I, Q & C bits) at the output of ENVELOPE

DETECTORS. Receiver decoding clocks at DECODER TIMING LOGIC.

Recovered NRZ-L data from I & Q bits at the output of DATA

DECODER.

CONCLUSION: In BPSK we deal individually with each bit of duration Tb. In QAM we

lump three bits together to form a SYMBOL. The symbol can have any one of eight possible values corresponding to three-bit sequence. We

therefore arrange to make available for transmission eight distinct signals. At the receiver each signal represents one symbol and,

correspondingly, three bits. When bits are transmitted, as in BPSK, the signal changes occur at the bit rate. When symbols are transmitted the

changes occur at the symbol rate, which is one-third the bit rate. Thus the symbol time is Ts = 3Tb.


53


54


55


56


57

Practical Manual

Lab: DC (EE-421-E)

EXPERIMENT NO:-8

AIM:- DIBIT PAIR DATA CODING TECHNIQUE OF NRZ-L DATA FORMAT.


(ECE)


INSTITUTIONS





58

OBJECTIVE:

To study dibit pair coding techniques for Non-Return to Zero data format.

EQUIPMENT:

Experimentor Kits ADCL-02 Connecting Chords.

Power supply. 20 MHZ Dual Trace Oscilloscope. E-lab.


59

THEORY:

NON - RETURN TO ZERO signal are the easiest formats that can be generated. These signals do not return to zero with the clock. The frequency component associated with these signals are half that of the

clock frequency. Non-return to zero encoding is commonly used in slow speed communications interfaces for both synchronous and

asynchronous transmission. Using NRZ, logic 1 bit is sent as a high value and logic 0 bit is sent as a low value.

The mechanism by which a bit stream b (t) generates a QPSK signal

for transmission is shown in fig. 1.2 and relevant waveforms are shown in fig. In these waveforms we have arbitrarily assumed that in

every case the active edge of the is the upward edge. The toggle flip-flop generates an odd clock waveform and an even waveform. These

clocks have period 2Tb. The active edge of one of the clocks and the active edge of the other are separated by the bit time Tb. The bit

stream b(t) is applied as the data input to type-D flip-flops, one driven by the odd and one, driven by the even clock waveform. The flip-flop

register alternate bits in the stream b (t) and hold each such registered bit for two bit intervals that is for the time 2Tb. in fig.1.4.

We have numbered the bits in the stream b (t). Note that the bit stream Bo(t) (which is the output of the flip-flop driven by the odd

clock) registers bit 1 and holds that bit for time 2Tb, then register bit 3 for time 2Tb, then bit 5 for 2Tb, etc. The even bit stream be (t) holds,

for times 2Tb each, the alternates bits numbered 2, 4, 6, etc.


60

Dibit Conversion


switch settings. 2 Connect power supply in proper polarity to the kit ADCL-02 & switch

it on. 3 Select Data pattern of simulated data using switch SW1.

4 Connect SDATA generated to DATA IN of NRZ-L CODER.

5 Connect the coded data NRZ-L DATA to the DATA IN of the DIBIT CONVERSION.

6 Connect the clock generated SCLOCK to CLK IN of DIBIT CONVERSION by means of the connecting-chords provided.

7 Observe the coded signal I BIT with respect to SDATA. 8 Observe the coded signal Q BIT with respect to SDATA.

OBSERVATIONS:

Transmitter clock SCLOCK. Simulated data SDATA.

NRZ-L coded data NRZ-L DATA. Coded data I BIT.

Coded data Q BIT.


61

CONCLUSION: The data are coded in dibit which generates. A data signal I (in

phase) consisting in voltage levels corresponding to the value of the first bit of the considered pair equal to 2 bit intervals. A data signal Q

(in quadrature) consisting in voltage levels corresponding to the value of the second bit of the pair, for duration equal to 2 bit intervals.


62

Practical Manual Lab: DC (EE-421-E)

EXPERIMENT NO:-9

AIM:- QUADRATURE PHASE SHIFT KEYING MODULATION TECHNIQUES


(ECE)


INSTITUTIONS




63


OBJECTIVE:

Study of Carrier Modulation Techniques by Quadrature Phase Shift Keying method.

EQUIPMENT: Experimentor Kit ADCL-02-03.

Connecting Chords. Power supply.

e-Lab


64

THEORY: In this modulation, called Quadrature PSK (QPSK) or 4 PSK

the sine Carrier takes 4 phase values, separated of 90 deg. and determined by the combinations of bit pair (Dibit) of the binary data

signal. The data are coded into Dibit by a circuit generating: A) A data signal I (in phase) consisting in voltage levels corresponding

to the value of the first bit of the considered pair, for duration equal to 2 bit intervals.

B) A data signal Q (in quadrature) consisting in voltage levels corresponding to the value of the second bit of the pair, for

duration equal to 2 bit intervals. The block diagram of the modulator used on the module is shown in

the block diagram. Four 500 KHz sine carriers, shifted between them

of 90 deg, are applied to modulator. The data (signal I and Q) reach the modulator from the Dibit generator. The instantaneous value of I

and Q data bit generates a symbol. Since I and Q can take either 0 or 1 value, maximum 4 possible

symbols can be generated (00, 01, 10, and 11). According to the symbol generated one of the four-sine carriers will be selected. The

relation between the symbol generated and sine carrier is shown in table.

A receiver for the QPSK signal is shown in fig. Synchronous detection is required and hence it is necessary to locally regenerate the carriers.

The scheme for carrier regeneration is similar to that employed in BPSK. In that earlier case we squared the incoming the signal,

extracted the waveform at twice the carrier frequency by filtering, and recovered the carrier by frequency dividing by two. In

the present case, it is required that the incoming signal be raised to

the fourth power after which filtering recovers a waveforms at four times the carrier. A receiver for the QPSK signal is shown in fig.

Synchronous detection is required and hence it is necessary to locally regenerate the carriers. The scheme for carrier regeneration is similar

to that employed in BPSK. In that earlier case we squared the incoming the signal, extracted the waveform at twice the carrier


65

frequency by filtering, and recovered the carrier by frequency dividing

by two. In the present case, it is required that the incoming signal be raised to the fourth power after which filtering recovers a waveforms

at four times the carrier.

PROCEDURE:

1 Refer to Block Diagram & Carry out the following connections and switch settings.

2 Connect power supply in proper polarity to the kit ADCL-02 & switch it on.

3 Select Data pattern of simulated data using switch SW1. 4 Connect SDATA generated to DATA IN of NRZ-L CODER.

5 Connect the coded data NRZ-L DATA to the DATA IN of the DIBIT CONVERSION.

6 Connect the SCLOCK to CLK IN of DIBIT CONVERSION. 7 Connect the dibit data I bit to control input C1 of CARRIER MODULATOR

8 Connect the dibit data Q bit to control input C2 of CARRIER MODULATOR.

9 Connect carrier components to input of CARRIER MODULATOR as follows:

SIN 1 to IN 1 SIN 2 to IN 2

SIN 3 to IN 3 SIN 4 to IN 4

10 Connect QPSK modulated signal MOD OUT on ADCL-02 to the MOD IN of the QPSK DEMODULATOR on ADCL-03.

11 Observe the output of first squarer at SQUARER 1. 12 Observe the output of second squarer at SQUARER 2.

13 Observe four sampling clocks at the output of SAMPLING CLOCK GENERATOR.

14 Observe the output of ADDER 1. 15 Observe the output of ADDER 2.

16 Observe the recovered data bit I at the output of ENVELOPE DETECTOR1.

17 Observe the recovered data bit Q at the output of ENVELOPE DETECTOR2. 18 Connect I BIT, Q BIT & CLK OUT outputs of QPSK Demodulator to I

BIT IN, Q BIT IN & CLK IN posts of Data Decoder respectively. 19 Observe the recovered NRZ-L data from I & Q bits at the output of

DATA DECODER. 20 Use RESET switch if delay occurs at data out post and use PHASE

SYNC switch if there is mismatch in the pattern of data at output with respect to the transmitter data.


66

OBSERVATIONS:

ON KIT ADCL-02 1. Input NRZ-L Data at DATA INPUT.

2. Carrier frequency SIN 1 to SIN 4 3. Dibit pair generated data I bit & Q bit at DIBIT CONVERSION.

ON KIT ADCL-03 1. QPSK modulated signal at MOD OUT.

2. Output of first squarer at SQUARER 1. 3. Output of second squarer at SQUARER 2.

4. Four sampling clocks at the output of SAMPLING CLOCK GENERATOR. 5. Two adder outputs at the output of ADDER.

6. Recovered data bits (I & Q bits) at the output of ENVELOPE DETECTORS. 7. Recovered NRZ-L data from I & Q bits at the output of DATA DECODER.

CONCLUSION :

In BPSK we deal individually with each bit of duration Tb. In QPSK we lump two bits together to form a SYMBOL. The symbol can have any

one of four possible values corresponding to two-bit sequence 00, 01, 10, and 11. We therefore arrange to make available for transmission

four distinct signals. At the receiver each signal represents one symbol and, correspondingly, two bits. When bits are transmitted, as in BPSK,

the signal changes occur at the bit rate. When symbols are transmitted the changes occur at the symbol rate which is one-half the bit rate.

Thus the symbol time is Ts = 2Tb.


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