power factor correction in power conversion applications

AN1106Power Factor Correction in Power Conversion Applications

Using the dsPIC® DSC

INTRODUCTION Most of the power conversion applications consist of anAC-to-DC conversion stage immediately following theAC source. The DC output obtained after rectification issubsequently used for further stages.

Current pulses with high peak amplitude are drawnfrom a rectified voltage source with sine wave input andcapacitive filtering. The current drawn is discontinuousand of short duration irrespective of the load connectedto the system.

Since many applications demand a DC voltage source,a rectifier with a capacitive filter is necessary. However,this results in discontinuous and short duration currentspikes. When this type of current is drawn from themains supply, the resulting network losses, the totalharmonic content, and the radiated emissions becomesignificantly higher. At power levels of more than 500watts, these problems become more pronounced.

Two factors that provide a quantitative measure of thepower quality in an electrical system are Power Factor(PF) and Total Harmonic Distortion (THD). The amountof useful power being consumed by an electricalsystem is predominantly decided by the PF of thesystem.

Benefits from improvement of Power Factor include:

• Lower energy and distribution costs• Reduced losses in the electrical system during

distribution • Better voltage regulation• Increased capacity to serve power requirements

This application note focuses primarily on the study,design and implementation of Power Factor Correction(PFC) using a Digital Signal Controller (DSC). Thesoftware implementation of PFC using the 16-bit fixedpoint dsPIC® DSC is explained in detail. Thediscretization of the error compensators, along with adesign example is covered as well. In conclusion, somelaboratory test results and waveforms are presented tovalidate the digital implementation of the PFCconverter.

The low cost and high performance capabilities of theDSC, combined with a wide variety of power electronicperipherals such as an Analog-to-Digital Converter(ADC) and a Pulse Width Modulator (PWM), enable thedigital design and development of power relatedapplications to be simpler and easier.

Some advantages of using a digital implementation forPFC are:

• Easy implementation of sophisticated control algorithms

• Flexible software modifications to meet specific customer needs

• Simpler integration with other applications

SIGNIFICANCE OF POWER FACTOR IN POWER AND CONTROL SYSTEMSTo understand PF, it is important to know that powerhas two components:

• Working, or Active Power• Reactive Power

Working Power is the power that is actually consumedand registered on the electric meter at the consumer'slocation. It performs the actual work such as creatingheat, light and motion. Working power is expressed inkilowatts (kW), which registers as kilowatt hour (kWh)on an electric meter.

Reactive Power does no useful work, but is required tomaintain and sustain the electromagnetic fieldassociated with the industrial inductive loads such asinduction motors driving pumps or fans, weldingmachines and many more. Reactive Power ismeasured in kilovolt ampere reactive (kVAR) units.

The total required power capacity, including WorkingPower and Reactive Power, is known as ApparentPower, expressed in kilovolt ampere (kVA) units.

Power Factor is a parameter that gives the amount ofworking power used by any system in terms of the totalapparent power. Power Factor becomes an importantmeasurable quantity because it often results insignificant economic savings.

Typical waveforms of current with and without PFC areshown in Figure 1.

Author: Vinaya SkandaMicrochip Technology Inc.

© 2007 Microchip Technology Inc. DS01106A-page 1

AN1106
FIGURE 1: CURRENT WAVEFORMS WITH AND WITHOUT PFC
These waveforms illustrate that PFC can improve theinput current drawn from the mains supply and reducethe DC bus voltage ripple.

The objective of PFC is to make the input to a powersupply look like a simple resistor. This allows the powerdistribution system to operate more efficiently, reducingenergy consumption.

The Power Factor is equal to Real Power divided byApparent Power, as shown in Equation 1.

EQUATION 1: POWER FACTOR

When the ratio deviates from a constant, the inputcontains phase displacement, harmonic distortion orboth, and either one degrades the Power Factor.

The remaining power that is lost as Reactive Power inthe system is due to two reasons:

• Phase shift of current with respect to voltage, resulting in displacement

• Harmonic content present in current, resulting in distortion

These two factors define Displacement Factor andDistortion Factor, which provide the Power Factor asshown in Equation 2. The amount of displacementbetween the voltage and current indicates the degreeto which the load is reactive.

Input Voltage

DC Bus Output Voltage

Input Current

DC Bus Output Voltage

Input Current

WithoutPFC

With PFC

0

0

Power Factor = Real Power / Volt x Ampere


AN1106
EQUATION 2: POWER FACTOR
Harmonic ContentCurrent harmonics are sinusoidal waves that areintegral multiples of the fundamental wave. Theyappear as continuous, steady-state disturbances onthe electrical network. Harmonics are altogetherdifferent from line disturbances, which occur astransient distortions due to power surges.

SOURCES OF CURRENT HARMONICSSome of the prominent sources that cause currentharmonics distortion are:

• Power Electronic Equipment (rectifiers, UPS systems, variable frequency drives, state converters, thyristor systems, switch mode power supplies, SCR controlled systems, etc.)

• Auxiliary Equipment (welding machines, arc furnaces, mercury vapor lamps, etc.)

• Saturable Inductive Equipment (generators, motors, transformers, etc.)

PROBLEMS CREATED BY CURRENT HARMONICSProblems created by current harmonics include, butare not limited to:

• Erroneous operation of control system components

• Damage to sensitive electronic equipment• Nuisance tripping of circuit breakers and blowing

fuses• Excessive overheating of capacitors,

transformers, motors, lighting ballasts and other electrical equipment

• Interference with neighboring electronic equipment

To reduce these problems of current harmonics, thecurrent drawn from the input needs to be shapedsimilar to that of voltage wave profile. The TotalHarmonic Distortion (THD) is shown in Equation 2.

PFC aims at improving the displacement and distortionfactors to derive maximum Real Power from the supply.This is done by reducing the losses that occur in thesystem due to the presence of reactive elements,resulting in the improvement of power quality andoverall efficiency of the system.

When the power converter is fed from a voltage source,and by making the power converter appear as a linearresistance to the supply voltage, the input current waveshape can be made to follow the input voltage waveshape. For example, if the input voltage (V) is in theform of a sine wave, input current (I) is the same as thatshown in Figure 2.

FIGURE 2:

Power Factor = Displacement Factor x Distortion Factor

where:cosφ = Displacement factor of the voltage and currentTHD = Total Harmonic DistortionI1 = Current drawn from the supply at fundamental frequencyI2 = Current drawn from the supply at double the fundamental frequency and so on

PowerFactor φcos 11 I2 I1⁄( )2 I3 I1⁄( )2 …+ + +---------------------------------------------------------------------⋅ φcos

1 THD2+----------------------------= =

DisplacementFactor Distortion Factor

THD 1 I2 I1⁄( )2 I3 I1⁄( )2 …+ + +=

Linear Resistor

R

I

V

VI

t

V (t)

I (t)


AN1106

HOW TO MAKE THE POWER CONVERTER LOOK RESISTIVEDespite having reactive passive elements likeinductors, capacitors and active switching elementslike MOSFETs and IGBTs, how can we make theconverter appear to be resistive to the supply voltage?

The answer to this question lies in the fact that PFC isa low-frequency requirement. Therefore, the converterneed not be resistive at all frequencies, provided afiltering mechanism exists to remove the high-frequency ripples.

The basic elements present in a converter are aninductor (L) and a capacitor (C), which are zero orderelements. This means that these elements cannotstore energy in a single switching cycle due to theirfundamental properties:

• An inductor cannot take a sudden change in current. This makes it a cut set with an open switch and a periodic current source, as shown in Figure 3.

• A capacitor cannot take a sudden change in voltage. This makes it a closed circuit with a closed switch and a periodic voltage source, as shown in Figure 4.

FIGURE 3: SUDDEN CHANGE IN CURRENT

FIGURE 4: SUDDEN CHANGE IN VOLTAGE

Active PFC must control both the input current and theoutput voltage. The current is shaped by the rectifiedline voltage so that the input to the converter appearsto be resistive. The output voltage is controlled bychanging the average amplitude of the currentprogramming signal.

Figure 3 and Figure 4 show the two fundamentalproperties that lead to the following conclusions:

• The two elements, inductor and capacitor, can be considered to be resistive in the low frequency range.

• The current through the inductor can be programmed in such a way that it follows the supply voltage and assumes the same wave shape as that of the voltage. To achieve this, different strategies are used for implementing PFC.

The effective resistance of the resistive load specifiedto the AC line varies slowly according to the powerdemands of the actual load. The line current remainsproportional to the line voltage, but this proportionalityconstant varies slowly over a number of line cycles.

Inductor Current

Open

I

L

+C

Closed

V

-


AN1106

THEORETICAL BACKGROUND ON PFC STRATEGIESIn a DSC-based application, the relevant analogparameters and the control loops need to be redefinedand discretized. This enables changeover from existinghardware to its digital counterpart easier and morelogical.

The basic function of PFC is to make the input currentdrawn from the system sinusoidal and in-phase withthe input voltage. Figure 5 shows the componentblocks required for PFC and the PFC stage interfacedto a dsPIC device. This is an AC-to-DC converterstage, which converts the AC input voltage to a DCvoltage and maintains sinusoidal input current at a highinput Power Factor. As indicated in the block diagram,three input signals are required to implement thecontrol algorithm.

The input rectifier converts the alternating voltage atpower frequency into unidirectional voltage. Thisrectified voltage is fed to the chopper circuit to producea smooth and constant DC output voltage to the load.

The chopper circuit is controlled by the PWM switchingpulses generated by the dsPIC device, based on threemeasured feedback signals:

• Rectified input voltage• Rectified input current• DC bus voltage

The various topologies for active PFC are based on theblock diagram shown in Figure 5.

FIGURE 5: BLOCK DIAGRAM OF THE COMPONENTS FOR POWER FACTOR CORRECTION

Rectifier Chopper

Rectified Voltage Bus Current DC Voltage

dsPIC® Digital Signal Controller

LoadAC Input

Switching pulses


AN1106

POWER FACTOR CORRECTION TOPOLOGIES

Boost PFC CircuitThe boost converter produces a voltage higher than theinput rectified voltage, thereby giving a switch(MOSFET) voltage rating of VOUT. Figure 6 shows thecircuit for the boost PFC stage. Figure 7 shows theboost PFC input current shape.

FIGURE 6: BOOST PFC

FIGURE 7: BOOST PFC INPUT CURRENT SHAPE

Buck PFC CircuitIn a buck PFC circuit, the output DC voltage is less thanthe input rectified voltage. Large filters are needed tosuppress switching ripples and this circuit producesconsiderable Power Factor improvement. The switch(MOSFET) is rated to VIN in this case. Figure 8 showsthe circuit for the buck PFC stage. Figure 9 shows thebuck PFC input current shape.

FIGURE 8: BUCK PFC

FIGURE 9: BUCK PFC INPUT CURRENT SHAPE

Buck/Boost PFC CircuitIn the buck/boost PFC circuit, the output DC voltagemay be either less or greater than the input rectifiedvoltage. High Power Factor can be achieved in thiscase. The switch (MOSFET) is rated to (VIN + VOUT).Figure 10 shows the circuit for the buck/boost PFCstage. Figure 11 shows the buck/boost PFC inputcurrent shape.

FIGURE 10: BUCK/BOOST PFC

FIGURE 11: BUCK/BOOST PFC INPUT CURRENT SHAPE

Regardless of the input line voltage and output loadvariations, input current drawn by the buck converterand the buck boost converter is always discontinuous.However, in the case of a boost converter, input currentdrawn is always continuous if it is operating inContinuous Conduction Mode (CCM). This helps toreduce the input current harmonics.

+Co

D

-

L

Input Current

Input Voltage

t

t

+Co

-D

L

Input Current

Input Voltaget

t

+Co

D

-L

Input Current

Input Voltaget

t


AN1106

PFC USING THE dsPIC30F6010AThe topology selected for the application described inthis application note is the boost PFC circuitimplemented digitally using the dsPIC30F6010Adevice. However, PFC software implementation can bedone on any of the dsPIC device variants. Figure 12illustrates the block diagram of PFC implementationusing the dsPIC30F6010A.

The only output from the dsPIC device is firing pulsesto the boost converter switch to control the nominalvoltage on the DC bus in addition to presenting aresistive load to the AC line.

The output DC voltage of the boost converter and theinput current through the inductor are the twoparameters that are essentially controlled using activePFC. The technique used here for PFC is the AverageCurrent Mode control.

In Average Current Mode control, the output voltage iscontrolled by varying the average value of the currentamplitude signal.

The current signal is calculated digitally bycomputing the product of the rectified input voltage,the voltage error compensator output and the voltagefeed-forward compensator output.

The rectified input voltage is multiplied to enable thecurrent signal to have the same shape as the rectifiedinput voltage waveform. The current signal shouldmatch the rectified input voltage as closely as possibleto have high Power Factor.

The voltage feed-forward compensator is essential formaintaining a constant output power because itcompensates for the variations in input voltage from itsnominal value.

FIGURE 12: BLOCK DIAGRAM FOR IMPLEMENTING PFC USING dsPIC30F6010A

+

-

AN

11A

N9

AN

6 Output ComparePWM Module

1VAVG

2

VAVG

VERRVDCREF

IACIERR

Current Error CompensatorVoltage Error Compensator

VAC

Voltage Feed Forward Compensator

VACVPI

IACREF

CoAC Input

Live

Neutral

L D

Analog-to-Digital Converter

dsPIC30F6010A Digital Signal Controller

FaultInput

VDC


AN1106

PFC SOFTWARE IMPLEMENTATIONThree main blocks are integrated to achieve PowerFactor Correction as shown in Figure 13 and Figure 14.

FIGURE 13: PFC HARDWARE INTERFACE

FIGURE 14: PFC SOFTWARE IMPLEMENTATION

k2 k3 k1

L D

Q Co Load

VDC

VDC

IACVAC

VAC IAC

VAC

Rectified ACVoltage

where:VPI = Voltage Error Compensator OutputVCOMP = Voltage Feed Forward Compensator OutputIPI = Current Error Compensator Outputk1, k2, k3 = Scaling ConstantsNote: Refer to the dsPICDEM™ MC1H 3-Phase High Voltage Power Module User's Guide (DS70096) for additional

details on the circuit components and their ratings.

VAC k2⋅= IAC k3⋅= VDC k1⋅=

Output Compare module

km

VAC

xx xxx x

where:VPI = Voltage Error Compensator OutputVCOMP = Voltage Feed Forward Compensator OutputIPI = Current Error Compensator Outputkm = Scaling Constants

VERR

VDCREF

VDC

VPI IACREF

IAC

IERR IPI

VCOMP Current Error CompensatorVoltage Error Compensator

Voltage Feed Forward Compensator

Firing Pulses to the MOSFET

VAC

VAVGΣVAC

N------------------=

1

VAVG2

--------------------


AN1106
Current Error CompensatorThe inner loop in the control block forms the currentloop. The input to the current loop is the referencecurrent signal IACREF and the actual inductor currentIAC. The current error compensator is designed toproduce a control output such that the inductor currentIAC follows the reference current IACREF.
The current loop should run at a much faster rate whencompared to the voltage loop. The bandwidth of thecurrent compensator should be higher for correctlytracking the semi-sinusoidal waveform at twice theinput frequency. Usually, the bandwidth of the currentcompensator is between 5 kHZ to 10 kHz for aswitching frequency of around 100 kHz. The currentloop bandwidth selected here is 8 kHz for a switchingfrequency of 80 kHz. A switching frequency of 80 kHzis chosen to keep the component size small.

The current controller GI produces a duty cycle valueafter appropriate scaling to drive the gate of the PFCMOSFET.

Voltage Error CompensatorThe outer loop in the control block forms the voltageloop. The input to the voltage loop is the reference DCvoltage VDCREF and the actual sensed output DCvoltage VDC. The voltage error compensator isdesigned to produce a control output such that the DCbus voltage VDC remains constant at the referencevalue Vdcref regardless of variations in the load currentIO and the supply voltage VAC. The voltage controllerGV produces a control signal, which determines thereference current IACREF for the inner current loop.

The output voltage is controlled by the voltage errorcompensator. When the iput voltage increases, theproduct of VAC and VPI increases, and therebyincreasing the programming signal. When this signal isdivided by the square of the average voltage signal, itresults in the current reference signal being reducedproportionally.

The outcome is that the current is reduced proportionalto the increase in voltage, thereby keeping the inputpower constant. This ensures that the reference controloutput IACREF from the voltage compensator ismaximum such that the rated output power is deliveredat minimum input voltage.

Voltage Feed-Forward CompensatorIf the voltage decreases, the product (VAC · VPI), whichdetermines IACREF, also proportionally decreases.However, to maintain a constant output power atreduced input voltage, the term IACREF shouldproportionally increase. The purpose of having an inputvoltage feed-forward, is to maintain the output powerconstant as determined by the load regardless ofvariations in the input line voltage. This compensatorimplemented digitally by calculating the average value

of the input line voltage, squaring this average valueand using the result as a divider for the input referencecurrent, which is fed to the current error compensator.

If VAC is the rectified input voltage to the PFC circuit,the input voltage feed forward term is calculated asshown in Equation 3.

EQUATION 3: AVERAGE VOLTAGE COMPUTATION

To calculate “N”, which is given by N = T/TS, the inputline frequency, f = 1/T, has to be computed with thecontrol loop frequency fs = 1/TS.

The PFC is implemented with a control loop frequencyof 40 kHz running inside the ADC Interrupt ServiceRoutine (ISR). A control loop frequency of 40 kHz ischosen to track the input voltage precisely and toshape the inductor current accurately. Based on this,the sampling time is as shown in Equation 4.

EQUATION 4: SAMPLING TIME

The PFC software is designed for a line frequencyrange of 40 Hz to 66 Hz, as shown in Equation 5.

where:VAC = the instantaneous AC input voltage.T = the time period depending on the frequency of the ACi/p voltage

In the digital domain, the discrete form of this equation is:

where:VAC = Input voltage at the ith sample.N = Number of samples taken

In the analog domain, the continuous form of the averagevoltage is:

VAVG1T--- VAC td⋅( )

t

t T+( )

∫⋅=

VAVG⇒ 1T--- VAC i( ) TS⋅

i n=

i n TTS-----+=

∑⋅=

VAVG⇒ VAC i( ) 1T TS⁄-------------⋅

i n=∑=

VAVG⇒VAC i( )∑N

----------------------=

TS1

40kHz---------------- 1

40000--------------- 25μs= = =


AN1106
EQUATION 5: INPUT FREQUENCY
Given the previous calculations, the value of “N” hasthe range shown in Equation 6.

EQUATION 6: SAMPLE COUNT

However, since the rectified AC input voltage is at twicethe line frequency, the sample count may be anywherebetween 300 and 500 with the nominal value being333.33, corresponding to a line frequency of 60 Hz.

Figure 15 shows how to compute the number ofsamples “N“ in the rectified AC input voltage (the zerocrossing points need to be monitored).

Monitoring of zero crossing points demands morecomplexity in analog circuitry. Instead, the methodused is to fix a minimum reference point for the inputvoltage, as shown in Figure 16. A counter starts whenthe sampled value of input AC voltage from ADC risesabove VMINREF, and stops when the voltage falls belowVMINREF in the next cycle. The count value at that pointwould give the value of sample count “N”.

FIGURE 15: RECTIFIED AC VOLTAGE

FIGURE 16: CALCULATION OF AVERAGE AC VOLTAGE

fMAX⇒ 66Hz TMIN⇒ 15.15ms= =

fMIN⇒ 40Hz TMAX⇒ 25ms= =

to

NMAXTMIN

TS------------ 25ms

25μs------------- 1000= = =

NMINTMAX

TS------------- 15.15ms

25μs-------------------- 600= = =

VAC

t

Diode Bridge

VAC

VAC

t

Diode Bridge

VAC

VMINREF

T 2TS⁄( ) N=


AN1106

PFC DIGITAL DESIGNThe voltages VAC and VDC are measured usingpotential divider circuitry and are fed to the ADCmodule.

The current IAC is measured using a shunt resistor (ora Hall Effect sensor) and the output voltage is fed to theADC module, as shown in Figure 12.

This section describes the detailed design for thePower Factor Correction. The block diagram inFigure 14 is redrawn in terms of its transfer functions,as shown in Figure 17.

FIGURE 17: PFC DIGITAL DESIGN

Table 1 lists the system parameters used for the PFCdigital design.

kokmxx xxx x

VERRVDCREF VPI IERR IPI

VCOMP

Current Error Compensator

GV GI δ IPI ko⋅=

VAC VAC k2⋅= IAC IAC k3⋅=

VDC k1⋅

IACREF IACREF km⋅=

TABLE 1: SYSTEM DESIGN PARAMETERSParameters Values

Output power P = 400 WattInput voltage range (peak) VACMIN = 100V, VACMAX = 410V

Input frequency range fMIN= 40 Hz, fMAX = 66 Hz

Output voltage VDC = 410V

Switching frequency fSW = 80kHz

Digital loop sampling frequency fS = 40kHz

Inductance L = 1.2mHOutput capacitance CO = 1000 μF

Voltage loop bandwidth fBWV = 10 Hz

Current loop bandwidth fBWI = 8 kHz

330μF 3⋅( )

Note: The design calculations that follow need tobe recalculated for any change in thesystem design parameters listed above.For a higher power requirement, thecompensator constants need to beapproximately calculated using theprocedures described in future sections.


AN1106
EQUATION 7: CALCULATION OF
CONSTANTS

Table 2, Table 3 and Table 4 show the numerical rangealong with the base value for the various inputs.

TABLE 3: AC INPUT FREQUENCY NUMERICAL REPRESENTATION

TABLE 4: DC OUTPUT VOLTAGE NUMERICAL REPRESENTATION

Note: All the number representations in thesoftware are done in a fixed point 1.15(Q15) format. When the constants exceedthe range of 0x7FFF, they are converted toan appropriate number format forprocessing and later the resulting output isbrought back to Q15 format.

The gain constants k1, k2, k3, and km are selected

The maximum inductor current is:

as:

IACMAX2 P⋅VMIN------------- 2 400⋅

100---------------- 8A= = =

k11

VDC---------- 1

410--------- 0.00244= = =

k31

IACMAX------------------- 1

8--- 0.125= = =

kmVACMAXVACMIN-------------------- 410

100--------- 4.1= = =

k21

VACMAX-------------------- 1

410--------- 0.00244= = =

TABLE 2: AC INPUT VOLTAGE NUMERICAL REPRESENTATIONVAC (RMS) VAC (Peak) ADC (Input) Q15 Format

Maximum 290 volt 410 volt 5.0 volt 0x7FFFMinimum 70 volt 100 volt 1.2069 volt 0x1EE0Nominal 230 volt 325 volt 3.965 volt 0x6560

f fRECT Sample Count (N)

Maximum 66 Hz 132 Hz 300Minimum 40 Hz 80 Hz 500 Nominal 50 Hz 100 Hz 400

VDC ADC Input Q15 Format

Nominal 410 volt 4.5 volt 0x7300


AN1106
Current Error Compensator Design
EQUATION 8: CURRENT ERROR COMPENSATOR

where: fz = 800Hz, which is the location of zero for the current PI controller and,

The correction term kci is given by:

Therefore, for the current error compensator:

Proportional Constant kpi = 1.177 -> 2410 (Q 11 Format)Intergal Constant kIi = 0.1479 -> 4846 (Q 15 Format)Correction Constant kci = 0.12566 -> 4117 (Q 15 Format)

The transfer function for the current error compensator is given by:

Tco1

2πfz-----------=

kpi 1.777=

kIi5916.356

40kHz---------------------- 0.1479= =

GI s( ) 2πfBWI L⋅k3 VDC⋅

-------------------------⎝ ⎠⎜ ⎟⎛ ⎞ 1 Tco+ s⋅

Tco s⋅------------------------

⎝ ⎠⎜ ⎟⎛ ⎞

⋅=

GI s( ) 2π 8kHz 1.2mH⋅ ⋅0.125 410⋅

---------------------------------------------⎝ ⎠⎜ ⎟⎛ ⎞ 1 198.94+ 10 6– s⋅

198.94 10 6– s⋅---------------------------------------------

⎝ ⎠⎜ ⎟⎜ ⎟⎛ ⎞

⋅=

GI s( ) 1.177 1 198.94 10 6– s⋅+198.94 10 6– s⋅

---------------------------------------------⎝ ⎠⎜ ⎟⎜ ⎟⎛ ⎞

⋅=

GI s( ) kpikIis

------ kpi1 Tco+ s⋅

Tco s⋅------------------------

⎝ ⎠⎜ ⎟⎛ ⎞

⋅=+=

GI s( ) 1.177 5916 356⋅s

-------------------------+=

kpikIis

------+=

kcikIikpi------ 0.12566= =

Note: The current loop bandwidth is chosen tobe 8 kHz. This is selected such that thecurrent faithfully tracks the semi-sinusoidal input voltage at 100 Hz or120 Hz. The current compensator ‘zero’ isplaced by taking the digital delays intoconsideration. Therefore, for a phasecrossover frequency of 8 kHz, the ‘zero’placement is done well below thisfrequency. A frequency of 800 Hz ischosen in this application for placing thecurrent PI compensator ‘zero’.


AN1106
Voltage Error Compensator Design
EQUATION 9: VOLTAGE ERROR COMPENSATOR

GV s( ) kPVkIvs

------+=

GV s( ) kPV1 Tco s⋅+

Tco s⋅------------------------⎝ ⎠

⎛ ⎞ 2k2k3k1km--------------

VACMAXVACMIN--------------------⎝ ⎠

⎛ ⎞2VDCZfcv------------

1 Tco s⋅+Tco s⋅

------------------------⎝ ⎠⎛ ⎞==

Tco1

2πfz-----------=

where: fz = 10 Hz, which is the location of ‘zero’ for the voltage PI controller

Here, Zfcv is the equivalent impedance considering the parallel combination of output capacitance, PFC stageoutput impedance and load impedance:

Computing for GV (s):

(1)

To supply a constant power load with maximum efficiency:

(2)

Using equation (2) in equation (1)

Therefore, for the current error compensator:Proportional Constant kpv = 27 -> 27648 (Q 10 Format)Intergal Constant kIv = 0.042411 -> 1390 (Q 15 Format)Correction Constant kcv = 0.00157 -> 51.47 (Q 15 Format)

The transfer function for the voltage error compensator is given by:

Correction factor, kcvkIvkpv------- 0.00157= =

kIv1696.4640kHz

------------------- 0.042411= =

kpv 27=

Zfcv 15.91545=

Zfcv1

Cs------ 1

2π 10 1000μF s⋅ ⋅ ⋅------------------------------------------------= =

Zfcv Zo1

Cs------ ZL

11Zo----- 1

ZL------ Cs+ +

--------------------------------= =

GV s( ) 420.25Zfcv

---------------- 1 15.9155 10 3– s⋅+15.9155 10 3– s⋅

-----------------------------------------------⎝ ⎠⎛ ⎞=

GV s( ) 27 1 15.9155 10 3–⋅+15.9155 10 3–⋅

--------------------------------------------⎝ ⎠⎜ ⎟⎛ ⎞

⋅ 27 1696s

------------+= =

Note: The voltage loop bandwidth is chosen tobe 10 Hz. This is selected to be well belowthe input frequency of 100 Hz or 120 Hz,so that the second harmonic ripple on theDC bus voltage is eliminated. The voltagecompensator, ‘zero’, is the same as thevoltage loop bandwidth, because at 10 Hz,the digital delays are insignificant.


AN1106

TIMING LOGIC FOR THE SOFTWARE IMPLEMENTATIONTimer3 runs at a frequency of 80 kHz while supplying atrigger to the ADC every period (80 kHz). An ADCinterrupt occurs every 2 timer periods (40 kHz).

The ADC module is used in Channel Scanning mode.The two voltages, VDC and VAC are sampled andconverted on alternate triggers, while the current IAC issampled and converted on every trigger.

The following analog channels and buffers are used onthe dsPIC30F6010A device:

• The first ADC interrupt is generated after converting channels:- AN9 - VDC, DC Bus voltage (ADCBUF0) - AN6 - IAC, inductor current (ADCBUF3)

• The second ADC interrupt is generated after converting channels:- AN11 - VAC, rectified voltage (ADCBUF4) - AN6 - IAC, inductor current (ADCBUF7)

Analog inputs AN9 and AN11 are in channelscanning alternately.

• At any point in the control loop reading from:- ADCBUF0 gives the DC bus voltage- ADCBUF3 and ADCBUF7 give the inductor

current - ADCBUF4 gives the AC voltage

The Output Compare module OC6 is in PWM mode togenerate the PWM pulses to drive the gate of the PFCMOSFET. The time base for the Output Comparemodule is given by the Timer3 module running at80 kHz.

These events, along with the A/D interrupt generationsequence, are shown in the timing logic in Figure 18.

FIGURE 18: TIMING LOGIC

1 2 3 4 5 6 7 8 9 10

12.5 μs

1 2 3 4 5 6 7 8 9 10

1 2 3 4 5

Timer3Counter

Output ComparePWM Pulses

Trigger Eventsto ADC

ADC InterruptEvents

80 kHz

80 kHz

80 kHz

40 kHz

25 μs


AN1106

SOFTWARE FLOWThe main software flow is shown in Figure 19. After aReset, when the program is executed, all the variablesare initialized and peripherals are configured. The PIparameter values are defined for the control loopcompensators. The Timer3 module is switched ON tooperate at a frequency of 80 kHz, and all the interruptsare enabled.

The ADC module waits for a Timer3 special eventinterrupt. On every period match, the timer generates atrigger to the ADC to start sampling the signals andconverting them. On a timer trigger, the ADC samplesand converts the voltages and currents and latergenerates an ADC interrupt.

The PFC routines run inside the ADC Interrupt ServiceRoutine (ISR). A power-on delay is allowed for thecapacitors to charge to the DC bus voltage. After thepower-on delay time (approximately 125 ms)completion, the control loops begin to execute. During

the process of power-on delay, the voltage samples areaccumulated and frequency is calculated. This enablesthe average voltage calculation to be done in the firstiteration of the control loop itself, as the averagevoltage is already available for a period correspondingto one line voltage cycle.

The voltage error compensators execute the voltage PIcontrollers having the measured value of DC busvoltage VDC. The average value of input voltage,squaring and dividing routines, execute in sequencefrom the measured value of input AC voltage therebygiving the voltage feed-forward compensator output.This output is used in conjunction with the voltage errorcompensator output to calculate the reference valueIACREF. Having IACREF and the measured value of theinductor current, the current error compensatorexecutes the current PI controllers to produce the newduty cycle for the Output Compare module.

In the process, voltage samples accumulate and EVACis calculated in every iteration.

FIGURE 19: SOFTWARE FLOW

Timer3 Module

Switched ON

Enable Interrupts

Initialize PI Controller

Parameters

Initialize Peripherals

Reset

Update OC6 PWM Duty

Cycle

Current PI Control

Calculate Reference Current

Voltage PI Control

Power-on delay of approx.

Calculate ∑ VAC and

Sample Count 'N'

Calculate

Feed-forward Compensate

End of Power-on Delay

Start of Power-on D

elay

Measured VAC

Measured VDC

Calculate ∑ VAC and Sample

Count 'N'

A/D Interrupt Service Routine

Measured IAC

Wait for ADC Interrupt

Timer3 Trigger Event

Measured VAC

VAVG and

IACREF

125 ms

Voltage


AN1106

FUNCTION USAGE IN SOFTWAREThe functions listed in the Table 5 are used in softwarefor implementing the various stages of PFC.

.

The functions listed in Table 6 are implemented forother auxiliary functions such as initializing the highvoltage board, setting up the GPIO ports, configuringthe interrupt priority and initialization of peripherals.

TABLE 6: AUXILIARY FUNCTIONS

TABLE 5: PFC FUNCTIONSFunction Name Description

calcVsumAndFreq() Routine to compute VSUM and frequencyVoltagePIControl() Routine for voltage error compensatorcalcIacRef() Routine to calculate reference currentCurrentPIControl() Routine for current error compensator

Function Name Description

SetupBoard() Routine to clear and reset faultsSetupPorts() Routine to initialize the GPIO portsInitOutputCompare6() Routine to configure Output Compare and Timer modulesconfigADC() Routine to configure the ADC module

Note: The functions are implemented inassembly language and are callable fromC routines.


AN1106

PFC CONTROL INTEGRATIONThe software for PFC has been developed to be usedin conjunction with any other application where the firststage remains an AC-to-DC conversion demanding aconstant DC voltage and a sinusoidal current waveshape.

With higher load demand and larger power levels,the application parameters may have to be modifiedto take this into consideration. The compensatorgains and constants may require retuning and betterprotection levels incorporated in the systemhardware with higher-rated components to cope withhigher loads.

Applications in which the PFC stage can be used as anintegral part are:

• Motor control applications• Uninterruptible power supply applications• Switched mode power supply applications

The PFC software uses some device peripherals andresources that cannot be shared with any otherapplication. This excludes the ADC module, which canbe used with the analog channels that are not used forPFC implementation.

The peripherals that cannot be shared for otherapplications are:

• Output Compare – 6 Module

This module is used in PWM mode to operate onits own time base rather than using the MotorControl (MC) PWM module, which can drive otherapplications like switching inverters in motorcontrol and power supply related applications.

• Timer3 Module

This module is used to provide the time base to runthe Output Compare module in addition to actingas a trigger source for the ADC module.

• Analog to Digital Converter

This module uses analog channels AN6, AN9 andAN11 for converting analog signals IAC, VAC andVDC, respectively. The remaining 13 channels canbe used for any other application in conjunctionwith the PFC software.

The resources used for the PFC application are:

• Program Memory (ROM): 2013 bytes• Data Memory (RAM): 142 bytes• Processor Speed: 30 MIPS running from a

7.37 MHz external crystal• MIPS: Approximately 10 MIPS utilized when the

dsPIC is running at 30 MHz


AN1106

LABORATORY TEST RESULTS AND WAVE FORMSThe following figures show the various waveformsincluding inductor current, DC bus voltage, inputcurrent and the test results, which include PFimprovement and current harmonic reduction. Thisinformation aids in validating the PFC implementation,in addition to providing a comparison to a systemwithout PFC.

FIGURE 20: INDUCTOR CURRENT WAVE FORM WITHOUT PFC


AN1106
FIGURE 21: PFC START-UP CHARACTERISTICS
FIGURE 22: WAVE FORMS WITH PFC

PFC PWM

INDUCTOR CURRENT

DC BUSVOLTAGE

PFC PWM

INDUCTOR

DC BUS

CURRENT

VOLTAGE

RECTIFIEDINPUT VOLTAGE


AN1106
FIGURE 23: RESULTING POWER FACTOR WITH PFC
FIGURE 24: RESULTING HARMONIC REDUCTION WITH PFC


AN1106

SUMMARYThis application note shows how to implement PowerFactor Correction (PFC) through average current modecontrol using a dsPIC device.

The dsPIC device provides a wide variety ofperipherals and memory to integrate this applicationwith other related applications using the dsPICDEM™MC1H 3-Phase High Voltage Power Module (P/NDM300021) and the dsPICDEM™ MC1 Motor ControlDevelopment Board (P/N DM300020).

The firmware used in this application (see AppendixA: “Source Code”) is written in assembly language toeffectively make use of the special DSP operations.

For further development, the MPLAB® IDE and thedevelopment tools provide a flexible platform todevelop code and debug programs.

REFERENCES• Digital Control For Power Factor Correction,

Manjing Xie. Virginia Polytechnic Institute and State University, June 2003.

• Topological Issues in Single Phase Power Factor Correction, Vlad Grigore, Helsinki University of Technology. Institute of Intelligent Power Electronics, November 2001 - http://lib.tkk.fi/Diss/2001/isbn9512257351/

• dsPICDEM™ MC1H 3-Phase High Voltage Power Module User's Guide (DS70096)

• dsPICDEM™ MC1 Motor Control Development Board User's Guide (DS70098)

• dsPIC30F Family Reference Manual (DS70046)

Note: When using a dsPIC33F device forimplementing the PFC algorithm, thesevariations must be followed:

• dsPIC33F devices operate at 40 MIPS (40 MHz):All timing considerations should be verified to suit this operating frequency. The Output Compare module’s period and duty cycle should be recalculated for this frequency. The ADC triggering event from the timer should also be recalculated.

• Some of the dsPIC33F devices may use DMA with the ADC module:All ADC results are stored in buffers configured in the DMA RAM. There-fore, the DMA controller needs to be configured for the ADC module to receive and transfer the results to the appropriate buffers.

• The GPIO ports must be checked for compatibility with each device variant.


http://lib.tkk.fi/Diss/2001/isbn9512257351/

http://lib.tkk.fi/Diss/2001/isbn9512257351/

AN1106

APPENDIX A: SOURCE CODE

Any libraries and source files associated with thisapplication note are available for download as a singlearchive file from the Microchip corporate Web site(www.microchip.com).


http://www.microchip.com

AN1106

APPENDIX B: HARDWARE COMPONENT SELECTION FOR THE PFC BOOST CIRCUIT

The essential components for a PFC Boost Circuit are:

• Inductor• MOSFET• Diode• Capacitor

For this application, the dsPICDEM™ MC1H 3-PhaseHigh Voltage Power Module (part number DM300021)and its hardware components were used fordevelopment. Please refer to the user’s guide forcomplete details on the hardware components andtheir values (see “References”).

A PFC component calculator in the form of an Excel®spreadsheet, can be used for properly selecting thehardware components for any desired power rating.This file, PFC_component_calculator.xls, canbe obtained from the Microchip Web site(www.microchip.com).


http://www.microchip.com

Note the following details of the code protection feature on Microchip devices:• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of ourproducts. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such actsallow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding deviceapplications and the like is provided only for your convenienceand may be superseded by updates. It is your responsibility toensure that your application meets with your specifications.MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS ORIMPLIED, WRITTEN OR ORAL, STATUTORY OROTHERWISE, RELATED TO THE INFORMATION,INCLUDING BUT NOT LIMITED TO ITS CONDITION,QUALITY, PERFORMANCE, MERCHANTABILITY ORFITNESS FOR PURPOSE. Microchip disclaims all liabilityarising from this information and its use. Use of Microchipdevices in life support and/or safety applications is entirely atthe buyer’s risk, and the buyer agrees to defend, indemnify andhold harmless Microchip from any and all damages, claims,suits, or expenses resulting from such use. No licenses areconveyed, implicitly or otherwise, under any Microchipintellectual property rights.

© 2007 Microchip Technology Inc.

Trademarks

The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, KEELOQ logo, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, rfPIC and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.

AmpLab, FilterLab, Linear Active Thermistor, Migratable Memory, MXDEV, MXLAB, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A.

Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.

All other trademarks mentioned herein are property of their respective companies.

© 2007, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.

Printed on recycled paper.

DS01106A-page 25

Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.

C01106A-page 26 © 2007 Microchip Technology Inc.

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