power electronic module packaging for commercial ... · 2/27/2012 · 12.0 0.0 8.9 12.0 7.18 7.18...
TRANSCRIPT
12.0 0.0 12.0 8.9
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Power Electronic Module Packaging for Commercial, Construction and Agricultural Vehicle (CAV) Traction Drives David Levett Infineon Technologies
Dec 2011
12.0 0.0 12.0 8.9
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Introduction
Two challenges - Smaller size and lower cost
Technical issue - How to manage temperature cost effectively
For power electronics: Reduce losses at source
Packaging for high frequency switching
Shrinking silicon size
Alternative topologies
Cooling system
Module options
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Power Losses.
Approximately 90% of the power loss is in power silicon
12.0 0.0 12.0 8.9
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Static and dynamic losses
Switching frequency in kHz
Loss In
Watts
0
20
40
60
80
100
120
140
160
0 2 4 6 8 10 12 14 16 18 20
Conduction Loss
Switching Loss
12.0 0.0 12.0 8.9
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Page 5 27-Feb-12 Copyright © Infineon Technologies 2006. All rights reserved.
Improvements in Vcesat levels for reduced conduction losses
125°C
125°C
125°C
150°C
175°C
1990 1994 2000 2007 2013 planned
It is getting more difficult to get significant gains in Vce sat voltage.
12.0 0.0 12.0 8.9
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6.40
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Page 6 27-Feb-12 Copyright © Infineon Technologies 2006. All rights reserved.
Opportunities for reduction in switching losses
Optimize silicon for application
Use of SiC
Improved module packaging
Negative effects of high frequency switching
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Different loss distribution for different silicon types
Switching frequency in kHz
Loss In
Watts
0
50
100
150
200
250
0 2 4 6 8 10 12 14 16 18 20
Conduction Loss - Fast Silicon Switching Loss - Fast Silicon
Conduction loss - Slow Silicon Switching Loss - Slow Silicon
12.0 0.0 12.0 8.9
7.18 7.18
9.20 9.20
8.60 8.60
6.40
6.20
6.40
6.80 6.80
6.20
5.00 5.00
Page 8 27-Feb-12 Copyright © Infineon Technologies 2006. All rights reserved.
600V Si-IGBT Inductive Switching: Turn-On @ TJ = 175 °C
Losses at 20A 400V
Fast Silicon Diode EonIGBT 450 µJ EoffDiode 75 µJ
SiC Diode
EonIGBT 125 µJ EoffDiode 5µJ
Remaining turn on
peak with SiC
The reduction in turn on reverse recovery current not only reduces switching losses but can reduce turn on EMI.
12.0 0.0 12.0 8.9
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Page 9 27-Feb-12 Copyright © Infineon Technologies 2006. All rights reserved.
Inductance Plates vs. parallel wires Inductance does not mix well with high di/dt levels in silicon.
How to reduce system inductance?
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Strip line design module inductance reduction
Q &S
Reduction of inductance by 75% is possible
Parallel plate construction
Prototype module
Current density
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Page 11 27-Feb-12 Copyright © Infineon Technologies 2006. All rights reserved.
Alternate topologies. Three level NPC2 or Matrix
F3L…_B27 F3L…_B26 Active rectifier Output phase
Matrix topology for AC to AC conversion.
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Page 12 27-Feb-12 Copyright © Infineon Technologies 2006. All rights reserved.
Why the drive to make chips smaller
Smaller chips and larger wafers = reduced cost + increased power density.
Consequences?
-1990 Area 100% -1994 Area 65% -2000 Area 44% -2007 Area 36% - Next Generation
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New Technology
New technology for high temperature packaging
Si chip
DCB
Chip to substrate
Si chip
DCB
Chip top side
Si chip
DCB
base plate
Substrate to baseplate
Soft soldering with SnAg paste
Diffusion soldering
Al wedge bonding Cu wedge bonding
Soft soldering with SnAg pre form
High reliability system soldering
Standard Technology
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Diffusion soldering
Very thin, Sn based solder
Tmelt > 400°C
Comparable to discrete component assembly
Fast process, highly integrated, high volume compatible
Schematic comparison of a standard solder joint (left) and a diffusion soldered joint (right).
Standard Technology New Technology
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The future of bond wiring – Copper
Top side metallization of chips allows for copper bonding
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High reliability system soldering
Base plate modules have thermal advantages for thermal management in vehicle drives
Improvements in soldering process and alloys
Existing solder after 400 TST Improved solder after 2000 TST
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Delamination image of solder layer
DCB to baseplate solder layer at end of design life thermal cycles
12.0 0.0 12.0 8.9
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Page 18 27-Feb-12 Copyright © Infineon Technologies 2006. All rights reserved.
Power cycling life data curves
How are these generated and what are their limitations?
Number of
cycles
12.0 0.0 12.0 8.9
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Page 19 27-Feb-12 Copyright © Infineon Technologies 2006. All rights reserved.
Same definition as in
our Excel-IPOSIM
using Infineon’s
datasheets.
From mission profile to design life
0 5 10 15 20 25 300
100
200
300
400
500
600
700
time [s]
voltage [
V],
curr
ent
[A]
Load Cycle Data
DC voltage
motor voltage
motor current
R1
R2
R3
R4
C1
C2
C3
C4
R1
R2
R3
R4
C1
C2
C3
C4
R1
R2
R3
R4
C1
C2
C3
C4
R1
R2
R3
R4
C1
C2
C3
C4
R1
R2
R3
R4
C1
C2
C3
C4
Mission profile
Module Electrical
model
Thermal model: module + cooling
system
Matlab/Simulink Simulation
0 5 10 15 20 25 300
100
200
300
400
500
600
time [s]
voltage [
V],
curr
ent
[A]
Load Cycle Data
DC voltage
motor voltage
motor current
12.0 0.0 12.0 8.9
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8.60 8.60
6.40
6.20
6.40
6.80 6.80
6.20
5.00 5.00
Page 20 27-Feb-12 Copyright © Infineon Technologies 2006. All rights reserved.
0 5 10 15 20 25 300
100
200
300
400
500
600
time [s]
voltage [
V],
curr
ent
[A]
Load Cycle Data
DC voltage
motor voltage
motor current
From mission profile to design life Mission profile Losses
Temperatures in detail
0 5 10 15 20 25 300
100
200
300
400
500
600
700
800
time [s]
losses [
W]
Losses
IGBT losses
diode losses
total losses
0 5 10 15 20 25 3050
60
70
80
90
100
110
time [s]
tem
p [
°C]
Junction and solder temperatures
TjIGBT
Tjdiode
Tsolder
Simulation
IGBT, Diode and
Solder layer
temperature profile
12.0 0.0 12.0 8.9
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6.40
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6.20
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Page 21 27-Feb-12 Copyright © Infineon Technologies 2006. All rights reserved.
0 5 10 15 20 25 3050
60
70
80
90
100
110
time [s]
tem
p [
°C]
Junction and solder temperatures
TjIGBT
Tjdiode
Tsolder
From mission profile to design life
IGBT
Diode
Solder
Design life wear in %
Junction and solder temperatures
Summation of design life wear in %
0 10 20 30 40 50 600
10
20
30
40
50
60
70
80
90
100
Delta T [K]
Life t
ime w
ear
[%]
Life time wear of IGBT, diode and solder
IGBT
diode
solder
100%
0 10 20 30 40 50 600
1
2
3
4
5
6
7
8IGBT life time wear
detlaT [K]
Wear
in %
1 3 5 7 9 11 13 15 17 19 21 23 25 27 290
0.2
0.4
0.6
0.8
1
1.2
1.4Solder life time wear
detlaT [K]
Wear
in %
0 10 20 30 40 50 600
0.5
1
1.5
2
2.5
3
3.5
4Diode life time wear
detlaT [K]
Wear
in %
Rainflow
12.0 0.0 12.0 8.9
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Page 22 27-Feb-12 Copyright © Infineon Technologies 2006. All rights reserved.
Copper or AlSiC pin fin construction?
Pin-fin modules for improved cooling
HybridPack 1 and 2 modules with direct pin-fin cooled base plate
12.0 0.0 12.0 8.9
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5.00 5.00
Page 23 27-Feb-12 Copyright © Infineon Technologies 2006. All rights reserved.
Module Selection some options
Design a custom package with optimized pin out, silicon and topology
High volume - Long time to market
Use an existing package and pin out; but, use specific silicon or topology
Medium volume - Short time to market
Standard products
•AQS 1002 qualified
•200A – 800A parts available. • 650V and 1200V.
•Module series qualified for CAV applications - high vibration and temperature cycling capability •100A – 1400A parts available •650V, 1200V and 1700V
Non standard products
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Page 24 27-Feb-12 Copyright © Infineon Technologies 2006. All rights reserved.
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