plan of the talk
DESCRIPTION
Distributed Low Voltage Power Supply System for Front End Electronics of the TRT Detector in ATLAS Experiment. E.Banaś a , P.Farthouat b , Z.Hajduk a , B.Kisielewski a , P.Lichard b , J.Olszowska a , V.Ryjov b , L.Cardiel Sas b - PowerPoint PPT PresentationTRANSCRIPT
Distributed Low Voltage Power Supply System for Front End
Electronics of the TRT Detector in ATLAS Experiment
E.Banaśa, P.Farthouatb, Z.Hajduka , B.Kisielewskia, P.Lichardb, J.Olszowskaa, V.Ryjovb,
L.Cardiel Sasb
aHenryk Niewodniczański Institute of Nuclear Physics PAN, ul. Radzikowskiego 152 , 31-342 Cracow Poland
bCERN, 1211 Geneva 23, Switzerland
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Plan of the talk
Introduction System architecture - the
components Controls and monitoring Results - examples
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Introduction - TRT detector
The TRT (Transition Radiation Tracker) -> the Inner Detector tracking in ATLAS
|η|<2.5 in pseudo-rapidity Electron-pion separation at 97% level Continuous tracking with accuracy ~120 μm/point. Barrel and two end-caps
arrays of the thin walled proportional counters – straw tubes.
Barrel - 96 parts > modules (3 layers of 32) End-caps - 20 ‘wheels’ each, each wheel > 32 sectors. Each module/sector > individual electrical services (HV,
LV, timing etc). The detector contains ~350 000 detecting elements
- straws.
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TRT detector
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Detector segmentation
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Detector segmentation
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Introduction - FE
electronics The front end electronics -> two custom
designed ASIC’s: ASDBLR (amplifier-shaper-discriminator-base-line-restorer)
DTMROC (drift-time-measuring-read-out-chip) Both chips > radiation hard technologies. Power consumption of channel :
ASDBLR ~ 40 mW/channel DTMROC ~ 21 mW/channel
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Introduction - power needs
Per stack/sector/side Per subdetector/side Sub-detector +3V -3V +2.5V +3V -3V +2.5V Barrel 13A 11A 13.5A 416A 352A 432A
Wheels A 18A 16A 19A 576A 512A 608A Wheels B 12A 10.5A 12.5A 384A 336A 400A
Total 43A 38A 45A 1376A 1200A 1440A
Estimated power dissipation in the front end electronics is ~23 kW. This requires careful design of the cooling system having in mind the confined space where electronics is positioned.
The system - components
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Architecture of the system
Bulk power supplies deliver power to distributors associated with detector geographically defined zones Voltage distributors supply individual loads splitting the lines received from bulk power supplies
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Bulk power supplies
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Patch Panel board
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Regulators
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Voltage control/setting
The regulators used > the adjustable version. Changing the voltage ‘adjust’ input allows output
to be set The variable voltage is delivered by radiation
hard DAC embedded in the DTMROC chip. The current swing of the DAC output allows for
regulators output to be varied by ~0.5V up to 1.2 V.
Some F-E parts draw current slightly exceeding the maximum one allowed for the regulators (wheels A). For these channels parallel operation of the regulators has been implemented..
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Negative regulation
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Positive regulation
Controls & monitoring
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MARATON & Framework
The MARATON system has been included into FRAMEWORK which makes its integration very easy. Next slide shows typical PVSSII control panel for MARATON system which can be tailored to specific user needs.
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MARATON panel
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LVPP control circuitry The board contains embedded controller –
an ELMB (Embedded Local Monitoring Board).
Regulators outputs are connected to the ELMB’s ADC
The ADC is measuring the output currents, by monitoring the voltage drop on 22 mOhms serial resistors inserted in output lines
Digital ports are used for communications with DTMROC’s
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Controlling DTMROC
DTMROC
CANBUS
Command OutELMB
LVDSDAC0
DAC1
DAC2
DAC3
Hard Reset
ClockCommand InDigital I/O
VR
VR
VR
VR
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Software solutions Implement all algorithms simulating the
DTMROC serial protocol in the PVSS layer. The most performant solution would be to
modify ELMB firmware embedding in its memory preset bits patterns send to DTMROC by single CAN message.
Intermediate solutions would be to use modified software of CANOpen level or one acting directly on the driver by calls to its DLL classes.
The attractive, firmware based solution has been dropped. However this remains as possible upgrade for control system in future.
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Control solutions
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DLL Solution adopted -> an extension to the standard PVSS
CTRL scripting language which allow for user defined functions to be interpreted by PVSS in the same way as PVSS functions.
Initialization of the CANbus, ELMB, DTMROC Operational:
Setting DAC’s, Reading back DAC’s, Setting inhibits in DTMROC’s, Reading back inhibit state, Enable/disable and read out OCM state
Diagnostics: Reset (soft and hard) of DTMROC’s, Send given number of clocks to DTMROC’s, Get state of a given DTMROC, Set ELMB in the requested state, Read back ELMB state
Closing connection
Some examples
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Clock/data generation
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Accesing DTMROC
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Results voltage setting
Digital regulator +2.5V
2.52.6
2.72.82.9
33.13.2
3.33.43.5
3.63.73.8
3.94
0 51 102 153 204 255
DAC
Vo
ut[
V]
52
53
54
55
56
57
58
59
average
max
min
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Results current measurement
Current pedestal
-0.1
-0.05
0
0.05
0.1
0 5 10 15 20 25 30 35
channel
I[A
]
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Results current sharing
Iout=f(DACsettings)
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
90 95 100 105 110 115 120 125 130 135 140 145 150 155
DAC_setting[counts]
Iou
t[A
]
I1 90
I2 90
I1+I2 90
I1 68
I2 68
I1+I2 68
I1 22
I2 22
I1+I2 22
The plots differ by serial resistor
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Conclusive remarks The tests of complete system have shown that
we achieved DTMROC clock frequency ~ 370 Hz. The limiting factor appeared to be the ELMB firmware.
This results in ~ 5 sec. for setting one LVPP. The whole TRT can be set in ~ 90 sec’s. If values
written in are checked for correctness by read back, quoted time increases to 240 seconds. Since such an operation is foreseen only during cold start up of system (after detector shutdown) this time is deemed fully acceptable.
Accuracy of monitoring voltages and current is satisfatory (2-3 % full scale - no calibration)