pid

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Published in IET Power ElectronicsReceived on 3rd December 2012Revised on 31st May 2013Accepted on 22nd June 2013doi: 10.1049/iet-pel.2013.0254

T Power Electron., 2014, Vol. 7, Iss. 3, pp. 527–539oi: 10.1049/iet-pel.2013.0254

ISSN 1755-4535

Digital current control of a three-phase four-legvoltage source inverter by using p–q–r theoryAyhan Ozdemir, Zekeriya Ozdemir

Electrical and Electronics Engineering Department, Sakarya University, Esentepe Campus, 54187 Sakarya, Turkey

E-mail: [email protected]

Abstract: In this study, balanced/unbalanced linear/non-linear current control in three-phase four-leg voltage source inverter(VSI) is carried out by using modified p–q–r method instead of the classical p–q–r method, digital proportional integralderivative (PID) control rule and three-dimensional (3D) space vector pulse width modulation (3D SVPWM). For thispurpose, three-phase four-leg power inverter and PWM signal generation circuits are designed and modelled separately. Evenif the power source voltage is unsymmetrical, the proposed modified p–q–r method leads to measurement and to generatingthe instantaneous harmonic and reactive components of load current accurately. The performance of the classical p–q–rtheory under non-ideal mains voltages is improved and the accuracy of the proposed modified p–q–r theory is demonstratedboth through simulation and real-time application. Each phase of the three-phase four-leg VSI modelled directly in abcreference frame is decoupled from each other This simplifies the digital PID controller design significantly. Modelling of thewhole system, modified p–q–r measurement and digital PID design steps are given in detail. Real-time experimental resultsfor the designed three-phase four-leg VSI in stand-alone mode are compared with the simulation results.

1 Introduction

Common use of non-linear balanced/unbalanced loads inpower systems requires simultaneous solution of one and/ormore problems of harmonics elimination, reactive powercompensation and symmetrisation of asymmetricalthree-phase load. For this purpose, the solution can beobtained by using the following tools: instantaneous powermeasurement, modelling, assessment and control andinstantaneous reference current generation. The firstinstantaneous imaginary power measurement as a newelectrical entity in three-phase circuits was proposed in [1].Three power components are defined as linearlyindependent in [2] for three-phase four wire systems inp–q–r reference frame rotating with respect to voltage spacevector. p–q–r theory is compared with instantaneous powertheories p–q theory and cross vector theory in [3, 4].Spectral analysis is performed in frequency domain in [5]for one-phase and three-phase systems. Hybrid controlapproach is implemented for two different instantaneouspower theories p–q–0 and p–q–r power theory in [6] forthree-phase four-leg active power filter. Carrier-based pulsewidth modulation (PWM) modulation and current controlstrategies for a four-leg converter when it is particularlyfeeding a three-phase load with imbalances in a–b–creference frame are given in [7]. The neutral leg ofthree-phase four leg is controlled separately from the otherthree legs according to the maximum and minimum valuesamong three errors between three output currents and theirrespective reference values in [8]. A current control strategyusing constant switching frequency method for a

three-phase four-leg voltage source inverter (VSI) ispresented in [9]. A predictive current control strategy isproposed for the grid-connected four-leg inverters in [10].For current control in three-phase four-leg VSI, modellingand sliding mode control is discussed in [11–13], anon-linear control approach is given in [14] and a predictivenon-linear control algorithm is developed in [15]. Forinstantaneous power generation in three-phase four-leg VSI,three-dimensional space vector PWM (3D SVPWM) isdiscussed in [16–18], and a hysteresis control method ispresented in [19].The advantages of the four-leg voltage source converter are

explored in [20], such as reduced number of switches, highperformance and dc-link voltage equal to that of standardconverter with five legs.The instantaneous measurement theories given in [1–6]

do not provide good performance if the power systemvoltages are unbalanced and/or distorted. However,distortions such as phase-voltage unbalance and harmonicsare usually present in power systems. The methods given in[1–6] are only accurate if voltages of power system aresinusoidal.In this study, in order to improve the performance of the

classical p–q–r theory under non-ideal mains voltage theproposed modified p–q–r theory and its applications withthe stand-alone power inverter are presented. Stand-alonemode means that the system, composed of load and currentgenerator three-phase four-leg VSI, measures theinstantaneous active, reactive and harmonic currents of loadcurrents and generates the calculated currents independentlyof the utility grid.

527& The Institution of Engineering and Technology 2014

Fig. 1 Simplified block diagram of real-time experimental setup

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Currents consumed by non-linear balanced/unbalancedloads are measured by using instantaneous powermeasurement modified p–q–r theory for 20 kHz samplingfrequency. The calculated instantaneous reference currentsare generated by using digital proportional integralderivative (PID) controlled three-phase four-leg VSI at 20kHz switching frequency. The simplified block diagram ofthe experimental setup consisting of measurement andcontroller together with three-phase four-leg VSI andinverter loads are given in Fig. 1.The real-time experimental setup consists of three main

parts: digital signal processor (DSP)-based measurementand control, grid-connected linear/non-linear load and thethree-phase four-leg VSI. First, the reference currents areobtained by using the proposed p–q–r method for linear/non-linear grid-connected load. Then, the reference currentsare generated by using the three-phase four-leg VSI instand-alone mode.This study is organised as follows: (i) modelling and

digitisation of each phase independent of each other in abcreference frame of three-phase four-leg VSI, (ii) modellingof PWM on DSP architecture as zero-order hold (ZOH),(iii) digital PID controller design, instantaneous power

Fig. 2 Inverter and PWM module for current generation


measurement-modified p–q–r method and 3D SVPWMsignal generation algorithm and (iv) simulation andreal-time results for measurement of various load currentsand their generation with inverter.

2 Three-phase four-leg VSI and PWM modulemodelling

Three-phase four-leg VSI power circuit and PWM signalgeneration module used for digital current control areshown in Fig. 2. Modelling of PWM module on DSParchitecture and four-leg VSI power circuit will bedescribed separately.

2.1 Modelling of three-phase four-leg VSI

Three-phase four-leg power circuit with ideal switches and R,L loads are shown in Fig. 3.Applying Kirchhoff’s voltage laws for loops 1 and 2

indicated in Fig. 3 gives

Uipwm(t) = Lidii(t)

dt+ Riii(t)+ UNpwm(t) (1)

IET Power Electron., 2014, Vol. 7, Iss. 3, pp. 527–539doi: 10.1049/iet-pel.2013.0254

Fig. 3 Three-phase four-leg power circuit with ideal switches

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Uin(t) = Uipwm(t)− Unpwm(t) (2)

Unpwm(t) = UNpwm(t) (3)

where i = a, b, c. Circuit parameters are La = Lb = Lc = L andRa = Rb = Rc = R. Continuous-time state equations in vector–matrix form for three-phase four-leg VSI can be obtainedby using (1)–(3). The result is shown in (4).

dia(t)

dtdib(t)

dtdic(t)

dt

⎡⎢⎢⎢⎢⎢⎣

⎤⎥⎥⎥⎥⎥⎦ = −

R

L0 0

0R

L0

0 0R

L

⎡⎢⎢⎢⎢⎢⎣

⎤⎥⎥⎥⎥⎥⎦

ia(t)

ib(t)

ic(t)

⎡⎢⎣

⎤⎥⎦

+

1

L0 0

01

L0

0 01

L

⎡⎢⎢⎢⎢⎢⎣

⎤⎥⎥⎥⎥⎥⎦

Uan(t)

Ubn(t)

Ucn(t)

⎡⎢⎣

⎤⎥⎦

(4)

Fig. 4 Modelling of PWM module

a PWM moduleb PWM signals generation


2.2 Modelling of PWM module

The switches in the same branch in the four-leg VSI in Fig. 3work as complementary to each other. Voltage expressionscan be written as

Uapwm

UbpwmUcpwm

Unpwm

⎡⎢⎢⎣

⎤⎥⎥⎦ =

1 0 0 00 1 0 00 0 1 00 0 0 1

⎡⎢⎢⎣

⎤⎥⎥⎦

dadbdcdn

⎡⎢⎢⎣

⎤⎥⎥⎦udc (5)

where i = a, b, c. Four-leg VSI output voltages Uin(t) can bewritten in terms of upper insulated gate bipolar transistor(IGBT) on-times dj, where j = a, b, c, n and DC-line voltageudc as

Uan

Ubn

Ucn

⎡⎣

⎤⎦ =

da − dndb − dndc − dn

⎡⎣

⎤⎦udc = dan

dbndcn

⎡⎣

⎤⎦udc (6)

One way of generating the signals dj is to use PWMmodule inthe DSP architecture. It is possible to convert dj to pulsesignals by implementing 3D SVPWM algorithm insoftware, where the obtained upper IGBT on-times are Tj,where j = a, b, c, n. PWM signals to be generated aresynchronised with voltage sampling instants. The simplifiedPWM module and the generated signals are shown inFigs. 4a and b, respectively.The sampling instants in Fig. 4b are synchronised to the

peak point of the triangle-shaped carrier signal. Hence,transient signals are avoided by performing sampling at theinstances other than the switching on–off times in Fig. 4b.Ti, where i = a, b, c, n represent the upper IGBT duty cyclesof three-phase four-leg VSI for each leg and similarly Ti(t)denote the duty cycle programmed to 16-bit duty cycleregister in PWM module with T sampling interval. �Ti(t) inFig. 4b can be written in terms of unit step functions as

�Ti t( ) = Ti 0( ) u(t)− u(t − T )[ ]

+ Ti(1) u(t − T )− u(t − 2T )[ ]+ . . .

+ Ti(n) u(t − nT )− u t − (n+ 1)T( )[ ] (7)


Fig. 5 PWM module control block diagram

Fig. 6 Open-loop control block diagram for each phase currentcontrol

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Taking the Laplace transform of both sides of (7) gives

�Ti(s) = Ti(0)1

s− 1

se−sT

[ ]

+ Ti(1)1

se−sT − 1

se−2sT

[ ]+ . . . . . . . . . . . .

+ Ti(n)1

se−nsT − 1

se−(n+1)sT

[ ](8)

where �Ti(s) = L �Ti(t){ }

. Rearranging (8), we have

�Ti(s) =1− e−sT

s

Ti(0)+ Ti(1)e−sT + Ti(2)e

−2sT + . . . . . . . . . . . . .[ ] (9)

Equation (9) can be written in compact form as

�Ti(s) =1− e−sT

s

∑1n=0

Ti(n)e−nsT = Gh0(s)Ti(s)

∗ (10)

Close examination of (10) indicates that it consists of twotransfer functions, where

Gh0(s) =1− e−sT

sand Ti(s)

∗ =∑1n=0

Ti(n)e−nsT

are the hold transfer function and the mathematical expressionof writing Ti duty cycles to 16-bit register with T samplinginterval, respectively.The control block diagram corresponding to this

observation is given in Fig. 5.The average value is computed from

Uin =1

T

∫t+Ton

tUdcdt (11)

where Uin, i = a, b, c, are the inverter output voltages.

Fig. 7 Closed-loop control of each phase current


Recalling Ton = din(t)T gives

Uin = din(t)Udc (12)

Inverter gain Kinv is the variation of inverter output voltagewith respect to din(t). That is

Kinv =∂Uin

∂din(t)= Udc (13)

The open-loop control block diagram corresponding tocurrent control for each phase in three-phase four-leg VSIcan be obtained as given in Fig. 6 by using (4), (6) and (13).

3 Discrete time PID design

The closed-loop control block diagram corresponding toapplying feedback to the open-loop control block diagramgiven in Fig. 6 and generating control signal by processingthe error signal with digital PID control rule is given in Fig. 7.The goal in controller design is to determine PID controller

coefficients Kp, Ki, Kd satisfying the required performance forthe system. For this purpose, to obtain discrete-time transferfunction G(z) = Z G(s)ZOHG(s)

{ }from continuous transfer

function G(s) = Ii(s)

din(s)the sampling period T will be

selected first. From (4), the general dynamic equation isobtained as

dii(t)

dt= −R

Lii(t)+

1

LUin(t) i = a, b, c (14)

Using Uin = dinudc gives

G(s) = Ii(s)

din(s)= udc

L

1

s+ (R/L)(15)


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Applying the z-transform in the last equality, we have
G(z) = Z G(s)ZOHG(s){ }

= Z1− e−sT

s

udcL

1

s+ (R/L)

{ }(16)

Let R = 16.63 Ω, L = 1.25 mH, T = 50 µs and G(z) = (udc/R)((1− e−(R/L)T)/(z− e−(R/L)T)). Then, G(z) becomes

G(z) = 0.02996

z− 0.5015(17)

The closed-loop transfer function of the system given in Fig. 7can be written as (see (18))

where the discrete-time PID transfer function is given by(see (19))

= Kpidz2 − za+ b

z(z− 1)(20)

Kpid, aand b parameters will be calculated from the closedloop reference characteristic equation obtained using thepredefined transient parameters for overshoot≤%4, (ξ≤0.75) and %2 settling time ts = 500 µs. The second-orderreference characteristic equation poles are determined byz W esT . Since the characteristic equation in (18) is of thethird order, the order of the reference characteristic equationmust also be made three by pole addition. Pole additionshould be performed such that the response of thesesecond-order discrete systems is affected as less as possibleand the resulting transfer function is causal. Taking theseconsiderations into account gives rise to the condition |σr| < |σ1| < 12|σr|, where σ1 and σr are the real parts ofthe additional pole and the reference second-order systempole, respectively. The third-order reference characteristicequation used in this study is given by

F(z) = z2 − 1.4827z+ 0.4958( )

(z+ 0.008) = 0 (21)

By comparing the denominator of (18) and (21), discrete-timePID controller coefficients are determined as Ki = 0.45 Kd =0.013 Kp = 0.20, respectively.The predefined poles of the closed-loop characteristic

equation are assigned by the digital PID controller and theclosed-loop poles are z1 = 0.9742, z2 = 0.506 and z3 =− 0.0008. Since the all poles are inside of unit circle onz-plane the closed-loop system is asymptotically stable. TheFigs. 12 and 13 of the simulation results obtained by usingthe closed-loop control block diagram given in Fig. 7 arealso the double confirmation of the stability.

T (z) = 0.4985Kpidz2 − 0.498

z3 + (0.4985Kpid − 1.5015) z2 + 0.(

G(z)PID = Kp + Ki + Kd

( )︸��︷︷��︸

Kpid

z2 − z Kp + 2Kd

( )/((


4 Reference current calculation usingmodified p–q–r theory

One of the most important problems in current control isinstantaneous accurate measurement of active, reactive andtotal harmonic reference currents. Calculation of referencecurrents Iaref, Ibref, Icref with classical p–q–r and the proposedmodified p–q–r instantaneous power measurement algorithmare illustrated in Fig. 8, where Van, Vbn, Vcn are phase-neutralpower system voltages and Ia, Ib, Ic are phase currents.In order to improve the performance of the classical p–q–r

theory under non-ideal mains voltages, the proposed modifiedp–q–r theory is shortly presented as follows.Non-ideal mains voltages are first converted to α β 0

coordinate and then to stationary dq coordinates. Theproduced dq components of voltages are filtered by usingthe fourth-order Butterworth low-pass filter whosespecifications are cut-off frequency of fc = 10 Hz and stopband frequency of fs = 20 Hz. The filter outputs are reverseconverted α β 0 coordinates to obtain the positive-phasesequence V+

0 , V+a , V+

b shown in Fig. 8b as dark-colouredin schematic block diagram. The proposed modified p–q–rmeasurement can be used when the main voltages are notsinusoidal and sinusoidal currents are desired in activepower filter or similar applications. The classical p–q–rtechnique does not require a phase-locked loop (PLL). Theproposed modified p–q–r requires a PLL. In this study thePLL is implemented by software in the TMS320F210 DSP.Vd_dc, Vq_dc phase voltages and currents are converted from

abc reference frame to α β 0 reference frame by using (22) and(23) as seen in Fig. 8b.

Va

Vb

V0

⎡⎢⎣

⎤⎥⎦ =

��2

3

√ 1 − 1

2− 1

2

0

��3

√

2−

��3

√

21��2

√ 1��2

√ 1��2

√

⎡⎢⎢⎢⎢⎢⎢⎣

⎤⎥⎥⎥⎥⎥⎥⎦

Van

Vbn

Vacn

⎡⎢⎣

⎤⎥⎦ Vd

Vq

[ ]

= cosu sin u

−sinu cosu

[ ]︷��︸︸��︷T

Va

Vb

[ ](22)

IaIbI0

⎡⎢⎣

⎤⎥⎦ =

��2

3

√ 1 − 1

2− 1

2

0

��3

√

2−

��3

√

21��2

√ 1��2

√ 1��2

√

⎡⎢⎢⎢⎢⎢⎢⎣

⎤⎥⎥⎥⎥⎥⎥⎦

IaIbIc

⎡⎢⎣

⎤⎥⎦ V+

a

V+b

[ ]

= cosu sinu

−sinu cosu

[ ]︷��︸︸��︷T−1

(23)

5aKpidz+ 0.4985bKpid

5015− 0.4985aKpid

)z+ 0.49851bKpid

(18)

Kp + Ki + Kd

))+ Kd/ Kp + Ki + Kd

( )( )( )z z− 1( ) (19)


Fig. 8 Calculation of reference currents Iaref, Ibref, Icref with

a Classical p–q–r methodb Proposed p–q–r method

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The current and voltage space vectors on the p–q–r referenceframe are given by

IpIqIr

⎡⎣

⎤⎦ = 1

V+ab0

0 −V+ab0V

+b

V+ab

V+ab0V

+b

V+ab

V+ab −V+

ab0V+a

V+ab

−V+b V+

0

V+ab

V+0 V+

a V+b

⎡⎢⎢⎢⎢⎢⎢⎣

⎤⎥⎥⎥⎥⎥⎥⎦

IaIbI0

⎡⎣

⎤⎦ (24)

epeqer

⎡⎢⎣

⎤⎥⎦ = 1

V+ab0

0 −V+ab0V

+b

V+ab

V+ab0V

+b

V+ab

V+ab −V+

ab0V+a

V+ab

−V+b V+

0

V+ab

V+0 V+

a V+b

⎡⎢⎢⎢⎢⎢⎢⎣

⎤⎥⎥⎥⎥⎥⎥⎦

eaebe0

⎡⎢⎣

⎤⎥⎦

=eab00

0

⎡⎢⎣

⎤⎥⎦ (25)


where

V+ab0 =

��V+2a + V+2

b + V+20

√, V+

ab =��V+2a + V+2

b

√Conversion from α β 0 reference frame to p–q–r is discussedin [2]. ep Voltage consists of dc component epdc and accomponent epac. Fundamental component of systemvoltages is converted to epdc whereas negative sequence orharmonic components are converted to epac. Instantaneousreal power p in p–q–r reference frame is defined as thescalar product of voltage and current vectors

p = e pqri pqr = epip (26)

Instantaneous imaginary power q is obtained from crossproduct of voltage and current vectors

q = e pqr × i pqr =0

−epIrepIr

⎡⎣

⎤⎦ (27)


)

Fig. 9 Accuracy and effectiveness of the proposed p–q–r method via simulation results

a The unsymmetrical distorted phase voltages of Van, Vbn, Vcn

b Non-linear load currentsc Calculation of reference currents of Iaref, Ibref, Icref using classical p–q–r method under pure sinusoidal voltages of Van, Vbn, Vcn

d Calculation of reference currents of Iaref, Ibref, Icref using proposed p–q–r method under unsymmetrical distorted phase voltages of Van, Vbn, Vcn

e Calculation of reference currents of Iaref, Ibref, Icref using classical p–q–r method under unsymmetrical distorted phase voltages of Van, Vbn, Vcn

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It is possible to write (26) and (27) in matrix form as

pqqqr

⎡⎣

⎤⎦ =

epIp−epIrepIq

⎡⎣

⎤⎦ (28)

In (28), p, qq and qr are independent of each other. For thisreason, three current components can be controlledindependently giving rise to balancing three instantaneouspowers in turns. Hence, p–q–r method has exactly threedegrees of freedom. Pac is obtained from P as shown inFig. 8b. The displacement factor of the system currentbecomes unity, the system currents can be controlledbalanced and sinusoidal by compensating the instantaneouspower qr and the ac part of the instantaneous power P. Forthis purpose, Iaref, Ibref and Icref reference currents areobtained first from (29).

I pcIqcIrc

⎡⎣

⎤⎦ =

^

I pIq

Ir +V0

Vab

( )Ip

⎡⎢⎢⎢⎢⎣

⎤⎥⎥⎥⎥⎦ (29)

Then, reference currents Iaref, Ibref and Icref for current control


corresponding to the closed-loop control block diagram givenin Fig. 7 are obtained by inverting (24) and (23) in that order.Reference currents Iaref, Ibref, Icref given in Fig. 8 are

calculated and compared by using both classical p–q–rmethod and proposed p–q–r method for non-linear loadcurrents under distorted phase voltages in the simulationstudy given below. The unsymmetrical distorted phasevoltages are

Van(t) = Vm sin vt − 0.6912( ) + 0.09Vm sin 3vt − 2.32( )+ 0.075Vmsin 5vt − 1.47( )+ 0.05Vm sin 7vt + 1.31( ) + 0.025Vm sin 9vt + 2.16(

Vbn(t) = Vm sin vt − 0.6912( ) + 0.065Vm sin 2vt − 2.32( )+ 0.045Vmsin 4vt − 1.47( ) + 0.03Vm sin 6vt + 1.31( )

+ 0.025Vm sin 8vt + 2.16( )vt = vt − 2p

3

Vcn(t) = 1.05Vm sin vt − 0.6912( ) + 0.075Vm sin 5vt − 1.47( )+ 0.05Vm sin 7vt + 1.31( )+ 0.045Vm sin 11vt + 2.16( )

+ 0.004Vm sin 13vt + 1.01( )vt = vt − 4p

3

where Vm = 320 V and ω = 2π50 rad/s.


Fig. 10 Experimental setup and the whole system

a Experimental setupb Simplified block diagram of the whole system

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The simulation results given in Fig. 9d shows that theproposed p–q–r method overcomes the limitations of theclassical p–q–r method under distorted voltages. Accuracyand effectiveness of the proposed p–q–r method isdemonstrated via simulation results given in Fig. 9.Real-time application of the proposed p–q–r method fortwo case studies are given in Section 4.

5 Three-dimensional space vectormodulation

Upper IGBT on-times Ti where i = a, b, c, n are calculated via3D SVPWM algorithm by using PID controller output signalsUaref, Ubref and Ucref in Fig. 10b. IGBT PWM signals are


generated by using PWM modules in DSP architecture andthey are applied to gates of the power switching elementIGBT by using driving circuits. Calculation of three-phasefour-leg inverter upper IGBT on-time durations with 3DSVPWM is briefly discussed in this section and the readeris referred to corresponding reference or details. The mainsteps are listed in the following:

i. The prism containing the reference space vector Vref isobtained as shown in Fig. 4 given in [21] with the help ofUaref Ubref

[ ]Tdetermined by using

Uaref Ubref Ucref

[ ]Tin the transformation matrix given

in (19).


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ii. The tetrahedron containing Vref is determined from
Table II given in [17] by using the prism determined in theprevious step and Uaref Ubref Ucref

[ ]T.

iii. Information regarding the prism and tetrahedrondetermined in the previous steps and V 1 V 2 V 3

[ ]vectors obtained by using the table for the computation ofmatrices for duty ratio calculation in 24 tetrahedrons areused to calculate the corresponding duty ratios of theswitching vectors resulting in expressions given in (15)through (17) in [17]. The matrices used for 24 tetrahedronsduty ratio computations are used from the reference [16]and given in the Table 1 in Appendix. The reader can referto the study given in [22] for a new and simple method toidentify the tetrahedron and three adjacent non-zeroswitching vectors.

6 Experimental results

Real-time experiments were performed with the main boarddesigned based on 32-bit 150 MHz DSP TMS320F2810.Instantaneous power measurement method modified p–q–r,digital PID controller, implementation of 3D SVPWMalgorithm and PWM signal generation were realised. Athree-phase four-leg VSI whose phase voltages can becontrolled independent of each other were designed usingeight discrete IGBT IXDH 30N120D and used in order togenerate currents in desired forms. Capacitance value ofDC-line condenser was Cdc = 1410 μF, load resistance andinductance parameters were R =Rabc = 16.63 Ω and L = Labc =1.25 mH, respectively. DC-line voltage was Vdc =

��2

√220 V

and the sampling and inverter switching frequency was fs =20 kHz. The picture showing the experimental setup andsimplified block diagram of the whole system are depicted inFigs. 10a and b, respectively.

Fig. 11 Generation and validation of Iaref, Ibref and Icref reference curr


Experiments consist of two main parts:

1. Instantaneous reference currents measurement andvalidation: Instantaneous reference currents Iaref, Ibref, Icrefare calculated by using modified p–q–r theory given inSection 2 and Fig. 8b for various load types in real-time.Calculated reference currents in real-time comprised bothinstantaneous harmonic current and reactive current.Accuracy of modified p–q–r algorithm validated inreal-time is given in Fig. 11.2. Instantaneous reference currents generation usingthree-phase four-leg VSI: Iaref, Ibref and Icref referencecurrents are generated as power signals with 3D SVPWMin three-phase four-leg VSI in real-time by usingthree-phase four-leg VSI. Simulation and real-time resultsshow the validities of the PWM module model, three-phasefour-leg VSI model and the designed digital PID controller.The reference currents Iaref, Ibref, Icref are generated aspower signals Ina, Inb, Inc and can be seen in Figs. 12 and 13.

6.1 Application of modified p–q–r theory

For real-time instantaneous modified p–q–r theoryapplication, non-linear unbalanced load currents ia, ib, icwere consumed by the three-phase bridge rectifier with apurely resistive load and the R–L load between phase a andphase c (A = 0 switch off, B = 1 switch on) in theexperimental setup shown in Fig. 10b.Three-phase source voltages Va, Vb, Vc and non-linear load

currents ia, ib, ic were sampled with fs = 20 kHz samplingfrequency. These samples for each phase and referencecurrent instantaneous values obtained by modified p–q–rwere stored for one period in DSP RAM. Then, they wereused to generate figures.

ents with modified p–q–r


Fig. 12 Source voltages and currents for non-linear unbalanced load

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Instantaneous reference current values Iaref, Ibref and Icrefwere calculated using (26). All the waveforms are shown inFig. 11.The accuracy of the proposed modified p–q–r theory is

demonstrated by subtracting the calculated referencecurrents from the load currents for each phase. The results(ia− irefa), (ib− irefb) and (ic− irefc) are seen to be balancedand sinusoidal in Fig 11. Furthermore, the displacementfactor of the results is unity as proposed.

6.2 Generating of calculated reference currents

Real-time experimental studies in this section were performedfor two different types of loads in the power circuit shown inFig. 10b.

i. A non-linear unbalanced load was created as mentionedabove (A = 0 switch off, B = 1 switch on) in Fig. 10b.ii. A non-linear balanced load was created by thethree-phase bridge rectifier with a purely resistive load inFig. 10b.

Reference currents Iaref, Ibref, Icref for two load types werecalculated with modified p–q–r for every T = 50 µs and ina,inb, inc currents were generated instantaneously inthree-phase four-leg VSI based on digital PID control. Iaref,Ibref, Icref were used as reference current inputs both in the


simulation study in Fig. 7 and in the real-time applicationin Fig. 10b. In the simulations, Kp, Ki and Kd digital PIDcontroller coefficients obtained in Section 3 were used.Currents ina, inb, inc generated in real-time and currents inas,inbs, incs obtained from simulations were shown on the samefigure for comparison. In addition, images obtained by theharmonic analyser for generated current signals ina, inb, incwere provided.In Figs. 11 and 12, Va, Vb, Vc source voltages, ia, ib, ic

source load currents, reference currents Iaref, Ibref, Icrefcalculated by modified p–q–r method and ina, inb, inc denotethe currents generated by the inverter, whereas inas, inbs, incsrepresent the currents obtained from simulations with thecontrol block diagram given in Fig. 7.The following observations can be obtained from the

theoretical, simulation and real-time studies performed inthis study. Three-phase four-leg VSI model are obtained bymodelling each phase independent of each other in abcreference frame and by modelling PWM module as ZOH inthree-phase four-leg VSI for each leg. Validity of the modelis demonstrated by showing inas, inbs, incs obtained fromsimulations and ina, inb, inc obtained in real-time on thesame graphics in Figs. 12 and 13. Modelling of each phaseof three-phase four-leg VSI independent of each other inabc reference frame simplifies calculation of digital PIDcoefficients Kp, Ki and Kd significantly. Stability of theclosed-loop control system is guaranteed since all poles of


Fig. 13 Source voltages and currents for non-linear balanced load

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the characteristic equation are determined with digital PIDcoefficients according to the reference characteristicequation. Performance of the designed digital PID controlrule are shown with ina, inb, inc given in Figs. 12 and 13generated in real-time for reference inputs Iaref, Ibref, Icref.Modified p–q–r instantaneous power measurement method

has three degrees of freedom. Ipc, Iqc, Irc are calculatedaccording to (29) in p–q–r reference frame and Iaref, Ibrefand Icref reference currents are obtained via transformationin abc frame. Fig. 11 shows that the currents generated foreach phase are balanced, sinusoidal and the displacementfactor of the system is unity.The performance of the classical p–q–r theory under

non-ideal mains voltages is improved and accuracy ofproposed modified p–q–r theory is demonstrated bothsimulation and real-time application.IGBT on-time durations are calculated for three-phase

four-leg inverter with 3D SVPWM and driving signals aregenerated by PWM circuits. There is no detailed discussionon 3D SVPWM but the related references are given.

7 Conclusions

In this study modified p–q–r theory based digital currentcontrol in three-phase four-leg VSI was proposed. Theperformance of the classical p–q–r theory under non-idealmains voltages is improved and accuracy of proposedmodified p-q-r theory is demonstrated both simulation and


real-time application. Three-phase four-leg VSI powercircuit and PWM modules were modelled in abc referenceframe such that each phase is independent of each other.Hence, digital PID design becomes simple. The referencecurrents obtained by modified p–q–r theory with threedegrees of freedom were generated by using 3D SVPWMwith digital PID control rule in three-phase four-leg VSI.It was shown that the displacement factor of the system

current becomes unity when the calculated currentsobtained using modified p–q–r theory is subtracted from theload currents, it is balanced and sinusoidal. The simpleDSP-based digital current control method that is applicablein real-time was discussed in detail.

8 Acknowledgment

This work is supported by the Scientific and TechnologicalResearch Council of Turkey (TUBITAK) under Projectnumber 107E165.

9 References

1 Akagi, H., Kanazawa, Y., Nabae, A.: ‘Instantaneous reactive powercompensators comprising switching devices with out energy to ragecomponents’, IEEE Trans. Ind. Appl., 1984, IA-20, pp. 625–630

2 Akagi, H., Kim, H.: ‘The instantaneous power theory on the rotatingp-q-r- reference frames’, in Proc. IEEE PEDS, 1999, vol. 1, pp. 422–427


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3 Aredes, M., Akagi, H., Watanabe, E.H., Salgado, E.V., Encarnação, L.F.:
‘Comparisons between the p-q and p-q-r theories in three-phase four-wiresystems’, IEEE Trans. Power Electron., 2009, 24, (4), pp. 924–933

4 Kim, H., Blaabjerg, F., Jensen, B., Choi, J.: ‘Instantaneous powercompensation in three-phase systems by using p-q-r theory’, IEEETrans. Power Electron., 2002, 17, (5), pp. 701–710

5 Kim, H., Blaabjerg, F., Bak-Jensen, B.: ‘Spectral analysis ofinstantaneous powers in single phase and three-phase systems withuse of p-q-r theory’, IEEE Trans. Power Electron., 2002, 17, (5),pp. 711–720

6 Rachmildha, T.D., Llor, A., Fadel, M., Dahono, P.A., Haroen, Y.:‘Comparison of direct power control with hybrid approach on 3-phase4-wire active power filter between p-q-0 and p-q-r power theory’.IEEE Int. Industrial Electronics (ISIE 2008), 2008, pp. 2270–2275

7 Dong, G., Ojo, O.: ‘Current regulation in four-leg voltage-sourceconverters’, IEEE Trans. Ind. Electron., 2007, 54, (4), pp. 2095–2105

8 Li, X., Deng, Z., Chen, Z., Fei, Q., Chen, X.: ‘A neutral legindependently controlled current-regulated delta modulator for four-legswitching power amplifier’. Proc. PEMD, 2010, pp. 1–5

9 George, V., Mishra, M.K.: ‘User-defined constant switching frequencycurrent control Strategy for a four-leg inverter’, IET Power Electron.,2009, 2, (4), pp. 335–345

10 Rodriguez, J., Wu, B., Rivera, M., Rojas, C., Yaramasu, V., Wilson, A.:‘Predictive current control of three-phase two-level four-leg inverter’.Proc. EPE-PEMC, 2010, pp. 106–110

11 Mendalek, N.: ‘Modeling and control of three-phase four-legsplit-capacitor shunt active power filter’. Proc. ACTEA, 2009, pp. 121–126

12 Gous, M.G.F., Beukes, H.J.: ‘Sliding mode control for a three-phaseshunt active power filter utilizing a four-leg voltage source inverter’.Proc. PESC, 2004, pp. 4609–4615

13 Mendalek, N., Al-Haddad, K., Kanaan, H.Y., Hassoun, G.: ‘Slidingmode control of three-phase four-leg shunt active power filter’. PowerElectronics Specialists Conference, 2008. PESC 2008. IEEE,pp. 4362–4367


14 Kanaan, H.Y., Al-Haddad, K.: ‘Averaged-model-based nonlinearcontrol of a PWM three-phase four-leg shunt active power filter’.Proc. CCECE, 2007, pp. 1002–1005

15 Xiaogang, W., Yunxiang, X., Dingxin, S.: ‘Three-phase four-leg activepower filter based on nonlinear optimal predictive control’. Proc. CCC,2008, pp. 217–222

16 Zhang, R., Prasad, V.H., Boroyevich, D., Lee, F.C.: ‘Three-dimensionalspace vector modulation for four-leg voltage-source converters’, IEEETrans. Power Electron., 2002, 17, (3), pp. 314–326

17 Zhou, L., Luo, M., Zhou, L., Zhou, X., Ye, Y.: ‘Application of a four-legASVG based on 3D SVPWM in compensating the harmful currents ofunbalanced system’. Proc. Powercon, 2002, pp. 1045–1050

18 Vechiu, I., Curea, O., Camblong, H., Ceballos, S., Villate, J.L.: ‘Digitalcontrol of a three-phase four-leg inverter under unbalanced voltageconditions’. Proc. IECON, 2000, pp. 1–10

19 Zhang, X., Wang, J., Li, C.: ‘Three-phase four-leg inverter based onvoltage hysteresis control’. Proc. ICECE, 2010, pp. 4482–4485

20 dos Santos, E.C.Jr., Jacobina, C.B., Rocha, N., Dias, J.A.A., Correa, M.B.R.: ‘Single-phase to three-phase four-leg converter applied todistributed generation system’, IET Power Electron., 2010, 3, (6),pp. 892–903

21 Sawant, R.R., Chandorkar, M.C.: ‘A multifunctional four-leggrid-connected compensator’, IEEE Trans. Ind. Appl., 2009, 45, (1),pp. 249–2599

22 Li, X., Deng, Z., Chen, Z., Fei, Q.: ‘Analysis and simplification ofthree-dimensional space vector pwm for three-phase four-leginverters’, IEEE Trans. Ind. Electron., 2011, 58, pp. 450–464

10 Appendix

See Table 1


Table 1 Matrices for duty ratio computation

Tetrahedron prism 1 2 3 4

I V1:pnnn V1:pnnn V1:pnnn V1:pnnpV2:pnnp V2:ppnn V2:ppnn V2:ppnpV3:ppnp V3:ppnp V3:pppn V3:nnnp

1 0 112

−��3

√

2−1

0��3

√0

⎡⎢⎢⎣

⎤⎥⎥⎦ 3

2−

��3

√

20

−12

��3

√

21

12

��3

√

2−1

⎡⎢⎢⎢⎢⎢⎢⎣

⎤⎥⎥⎥⎥⎥⎥⎦

32

−��3

√

20

0��3

√0

−12

−��3

√

21

⎡⎢⎢⎢⎢⎣

⎤⎥⎥⎥⎥⎦

32

−��3

√

20

0��3

√0

−1 0 −1

⎡⎢⎢⎣

⎤⎥⎥⎦

II V1:ppnn V1:ppnp V1:ppnn V1:ppnpV2:ppnp V2:npnn V2:npnn V2:npnpV3:npnn V3:npnp V3:pppn V3:nnnp

1 0 112

��3

√

2−1

−32

��3

√

20

⎡⎢⎢⎢⎢⎣

⎤⎥⎥⎥⎥⎦

32

��3

√

20

−12

��3

√

21

−1 0 −1

⎡⎢⎢⎢⎢⎣

⎤⎥⎥⎥⎥⎦

32

��3

√

20

−32

��3

√

20

−12

−��3

√

21

⎡⎢⎢⎢⎢⎢⎢⎣

⎤⎥⎥⎥⎥⎥⎥⎦

32

��3

√

20

− 32

��3

√

20

12

−��3

√

2−1

⎡⎢⎢⎢⎢⎢⎢⎣

⎤⎥⎥⎥⎥⎥⎥⎦

III V1:npnn V1:npnn V1:npnn V1:npnpV2:npnp V2:nppn V2:nppn V2:npppV3:nppp V3:nppp V3:pppn V3:nnnp

− 12

��3

√

21

12

��3

√

2−1

− 32

−��3

√

20

⎡⎢⎢⎢⎢⎢⎢⎣

⎤⎥⎥⎥⎥⎥⎥⎦

0��3

√0

−12

−��3

√

21

−1 0 −1

⎡⎢⎢⎣

⎤⎥⎥⎦

0��3

√0

−32

−��3

√

20

1 0 1

⎡⎢⎢⎣

⎤⎥⎥⎦

0��3

√0

− 32

−��3

√

20

12

−��3

√

2−1

⎡⎢⎢⎢⎢⎣

⎤⎥⎥⎥⎥⎦

IV V1:nppn V1:nppp V1:pnnn V1:nnnpV2:nppp V2:nnpn V2:pnnp V2:nnppV3:nnpn V3:nnpp V3:ppnp V3:nnnp

−12

��3

√

21

−1 0 −10 − ��

3√

0

⎡⎢⎢⎣

⎤⎥⎥⎦

−32

��3

√

20

−12

−��3

√

21

12

−��3

√

2−1

⎡⎢⎢⎢⎢⎢⎢⎣

⎤⎥⎥⎥⎥⎥⎥⎦

− 32

��3

√

20

0 − ��3

√0

1 0 1

⎡⎢⎢⎣

⎤⎥⎥⎦

−32

��3

√

20

0 − ��3

√0

12

��3

√

2−1

⎡⎢⎢⎢⎢⎣

⎤⎥⎥⎥⎥⎦

V V1:nnpn V1:nnpn V1:nnpn V1:nnnpV2:nnpp V2:pnpn V2:pnpn V2:nnppV3:pnpp V3:pnpp V3:pppn V3:nnnp

− 12

−��3

√

21

−1 0 −132

−��3

√

20

⎡⎢⎢⎢⎢⎣

⎤⎥⎥⎥⎥⎦

−32

−��3

√

20

1 0 112

−��3

√

2−1

⎡⎢⎢⎢⎢⎣

⎤⎥⎥⎥⎥⎦

−32

−��3

√

20

32

−��3

√

20

−12

��3

√

21

⎡⎢⎢⎢⎢⎢⎢⎣

⎤⎥⎥⎥⎥⎥⎥⎦

− 32

−��3

√

20

32

−��3

√

20

12

��3

√

2−1

⎡⎢⎢⎢⎢⎢⎢⎣

⎤⎥⎥⎥⎥⎥⎥⎦

VI V1:pnpn V1:pnpp V1:pnpn V1:pnppV2:pnpp V2:pnnn V2:pnnn V2:pnnpV3:pnnn V3:pnnp V3:pppn V3:nnnp

− 12

−��3

√

21

12

−��3

√

2−1

32

��3

√

20

⎡⎢⎢⎢⎢⎢⎢⎣

⎤⎥⎥⎥⎥⎥⎥⎦

0 − ��3

√0

1 0 112

��3

√

2−1

⎡⎢⎢⎣

⎤⎥⎥⎦

0 − ��3

√0

32

��3

√

20

− 12

��3

√

21

⎡⎢⎢⎢⎢⎣

⎤⎥⎥⎥⎥⎦

0 − ��3

√0

32

��3

√

21

−1 0 −1

⎡⎢⎢⎣

⎤⎥⎥⎦

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