performance bounds for hybrid flow lines: fundamental behavior, practical features and application...
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Performance Bounds for Hybrid Flow Lines: Fundamental Behavior, Practical Features and Application to Linear Cluster Tools. Kyungsu Park and James R. Morrison Industrial and Systems Engineering IEEE CASE 2012 – August 20 – 24, 2012 – Seoul, South Korea. Presentation Overview. Motivation - PowerPoint PPT PresentationTRANSCRIPT
©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 1
Performance Bounds for Hybrid Flow Lines:Fundamental Behavior, Practical Features and Application to Linear Cluster Tools
Kyungsu Park and James R. Morrison
Industrial and Systems Engineering
IEEE CASE 2012 – August 20 – 24, 2012 – Seoul, South Korea
©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 2
Presentation Overview
• Motivation
• System Description: Hybrid Flow Lines
• Upper Bound on Completion Times
• Application to Linear Cluster Tools
• Concluding Remarks
©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 3
Motivation: Flow Line Application
• It is common to abstract intractable problem to simple one
• Flow line can be used as model for manufacturing systems
• Application– Automobile assembly plants[A. Agnetis et. al. 1997]
– Printed wiring board assembly[T. Sawik 2002]
– Printed circuit board (PCB) manufacturing[S. Piramuthu et. al. 1994, R. Wittrock 1985, 1988]
– Design of a printer production line in Hewlett-Packard[M. Burman et. al. 1998]
• Using [Gershwin 1987] and [Dallery, David, and Xie 1988]• $280 million in printer shipments and additional revenues• Determine how much buffer space is needed with approximate decomposi-
tion method– Semiconductor equipment modeling and control[S. Abspoel et. al. 2000]
©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 4
Motivation: Semiconductor Wafer Manufacturing
• Global revenue in 2010: US $ 304 Billion+[1]
• High construction cost for fabricator: US $ 5 Billion+[2]
• Cluster tools– Capital equipment in semiconductor manufacturing– Clustered photolithography tools: US $ 20 Million+
• Typically the bottleneck of the fabricator• Key yield and cycle time contributor
• Accurate, expressive, practical and computationally tractable equipment models for fab-level simulation should be developed
[1] HIS iSuppli April 2011 [2] Elpida Memory, Inc., available at http://www.eplida.com [3] http://www.rocelec.com/manufacturing/wafer_fabrication/ [4] http://www.portlandtribune.com/news/print_story.php?story_id=123429419318201800[5] “Immersion Lithography: Photomask and Wafer-Level Materials,”Roger H. French and Hoang V. Tran. Annual Review of Materials Research, Vol. 39, 93-126.
[3] [5][4]
©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 5
Motivation: Flow Line Theory
• No results for completion times with multiple classes of customers and multi servers
Process Time PaperClass of cus-
tomerSingle/
Multi serverExact/Bounds
/ApproximationSetup
ConsideredPerformance
metric Etc
Random
Lau (1986) Single class Single server Exact No setup Throughput 2 servers
Hildebrand (1956) Single class Single server Exact No setup Throughput 3 servers
Mute (1973) Single class Single server Bound No setup Throughput 2 or 3 servers
Gershwin ( 1987) Single class Single server Approximation No setup Throughput Random failures
Deterministic
B. Avi-Itzhak (1965) Single class Single server Exact No setup Exit time Infinite buffer be-fore 1st process
Altiok and Kao (1989) Single class Single server Exact No setup Exit time finite buffer before 1st process
J. Morrison (2010) Single class Single serverExact
(Decomposition method)
Setup Exit time State-dependent setup considered
K. Park et. al (2010) Single Class Multi servers Upper Bound No setup Exit time
J. Morrison (2011) Proportional multi class Single server Exact Setup Exit time Proportional
multi class
This Paper (2012) Multi class Multi servers Upper Bound Setup Exit time
©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 6
System Description: Hybrid Flow Lines
• One module can hold at most one wafer• Wafer advance: Service complete & module for next process available• Buffers can be modeled as a process module with zero process time• Multi class of customer• No overtaking (One process can hold only one class)
Question:• Can we develop an intuitive description of exit times? • Can we reduce the computation?
©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 7
System Description: Hybrid Flow Lines
• EEEs (Elementary Evolution Equations)– Xw,m: entry time of wafer w to process m – c(w): class of wafer w– tc(w)
m: service time of wafer w for process Pm
– R(m): number of parallel modules for process m
©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 8
System Description: Hybrid Flow Lines
• Single customer class:
• Multi customer class:– R’(m) = R(m) if class does not change– R’(m) = 1 if class changes
Xw,m = max { Xw,m-1 + τc(w)m-1 , Xw-R(m),m+1}
Wafer is ready to enter
Process is available
Xw,m = max { Xw,m-1 + τc(w)m-1 , Xw-R’(m),m+1, Xw-1,m}
Preventing over-taking
©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 9
• E(w): the completion time of wafer w from the system• aw: arrival time of wafer w
• Proof: using Max-plus algebra
Upper Bound on Completion Times
For a hybrid multiclass flow line without overtaking,
with the initial conditions E(w) = -∞ for w ≤ 0.
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Theorem 1: Upper Bound on Completion Times
©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 10
Upper Bound on Completion Times: Proof
©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 11
Upper Bound on Completion Times
• Example– Constant process time regardless of class
• Upper Bound on Completion Times– If c(w)≠c(w-1), thus class changes,
– If not,
t1
t2
)1(,)3(,)2(,max)( 2121 wEwEwEawE w tttt
),max()1(,max)( 2121 tttt wEawE w
©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 12
Upper Bound on Completion Times
• Example: c(w)=c(w-1)
t1
t2
)1(,)3(,)2(,max)( 2121 wEwEwEawE w tttt
No contention inside the system
©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 13
Upper Bound on Completion Times
• Example: c(w)=c(w-1)
t1
t2
)1(,)3(,)2(,max)( 2121 wEwEwEawE w tttt
Last contention of wafer w at process 1 with wafer (w-2)
©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 14
Upper Bound on Completion Times
• Example: c(w)=c(w-1)
t1
t2
)1(,)3(,)2(,max)( 2121 wEwEwEawE w tttt
Last contention of wafer w at process 2 with wafer (w-3)
©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 15
Upper Bound on Completion Times
• Example: c(w)=c(w-1)
t1
t2
)1(,)3(,)2(,max)( 2121 wEwEwEawE w tttt
Preventing overtaking
©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 16
Upper Bound on Completion Times
• Example: c(w)=c(w-1)
)1(,60)3(,20)2(,80max)( wEwEwEawE w
210]200,60140,20190,80120max[
)4(,60)2(,20)3(,80max)5( 5
EEEaE
Wafer5
Arrive120sec
t1=20sec
t2=60sec
Wafer4
?
Wafer1
?
Wafer2
?
Wafer3
?
©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 17
Upper Bound on Completion Times
• Add new variable P(w,k) to describe setup conditions(e.g. process setups, module setups and state-dependent setups)
For a hybrid multiclass flow line with setups,
with the initial conditions E(w)=-∞ for w≤0.
Theorem 2: Upper Bound on Completion Times
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The bound of Theorem 1 cannot be improved to strict equality.
Proposition 1: Inequality of Theorem 1
Please refer to the paper for other lemmas and corollaries
©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 18
Application to Linear Cluster Tools
• Accurate, expressive, practical and computationally tractable equipment models for fab-level simulation should be developed
• Circular Cluster Tools– Much effort has been devoted
• Here, we develop a model for linear cluster tools
Robot Type Model Type Include Ro-bot
Include Transient Pe-riod
Perkinson et al. (1994)
Single-arm Expressive modelY Y (Only for serial tool)
Dawande et al. (2007) Y NWood (1996) △ △
Wu et al. (2008) Petri nets Y YDawande et al. (2007)
Dual-arm Expreessive model Y NVenkatesh et al. (1997) Y N
Kim et al. (2003) Petri nets Y NJacobs et al. (2003) Single-arm/Dual-arm Expressive model N N
Kohn and Rose (2011) N N
©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 19
Application to Linear Cluster Tools
• Linear Cluster Tools
– Connected in a linear flow– Consist of a collection of paired process chambers (“links”)– Each link has its own wafer transport robot
FOUPar-
rives
1a. CVD300s
1b. CVD300s
FOUPexits
2a. PVD120s
2b. CVD120s
1c. CVD300s
1d. CVD300s
3. PVD60s
4. PVD60s
5. PVD60s
6. PVD60s
Rolling setups to reduce first wafer delay are introduced.2009, Radloff et. al.
Robotic scheduling for steady state is studied. 2007, Yi et. al.
New flexible tool configuration is proposed by BlueShift Tech.2007, Meulen
©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 20
Application to Linear Cluster Tools
Linear Cluster Tool
Include “Robotic Overhead” (based on scheduling from [2007, Yi et. al.])
Incorporate rolling setups
Upper bound on completion times for rolling setups
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Approximation: Exit times from a linear cluster tool (APPX)
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Flow Line ModelAbstract
©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 21
Application to Linear Cluster Tools: Simulation Results
• Compare with detailed simulation– Detailed simulation can be treated as upper bound of optimality– 4 different wafers/lot (W = 3, 5, 10, 24)– Average train size is 3 (T = 3)– Setup duration: Uniform [100,300] – 18,000 lots x 20 replications
• Throughput: number of complete wafers per hour
3 5 10 24Detailed 10.60 7.17 4.13 1.87
APPX 9.80 6.89 3.99 1.83Error 7.59% 3.93% 3.42% 2.47%
Detailed 1.13 1.54 1.38 0.69APPX 1.67 1.56 1.32 2.68
Throughput (lots/hour)Wafers per Lot
JITMean
StandardDeviation
3 5 10 24Detailed 16.05 26.08 48.74 115.31
APPX 0.13 0.22 0.43 1.06Ratio 123.96 120.26 112.79 108.38
Computation Time (sec)Wafers per Lot
JIT
©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 22
Concluding Remarks
• Develop a model for hybrid flow lines with multiple customer classes and no overtaking– Obtain an upper bound on departure times– Extend these ideas and results for a general class of setups
• With an application to linear cluster tools– Obtain bounds on hybrid flow lines with rolling setups and develop approximations for
linear cluster tools– JIT throughput estimation with about 5% error and 100 times less computation than de-
tailed simulation
• Future direction– Compare the performance with circular cluster tools– Identify classes of systems for which the bounds achieve equality– Obtain a lower bound on departure times
©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 23
Flow Line Models
• Accuracy of Flow Line Models
– Control of cluster tool robot:• Robot essential: Petri net, MIP models, etc.
– Throughput of clustered photolithography tools?• Robot overhead can be incorporated into process times• Bottleneck behavior dictates throughput
Flow Line Models
=Cluster Tools
?
©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 24
Flow Line Models
• Throughput of cluster tools:
– Good robot policy provides bottleneck throughput – Typical robot overhead is small and easy to include– Practical study: 0.5% throughput error and 3% cycle time error (Morrison 2011)
– Cycle time estimation for cluster tools (Park and Morrison 2011)
Configura-tion Flow line APPX
Tool 1 Serial 3.11 0.11Tool 2 Parallel 10.10 0.60Tool 3 Mixed 2.24 0.08
< Cycle time estimation error>