pentagonal group standard bipolar process. history of semiconductor evolved rapidly over the past 50...
TRANSCRIPT
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Pentagonal Group
Standard Bipolar Process
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HISTORY of SEMICONDUCTOR
• Evolved rapidly over the past 50 years
• 1st practical analog integrated circuits appeared in 1960
• Very simple, slow, and inefficient
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PROCESSES
• Standard bipolar
• Polysilicon-gate CMOS
• Analog BICMOS
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STANDARD BIPOLAR(1/2)
• 1st analog integrated circuit process
• Produced many classic devices over the years– 741 op-amp– 555 timer– 431 voltage reference
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STANDARD BIPOLAR(2/2)
• Seldom used for new designs
• Knowledge from standard bipolar will never become obsolete
• Same devices, parasitic mechanisms, design tradeoffs, layout principles
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ESSENTIAL FEATURES(1/2)
• Shaped to optimize the NPN at the expense of the PNP transistors
• NPN will outperform PNP bye more then 2:1
• Early processes optimized NPN and avoided PNP transistors altogether
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ESSENTIAL FEATURES(2/2)
• Employs junction isolation(JI)
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JI DRAWBACKS
• Reverse-biased JIs exhibit enough capacitance to slow the operation of many circuits
• High temperatures can cause significant leakage currents
• Unusual operating conditions can forward bias the JIs and inject minority carriers into the substrate
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JI ADVANTAGES
• Successfully fabricate most circuits
• Considerably cheaper than any of its alternatives
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Fabrication Sequence
• Starting material– Lightly doped (111)– P-type substrate– Parasitic PMOS
transistor– Thick-field
threshold
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N-Buried Layer
• NBL mask• Ion implantation or thermal deposition• Arsenic or Antimony• Discontinuity
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Epitaxial Growth
• 25m of n-type epi• 45º discontinuity propagation• NBL shadow• Lateral shift = thickness of epi
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Isolation Diffusion
• Isolation mask• Heavy boron deposition followed by high
temp• Oxidation occurs
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Deep-N+ (sinker)
Final Junction depths Increased tank
breakdown voltage
• Deep-N+ mask• Heavy Phosphorous
deposition • NBL diffuses
upwards• Overdrive by 25%
– Increases doping– Reduces vertical
resistance– Forms thick field oxide
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Base Implant
• Base mask• Light boron implant counterdopes n-epi• Oxide grown re-used• BOI – base over-isolation
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Emitter Diffusion
• Emitter mask• Phosphorous deposition• Oxide film
– Dry oxidation– Wet oxidation
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Contact
• Contact mask• Etched to expose bare silicon• Contact OR (oxide removal)
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Metallization
• Metal mask• Aluminum-copper-silicon alloy (2% Si & .5% Cu)• 10kÅ (1.0m) thick• Metal mask
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Protective Overcoat (PO)
• Compressive nitride PO• Phosphosilicate-doped glass (PSG)• PO mask• Special etch
Base diff
Emitter diff
BOI
P isolation
10kÅ (1.0m)
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Standard Bipolar Applications
Fabrication process for:Bipolar NPN transistors
Two types of PNP transistors:
Substrate + Lateral
Diffused resistors
Capacitors
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NPN Transistors(1/2)Composed of:• Collector, placed in the N-epi. Tank• Emitter + Base, described earlier• Characteristics: MOV, EBW
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Characteristics(2/2)
• Maximum Operating Voltage, up to (50 – 80v)
• Effective Base Width: E & B width• Diode formation: CB Shorted Diode• B & C for anode, E for Cathode• Drawbacks: Low breakdown VEBO • Alternative: Act as a Zener diode• NPN is the best to be designed by this
process and shows a good performance
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Substrate PNP Transistor
• Previous process can not be used to form isolated PNP transistor
• Requiring P-type tank
• Substrate as Collector
• Base consist of N-tank
• Emitter = Base diff!
• No Deep (N+) diff.
or NBL
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Lateral PNP Transistor
• Another substitute for the isolated PNP• Collector and Emitter regions consist of
Base diff. formed into an N-tank• E & C are self-align as only 1 masking
process forms both regions
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Resistors(1/4)
• Based on Characteristics Sheet resistance principle:resistance measured across a square of the material connected on opposite sides (Ω / ѝ)
• Diffusion causes non uniform doping• 3 types of resistors:
Base ResistorEmitter ResistorPinch Resistor
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Base Resistor(2/4)
• Ranges from 150 to 250 (Ω/ѝ)
• Consists of a strip of B diffusion isolated by an N-tank that will reverse bias the B epi. junction
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Emitter Resistor(3/4)
•A strip of E diff. Isolated by B diff. enclosed within the N-tank•B region to reverse bias E-B junc.•E sheet resistance less than 10 (Ω/ѝ)
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Pinch Resistor (4/4)• Combination of B & E diffusions• Resistor’s body consist of B diff. below
the E plate (Pinched Base)• Thin and lightly doped and resistance may
exceed 5000 (Ω/ѝ)
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Capacitor (1/2)
• Thick oxide layers prevent fabricating capacitors, except when fabricating the Junction Capacitor where the depletion region of a base-emitter junction exhibits a capacitance of 0.8fF/μm2 . The emitter plate must be biased positively with respect to the base plate to maintain a reverse bias across the emitter-base junction.
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Capacitor (2/2)
• The Base diffusion overlaps the Emitter diffusion and both are placed in a common tank.
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Process Extensions
• Up-down Isolation
• Double-level Metal
• Schottky diodes
• High Sheet Resistors
• Super-beta Transistors
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Up-down Isolation (1/2)
P-iso
N-epi
P-subs
PBL
N-tank
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Up-down Isolation (2/2)
• Advantages– Saves space over Top-down isolation– Up to 15-20% of die area
• Disadvantages– PBL implant dose limited
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Double-level Metal
• Advantages– Reduces die area by 30% over single-level metal– Allows component standardization
• Disadvantages– Requires two extra masks: vias and metal-2– P-Buried Layer (PBL) requires additional steps– Costly
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Schottky Diodes (1/3)
• Silicidation and refractory barrier metallization
• Requires additional masking step
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Schottky Diodes (2/3)
Deep-N+
Emitter
NBL
Contact
Schottky oxide
cut
Tank
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Schottky Diodes (3/3)
Contact
Cathode Anode
P-subsP-subs
Deep-N+ Iso
Emitter
Base (BOI)
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High Sheet Resistors
• Compensates for base diffusion and pinch resistor
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High Sheet Resistor
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Super-beta Transistors
• Beta increased by narrowing base width
• Betas of 1000 to 3000
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Reference
• The Art of Analog Layout, Alan Hastings