peel-strength test results_appendix d
TRANSCRIPT
P e e l - S t r e n g t h T e s t r e s u l t s o f P V c e l l s s o l d e r e d w i t h S n - 3 . 0 A g - 0 . 5 C u R i b b o n
A p p e n d i x D 94 | P a g e
Figure C-1: Sample 03 – Soldered at 360°C
(a) 03-A Front
Maximum Load = 0.502 N
Failure mode – Paste peel-off, Wafer breakage
(b) 03-A Back
Maximum Load = 0.402 N
Failure mode – Wafer breakage
(c) 03-B Front
Maximum Load = 0.268 N
Failure mode – Paste peel-off
(d) 03-B Back
Maximum Load = 0.691 N
Failure mode – Paste peel-off, Wafer breakage
P e e l - S t r e n g t h T e s t r e s u l t s o f P V c e l l s s o l d e r e d w i t h S n - 3 . 0 A g - 0 . 5 C u R i b b o n
A p p e n d i x D 95 | P a g e
(a) 04-A Front
Maximum Load = 0.712 N
Failure mode – Wafer breakage
(b) 04-A Back
Maximum Load = 0.317 N
Failure mode – Wafer breakage
(c) 04-B Front
Maximum Load = 0.441 N
Failure mode – Wafer chipping, Wafer breakage
(d) 04-B Back
Maximum Load = 0.709 N
Failure mode – Wafer chipping, Wafer breakage
Figure C-2: Sample 04 – Soldered at 360°C
P e e l - S t r e n g t h T e s t r e s u l t s o f P V c e l l s s o l d e r e d w i t h S n - 3 . 0 A g - 0 . 5 C u R i b b o n
A p p e n d i x D 96 | P a g e
(a) D9-3-A Front
Maximum Load = 1.588 N
Failure mode – Paste peel-off, Wafer chipping
(b) D9-3-A Back
Maximum Load = 0.983 N
Failure mode – Paste peel-off
(c) D9-3-B Front
Maximum Load = 0.781 N
Failure mode – Paste peel-off
(d) D9-3-B Back
Maximum Load = Incorrect
Failure mode – Paste peel-off
Figure C-3: Sample D9-3 – Soldered at 360°C
P e e l - S t r e n g t h T e s t r e s u l t s o f P V c e l l s s o l d e r e d w i t h S n - 3 . 0 A g - 0 . 5 C u R i b b o n
A p p e n d i x D 97 | P a g e
(a) D9-15-A Front
Maximum Load = 2.187 N
Failure mode – Wafer breakage
(b) D9-15-A Back
Maximum Load = 0.854 N
Failure mode – Paste peel-off, Wafer breakage
(c) D9-15-B Front
Maximum Load = 2.167 N
Failure mode – Wafer breakage
(d) D9-15-B Back
Maximum Load = 1.656 N
Failure mode – Paste peel-off, Wafer breakage
Figure C-4: Sample D9-15 – Soldered at 360°C
P e e l - S t r e n g t h T e s t r e s u l t s o f P V c e l l s s o l d e r e d w i t h S n - 3 . 0 A g - 0 . 5 C u R i b b o n
A p p e n d i x D 98 | P a g e
(a) D9-19-A Front
Maximum Load = 1.164 N
Failure mode – Paste peel-off, Wafer chipping
(b) D9-19-A Back
Maximum Load = 1.239 N
Failure mode – Paste peel-off
(c) D9-19-B Front
Maximum Load = 0.865 N
Failure mode – Paste peel-off, Paste breakage
(d) D9-19-B Back
Maximum Load = 0.565 N
Failure mode – Paste breakage
Figure C-5: Sample D9-19 – Soldered at 360°C
P e e l - S t r e n g t h T e s t r e s u l t s o f P V c e l l s s o l d e r e d w i t h S n - 3 . 0 A g - 0 . 5 C u R i b b o n
A p p e n d i x D 99 | P a g e
(a) 01-A Front
Maximum Load = 0.554 N
Failure mode – Wafer breakage
(b) 01-A Back
Maximum Load = 0.427 N
Failure mode – Wafer breakage
(c) 01-B Front
Maximum Load = 0.326 N
Failure mode – Wafer breakage
(d) 01-B Back
Maximum Load = 1.34 N
Failure mode – Wafer breakage
Figure C-6: Sample 01 – Soldered at 380°C
P e e l - S t r e n g t h T e s t r e s u l t s o f P V c e l l s s o l d e r e d w i t h S n - 3 . 0 A g - 0 . 5 C u R i b b o n
A p p e n d i x D 100 | P a g e
(a) 02-A Front
Maximum Load = Incorrect
Failure mode – Wafer breakage, Wafer chipping
(b) 02-A Back
Maximum Load = Incorrect
Failure mode – Wafer Breakage, Paste breakage
(c) 02-B Front
Maximum Load = 0.826 N
Failure mode – Wafer breakage
(d) 02-B Back
Maximum Load = 0.618 N
Failure mode – Wafer breakage
Figure C-7: Sample 02 – Soldered at 380°C
P e e l - S t r e n g t h T e s t r e s u l t s o f P V c e l l s s o l d e r e d w i t h S n - 3 . 0 A g - 0 . 5 C u R i b b o n
A p p e n d i x D 101 | P a g e
(a) D9-9-A Front
Maximum Load = 0.328 N
Failure mode – Paste peel-off, Paste breakage
(b) D9-9-A Back
Maximum Load = 0.477 N
Failure mode – Paste peel-off, Paste breakage
(c) D9-9-B Front
Maximum Load = 0.552 N
Failure mode – Paste peel-off, Paste breakage
(d) D9-9-B Back
Maximum Load = 0.46 N
Failure mode – Paste peel-off, Paste breakage
Figure C-8: Sample D9-9 – Soldered at 380°C
P e e l - S t r e n g t h T e s t r e s u l t s o f P V c e l l s s o l d e r e d w i t h S n - 3 . 0 A g - 0 . 5 C u R i b b o n
A p p e n d i x D 102 | P a g e
(a) D9-26-A Front
Maximum Load = 0.287 N
Failure mode – Paste peel-off, Paste breakage
(b) D9-26-A Back
Maximum Load = 1.763 N
Failure mode – Paste peel-off, Paste breakage
(c) D9-26-B Front
Maximum Load = Incorrect
Failure mode – Paste peel-off
(d) D9-26-B Back
Maximum Load = Incorrect
Failure mode – Paste peel-off, Paste breakage
Figure C-9: Sample D9-26 – Soldered at 380°C
P e e l - S t r e n g t h T e s t r e s u l t s o f P V c e l l s s o l d e r e d w i t h S n - 3 . 0 A g - 0 . 5 C u R i b b o n
A p p e n d i x D 103 | P a g e
(a) D9-61-A Front
Maximum Load = 0.177 N
Failure mode – Paste breakage
(b) D9-61-A Back
Maximum Load = 1.146 N
Failure mode – Paste peel-off
(c) D9-61-B Front
Maximum Load = 2.1 N
Failure mode – Paste breakage
(d) D9-61-B Back
Maximum Load = 1.553 N
Failure mode – Paste peel-off
Figure C-10: Sample D9-61 – Soldered at 380°C
P e e l - S t r e n g t h T e s t r e s u l t s o f P V c e l l s s o l d e r e d w i t h S n - 3 . 0 A g - 0 . 5 C u R i b b o n
A p p e n d i x D 104 | P a g e
(a) 05-A Front
Maximum Load = 0.711 N
Failure mode – Wafer chipping, Wafer breakage
(b) 05-A Back
Maximum Load = 0.799 N
Failure mode – Wafer chipping, Wafer breakage
(c) 05-B Front
Maximum Load = 1.022 N
Failure mode – Wafer chipping, Wafer breakage
(d) 05-B Back
Maximum Load = 0.883 N
Failure mode – Wafer chipping, Wafer breakage
Figure C-11: Sample 05 – Soldered at 400°C
P e e l - S t r e n g t h T e s t r e s u l t s o f P V c e l l s s o l d e r e d w i t h S n - 3 . 0 A g - 0 . 5 C u R i b b o n
A p p e n d i x D 105 | P a g e
(a) 06-A Front
Maximum Load = 0.556 N
Failure mode – Paste breakage, Wafer breakage
(b) 06-A Back
Maximum Load = 0.349 N
Failure mode – Paste breakage
(c) 06-B Front
Maximum Load = 0.6 N
Failure mode – Wafer breakage
(d) 06-B Back
Maximum Load = 0.382 N
Failure mode – Wafer breakage
Figure C-12: Sample 06 – Soldered at 400°C
P e e l - S t r e n g t h T e s t r e s u l t s o f P V c e l l s s o l d e r e d w i t h S n - 3 . 0 A g - 0 . 5 C u R i b b o n
A p p e n d i x D 106 | P a g e
(a) D10-9-A Front
Maximum Load = 0.129 N
Failure mode – Paste peel-off, Wafer chipping
(b) D10-9-A Back
Maximum Load = 0.16 N
Failure mode – Paste peel-off
(c) D10-9-B Front
Maximum Load = 0.812 N
Failure mode – Paste peel-off
(d) D10-9-B Back
Maximum Load = 0.13 N
Failure mode – Paste peel-off, Wafer chipping
Figure C-13: Sample D10-9 – Soldered at 400°C
P e e l - S t r e n g t h T e s t r e s u l t s o f P V c e l l s s o l d e r e d w i t h S n - 3 . 0 A g - 0 . 5 C u R i b b o n
A p p e n d i x D 107 | P a g e
(a) D10-42-A Front
Maximum Load = 1.218 N
Failure mode – Paste peel-off
(b) D10-42-A Back
Maximum Load = 0.337 N
Failure mode – Paste peel-off, Wafer breakage
(c) D10-42-B Front
Maximum Load = 1.766 N
Failure mode – Paste peel-off, Wafer chipping
(d) D10-42-B Back
Maximum Load = 0.262 N
Failure mode – Wafer breakage, Wafer chipping
Figure C-14: Sample D10-42 – Soldered at 400°C
P e e l - S t r e n g t h T e s t r e s u l t s o f P V c e l l s s o l d e r e d w i t h S n - 3 . 0 A g - 0 . 5 C u R i b b o n
A p p e n d i x D 108 | P a g e
(a) D10-58-A Front
Maximum Load = 1.72 N
Failure mode – Paste peel-off
(b) D10-58-A Back
Maximum Load = 0.388 N
Failure mode – Paste peel-off, Paste breakage
(c) D10-58-B Front
Maximum Load = 0.623 N
Failure mode – Paste peel-off
(d) D10-58-B Back
Maximum Load = 0.16 N
Failure mode – Paste peel-off, Paste breakage
Figure C-15: Sample D9-3 – Soldered at 400°C