pdc 17th sampling

7. SAMPLING GATES

1) A _____ is basically a transmission circuit which allows an input signal to pass through it during a selected interval and blocks its passage outside this interval. [ ]

a) Sampling gate b) logic gate

c) Basic gate d) none of these

2) The output of a _______ is an exact replica of the input signal during the selected interval and is zero other wise [ ]

a) Sampling gate b) logic gate

c) Basic gate d) none of these

3) The interval of transmission time is selected by means of an externally

applied signal termed [ ]

a) Impulse signal b) step signal

c) Gating signal d) logic signal

4) A sampling gate is also referred to as a [ ]

a) Transmission gate b) logic gate

c) Normal gate d) none of these

5) A sampling gate which can handle both positive and negative

Signals is called [ ]

a) Unidirectional gate b) bi polar gate

c) Logic gate d) bi directional gate

6) A sampling gate which can handle signals of only one polarity is called

[ ]

a) Unidirectional gate b)uni polar gate

c) bipolar gate d) one polar gate

7) The ______ is the base voltage in the output on which the input signal is superimposed [ ]

a) selector pulse b) Enabling pulse

c) pedestal d) none of these

8) The advantage of bidirectional gate over unidirectional gate is [ ]

a) linearity of operation b) efficiency

c) multiplexer d) de multiplexer

9) A chopper is often called a [ ]

a) de modulator b) modulator

c) multiplexer d) de multiplexer

10) A chopper amplifier is used to amplify signals of the order of [ ]

a) micro volts b) milli volts

c) volts d) hundreds of volts

11) The time interval of transmission is monitored by a control input signal

Which is usually___________ in shape [ ]

a) square b) sinusoidal

c) pulse d) rectangular

12) ___________ gate is not suitable for selecting a portion of continuous wave form [ ]

a) Four diode sampling b) uni directional diode

c) Bi directional diode d)six diode sampling

13) BI directional diode gate has advantage [ ]

a)simple b)linear portion

c) Easy adjustment for zero pedestal d) both b&c

14) In unidirectional sampling gate the width of control pulse is__________

Compared input pulse width [ ]

a)large b)small

c)medium d)bulkg

15) The effect of bidirectional diode gate is______ is free from any pedestal [ ]

a)both input&output b)output

c) input d)none

16) One of the disadvantage of two diode sampling gate [ ]

a)low gate b) bulky

c)circuit complexity d)more cost

17) Six didoe sampling gate operating is similar to _____ sampling gate[ ]

a)two b)three

c)four d) five

18)________ Amplifier is used to amplify the small signals [ ]

a)clipper b)chopper

c)clamper d)none

19) The average the disadvantage of two diode sampling gate ________

Simplify gate is used [ ]

a)two b)three c) four d) five

20) _____________ is used to remove unwanted ripples [ ]

a)Amplifier b)chopper c)filter d) clamper

KEY:-

1)A 11)D

2)A 12)B

3)C 13)D

4)A 14)A

5)B 15)B

6) A 16)A

7)C 17)C

8)A 18)B

9)B 19)C

10)B 20)C

5.TIME BASE GENERATORS 1) The time during which the output increases is called as ( )

(a) fly back time (b) return time (c) sweep time (d) restoration time 2) The time taken by the signal return to initial value is called ( )

(a) Restoration time (b) return time (c) fly back time (d) all 3) Ratio of difference in slope at beginning and end of sweep to initial value of slope

is called ( ) (a) sweep-speed error (b) displacement error (c) transmission error (d) none 4) The difference between the input and the output divided by the input at the end

Of the sweep is called ( ) (a) slope speed error (b) sweep speed error (c) displacement error (d) transmission error 5) Relation between is ( )

(a) (b) (c) (d) 6) The following relation is correct ? ( )

(a) (b) (c) (d)all 7) Transmission error ( ) = ( )

(a) (b) (c) (d) 8) Miller circuit an operational integrator used to convert step voltage ( ) into ____ (a) Pulse waveform (b) ramp waveform (c) exponential waveform (d) all 9) The phatastron circuit pulse input is converted into __________ ( ) (a) step waveform (b) exponential waveform (c) ramp waveform (d) none 10) To improve the linearit of basic miller and boot strap tiem – base generators is used ( ) (a) phatastron circuit (b) miller circuit (c) compensating networks (d) all 11) when the restoration tiem is zero we get _______ ( ) (a) saw tooth waveform (b) ramp waveform (c) both a & b (d) none

12) The ratio of maximum difference between the actual sweep voltage and the linear sweep to the amplitude of the sweep called ( ) (a) transmission error (b) slope speed error (c)displacement error (d) sweep speed error 13) In miller time base generator ( ) (a) inverting amplifier with gain unity (b) non-inverting amplifier with gain infinity (c) inverting amplifier with gain infinity (d) none 14) In boot strap time basegenerator ( ) (a) non-inverting amplifier with unity gain (b) inverting amplifier with infinite gain (c) both a & b (d) none 15) Miller tiem base generation produces ( ) (a) ‘-‘ ve going sweep (b) ‘+’ ve going sweep (c) both a & b (d) none 16) boot strap tiem base generator produces ( ) (a) ‘-‘ ve going sweep (b) ‘+’ ve going sweep (c) both a & b (d) none 17) In miller tiem base generator gain is required ( ) (a) 1 (b) 0 (c) (d) 2 18) In boot strap tiem base generator gain is required ( ) (a) 1 (b) 0 (c) (d) 2 19) which of the following relation is correct ( )

(a) (b) (c) (d) all

20) linear tiem base generator is one that provides output waveform ( ) which exhibits ___________

(a) linear variation of current(b) linear variation of voltage (c) both a & b (d) none

KEY:-

1)C 11)C

2)D 12)C

3)A 13)C

4)D 14)A

5)A 15)A

6) A 16)B

7)C 17)C

8)B 18)A

9)C 19)D

10)C 20)C

8.REALIZATION OF LOGIC GATES

1) _________ gate is an all or nothing gate ( )

(a) OR (b) AND (c)NAND (d) NOR

2) _________gate is any or all gate ( )

( a) OR (a) AND (c) X-OR (d) X-NOR

3) A NAND gate followed by a NAND gate is equivalent ot a _________gate ( )

(a) NAND (b)NOR (c)AND (d)OR

4) _________a NOR gate followed by a NOR gate is equivalent to a _________ gate ( )

(a) NAND (b)NOR (c) OR (d) AND

5) _______gate is an anticoincidence gate ( )

(a) NAND (b)NOR (c) X-OR (d) X-NOR

6)__________ gate is a coincidence gate ( )

(a)OR (b) AND (c) X-OR (d) X-NOR

7) _____gate is an inequality detector ( )

(a) OR (b) AND (c) X-OR (d)X-NOR

8) _____gate is an equality ditector ( )


9) X-OR and X-NOR gates can have ____ inputs ( )

(a) only two (b) only 3 (c) any number of (d) maximum of four

10) a NOR gate is negative ( )


11) a NAND gate is a negative ( )


12) NOR gate is also called an active – low ( )


13) NAND gate is also called an active - low ( )


14) In ttl + ve logic system ,logic 0 and logic 1 are respectively ( )

(a) 0V and +5V (b) 0V and -5V (c) +5V and 0V (d) -5V and 0V

15) Logic gates are the basic elements that make a ( )

(a) digital system (b) analog system (c) gating system (d) asic system

16) The gate whose output is low when all the inputs are low and high for other combinations of

Inputs is ( )


17) The gate whose output is high when all the inputs are high and low for other combinations of

inputs is ( )


18) The gate whose output is low when all the inputs are high and high for other combinations of

inputs is ( )


19) The gate whose output is high when all the inputs are low and low for other combinations of

inputs is ( )


20) The gate whose output is high only when oni of its inputs is high is ( )

(a) NAND (b)NOR (c) X-OR (d) X-NOR

KEY:-

1)B 11)A

2)B 12)D

3)C 13)D

4)C 14)A

5)C 15)B

6) D 16)B

7)C 17)D

8)D 18)B

9)A 19)D

10)B 20)C

pdc 17th sampling

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