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PCI/PXI-6711/6713 User ManualAnalog Voltage Output Device for PCI/PXI/CompactPCI
PCI/PXI-6711/6713 User Manual

October 1998 EditionPart Number 322080A-01

725 11, 91, 4 00, 7 1200,

Internet SupportE-mail: [email protected] Site: ftp.natinst.comWeb Address: http://www.natinst.com

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National Instruments Corporate Headquarters6504 Bridge Point Parkway Austin, Texas 78730-5039 USA Tel: 512 794 0100

© Copyright 1998 National Instruments Corporation. All rights reserved.

Important Information

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WarrantyThe PCI-6711, PCI-6713, PXI-6711, and PXI-6713 devices are warranted against defects in materials and workmfor a period of one year from the date of shipment, as evidenced by receipts or other documentation. National Instrwill, at its option, repair or replace equipment that proves to be defective during the warranty period. This warranincludes parts and labor.

The media on which you receive National Instruments software are warranted not to fail to execute programminginstructions, due to defects in materials and workmanship, for a period of 90 days from date of shipment, as evidby receipts or other documentation. National Instruments will, at its option, repair or replace software media that execute programming instructions if National Instruments receives notice of such defects during the warranty peNational Instruments does not warrant that the operation of the software shall be uninterrupted or error free.

A Return Material Authorization (RMA) number must be obtained from the factory and clearly marked on the outsof the package before any equipment will be accepted for warranty work. National Instruments will pay the shippingof returning to the owner parts which are covered by warranty.

National Instruments believes that the information in this manual is accurate. The document has been carefully refor technical accuracy. In the event that technical or typographical errors exist, National Instruments reserves the make changes to subsequent editions of this document without prior notice to holders of this edition. The reader consult National Instruments if errors are suspected. In no event shall National Instruments be liable for any damarising out of or related to this document or the information contained in it.

EXCEPT AS SPECIFIED HEREIN, NATIONAL INSTRUMENTS MAKES NO WARRANTIES, EXPRESS OR IMPLIED, AND SPECIFICALLY DISCLAIMS ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. CUSTOMER’ S RIGHT TO RECOVER DAMAGES CAUSED BY FAULT OR NEGLIGENCE ON THE PART OF NATIONAL INSTRUMENTS SHALL BE LIMITED TO THE AMOUNT THERETOFORE PAID BY THE CUSTOMER. NATIONAL INSTRUMENTS WILL NOT BE LIABLE FOR DAMAGES RESULTING FROM LOSS OF DATA, PROFITS, USE OF PRODUCTS, OR INCIDENTAL OR CONSEQUENTIAL DAMAGES, EVEN IF ADVISED OF THE POSSIBILITY THEREOF. This limitation of the liability of National Instruments will apply regardless of the form of action, whether in contract or tort, including negligence.Any action against National Instruments must be brought within one year after the cause of action accrues. NatioInstruments shall not be liable for any delay in performance due to causes beyond its reasonable control. The waprovided herein does not cover damages, defects, malfunctions, or service failures caused by owner’s failure to the National Instruments installation, operation, or maintenance instructions; owner’s modification of the product;owner’s abuse, misuse, or negligent acts; and power failure or surges, fire, flood, accident, actions of third partieor other events outside reasonable control.

CopyrightUnder the copyright laws, this publication may not be reproduced or transmitted in any form, electronic or mechaincluding photocopying, recording, storing in an information retrieval system, or translating, in whole or in part, witthe prior written consent of National Instruments Corporation.

TrademarksComponentWorks™, CVI™, DAQPad™, DAQ-STC™, LabVIEW™, MITE™, NI-DAQ™, NI-PGIA™, PXI™, RTSI™, SCXI™, and VirtualBench™ are trademarks of National Instruments Corporation.

Product and company names listed are trademarks or trade names of their respective companies.

WARNING REGARDING MEDICAL AND CLINICAL USE OF NATIONAL INSTRUMENTS PRODUCTSNational Instruments products are not designed with components and testing intended to ensure a level of reliabsuitable for use in treatment and diagnosis of humans. Applications of National Instruments products involving mor clinical treatment can create a potential for accidental injury caused by product failure, or by errors on the partuser or application designer. Any use or application of National Instruments products for or involving medical or cltreatment must be performed by properly trained and qualified medical personnel, and all traditional medical safegequipment, and procedures that are appropriate in the particular situation to prevent serious injury or death shouldcontinue to be used when National Instruments products are being used. National Instruments products are NOT ito be a substitute for any form of established process, procedure, or equipment used to monitor or safeguard humaand safety in medical or clinical treatment.

Contents

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About This ManualOrganization of This Manual ......................................................................................... ixConventions Used in This Manual.................................................................................xNational Instruments Documentation ............................................................................xRelated Documentation..................................................................................................xCustomer Communication .............................................................................................x

Chapter 1Introduction

About the 6711/6713 Devices........................................................................................1Using PXI with CompactPCI.........................................................................................1What You Need to Get Started ......................................................................................1Unpacking......................................................................................................................1-4Software Programming Choices ....................................................................................1

National Instruments Application Software ....................................................1-4NI-DAQ Driver Software ................................................................................1-5Register-Level Programming ..........................................................................1-

Optional Equipment .......................................................................................................1Custom Cabling .............................................................................................................1

Chapter 2Installation and Configuration

Software Installation ......................................................................................................2Hardware Installation.....................................................................................................2Device Configuration.....................................................................................................2

Chapter 3Hardware Overview

Analog Output................................................................................................................32Analog Output Reference Selection ................................................................3Analog Output Reglitch Selection...................................................................3-

Digital I/O ......................................................................................................................3-3Timing Signal Routing...................................................................................................3

Programmable Function Inputs .......................................................................3Device and RTSI Clocks .................................................................................3-RTSI Triggers..................................................................................................3-

© National Instruments Corporation v PCI/PXI-6711/6713 User Manual

Contents

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Chapter 4Signal Connections

I/O Connector ................................................................................................................ 41I/O Connector Signal Descriptions ................................................................. 4-

Analog Output Signal Connections ............................................................................... 4Digital I/O Signal Connections ..................................................................................... 4Power Connections........................................................................................................Timing Connections ...................................................................................................... 4

Programmable Function Input Connections ................................................... 4-EXTSTROBE* Signal ...................................................................... 4-1

Waveform Generation Timing Connections ................................................... 4-WFTRIG Signal................................................................................ 4-1UPDATE* Signal ............................................................................. 4-1UISOURCE Signal ........................................................................... 4-1

General-Purpose Timing Signal Connections................................................. 4GPCTR0_SOURCE Signal .............................................................. 4-1GPCTR0_GATE Signal ................................................................... 4-1GPCTR0_OUT Signal ...................................................................... 4-1GPCTR0_UP_DOWN Signal........................................................... 4-1GPCTR1_SOURCE Signal .............................................................. 4-1GPCTR1_GATE Signal ................................................................... 4-1GPCTR1_OUT Signal ...................................................................... 4-1GPCTR1_UP_DOWN Signal........................................................... 4-1FREQ_OUT Signal........................................................................... 4-2

Field Wiring Considerations.......................................................................................... 4

Chapter 5Calibration

Loading Calibration Constants ...................................................................................... 5Self-Calibration ............................................................................................................. 52External Calibration....................................................................................................... 5Other Considerations .....................................................................................................

Appendix ASpecifications

Appendix BCommon Questions

PCI/PXI-6711/6713 User Manual vi © National Instruments Corporation

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Appendix CCustomer Communication

Glossary

Index

FiguresFigure 1-1. The Relationship Between the Programming Environment,

NI-DAQ, and Your Hardware .................................................................1-

Figure 3-1. 6711/6713 Block Diagram ......................................................................3Figure 3-2. UPDATE* Signal Routing ......................................................................3Figure 3-3. RTSI Bus Signal Connection ..................................................................

Figure 4-1. I/O Connector Pin Assignment for the PCI/PXI-6711/6713 Device.........................................................4-

Figure 4-2. Analog Output Connections ....................................................................Figure 4-3. Digital I/O Connections...........................................................................4Figure 4-4. Timing I/O Connections..........................................................................4Figure 4-5. WFTRIG Input Signal Timing ................................................................4Figure 4-6. WFTRIG Output Signal Timing..............................................................4Figure 4-7. UPDATE* Input Signal Timing..............................................................4-Figure 4-8. UPDATE* Output Signal Timing ...........................................................4-Figure 4-9. UISOURCE Signal Timing .....................................................................4Figure 4-10. GPCTR0_SOURCE Signal Timing ........................................................4Figure 4-11. GPCTR0_GATE Signal Timing in Edge-Detection Mode.....................4-Figure 4-12. GPCTR0_OUT Signal Timing................................................................4Figure 4-13. GPCTR1_SOURCE Signal Timing ........................................................4Figure 4-14. GPCTR1_GATE Signal Timing in Edge-Detection Mode.....................4-Figure 4-15. GPCTR1_OUT Signal Timing................................................................4Figure 4-16. GPCTR Timing Summary.......................................................................4

TablesTable 1-1. PXI-6711/6713 J2 Pin Assignment ........................................................1

Table 4-1. Signal Descriptions for I/O Connector Pins ...........................................4Table 4-2. I/O Signal Summary for the 6711/6713 Device .....................................4

© National Instruments Corporation vii PCI/PXI-6711/6713 User Manual

About This Manual

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This manual describes the electrical and mechanical aspects of the PCI/PXI-6711/6713 devices and contains information concerning theiroperation and programming.

The 6711/6713 devices include:

• PXI-6711with four or PXI-6713 with eight analog output (AO) channels, two counters, and eight digital input/output (DIO) channfor PXI/CompactPCI.

• PCI-6711 with four or PCI-6713 with eight AO channels, two counters, and eight DIO channels for PCI.

Your PCI/PXI-6711/6713 device is a multifunction analog output, DIO,and timing input/output (I/O) device for PCI/PXI/CompactPCI and 139buses.

Organization of This ManualThe PCI/PXI-6711/6713 User Manual is organized as follows:

• Chapter 1, Introduction, describes your PCI/PXI-6711/6713 device, lists what you need to get started, describes the optional softwareoptional equipment, and explains how to unpack your 6711/6713 device.

• Chapter 2, Installation and Configuration, explains how to install and configure your PCI/PXI-6711/6713 device.

• Chapter 3, Hardware Overview, presents an overview of the hardwarfunctions on your PCI/PXI-6711/6713 device.

• Chapter 4, Signal Connections, describes how to make input and output signal connections to your PCI/PXI-6711/6713 device via thdevice I/O connector.

• Chapter 5, Calibration, discusses the calibration procedures for your PCI/PXI-6711/6713 device.

• Appendix A, Specifications, lists the specifications of your PCI/PXI-6711/6713 device.

• Appendix B, Common Questions, contains a list of commonly asked questions and their answers relating to usage and special featureyour PCI/PXI-6711/6713 device.

© National Instruments Corporation ix PCI/PXI-6711/6713 User Manual

About This Manual

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• Appendix C, Customer Communication, contains forms you can use torequest help from National Instruments or to comment on our products.

• The Glossary contains an alphabetical list and description of termsused in this manual, including acronyms, abbreviations, definitionsmetric prefixes, mnemonics, and symbols.

• The Index alphabetically lists topics covered in this manual, includinthe page where you can find the topic.

Conventions Used in This ManualThe following conventions are used in this manual.

<> Angle brackets enclose the name of a key on the keyboard (for examp<option>). Angle brackets containing numbers separated by an ellipsisrepresent a range of values associated with a bit or signal name (for example, DIO<3..0>).

♦ The ♦ indicates that the text following it applies to only to a specificPCI/PXI/CompactPCI device.

This icon to the left of bold italicized text denotes a note, which alerts yto important information.

This icon to the left of bold italicized text denotes a caution, which adviyou of precautions to take to avoid injury, data loss, or a system crash

bold italic Bold italic text denotes a note, caution, or warning.

italic Italic text denotes emphasis, a cross reference, or an introduction to aconcept. This font also denotes text from which you supply the approprword or value, as in NI-DAQ 6.x.

6711/6713 6711/6713 refers to the National Instruments PCI/PXI-6711/6713 devunless otherwise noted.

NI-DAQ NI-DAQ refers to the NI-DAQ driver software for PC compatible computers unless otherwise noted.

PC Refers to all PC AT series computers with PCI bus unless otherwise n

SCXI SCXI stands for Signal Conditioning eXentsions for Instrumentation ana National Instruments product line designed to perform front-end signconditioning for National instruments plug-in DAQ devices.

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PCI/PXI-6711/6713 User Manual x © National Instruments Corporation

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National Instruments DocumentationThe PCI/PXI-6711/6713 User Manual is one piece of the documentationset for your DAQ system. You could have any of several types of documentation depending on the hardware and software in your systeUse the documentation you have as follows:

• Getting Started with SCXI—If you are using SCXI, this is the first manual you should read. It gives an overview of the SCXI system acontains the most commonly needed information for the modules,chassis, and software.

• Your SCXI hardware user manuals—If you are using SCXI, read thmanuals next for detailed information about signal connections anmodule configuration. They also explain in greater detail how the module works and contain application hints.

• Your DAQ hardware documentation—This documentation has detailed information about the DAQ hardware that plugs into or is connected to your computer. Use this documentation for hardwareinstallation and configuration instructions, specification informationabout your DAQ hardware, and application hints.

• Software documentation—You may have both application softwareand NI-DAQ software documentation. National Instruments application software includes ComponentWorks, LabVIEW, LabWindows/CVI, and VirtualBench. After you set up your hardwasystem, use either your application software documentation or theNI-DAQ documentation to help you write your application. If you hava large, complicated system, it is worthwhile to look through the software documentation before you configure your hardware.

• Accessory installation guides or manuals—If you are using accessproducts, read the terminal block and cable assembly installation guides. They explain how to physically connect the relevant piecesthe system. Consult these guides when you are making your connections.

• SCXI chassis manuals—If you are using SCXI, read these manualsmaintenance information on the chassis and installation instructio

© National Instruments Corporation xi PCI/PXI-6711/6713 User Manual

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Related DocumentationThe following documents contain information you may find helpful:

• DAQ-STC Technical Reference Manual

• National Instruments Application Note 025, Field Wiring and Noise Considerations for Analog Signals

• PCI Local Bus Specification Revision 2.0

Customer CommunicationNational Instruments wants to receive your comments on our productsmanuals. We are interested in the applications you develop with our products, and we want to help if you have problems with them. To make it easy for you to contact us, this manual contains comment aconfiguration forms for you to complete. These forms are in AppendixCustomer Communication, at the end of this manual.

PCI/PXI-6711/6713 User Manual xii © National Instruments Corporation

© National Instruments Corporation 1-1 PCI/PXI-6711/6

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Introduction

This chapter describes your PCI/PXI-6711/6713 device, lists what youneed to get started, describes the optional software and optional equipmand explains how to unpack your 6711/6713 device.

About the 6711/6713 DevicesThank you for buying a National Instruments 6711/6713 device. Your 6711/6713 device is a completely Plug and Play, analog output, digital,timing I/O device for PXI/PCI/CompactPCI. The 6711/6713 device features a 12-bit digital-to-analog converter (DAC) per channel with update rates up to Ms/S/channel for voltage outputs, eight lines of TTL-compatible digital I/O, and two 24-bit counter/timers for timing I/OThe 6711 device features four voltage output channels, while the 6713device features eight voltage output channels. Because the 6711/6713device has no DIP switches, jumpers, or potentiometers, it is easily software-configured and calibrated.

The 6711/6713 device is a completely switchless and jumperless dataacquisition (DAQ) device for the PXI/PCI/CompactPCI. This feature ismade possible by the National Instruments MITE bus interface chip thconnects the device to the PCI I/O bus. The MITE implements the PCLocal Bus Specification so that the interrupts and base memory addreare all software configured.

The 6711/6713 device uses the National Instruments DAQ-STC systetiming controller for time-related functions. The DAQ-STC consists of three timing groups that control analog input, analog output, and general-purpose counter/timer functions. These groups include a totalseven 24-bit and three 16-bit counters and a maximum timing resolutio50 ns. The analog input section of the DAQ-STC is unused by the 6711/6713.

Often with other DAQ devices, you cannot easily synchronize several measurement functions to a common trigger or timing event. The PCI-6711/6713 device has the Real-Time System Integration (RTSI) busolve this problem. The RTSI bus consists of our RTSI bus interface aribbon cable to route timing and trigger signals between several functi

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Chapter 1 Introduction

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on as many as five DAQ devices in your computer. If you are using thePXI-6711/6713 in a PXI chassis, RTSI lines, known as the PXI trigger bare part of the backplane, therefore you do not need the RTSI cable fosystem triggering and timing on the PXI.

Detailed specifications of the 6711/6713 device are in Appendix A, Specifications.

Using PXI with CompactPCI♦ PXI-6711/6713 Only

Using PXI-compatible products with standard CompactPCI products isimportant feature provided by the PXI Specification, revision 1.0. If you use a PXI-compatible plug-in device in a standard CompactPCI chassis, ywill be unable to use PXI-specific functions, but you can still use the baplug-in device functions. For example, the PXI trigger bus on your 6711/6713 device is available in a PXI chassis but not in a CompactPCchassis.

The CompactPCI specification permits vendors to develop sub-buses coexist with the basic PCI interface on the CompactPCI bus. Compatioperation is not guaranteed between CompactPCI devices with differesub-buses nor between CompactPCI devices with sub-buses and PXIThe standard implementation for CompactPCI does not include these sub-buses. Your 6711/6713 device will work in any standard CompactPchassis adhering to the PICMG CompactPCI 2.0 R2.1 document.

PXI-specific features, RTSI bus trigger, RTSI Clock, and Serial Communication, are implemented on the J2 connector of the Compacbus. Table 1-1 lists the J2 pins used by your PXI-6711/6713, which is compatible with any CompactPCI chassis with a sub-bus that does not dthese lines. Even if the sub-bus is capable of driving these lines, the 6711/6713 is still compatible as long as those pins on the sub-bus aredisabled by default and are never enabled. Damage can result if theseare driven by the sub-bus.

PCI/PXI-6711/6713 User Manual 1-2 © National Instruments Corporation


What You Need to Get StartedTo set up and use the 6711/6713 device, you will need the following:

Either the 6711 or 6713 device

PCI/PXI-6711/6713 User Manual

NI-DAQ driver for PC compatibles version 6.5 or higher

One of the following software packages and documentation:

LabVIEW for Windows

LabWindows/CVI for Windows

ComponentWorks

VirtualBench

C language compiler

Your computer

SH6868 EP cable

One of the following

– BNC 2110 signal connector block

– SCB-68 shielded terminal block

– CB-68LP terminal block

Table 1-1. PXI-6711/6713 J2 Pin Assignment

6711/6713 Signal PXI Pin Name PXI J2 Pin Number

RTSI Trigger <0..5> PXI Trigger <0..5> B16, A16, A17, A18, B18, C18

RTSI Trigger 6 PXI Star Trigger D17

RTSI Clock PXI Trigger (7) E16

Serial Communication

LBR (6, 7, 8, 9, 10, 11, 12)

EI5, A3, C3, D3, E3, A2, B2

© National Instruments Corporation 1-3 PCI/PXI-6711/6713 User Manual


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UnpackingThe 6711/6713 device is shipped in an antistatic package to prevent electrostatic damage to the device. Electrostatic discharge can damagseveral components on the device. To avoid such damage in handlingthe device, take the following precautions:

• Ground yourself via a grounding strap or by holding a grounded obj

• Touch the antistatic package to a metal part of your computer chabefore removing the device from the package.

• Remove the device from the package and inspect the device for loose components or any other sign of damage. Notify National Instruments if the device appears damaged in any way. Do not install a damaged device into your computer.

• Never touch the exposed pins of connectors.

Software Programming ChoicesYou have several options to choose from when programming your NatioInstruments DAQ and SCXI hardware. You can use National Instrumeapplication software, NI-DAQ, or register-level programming.

National Instruments Application Software

LabVIEW features interactive graphics, a state-of-the-art user interfacand a powerful graphical programming language. The LabVIEW Data Acquisition VI Library, a series of VIs for using LabVIEW with NationalInstruments DAQ hardware, is included with LabVIEW. The LabVIEW Data Acquisition VI Library is functionally equivalent to NI-DAQ software.

LabWindows/CVI features interactive graphics, state-of-the-art user interface, and uses the ANSI standard C programming language. TheLabWindows/CVI Data Acquisition Library, a series of functions for usinLabWindows/CVI with National Instruments DAQ hardware, is includewith the NI-DAQ software kit. The LabWindows/CVI Data Acquisition Library is functionally equivalent to the NI-DAQ software.ComponentWorks contains tools for data acquisition and instrument control built on NI-DAQ driver software. ComponentWorks provides a higher-level programming interface for building virtual instruments through standard OLE controls and DLLs. With ComponentWorks, you



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can use all of the configuration tools, resource management utilities, ainteractive control utilities included with NI-DAQ.

VirtualBench features virtual instruments that combine DAQ products,software, and your computer to create a stand-alone instrument with tadded benefit of the processing, display, and storage capabilities of yocomputer. VirtualBench instruments load and save waveform data to din the same forms that can be used in popular spreadsheet programs word processors.

Using ComponentWorks, LabVIEW, LabWindows/CVI, or VirtualBenchsoftware will greatly reduce the development time for your data acquisitand control application.

NI-DAQ Driver SoftwareThe NI-DAQ driver software is included at no charge with all National Instruments DAQ hardware. NI-DAQ is not packaged with SCXI or accessory products, except for the SCXI-1200. NI-DAQ has an extenslibrary of functions that you can call from your application programminenvironment. These functions include routines for analog input (A/D conversion), buffered data acquisition (high-speed A/D conversion), analog output (D/A conversion), waveform generation (timed D/A conversion), digital I/O, counter/timer operations, SCXI, RTSI, self-calibration, messaging, and acquiring data to extended memory.

NI-DAQ has both high-level DAQ I/O functions for maximum ease of uand low-level DAQ I/O functions for maximum flexibility and performance. Examples of high-level functions are streaming data to dor acquiring a certain number of data points. An example of a low-levefunction is writing directly to registers on the DAQ device. NI-DAQ doenot sacrifice the performance of National Instruments DAQ devices because it lets multiple devices operate at their peak.

NI-DAQ also internally addresses many of the complex issues betweencomputer and the DAQ hardware such as programming interrupts andDMA controllers. NI-DAQ maintains a consistent software interface among its different versions so that you can change platforms with minimodifications to your code. Whether you are using conventional



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programming languages or National Instruments application software, yapplication uses the NI-DAQ driver software, as illustrated in Figure 1-

Figure 1-1. The Relationship Between the Programming Environment, NI-DAQ, and Your Hardware

Register-Level ProgrammingThe final option for programming any National Instruments DAQ hardware is to write register-level software. Writing register-level programming software can be very time-consuming and inefficient, annot recommended for most users.

Even if you are an experienced register-level programmer, using NI-Dor application software to program your National Instruments DAQ hardware is easier than, and as flexible as, register-level programmingcan save weeks of development time.

NI-DAQDriver Software

DAQ orSCXI Hardware

Personal Computeror Workstation

Conventional Programming Environment

ComponentWorks,LabVIEW,

LabWindows/CVI,or VirtualBench



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Optional EquipmentNational Instruments offers a variety of products to use with the 6711/6device, including cables, connector blocks, and other accessories, as follows:

• Cables and cable assemblies

• Connector blocks, shielded and unshielded 50- and 68-pin screw terminals

• RTSI bus cables

• Low channel-count digital signal conditioning modules, devices, aaccessories

For more specific information about these products, refer to your NatioInstruments catalogue or call the office nearest you.

Custom CablingNational Instruments offers cables and accessories for you to prototypyour application or to use if you frequently change device interconnecti

If you want to develop your own cable, however, the following guidelinmay be useful:

• Route the analog lines separately from the digital lines.

• When using a cable shield, use separate shields for the analog andigital halves of the cable. Failure to do so results in noise couplininto the analog signals from transient digital signals.

Mating connectors and a backshell kit for making custom 68-pin cablesavailable from National Instruments.

The following list gives recommended part numbers for connectors thamate to the I/O connector on the 6711/6713 device:

• Honda 68-position, solder cup, female connector (part number PCS-E68FS)

• Honda backshell (part number PCS-E68LKPA)



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Installation and Configuration

This chapter explains how to install and configure your PCI/PXI-6711/6713 device.

Software InstallationInstall your software before you install the 6711/6713 device. Refer to appropriate release notes indicated below for specific instructions on tsoftware installation sequence.

1. Install your application software—If you are using LabVIEW, LabWindows/CVI, or other National Instruments application softwapackages, refer to the appropriate release notes.

2. Install the NI-DAQ driver software—Refer to your NI-DAQ releasenotes and follow the instructions given there for your operating systand application software package.

You can now install your hardware.

Hardware InstallationYou can install the PCI/PXI-6711/6713 device in any available PCI/PXexpansion slot in your computer. However, to achieve best noise performance, leave as much room as possible between the 6711/671device and other devices and hardware. The following are general installation instructions, but consult your computer user manual or technical reference manual for specific instructions and warnings.

♦ PXI-6711/6713You can install the PXI-6711/6713 in any available PXI slot in your PXI CompactPCI chassis.

Note The PXI-6711/6713 has connections to several reserved lines on the CompactPJ2 connector. Before installing the PXI-6711/6713 in a CompactPCI system thatuses J2 connector lines for a purpose other than PXI, see Chapter 1, Using PXI with CompactPCI.

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1. Turn off and unplug your PXI or CompactPCI chassis.

2. Choose an unused PXI or CompactPCI peripheral slot. For maximperformance, install the PXI-6711/6713 in a slot that supports busarbitration or bus-master cards. The PXI-6711/6713 contains onbobus-master DMA logic that can operate only in such a slot. If you choose a slot that does not support bus masters, you will have to disthe onboard DMA controller using your software. PXI-compliant chassis must have bus arbitration for all slots.

3. Remove the filter panel for the peripheral slot that you have chose

4. Touch a metal part on the chassis to discharge any static electricitymight be on your clothes or body.

5. Insert the PXI-6711/6713 device in the 5 V slot. Use the injector/ejector handle to fully inject the device into place.

6. Screw the front panel of the PXI-6711/6713 to the front panel mounting rails of the PXI or CompactPCI chassis.

7. Visually verify the installation.

8. Plug in and turn on the PXI or CompactPCI chassis.

The PXI 6711/6713 is now installed.

♦ PCI 6711/6713

1. Write down the 6711/6713 device serial number in the 6711/6713 Device Hardware and Software Configuration Form in Appendix D, Customer Communication, of this manual.

2. Turn off and unplug your computer.

3. Remove the top cover or access port to the I/O channel.

4. Remove the expansion slot cover on the back panel of the compu

5. Insert the 6711/6713 device into a 5 V PCI slot. Gently rock the devto ease it into place. It may be a tight fit, but do not force the device into place.

6. If required, screw the mounting bracket of the 6711/6713 device toback panel rail of the computer.

7. Replace the cover.

8. Plug in and turn on your computer.

The PCI-6711/6713 device is installed. You are now ready to configureyour software. Refer to your software documentation for configuration instructions.


Chapter 2 Installation and Configuration

ion, are

d

tings

Device ConfigurationDue to the National Instruments standard architecture for data acquisitthe PCI bus specification for the 6711/6713 device is completely softwconfigurable. There are two types of configuration on the 6711/6713 device—bus-related and data acquisition-related configuration.

The PCI/PXI-6711/6713 device is fully compatible with the industry-standard PCI Local Bus Specification Revision 2.0. This specification allows the PCI system to automatically perform all bus-related configurations and requires no user interaction. Bus-relateconfiguration includes setting the device base memory address and interrupt channel.

Data acquisition-related configuration includes such settings as analogoutput range, reference selection, and others. You can modify these setusing NI-DAQ C language API, or application level software, such as ComponentWorks, LabVIEW, LabWindows/CVI, and VirtualBench.



3
Hardware Overview
This chapter presents an overview of the hardware functions on your PCI/PXI-6711/6713 device. Figure 3-1 shows a block diagram of the 6711/6713 device.

713 User Manual

Chapter 3 Hardware Overview

ge y is or n

Figure 3-1. 6711/6713 Block Diagram

Analog OutputThe 6711 has four channels and the 6713 has eight channels of voltaoutput at the I/O connector. The reference for the analog output circuitrsoftware selectable per channel. The reference can be either internal external, whereas the range is always bipolar. This means that you ca

Timing

PFI / TriggerI/O C

onne

ctor

RTSI Bus

PC

I/PX

IDigital I/O (8)

EEPROM

CalibrationMux

CalibrationADC

CalibrationDACs

CH4Latch

24

8

12CH412-Bit DAC

CH4Amp

DAQ - STC

Analog OutputTiming/Control

Analog InputTiming/ControlDigital I/O

Trigger

Counter/Timing I/O

RTSI BusInterface

DMA/IRQ

BusInterface

Address/Data

Add

ress

Control

EEPROMControl

AOControl

CalibrationControl

DMA/IRQ

RegisterDecode

FPGA

DAQ-STCBus

Interface

PCIMITE

GenericBus

Interface

PCIBus

Interface

IRQ

DMA

CH5Latch

12CH512-Bit DAC

CH6Latch

12CH612-Bit DAC

CH7Latch

12CH712-Bit DAC

DACFIFO

CH5Amp

CH6Amp

CH7Amp

Dat

aData

Data

AO Control

CH0Latch

12CH012-Bit DAC

CH0Amp

CH1Latch

12CH112-Bit DAC

CH2Latch

12CH212-Bit DAC

CH3Latch

12CH312-Bit DAC

CH1Amp

CH2Amp

CH3Amp

Dat

a

1A

+5 V

Note: CH4 through CH7 on 6713 only



EF

f ence

th as ains ther rgy otice ,

ach

for are

re e

es

output signals up to ±10 V with internal reference selected or ± EXTRvoltage with external reference selected.

Analog Output Reference SelectionYou can connect each D/A converter (DAC) to the internal reference o10 V or to the external reference signal connected to the external refer(EXTREF) pin on the I/O connector. This signal applied to EXTREF should be within ±11 V. You can configure each channel to use eitherinternal or external reference. The default reference value selection isinternal reference.

Analog Output Reglitch SelectionIn normal operation, a DAC output will glitch whenever it is updated wia new value. The glitch energy differs from code to code and appearsdistortion in the frequency spectrum. Each analog output channel conta reglitch circuit that generates uniform glitch energy at every code rathan large glitches at the major code transitions. This uniform glitch eneappears as a multiple of the update rate in the frequency spectrum. Nthat this reglitch circuit does not eliminate the glitches; it only makes themmore uniform in size. By default, reglitching is disabled for all channelshowever you can use NI-DAQ to independently enable reglitching for echannel.

Digital I/OThe 6711/6713 device contains eight lines of digital I/O for general-purpose use. You can individually software-configure each lineeither input or output. At system startup and reset, the digital I/O portsall high impedance.

The hardware up/down control for general-purpose counters 0 and 1 aconnected onboard to DIO6 and DIO7, respectively. Thus, you can usDIO6 and DIO7 to control the general-purpose counters. The up/downcontrol signals are input only and do not affect the operation of the DIO lines.

Timing Signal RoutingThe DAQ-STC provides a very flexible interface for connecting timing signals to other devices or external circuitry. The 6711/6713 device usthe RTSI bus to interconnect timing signals between devices, and the



ect able and

be

ing

the

ins,

Programmable Function Input (PFI) pins on the I/O connector to connthe device to external circuitry. These connections are designed to enthe 6711/6713 device to both control and be controlled by other devicescircuits.

There are a total of 13 timing signals internal to the DAQ-STC that cancontrolled by an external source. These timing signals can also be controlled by signals generated internally to the DAQ-STC, and these selections are fully software configurable. For example, the signal routmultiplexer for controlling the UPDATE* signal is shown in Figure 3-2.

Figure 3-2. UPDATE* Signal Routing

This figure shows that UPDATE* can be generated from a number of sources, including the external signals RTSI<0..6> and PFI<0..9> andinternal signals Sample Interval Counter TC and GPCTR0_OUT.

Many of these timing signals are also available as outputs on the RTSI pas indicated in the RTSI Triggers section later in this chapter, and on thePFI pins, as indicated in Chapter 4, Signal Connections.

RTSI Trigger <0..6>

PFI<0..9>

UPDATE*

Update Interval Counter TC

GPCTR0_OUT



ing for a sed can s the

on

y

a

drive

er y rnal is

s. SI

Programmable Function InputsThe 10 PFIs are connected to the signal routing multiplexer for each timsignal, and software can select one of the PFIs as the external sourcegiven timing signal. It is important to note that any of the PFIs can be uas an input by any of the timing signals and that multiple timing signals use the same PFI simultaneously. This flexible routing scheme reduceneed to change physical connections to the I/O connector for differentapplications. You can also individually enable each of the PFI pins to output a specific internal timing signal. For example, if you need the UPDATE* signal as an output on the I/O connector, software can turnthe output driver for the PFI5/UPDATE* pin.

Device and RTSI ClocksMany functions performed by the 6711/6713 device require a frequenctimebase to generate the necessary timing signals for controlling DACupdates or general-purpose signals at the I/O connector.

The 6711/6713 device can use either its internal 20 MHz timebase or timebase received over the RTSI bus. In addition, if you configure the device to use the internal timebase, you can also program the device toits internal timebase over the RTSI bus to another device that is programmed to receive this timebase signal. This clock source, whethlocal or from the RTSI bus, is used directly by the device as the primarfrequency source. The default configuration at startup is to use the intetimebase without driving the RTSI bus timebase signal. This timebasesoftware selectable.

RTSI TriggersThe seven RTSI trigger lines on the RTSI bus provide a very flexible interconnection scheme for the 6711/6713 device sharing the RTSI buThese bidirectional lines can drive any of five timing signals onto the RT



n
bus and can receive any of these timing signals. This signal connectioscheme is shown in Figure 3-3.
Figure 3-3. RTSI Bus Signal Connection

Refer to the Timing Connections section of Chapter 4, Signal Connections, for a description of the signals.

RT

SI B

us C

onne

ctor

switch

RT

SI S

witc

h

Clock

Trigger

7

DAQ-STC

UPDATE*

WFTRIG

GPCTR0_SOURCE

GPCTR0_GATE

GPCTR0_OUT

UISOURCE

GPCTR1_SOURCE

GPCTR1_GATE

RTSI_OSC (20 MHz)



4
s to
the

s r.

h

Signal Connections

This chapter describes how to make input and output signal connectionyour PCI/PXI-6711/6713 device via the device I/O connector.

The I/O connector for the 6711/6713 device has 68 pins that you can connect to 68-pin accessories with the SH68-68-EP or similar 68-pin shielded cable.

I/O ConnectorFigure 4-1 shows the pin assignments for the 68-pin I/O connector onPCI/PXI-6711/6713 device. A signal description follows the connectorpinouts.

Caution Connections that exceed any of the maximum ratings of input or output signalon the 6711/6713 device can damage the 6711/6713 device and the computeMaximum input ratings for each signal are given in the Protection column of Table 4-2. National Instruments is not liable for any damages resulting from sucsignal connections.

!

713 User Manual

Chapter 4 Signal Connections

Figure 4-1. I/O Connector Pin Assignment for the PCI/PXI-6711/6713 Device

FREQ_OUT

GPCTR0_OUT

PFI9/GPCTR0_GATE

DGND

PFI6/WFTRIG

PFI5/UPDATE*

DGND

+5 VDGND

PFI1

PFI0

DGND

DGND

+5 V

DGNDDIO6

DIO1

DGND

DIO4

EXTREF DAC1OUT

DAC0OUT

AOGNDAOGND

DAC3OUTAOGND

AOGND

DAC5OUT1

AOGNDDAC6OUT1

AOGND

AOGND

NCAOGND

DGND

1 No Connect on PCI/PXI 6711

PFI8/GPCTR0_SOURCE

PFI7

GPCTR1_OUT

PFI4/GPCTR1_GATE

PFI3/GPCTR1_SOURCE

PFI2

DGND

DGND

DGND

EXTSTROBE*

NC

DIO3

DIO7

DIO2DGND

DIO5

DIO0

DGND

AOGND

AOGND

AOGND

DAC2OUT

AOGND

AOGND

DAC4OUT1

AOGND

NC

AOGND

AOGND

DAC7OUT1

AOGND

AOGNDNC

1 35

2 36

3 37

4 38

5 39

6 40

7 41

8 42

9 43

10 44

11 45

12 46

13 47

14 48

15 49

16 50

17 51

18 52

19 53

20 54

21 55

22 56

23 57

24 58

25 59

26 60

27 61

28 62

29 63

30 64

31 65

32 66

33 67

34 68



I/O Connector Signal Descriptions

Table 4-1. Signal Descriptions for I/O Connector Pins

Signal Name Reference Direction Description

AOGND — — Analog Output Ground—The analog output voltages are referenced to this node.

DAC<0..7>OUT AOGND Output Analog Output Channels 0 through 7—These pins supply the voltage output of the respective channel.

DGND — — Digital Ground—This pin supplies the reference for the digital signals at the I/O connector as well as the +5 VDC supply.

DIO<0..7> DGND Input or Output

Digital I/O signals—DIO6 and 7 can control the up/down signal of general-purpose counters 0 and 1, respectively.

+5 V DGND Output +5 VDC Source—These pins are fused for up to 1 A of +5 V supply. The fuse is self-resetting.

EXTREF AOGND Input External Reference—This is the external reference input forthe analog output circuitry.

EXTSTROBE* DGND Output External Strobe—This output is used for controlling SCXI devices.

PFI0 DGND Input PFI0—As an input, this is one of the Programmable Function Inputs (PFIs). PFI signals are explained in the Timing Connections section later in this chapter. PF<0 cannot be output.

PFI1 DGND Input PFI1—As an input, this is one of the PFIs. PFI1 cannot bean output.


PFI3/GPCTR1_SOURCE DGND Input

Output

PFI3/Counter 1 Source—As an input, this is one of the PFIs.

As an output, this is the GPCTR1_SOURCE signal. This signal reflects the actual source connected to the general-purpose counter 1.

PFI4/GPCTR1_GATE DGND Input

Output

PFI4/Counter 1 Gate—As an input, this is one of the PFIs.

As an output, this is the GPCTR1_GATE signal. This signalreflects the actual gate signal connected to the general-purpose counter 1.

GPCTR1_OUT DGND Output Counter 1 Output—This output is from the general-purposecounter 1 output.



Table 4-2 shows the I/O signal summary for the 6711/6713 devices.

PFI5/UPDATE* DGND Input

Output

PFI5/Update—As an input, this is one of the PFIs.

As an output, this is the UPDATE* signal. A high-to-low edge on UPDATE* indicates that the analog output waveform generation group is being updated.

PFI6/WFTRIG DGND Input

Output

PFI6/Waveform Trigger—As an input, this is one of the PFIs.

As an output, this is the WFTRIG signal. In timed analog output sequences, a low-to-high transition indicates the initiation of the waveform generation.


PFI8/GPCTR0_SOURCE DGND Input

Output

PFI8/Counter 0 Source—As an input, this is one of the PFIs.

As an output, this is the GPCTR0_SOURCE signal. This signal reflects the actual source connected to the general-purpose counter 0.

PFI9/GPCTR0_GATE DGND Input

Output

PFI9/Counter 0 Gate—As an input, this is one of the PFIs.

As an output, this is the GPCTR0_GATE signal. This signalreflects the actual gate signal connected to the general-purpose counter 0.

GPCTR0_OUT DGND Output Counter 0 Output—This output is from the general-purposecounter 0 output.

FREQ_OUT DGND Output Frequency Output—This output is from the frequency generator output.

Table 4-2. I/O Signal Summary for the 6711/6713 Device

Signal Name

Signal Type and Direction

Impedance Input/Output

Protection (Volts) On/Off

Source (mA at V)

Sink (mA at V)

Rise Time (ns)/Slew Rate Bias

DAC<0..7>OUT AO 0.1Ω Short-circuit to ground

5 at 10 5 at -10 20 V/µs

—

AOGND AO — — — — — —

DGND DIO — — — — — —

Table 4-1. Signal Descriptions for I/O Connector Pins (Continued)

Signal Name Reference Direction Description



VCC DO 0.1Ω Short-circuit to ground

1 A — — —

DIO<0..7> DIO — Vcc +0.5 13 at(Vcc -0.4)

24 at 0.4

1.1 50 kΩ pu

EXTSTROBE* DO — — 3.5 at(Vcc -0.4)

5 at 0.4 1.5 50 kΩ pu

EXTREF AI 10 kΩ 25/15 — — — —

PFI0 DI — Vcc +0.5 3.5 at(Vcc -0.4)

5 at 0.4 1.5 50 kΩ pd

PFI1 DI — Vcc +0.5 3.5 at(Vcc -0.4)

5 at 0.4 1.5 50 kΩ pu

PFI2 DI — Vcc +0.5 3.5 at(Vcc -0.4)

5 at 0.4 1.5 50 kΩ pu

PFI3/GPCTR1_SOURCE DIO — Vcc +0.5 3.5 at(Vcc -0.4)

5 at 0.4 1.5 50 kΩ pu

PFI4/GPCTR1_GATE DIO — Vcc +0.5 3.5 at(Vcc -0.4)

5 at 0.4 1.5 50 kΩ pu

GPCTR1_OUT DO — — 3.5 at(Vcc -0.4)

5 at 0.4 1.5 50 kΩ pu

PFI5/UPDATE* DIO — Vcc +0.5 3.5 at(Vcc -0.4)

5 at 0.4 1.5 50 kΩ pu

PFI6/WFTRIG DIO — Vcc +0.5 3.5 at(Vcc -0.4)

5 at 0.4 1.5 50 kΩ pu

PFI7 DI — Vcc +0.5 3.5 at(Vcc -0.4)

5 at 0.4 1.5 50 kΩ pu

PFI8/GPCTR0_SOURCE DIO — Vcc +0.5 3.5 at(Vcc -0.4)

5 at 0.4 1.5 50 kΩ pu

Table 4-2. I/O Signal Summary for the 6711/6713 Device (Continued)

Signal Name




Source (mA at V)

Sink (mA at V)




.

You ile e

a at

al nce nce,

t:

Analog Output Signal ConnectionsThe analog output signals are DAC<0..7>OUT, AOGND, and EXTREF

DAC0OUT is the voltage output signal for analog output channel 0.

EXTREF is the external reference input for all analog output channels. can use this input to reduce the voltage swing on the DAC outputs whpreserving the dynamic range. For example, with internal reference thminimum change (LSB) on a voltage output is:

For an external reference at 5 V, you can output ±5 V with the LSB onvoltage output reduced to 2.44 mV. This gives you a higher resolution lower voltage.

You must configure each analog output channel individually for externreference selection in order for the signal applied at the external refereinput to be used by that channel. If you do not specify an external referethe channel will use the internal reference. Analog output configurationoptions are explained in the Analog Output section in Chapter 3, Hardware Overview. The following ranges and ratings apply to the EXTREF inpu

• Usable input voltage range: ±11 V peak with respect to AOGND

• Absolute maximum ratings: ±15 V peak with respect to AOGND

PFI9/GPCTR0_GATE DIO — Vcc +0.5 3.5 at(Vcc -0.4)

5 at 0.4 1.5 50 kΩ pu

GPCTR0_OUT DO — — 3.5 at(Vcc -0.4)

5 at 0.4 1.5 50 kΩ pu

FREQ_OUT DO — — 3.5 at(Vcc-0.4)

5 at 0.4 1.5 50 kΩ pu

AI = Analog Input, DIO = Digital Input/Output, pu = pull-up, AO = Analog Output, DO = Digital Output

The tolerance on the 50 kΩ pull-up and pull-down resistors is very large. Actual value may range between 17 and 100 kΩ.

Table 4-2. I/O Signal Summary for the 6711/6713 Device (Continued)

Signal Name




Source (mA at V)

Sink (mA at V)


20 V4096------------ 4.88 mV=



.

713

nal

n

AOGND is the ground reference signal for the analog output channelsDAC<0..7>OUT as well as EXTREF is referenced to AOGND.

The external reference signal can be either a DC or an AC signal. Thedevice multiplies this reference signal by the DAC code, divided by thefull-scale DAC code, to generate the output voltage.

Figure 4-2 shows how to make analog output connections to the 6711/6device.

Figure 4-2. Analog Output Connections

Digital I/O Signal ConnectionsThe digital I/O signals are DIO<0..7> and DGND. DIO<0..7> are the signals making up the DIO port, and DGND is the ground reference sigfor the DIO port. You can program all lines individually to be inputs or outputs.

Caution Exceeding the maximum input voltage ratings, which are listed in Table 4-2, cadamage the 6711/6713 device and the computer. National Instruments is NOT liable for any damages resulting from such signal connections.

+

–

+

–

+

–

Channel 0

Channel 1

ExternalReference

Signal(Optional)

Load

Load

VOUT 0

VOUT 1DAC1OUT

AOGND

DAC0OUT

EXTREF

Analog Output Channels

6711/6713 Device

Vref

!



te

4-3.

re e

Figure 4-3 shows signal connections for three typical digital I/O applications.

Figure 4-3. Digital I/O Connections

Figure 4-3 shows DIO<0..3> configured for digital input and DIO<4..7>configured for digital output. Digital input applications include receivingTTL signals and sensing external device states such as the switch stashown in Figure 4-3. Digital output applications include sending TTL signals and driving external devices such as the LED shown in Figure

The hardware up/down control for general-purpose counters 0 and 1 aconnected onboard to DIO6 and DIO7, respectively. Thus, you can usDIO6 and DIO7 to control the general-purpose counters. The up/downcontrol signals are input only and do not affect the operation of the DIO lines.

LED

+5 V

TTL Signal

+5 V

DIO<4..7>

DIO<0..3>

DGND

Switch

I/O Connector

6711/6713 Device



a e y.

or ter. n.

n

I9.

y

, six

e

Power ConnectionsTwo pins on the I/O connector supply +5 V from the computer power supply via a self-resetting fuse. The fuse will reset automatically withinfew seconds after the overcurrent condition is removed. These pins arreferenced to DGND and can be used to power external digital circuitr

• Power rating +4.65 to +5.25 VDC at 1 A

Caution Under no circumstances should you connect these +5 V power pins directly toanalog or digital ground or to any other voltage source on the 6711/6713 deviceany other device. Doing so can damage the 6711/6713 device and the compuNational Instruments is not liable for damages resulting from such a connectio

Timing Connections

Caution Exceeding the maximum input voltage ratings, which are listed in Table 4-2, cadamage the 6711/6713 device and the computer. National Instruments is NOT liable for any damages resulting from such signal connections.

All external control over the timing of the 6711/6713 device is routed through the 10 programmable function inputs labeled PFI0 through PFThese signals are explained in detail in the next section, Programmable Function Input Connections. These PFIs are bidirectional; as outputs theare not programmable and reflect the state of many DAQ, waveform generation, and general-purpose timing signals. On 6711/6713 devicePFIs are bidirectional and four PFIs are input only (PFI0, PFI1, PFI2, PFI7). There are four other dedicated outputs for the remainder of thetiming signals (on the 6711/6713 SCANCLK is not used). As inputs, thPFI signals are programmable and can control any DAQ, waveform generation, and general-purpose timing signals.

The waveform generation signals are explained in the Waveform Generation Timing Connections section later in this chapter. The general-purpose timing signals are explained in the General-Purpose Timing Signal Connections section later in this chapter.

!

!



is FI0 .

lly

rol.

al ut

it

All digital timing connections are referenced to DGND. This referencedemonstrated in Figure 4-4, which shows how to connect an external Psource and an external PFI2 source to two 6711/6713 device PFI pins

Figure 4-4. Timing I/O Connections

Programmable Function Input ConnectionsThere are a total of seven internal timing signals that you can externacontrol from the PFI pins. The source for each of these signals is software-selectable from any of the PFIs when you want external contThis flexible routing scheme reduces the need to change the physicalwiring to the device I/O connector for different applications requiring alternative wiring.

You can individually enable six of the PFI pins to output a specific interntiming signal. For example, if you need the UPDATE* signal as an outpon the I/O connector, software can turn on the output driver for the PFI5/UPDATE* pin. Be careful not to drive a PFI signal externally whenis configured as an output.

PFI0Source

DGND

PFI0

PFI2

PFI2Source

I/O Connector

6711/6713 Device



tion

ion

his no

th

I

as

de. e

the ate E*.

ing ith

As an input, you can individually configure each PFI for edge or level detection and for polarity selection, as well. You can use the polarity selection for any of the seven timing signals, but the edge or level detecwill depend upon the particular timing signal being controlled. The detection requirements for each timing signal are listed within the sectthat discusses that individual signal.

In edge-detection mode, the minimum pulse width required is 10 ns. Tapplies for both rising-edge and falling-edge polarity settings. There ismaximum pulse-width requirement in edge-detect mode.

In level-detection mode, there are no minimum or maximum pulse-widrequirements imposed by the PFIs themselves, but there may be limitsimposed by the particular timing signal being controlled. These requirements are listed later in this chapter.

EXTSTROBE* SignalEXTSTROBE* is an output-only signal that is used for controlling SCXdevices.

Waveform Generation Timing ConnectionsThe analog group defined for the 6711/6713 device is controlled by WFTRIG, UPDATE*, and UISOURCE.

WFTRIG SignalAny PFI pin can externally input the WFTRIG signal, which is availablean output on the PFI6/WFTRIG pin.

As an input, the WFTRIG signal is configured in the edge-detection moYou can select any PFI pin as the source for WFTRIG and configure thpolarity selection for either rising or falling edge. The selected edge of WFTRIG signal starts the waveform generation for the DACs. The updinterval (UI) counter is started if you select internally generated UPDAT

As an output, the WFTRIG signal reflects the trigger that initiates waveform generation. This is true even if the waveform generation is beexternally triggered by another PFI. The output is an active high pulse wa pulse width of 25 to 50 ns. This output is set to tri-state at startup.



the

le

de. the the

t is nally se

Figures 4-5 and 4-6 show the input and output timing requirements forWFTRIG signal.

Figure 4-5. WFTRIG Input Signal Timing

Figure 4-6. WFTRIG Output Signal Timing

UPDATE* SignalAny PFI pin can externally input the UPDATE* signal, which is availabas an output on the PFI5/UPDATE* pin.

As an input, the UPDATE* signal is configured in the edge-detection moYou can select any PFI pin as the source for UPDATE* and configure polarity selection for either rising or falling edge. The selected edge of UPDATE* signal updates the outputs of the DACs. In order to use UPDATE*, you must set the DACs to posted-update mode.

As an output, the UPDATE* signal reflects the actual update pulse thaconnected to the DACs. This is true even if the updates are being extergenerated by another PFI. The output is an active low pulse with a pulwidth of 50 to 75 ns. This output is set to tri-state at startup.

Rising-edgepolarity

Falling-edgepolarity

t w

t w = 10 ns minimum

t w

tw = 25-50 ns



e

e

E* d by

ffer

e.

Figures 4-7 and 4-8 show the input and output timing requirements for thUPDATE* signal.

Figure 4-7. UPDATE* Input Signal Timing

Figure 4-8. UPDATE* Output Signal Timing

The DACs are updated within 100 ns of the leading edge. Separate thUPDATE* pulses with enough time that new data can be written to theDAC latches.

The UI counter for the 6711/6713 device normally generates the UPDATsignal unless you select some external source. The UI counter is startethe WFTRIG signal and can be stopped by software or the internal BuCounter.

D/A conversions generated by either an internal or external UPDATE*signal do not occur when gated by the software command register gat

UISOURCE SignalAny PFI pin can externally input the UISOURCE signal, which is not available as an output on the I/O connector. The UI counter uses the UISOURCE signal as a clock to time the generation of the UPDATE* signal. You must configure the PFI pin you select as the source for theUISOURCE signal in the level-detection mode. You can configure the

Rising-edgepolarity


t w

t w = 10 ns minimum

t w

tw = 50-75 ns



th

e

is

or

FI is

polarity selection for the PFI pin for either active high or active low. Figure 4-9 shows the timing requirements for the UISOURCE signal.

Figure 4-9. UISOURCE Signal Timing

The maximum allowed frequency is 20 MHz, with a minimum pulse widof 10 ns high or low. There is no minimum frequency limitation.

Either the 20 MHz or 100 kHz internal timebase normally generates thUISOURCE signal unless you select some external source.

General-Purpose Timing Signal ConnectionsThe general-purpose timing signals are GPCTR0_SOURCE, GPCTR0_GATE, GPCTR0_OUT, GPCTR0_UP_DOWN, GPCTR1_SOURCE, GPCTR1_GATE, GPCTR1_OUT, GPCTR1_UP_DOWN, and FREQ_OUT.

GPCTR0_SOURCE SignalAny PFI pin can externally input the GPCTR0_SOURCE signal, whichavailable as an output on the PFI8/GPCTR0_SOURCE pin.

As an input, the GPCTR0_SOURCE signal is configured in the edge-detection mode. You can select any PFI pin as the source for GPCTR0_SOURCE and configure the polarity selection for either risingfalling edge.

As an output, the GPCTR0_SOURCE signal reflects the actual clock connected to general-purpose counter 0. This is true even if another Pexternally inputting the source clock. This output is set to tri-state at startup.

t p

t w t w

t p

t w

= 50 ns minimum

= 10 ns minimum



th

tion nd se

uch

l s e at

Figure 4-10 shows the timing requirements for the GPCTR0_SOURCEsignal.

Figure 4-10. GPCTR0_SOURCE Signal Timing


The 20 MHz or 100 kHz timebase normally generates the GPCTR0_SOURCE signal unless you select some external source.

GPCTR0_GATE SignalAny PFI pin can externally input the GPCTR0_GATE signal, which is available as an output on the PFI9/GPCTR0_GATE pin.

As an input, the GPCTR0_GATE signal is configured in the edge-detecmode. You can select any PFI pin as the source for GPCTR0_GATE aconfigure the polarity selection for either rising or falling edge. You can uthe gate signal in a variety of different applications to perform actions sas starting and stopping the counter, generating interrupts, saving thecounter contents, and so on.

As an output, the GPCTR0_GATE signal reflects the actual gate signaconnected to general-purpose counter 0. This is true even if the gate ibeing externally generated by another PFI. This output is set to tri-statstartup.

t p

t w t w

t p

t w

= 50 ns minimum

= 10 ns minimum



nal.

tate

as unt gh.

Figure 4-11 shows the timing requirements for the GPCTR0_GATE sig

Figure 4-11. GPCTR0_GATE Signal Timing in Edge-Detection Mode

GPCTR0_OUT SignalThis signal is available only as an output on the GPCTR0_OUT pin. The GPCTR0_OUT signal reflects the terminal count (TC) of general-purpose counter 0. You have two software-selectable output options—pulse on TC and toggle output polarity on TC. The output polarity is software selectable for both options. This output is set to tri-sat startup. Figure 4-12 shows the timing of the GPCTR0_OUT signal.

Figure 4-12. GPCTR0_OUT Signal Timing

GPCTR0_UP_DOWN SignalThis signal can be externally input on the DIO6 pin and is not availablean output on the I/O connector. The general-purpose counter 0 will codown when this pin is at a logic low and count up when it is at a logic hiYou can disable this input so that software can control the up-down functionality and leave the DIO6 pin free for general use.

Rising-edgepolarity


t w

t w = 10 ns minimum

GPCTR0_SOURCE

GPCTR0_OUT

GPCTR0_OUT(Toggle output on TC)

(Pulse on TC)

TC



is

or

ted eing rtup.

th

n nd se

ons

GPCTR1_SOURCE SignalAny PFI pin can externally input the GPCTR1_SOURCE signal, whichavailable as an output on the PFI3/GPCTR1_SOURCE pin.

As an input, the GPCTR1_SOURCE signal is configured in the edge-detection mode. You can select any PFI pin as the source for GPCTR1_SOURCE and configure the polarity selection for either risingfalling edge.

As an output, the GPCTR1_SOURCE monitors the actual clock connecto general-purpose counter 1. This is true even if the source clock is bexternally generated by another PFI. This output is set to tri-state at sta

Figure 4-13 shows the timing requirements for the GPCTR1_SOURCEsignal.

Figure 4-13. GPCTR1_SOURCE Signal Timing


The 20 MHz or 100 kHz timebase normally generates the GPCTR1_SOURCE unless you select some external source.

GPCTR1_GATE SignalAny PFI pin can externally input the GPCTR1_GATE signal, which is available as an output on the PFI4/GPCTR1_GATE pin.

As an input, the GPCTR1_GATE signal is configured in edge-detectiomode. You can select any PFI pin as the source for GPCTR1_GATE aconfigure the polarity selection for either rising or falling edge. You can uthe gate signal in a variety of different applications to perform such actias starting and stopping the counter, generating interrupts, saving thecounter contents, and so on.

t p

t w t w

t p

t w

= 50 ns minimum

= 10 ns minimum



al s e at

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TC ble ows

As an output, the GPCTR1_GATE signal monitors the actual gate signconnected to general-purpose counter 1. This is true even if the gate ibeing externally generated by another PFI. This output is set to tri-statstartup.

Figure 4-14 shows the timing requirements for the GPCTR1_GATE sig

Figure 4-14. GPCTR1_GATE Signal Timing in Edge-Detection Mode

GPCTR1_OUT SignalThis signal is available only as an output on the GPCTR1_OUT pin. The GPCTR1_OUT signal monitors the TC device general-purpose counter 1. You have two software-selectable output options—pulse onand toggle output polarity on TC. The output polarity is software selectafor both options. This output is set to tri-state at startup. Figure 4-15 shthe timing requirements for the GPCTR1_OUT signal.

Figure 4-15. GPCTR1_OUT Signal Timing

Rising-edgepolarity


t w

t w = 10 ns minimum

GPCTR1_SOURCE

GPCTR1_OUT

GPCTR1_OUT(Toggle output on TC)

(Pulse on TC)

TC



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GPCTR1_UP_DOWN SignalThis signal can be externally input on the DIO7 pin and is not availablean output on the I/O connector. General-purpose counter 1 counts dowwhen this pin is at a logic low and counts up at a logic high. This input cbe disabled so that software can control the up-down functionality andleave the DIO7 pin free for general use. Figure 4-16 shows the timing requirements for the GATE and SOURCE input signals and the timingspecifications for the 6711/6713 device OUT output signals.

Figure 4-16. GPCTR Timing Summary

The GATE and OUT signal transitions shown in Figure 4-16 are referento the rising edge of the SOURCE signal. This timing diagram assumesthe counters are programmed to count rising edges. The same timing diagram, but with the source signal inverted and referenced to the falliedge of the source signal, would apply when the counter is programmecount falling edges.

The GATE input timing parameters are referenced to the signal at the SOURCE input or to one of the internally generated signals on the 6711/6713 device. Figure 4-16 shows the GATE signal referenced to trising edge of a source signal. The gate must be valid (either high or lofor at least 10 ns before the rising or falling edge of a source signal forgate to take effect at that source edge, as shown by tgsu and tgh in

SOURCEV

IHV

IL

VIH

VIL

t sc t sp

t gsu t gh

t gw

GATE

t out

OUTV

OHV

OL

sc

ttttt

t 50 ns minimum

sp 23 ns minimum

gsu 10 ns minimum

gh 0 ns minimum

gw 10 ns minimum

out 80 ns maximum

Source Clock PeriodSource Pulse WidthGate Setup TimeGate Hold TimeGate Pulse WidthOutput Delay Time

t sp



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Figure 4-16. The gate signal is not required to be held after the active eof the source signal.

If you use an internal timebase clock, the gate signal cannot be synchronized with the clock. In this case, gates applied close to a souedge take effect either on that source edge or on the next one. This arrangement results in an uncertainty of one source clock period with respect to unsynchronized gating sources.

The OUT output timing parameters are referenced to the signal at theSOURCE input or to one of the internally generated clock signals on t6711/6713 device. Figure 4-16 shows the OUT signal referenced to thrising edge of a source signal. Any OUT signal state changes occur wi80 ns after the rising or falling edge of the source signal.

FREQ_OUT SignalThis signal is available only as an output on the FREQ_OUT pin. The frequency generator for the 6711/6713 device outputs the FREQ_OUTThe frequency generator is a 4-bit counter that can divide its input clockthe numbers 1 through 16. The input clock of the frequency generatorsoftware-selectable from the internal 10 MHz and 100 kHz timebases. output polarity is software selectable. This output is set to tri-state at startup.

Field Wiring ConsiderationsThe following recommendations apply for all signal connections to the6711/6713 device:

• Separate the 6711/6713 device signal lines from high-current or high-voltage lines. These lines can induce currents in or voltages the 6711/6713 device signal lines if they run in parallel paths at a cldistance. To reduce the magnetic coupling between lines, separatthem by a reasonable distance if they run in parallel, or run the lineright angles to each other.

• Do not run signal lines through conduits that also contain power lin

• Protect signal lines from magnetic fields caused by electric motorswelding equipment, breakers, or transformers by running them throspecial metal conduits.

For more information, refer to the application note, Field Wiring and Noise Consideration for Analog Signals, available from National Instruments.



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Calibration

This chapter discusses the calibration procedures for your PCI/PXI-6711/6713 device. If you are using the NI-DAQ device driver,that software includes calibration functions for performing all of the stein the calibration process.

Calibration refers to the process of minimizing measurement and outpvoltage errors by making small circuit adjustments. On the 6711/6713device, these adjustments take the form of writing values to onboard calibration DACs (CalDACs).

Some form of device calibration is required for all but the most forgivinapplications. If you do not calibrate your device, your signals and measurements could have very large offset, gain, and linearity errors.

Three levels of calibration are available to you and described in this chaThe first level is the fastest, easiest, and least accurate; whereas, the level is the slowest, most difficult, and most accurate.

Loading Calibration ConstantsThe 6711/6713 device is factory calibrated before shipment at approximately 25° C to the levels indicated in Appendix A, Specifications. The associated calibration constants—the values that were written to CalDACs to achieve calibration in the factory—are stored in the onboanonvolatile memory (EEPROM). Because the CalDACs have no memcapability, they do not retain calibration information when the device isunpowered. Loading calibration constants refers to the process of loadthe CalDACs with the values stored in the EEPROM. NI-DAQ softwaredetermines when this is necessary and does it automatically. If you areusing NI-DAQ, you must load these values yourself.

In the EEPROM there is a user-modifiable calibration area in addition the permanent factory calibration area. This means that you can load CalDACs with values either from the original factory calibration or fromcalibration that you subsequently performed.

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Chapter 5 Calibration

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The loading factory calibration constants method of calibration is not vaccurate because it does not take into account the fact that the devicemeasurement and output voltage errors can vary with time and temperaIt is better to self-calibrate when the device is installed in the environmin which it will be used.

Self-CalibrationThe 6711/6713 device can measure and correct for almost all of its calibration-related errors without any external signal connections. YouNational Instruments software provides a self-calibration method. Thisself-calibration process, which generally takes less than two minutes, the preferred method of assuring accuracy in your application. Initiate self-calibration to minimize the effects of any offset, gain, and linearitydrifts, particularly those due to warmup.

Immediately after self-calibration, the only significant residual calibratioerror could be gain error due to time or temperature drift of the onboarvoltage reference. This error is addressed by external calibration, whicdiscussed in the following section. If you are interested primarily in relatmeasurements and you can ignore a small1 amount of gain error self-calibration should be sufficient.

External CalibrationThe 6711/6713 device has an onboard calibration reference to ensureaccuracy of self-calibration. Its specifications are listed in Appendix A,Specifications. The reference voltage is measured at the factory and stoin the EEPROM for subsequent self-calibrations. This voltage is stableenough for most applications, but if you are using your device at an extrtemperature or if the onboard reference has not been measured for a ymore, you may wish to externally calibrate your device.

An external calibration refers to calibrating your device with a known external reference rather than relying on the onboard reference. Redetermining the value of the onboard reference is part of this processthe results can be saved in the EEPROM, so you should not have to peran external calibration very often. You can externally calibrate your devby calling the NI-DAQ calibration function.

1 The onboard voltage reference has a temperature coefficient of 5 ppm/° C max (25 µV/° C). Therefore if the temperadifference between the factory calibration and the service environment is less than 10° C, the maximum gain error is l50 ppm, 0.005 percent at full scale output, after performing self-calibration.


Chapter 5 Calibration

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To externally calibrate your device, be sure to use a very accurate extereference. The reference should be several times more accurate thandevice itself. For example, to calibrate a 12-bit device, the external reference should be at least ±0.0062% (±62 ppm) accurate.

Note National Instruments recommends using a +5 V external reference voltage whperforming calibration.

Other ConsiderationsThe CalDACs adjust the gain error of each analog output channel by adjusting the value of the reference voltage supplied to that channel. Tcalibration mechanism is designed to work only with the internal 10 V reference. Thus, in general, it is not possible to calibrate the analog ougain error when using an external reference. In this case, it is advisabaccount for the nominal gain error of the analog output channel either software or with external hardware. See Appendix A, Specifications, for analog output gain error information.


© National Instruments Corporation A-1 PCI/PXI-6711/6

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Specifications

This appendix lists the specifications of your 6711/6713 device. Thesespecifications are typical at 25° C unless otherwise noted.

6711/6713 Device

Analog Output

Output CharacteristicsNumber of channels ............................... 8 voltage outputs (6713 devic

4 voltage outputs (6711 devices)

Resolution .............................................. 12 bits, 1 in 4,096

Max update rate

Number of Channels

Max Update Rate

Using Local FIFO (kS/s)1

Using Host PC Memory (kS/s)2

1 through 5 1000 1000

6 952 1000

7 833 869

8 740 769

1 These numbers apply to continuous waveform generation, which allows for the time takes to reset the FIFO to the beginning when cycling through it. This additional time, about 200 ns, is not incurred when using host PC memory for waveform generation. Mupdate rate in FIFO mode will not change irrespective of the number of devices in thesystem.

2 These number were measured using one PCI-6711/6713 device with a 90 MHz Pentmachine. These numbers may change when using more devices or when other CPU oactivity is taking place.

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Appendix A Specifications for 6711/6713 Device

Type of DAC ..........................................Double buffered, multiplying

FIFO buffer size

6713 .................................................16,384 samples

6711 .................................................8,192 samples

Data transfers ..........................................DMA, interrupts,programmed I/O

DMA modes ...........................................Scatter gather

Accuracy Information

Transfer CharacteristicsRelative accuracy (INL)

After calibration...............................±0.3 LSB typ, ±0.5 LSB max

Before calibration ............................±4 LSB max

DNL

After calibration...............................±0.3 LSB typ, ±1.0 LSB max

Before calibration ............................±3 LSB max

Monotonicity ..........................................12 bits guaranteed after calibration

Offset error

After calibration...............................±1.0 mV typ, ±5.9 mV max

Before calibration ............................±200 mV max

Nominal Range (V)

Absolute Accuracy

% of Reading Offset Temp Drift

Positive FS

Negative FS 24 Hours 90 Days 1 Year (mV) (%/° C)

10 –10 0.0177% 0.0197% 0.0219% ±5.933 0.0005%

Absolute accuracy = (% of Reading × Voltage) + Offset + (Temp Drift × Voltage)Note: Temp drift applies only if ambient is greater than ±10° C of previous external calibration.

PCI/PXI-6711/6713 User Manual A-2 © National Instruments Corporation


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Gain error (relative to internal reference)

After calibration.............................. ±0.01% of output max

Before calibration ........................... ±0.5% of output max

Gain error(relative to external reference) ............... +0% to +0.5% of output max,

adjustable

Voltage OutputRanges.................................................... ±10 V, ± EXTREF

Output coupling...................................... DC

Output impedance .................................. 0.1 Ω max

Current drive .......................................... ±5 mA max

Output stability....................................... Any passive load, up to 1500

Protection .............................................. Short-circuit to ground

Power-on state........................................ 0 V

External Reference Input

Range ..................................................... ±11 V

Overvoltage protection........................... ±25 V powered on,±15 V powered off

Input impedance..................................... 10 kΩ

Bandwidth (-3 dB) ................................. 1 MHz

Dynamic CharacteristicsSlew rate................................................. 20 V/µs

Noise ...................................................... 200 µVrms, DC to 1 MHz

© National Instruments Corporation A-3 PCI/PXI-6711/6713 User Manual


le

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Channel crosstalk....................................– 70 dB with SH6868EP cab(generating a 10 V, 10 pt sinusoidal at 100 KHz on the reference channel)

Total harmonic distortion .......................– 60 dB typ (generating a 10 V100 points, 10 kHz sinewave, summing 9 harmonics)

StabilityOffset temperature coefficient ................±50 µV/° C

Gain temperature coefficient

Internal reference.............................±25 ppm/° C

External reference............................±25 ppm/° C

Onboard calibration reference

Level ................................................5.000 V (±2.5 mV) (actual value stored in EEPROM)

Temperature coefficient...................±5.0 ppm/° C max

Long-term stability ..........................±15 ppm/

Digital I/ONumber of channels................................8 input/output

Compatibility ..........................................TTL/CMOS

Digital logic levels

Level Min Max

Input low voltage

Input high voltage

Input low current (Vin = 0 V)

Input high current (Vin = 5 V)

0.0 V

2.0 V

—

—

0.8 V

5.0 V

–320 µA

10 µA

Output low voltage (IOL

= 24 mA)

Output high voltage (IOH

= 13 mA)

—

4.35 V

0.4 V

—

1 000 h,



Power-on state........................................ Input (High-Z)

Data transfers ......................................... Programmed I/O

Timing I/ONumber of channels ............................... 2 up/down counter/timers,

1 frequency scaler

Resolution

Counter/timers ................................ 24 bits

Frequency scaler ............................. 4 bits

Compatibility ......................................... TTL/CMOS

Base clocks available

Counter/timers ................................ 20 MHz, 100 kHz

Frequency scaler ............................. 10 MHz, 100 kHz

Base clock accuracy ............................... ±0.01% over operating temperature

Max source frequency............................ 20 MHz

Min source pulse duration ..................... 10 ns, edge-detect mode

Min gate pulse duration ......................... 10 ns, edge-detect mode

Data transfers ......................................... DMA, interrupts, programmed I/O

DMA modes........................................... Scatter-gather

Triggers

Digital TriggerCompatibility ......................................... TTL

Response ................................................ Rising or falling edge

Pulse width............................................. 10 ns min



ve

RTSI and PXI Trigger Lines

♦ PCI-6711/6713

Trigger lines <0..6> ................................7

RTSI clock..............................................1

♦ PXI-6711/6713

Trigger lines <0..5> ................................6

Star trigger ..............................................1

Clock.......................................................1

Bus Interface

♦ PCI-6711/6713

Type ........................................................5 V PCI master, slave

♦ PXI-6711/6713

Type ........................................................PXI/CompactPCI master, sla

Power Requirement

PCI/PXI-6711

+5 VDC (±5% .................................0.80 A typ, 1.0 A max

Power available at I/O connector ....+4.65 to +5.25 VDC at 1 A

PCI/PXI-6713

+5 VDC (±5%) ................................1.25 A typ, 1.5 A max

Power available at I/O connector ....+4.65 to +5.25 VDC at 1 A



n.)

PhysicalDimensions (not including connectors)

PCI-6711/6713................................ 17.5 by 10.7 cm (6.87 by 4.2 i

PXI-6711/6713................................ 16 by 10 cm (6.3 by 3.9 in.)

I/O connector

PCI/PXI-6711/6713 ........................ 68-pin male SCSI-II type

EnvironmentOperating temperature............................ 0° to 50° C

Storage temperature ............................... –55° to 150° C

Relative humidity................................... 5% to 90% noncondensing


© National Instruments Corporation B-1 PCI/PXI-6711/6

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Common Questions

This appendix contains a list of commonly asked questions and their answers relating to usage and special features of your 6711/6713 dev

General InformationWhat is the 6711/6713 device?

The 6711/6713 device is a switchless and jumperless analog output dethat uses the DAQ-STC for timing.

What is the DAQ-STC?

The DAQ-STC is the system timing control application-specific integratcircuit (ASIC) designed by National Instruments and is the backbone of6711/6713 device. The DAQ-STC contains seven 24-bit counters and t16-bit counters. The counters are divided into the following three grou

• Analog input—two 24-bit, two 16-bit counters (not used on 6711/6713)

• Analog output—three 24-bit, one 16-bit counters

• General-purpose counter/timer functions—two 24-bit counters

The groups can be configured independently with timing resolutions o50 ns or 10 µs. With the DAQ-STC, you can interconnect a wide varietyinternal timing signals to other internal blocks. The interconnection scheis quite flexible and completely software configurable. New capabilitiessuch as buffered pulse generation, and seamlessly changing the samprate are possible.

What does update rate mean to me?

It means that this is the fastest you can output data from your device astill achieve accurate results. The 6711/6713 device has a update rate1 MS/s at up to 4 channels.

What type of 5 V protection does the 6711/6713 device have?

The 6711/6713 device has 5 V lines equipped with a self-resetting 1 A f

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Appendix B Common Questions

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this , the

C ing. t

Installation and ConfigurationHow do you set the base address for the 6711/6713 device?

The base address of the 6711/6713 device is assigned automatically through the bus protocol. This assignment is completely transparent to

What jumpers should I be aware of when configuring my 6711/6713 device?

The 6711/6713 device is jumperless and switchless.

Which National Instruments document should I read first to get started using DAQ software?

Your NI-DAQ or application software release notes documentation is always the best starting place.

Analog OutputI’m using the DACs to generate a waveform, but I discovered with a digital oscilloscope that there are glitches on the output signal. Is this normal?

When it switches from one voltage to another, any DAC produces glitcdue to released charges. The largest glitches occur when the most significant bit (MSB) of the D/A code switches. You can use a lowpassdeglitching filter to remove some of these glitches, depending on the frequency and nature of your output signal. In addition, if you are using output as a source to a system that has low bandwidth characteristicsglitches are ignored by the system.

Timing and Digital I/OWhat types of triggering can be hardware-implemented on my 6711/6713 device?

Hardware digital triggering is supported on the 6711/6713 device.

What functionality does the DAQ-STC make possible?

The DAQ-STC has the complexity of more than 24 chips. The DAQ-STmakes possible PFI lines, selectable logic level, and frequency shift keyThe DAQ-STC also makes buffered operations possible, such as direcup/down control, single pulse or pulse train generation, equivalent timesampling, buffered period, and buffered semiperiod measurement.

PCI/PXI-6711/6713 User Manual B-2 © National Instruments Corporation

Appendix B Common Questions

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I’m using one of the general-purpose counter/timers on my 6711/6713 device, but I do not see the counter/timer output on the I/O connector. What am I doing wrong?

If you are using the NI-DAQ language interface or LabWindows/CVI, yomust configure the output line to output the signal to the I/O connector. the Select_Signal call in NI-DAQ to configure the output line. By default, all timing I/O lines except EXTSTROBE* are tri-stated.

What are the PFIs and how do I configure these lines?

PFIs are Programmable Function Inputs. These lines serve as connecto virtually all internal timing signals.

If you are using the NI-DAQ language interface or LabWindows/CVI, uthe Select_Signal function to route internal signals to the I/O connectoroute external signals to internal timing sources, or tie internal timing signals together.

If you are using NI-DAQ with LabVIEW and you want to connect externsignal sources to the PFI lines, you can use AO Clock Config, AO Trigand Gate Config, CTR Mode Config, and CTR Pulse Config advanced leVIs to indicate which function the connected signal will serve. Use theRoute Signal VI to enable the PFI lines to output internal signals.

Caution If you enable a PFI line for output, do not connect any external signal source tit; if you do, you can damage the device, the computer, and the connected equipment.

What are the power-on states of the PFI and DIO lines on the I/O connector?

At system power-on and reset, both the PFI and DIO lines are set to himpedance by the hardware. This means that the device circuitry is noactively driving the output either high or low. However, these lines mayhave pull-up or pull-down resistors connected to them as shown in Table 4-2. These resistors weakly pull the output to either a logic highlogic low state. For example, DIO(0) will be in the high impedance staafter power on, and Table 4-2 shows that there is a 50 kΩ pull-up resistor. This pull-up resistor will set the DIO(0) pin to a logic high when the outpis in a high impedance state.

!

© National Instruments Corporation B-3 PCI/PXI-6711/6713 User Manual

© National Instruments Corporation C-1 PCI/PXI-6711/6

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Customer Communication

For your convenience, this appendix contains forms to help you gather the information necessato help us solve your technical problems and a form you can use to comment on the product documentation. When you contact us, we need the information on the Technical Support Formthe configuration form, if your manual contains one, about your system configuration to answerquestions as quickly as possible.

National Instruments has technical assistance through electronic, fax, and telephone systems toprovide the information you need. Our electronic services include a bulletin board service, an FTa fax-on-demand system, and e-mail support. If you have a hardware or software problem, first electronic support systems. If the information available on these systems does not answer youquestions, we offer fax and telephone support through our technical support centers, which areby applications engineers.

Electronic Services

Bulletin Board SupportNational Instruments has BBS and FTP sites dedicated for 24-hour support with a collection ofand documents to answer most common customer questions. From these sites, you can also dthe latest instrument drivers, updates, and example programs. For recorded instructions on howthe bulletin board and FTP services and for BBS automated information, call 512 795 6990. Yoaccess these services at:

United States: 512 794 5422Up to 14,400 baud, 8 data bits, 1 stop bit, no parity

United Kingdom: 01635 551422Up to 9,600 baud, 8 data bits, 1 stop bit, no parity

France: 01 48 65 15 59Up to 9,600 baud, 8 data bits, 1 stop bit, no parity

FTP SupportTo access our FTP site, log on to our Internet host, ftp.natinst.com , as anonymous and use your Internet address, such as [email protected] , as your password. The support files anddocuments are located in the /support directories.

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Fax-on-Demand SupportFax-on-Demand is a 24-hour information retrieval system containing a library of documents on arange of technical information. You can access Fax-on-Demand from a touch-tone telephone a512 418 1111.

E-Mail Support (Currently USA Only)You can submit technical support questions to the applications engineering team through e-maiInternet address listed below. Remember to include your name, address, and phone number socontact you with solutions and suggestions.

[email protected]

Telephone and Fax SupportNational Instruments has branch offices all over the world. Use the list below to find the technicsupport number for your country. If there is no National Instruments office in your country, contthe source from which you purchased your software to obtain support.

Country Telephone FaxAustralia 03 9879 5166 03 9879 6277Austria 0662 45 79 90 0 0662 45 79 90 19Belgium 02 757 00 20 02 757 03 11Brazil 011 288 3336 011 288 8528Canada (Ontario) 905 785 0085 905 785 0086Canada (Québec) 514 694 8521 514 694 4399Denmark 45 76 26 00 45 76 26 02Finland 09 725 725 11 09 725 725 55France 01 48 14 24 24 01 48 14 24 14Germany 089 741 31 30 089 714 60 35Hong Kong 2645 3186 2686 8505Israel 03 6120092 03 6120095Italy 02 413091 02 41309215Japan 03 5472 2970 03 5472 2977Korea 02 596 7456 02 596 7455Mexico 5 520 2635 5 520 3282Netherlands 0348 433466 0348 430673Norway 32 84 84 00 32 84 86 00Singapore 2265886 2265887Spain 91 640 0085 91 640 0533Sweden 08 730 49 70 08 730 43 70Switzerland 056 200 51 51 056 200 51 55Taiwan 02 377 1200 02 737 4644United Kingdom 01635 523545 01635 523154United States 512 795 8248 512 794 5678

PCI/PXI-6711/6713 User Manual C-2 © National Instruments Corporation

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Technical Support FormPhotocopy this form and update it each time you make changes to your software or hardware, athe completed copy of this form as a reference for your current configuration. Completing this faccurately before contacting National Instruments for technical support helps our applications engineers answer your questions more efficiently.

If you are using any National Instruments hardware or software products related to this probleminclude the configuration forms from their user manuals. Include additional pages if necessary.

Name ______________________________________________________________________

Company ___________________________________________________________________

Address ____________________________________________________________________

___________________________________________________________________________

Fax ( ___ ) ________________Phone ( ___ ) ______________________________________

Computer brand____________ Model ___________________Processor _____________________

Operating system (include version number) ________________________________________

Clock speed ______MHz RAM _____MB Display adapter ________________________

Mouse ___yes ___no Other adapters installed___________________________________

Hard disk capacity _____MB Brand______________________________________________

Instruments used _____________________________________________________________

___________________________________________________________________________

National Instruments hardware product model _____________ Revision ____________________

Configuration _______________________________________________________________

National Instruments software product ___________________ Version _____________________

Configuration _______________________________________________________________

The problem is: ______________________________________________________________

___________________________________________________________________________

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List any error messages: _______________________________________________________

___________________________________________________________________________

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The following steps reproduce the problem: _______________________________________

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item. , and ore your

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6711/6713 Device Hardware and Software Configuration FormRecord the settings and revisions of your hardware and software on the line to the right of eachComplete a new copy of this form each time you revise your software or hardware configurationuse this form as a reference for your current configuration. Completing this form accurately befcontacting National Instruments for technical support helps our applications engineers answer questions more efficiently.

National Instruments Products6711/6713 device ____________________________________________________________

6711/6713 device serial number _________________________________________________

Hardware revision ___________________________________________________________

Interrupt level of hardware _____________________________________________________

DMA channels of hardware ____________________________________________________

Base I/O address of hardware ___________________________________________________

Programming choice _________________________________________________________

National Instruments software __________________________________________________

Other devices in system _______________________________________________________

Base I/O address of other devices _______________________________________________

DMA channels of other devices _________________________________________________

Interrupt level of other devices __________________________________________________

Other ProductsComputer make and model ____________________________________________________

Microprocessor ______________________________________________________________

Clock frequency or speed ______________________________________________________

Type of video board installed ___________________________________________________

Operating system version ______________________________________________________

Operating system mode _______________________________________________________

Programming language _______________________________________________________

Programming language version _________________________________________________

Other boards in system ________________________________________________________

Base I/O address of other boards _______________________________________________

DMA channels of other boards _________________________________________________

Interrupt level of other boards __________________________________________________

ducts.

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Documentation Comment FormNational Instruments encourages you to comment on the documentation supplied with our proThis information helps us provide quality products to meet your needs.

Title: PCI/PXI-6711/6713 User Manual

Edition Date: October 1998

Part Number: 322080A-01

Please comment on the completeness, clarity, and organization of the manual.

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If you find errors in the manual, please record the page numbers and describe the errors.

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Thank you for your help.

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E-Mail Address ______________________________________________________________

Phone ( ___ ) __________________________ Fax ( ___ ) ___________________________

Mail to: Technical Publications Fax to: Technical PublicationsNational Instruments Corporation National Instruments Corporation6504 Bridge Point Parkway 512 794 5678Austin, Texas 78730-5039

Glossary

Prefix Meanings Value

p- pico 10–12

n- nano- 10–9

µ- micro- 10– 6

m- milli- 10–3

k- kilo- 103

M- mega- 106

G- giga- 109

t- tera- 1012

Numbers/Symbols

° degrees

> greater than

≥ greater than or equal to

< less than

≤ less than or equal to

/ per

% percent

± plus or minus

+ positive of, or plus

– negative of, or minus

Ω ohms

© National Instruments Corporation G-1 PCI/PXI-6711/6713 User Manual

Glossary

ple,

he tial. sist

square root of

+5 V +5 VDC source signal

A

A amperes

AC alternating current

A/D analog-to-digital

ADC analog-to-digital converter—an electronic device, often an integrated circuit, that converts an analog voltage to a digital number

ANSI American National Standards Institute

AO analog output

AOGND analog output ground signal

ASIC Application-Specific Integrated Circuit—a proprietary semiconductor component designed and manufactured to perform a set of specific functions.

B

bipolar a signal range that includes both positive and negative values (for exam–5 V to +5 V)

C

C Celsius

CalDAC calibration DAC

CH channel—pin or wire lead to which you apply or from which you read tanalog or digital signal. Analog signals can be single-ended or differenFor digital signals, you group channels to form ports. Ports usually conof either four or eight digital channels

cm centimeter

PCI/PXI-6711/6713 User Manual G-2 © National Instruments Corporation

Glossary

age

and

ral ents

wo

CMOS complementary metal-oxide semiconductor

CMRR common-mode rejection ratio—a measure of an instrument’s ability toreject interference from a common-mode signal, usually expressed in decibels (dB)

CONVERT* convert signal

counter/timer a circuit that counts external pulses or clock pulses (timing)

CTR counter

D

D/A digital-to-analog

DAC digital-to-analog converter—an electronic device, often an integrated circuit, that converts a digital number into a corresponding analog voltor current

DAQ data acquisition—a system that uses the computer to collect, receive,generate electrical signals

DAQ-STC Data acquisition system timing controller. An application-specific integrated circuit (ASIC) for the system timing requirements of a geneA/D and D/A system, such as a system containing the National InstrumE Series devices.

dB decibel—the unit for expressing a logarithmic measure of the ratio of tsignal levels: dB=20log10 V1/V2, for signals in volts

DC direct current

DGND digital ground signal

DI digital input

DIFF differential mode

DIO digital input/output

DIP dual inline package

dithering the addition of Gaussian noise to an analog input signal


Glossary

rom

ring

n be

to or

ing ds re ase form ffect

he

DMA direct memory access—a method by which data can be transferred to/fcomputer memory from/to a device or memory on the bus while the processor does something else. DMA is the fastest method of transferdata to/from computer memory.

DNL differential nonlinearity—a measure in least significant bit of the worst-case deviation of code widths from their ideal value of 1 LSB

DO digital output

E

EEPROM electrically erasable programmable read-only memory—ROM that caerased with an electrical signal and reprogrammed

EXTSTROBE external strobe signal

F

FIFO first-in first-out memory buffer—FIFOs are often used on DAQ devicestemporarily store incoming or outgoing data until that data can be readwritten. For example, an analog input FIFO stores the results of A/D conversions until the data can be read into system memory. Programmthe DMA controller and servicing interrupts can take several milliseconin some cases. During this time, data accumulates in the FIFO for futuretrieval. With a larger FIFO, longer latencies can be tolerated. In the cof analog output, a FIFO permits faster update rates, because the wavedata can be stored in the FIFO ahead of time. This again reduces the eof latencies associated with getting the data from system memory to tDAQ device.

FREQ_OUT frequency output signal

ft feet

G

GATE gate signal

GPCTR general-purpose counter signal


Glossary

fer

GPCTR0_GATE general-purpose counter 0 gate signal

GPCTR0_OUT general-purpose counter 0 output signal

GPCTR0_SOURCE general-purpose counter 0 clock source signal

GPCTR0_UP_DOWN general-purpose counter 0 up down signal

GPCTR1_GATE general-purpose counter 1 gate signal

GPCTR1_OUT general-purpose counter 1 output signal

GPCTR1_SOURCE general-purpose counter 1 clock source signal

GPCTR1_UP_DOWN general-purpose counter 1 up down signal

H

h hour

hex hexadecimal

Hz hertz

I

INL integral nonlinearity–For an ADC, deviation of codes of the actual transfunction from a straight line.

I/O input/output—the transfer of data to/from a computer system involvingcommunications channels, operator interface devices, and/or data acquisition and control interfaces

IOH current, output high

IOL current, output low

K

kHz kilohertz


Glossary

r to

such hts, s, s.

stem

L

LED light emitting diode

LSB least significant bit

M

m meter

MB megabytes of memory

MHz megahertz

MIO multifunction I/O

MITE MXI Interface to Everything

MSB most significant bit

mux multiplexer—a switching device with multiple inputs that sequentially connects each of its inputs to its output, typically at high speeds, in ordemeasure several signals with a single analog input channel

mV millivolts

N

NC normally closed, or not connected

NI-DAQ National Instruments driver software for DAQ hardware

noise an undesirable electrical signal—Noise comes from external sourcesas the AC power line, motors, generators, transformers, fluorescent ligCRT displays, computers, electrical storms, welders, radio transmitterand internal sources such as semiconductors, resistors, and capacitorNoise corrupts signals you are trying to send or receive.

NRSE nonreferenced single-ended mode—all measurements are made withrespect to a common (NRSE) measurement system reference, but thevoltage at this reference can vary with respect to the measurement syground


Glossary

us

bus tions;

r (2) ut

O

OUT output pin—a counter output pin where the counter can generate varioTTL pulse waveforms

P

PCI Peripheral Component Interconnect—a high-performance expansion architecture originally developed by Intel to replace ISA and EISA. It isachieving widespread acceptance as a standard for PCs and work-stait offers a theoretical maximum transfer rate of 132 MB/s.

PFI Programmable Function Input

PFI3/GPCTR1_SOURCE

PFI3/general purpose counter 1 source

PFI4/GPCTR1_GATE PFI4/general-purpose counter 1 gate

PFI5/UPDATE* PFI5/update

PFI6/WFTRIG PFI6/waveform trigger

PFI8/GPCTR0_SOURCE

PFI8/general-purpose counter 0 source

PFI9/GPCTR0_GATE PFI9/general-purpose counter 0 gate

PGIA Programmable Gain Instrumentation Amplifier

port (1) a communications connection on a computer or a remote controllea digital port, consisting of four or eight lines of digital input and/or outp

ppm parts per million

pu pull-up

R

RAM random access memory

rms root mean square


Glossary

ect to

ature

us the

Q

red

when

RSE referenced single-ended mode—all measurements are made with respa common reference measurement system or a ground. Also called agrounded measurement system

RTD resistive temperature detector—a metallic probe that measures temperbased upon its coefficient of resistivity

RTSIbus Real-Time System Integration bus—the National Instruments timing bthat connects DAQ devices directly, by means of connectors on top ofdevices, for precise timing synchronization between multiple devices

RTSI_OSC RTSI Oscillator—RTSI bus master clock

S

s seconds

S samples

SCANCLK scan clock signal

SCXI Signal Conditioning eXtensions for Instrumentation—the National Instruments product line for conditioning low-level signals within an external chassis near sensors so only high-level signals are sent to DAdevices in the noisy computer environment

SE single-ended—a term used to describe an analog input that is measuwith respect to a common ground

settling time the amount of time required for a voltage to reach its final value withinspecified limits

signal conditioning the manipulation of signals to prepare them for digitizing

SISOURCE SI counter clock signal

SOURCE source signal

S/s samples per second—used to express the rate at which a DAQ devicesamples an analog signal

system noise a measure of the amount of noise seen by an analog circuit or an ADCthe analog inputs are grounded


Glossary

nic

ction

T

TC terminal count—the ending value of a counter

tgh gate hold time

tgsu gate setup time

tgw gate pulse width

tout output delay time

THD total harmonic distortion—the ratio of the total rms signal due to harmodistortion to the overall rms signal, in decibel or a percentage

thermocouple a temperature sensor created by joining two dissimilar metals. The junproduces a small voltage as a function of the temperature.

TRIG trigger signal

tsc source clock period

tsp source pulse width

TTL transistor-transistor logic

U

UI update interval

UISOURCE update interval counter clock signal

unipolar a signal range that is always positive (for example, 0 to +10 V)

UPDATE update signal

V

V volts

VDC volts direct current


Glossary

ic
VI virtual instrument—(1) a combination of hardware and/or software
elements, typically used with a PC, that has the functionality of a classstand-alone instrument (2) a LabVIEW software module (VI), which consists of a front panel user interface and a block diagram program

VIH volts, input high

VIL volts, input low

Vin volts in

Vm measured voltage

VOH volts, output high

VOL volts, output low

Vref reference voltage

Vrms volts, root mean square

W

WFTRIG waveform generation trigger signal


Index

-7

Numbers+5 V signal

description (table), 4-3power connections, 4-9self-resetting fuse, 4-9, B-1

Aaccuracy information, analog output, A-2analog output, 3-2 to 3-3

questions about, B-2reference selection, 3-3reglitch selection, 3-3

analog output specifications, A-1 to A-4accuracy information, A-2dynamic characteristics, A-3 to A-4external reference input, A-3output characteristics, A-1 to A-2stability, A-4transfer characteristics, A-2 to A-3voltage output, A-3

AOGND signalanalog output signal connections, 4-6 to 4-7description (table), 4-3signal summary (table), 4-4

Bblock diagram, 3-2bulletin board support, E-1bus interface specifications, A-6

Ccables

custom cabling, 1-7field wiring considerations, 4-20optional equipment, 1-7

calibration, 5-1 to 5-3adjusting for gain error, 5-3external calibration, 5-2 to 5-3loading calibration constants, 5-1 to 5-2self-calibration, 5-2

clocks, device and RTSI, 3-5common questions. See questions and answers.CompactPCI, using with PXI, 1-2 to 1-3ComponentWorks software, 1-4configuration

PCI/PXI-6711/6713, 2-3questions about, B-2

connector. See I/O connector.counter/timers, questions about, B-3customer communication, xii, E-1 to E-2

DDAC<0..7>OUT signal

analog output signal connections, 4-6 to 4description (table), 4-3signal summary (table), 4-4

DAQ-STC system timing controller, 1-1, B-1, B-2

deglitching filter, B-2DGND signal

description (table), 4-3digital I/O connections, 4-7signal summary (table), 4-4

© National Instruments Corporation I-1 PCI/PXI-6711/6713 User Manual

Index

0

6

8

digital I/Ooperation, 3-3questions about, B-2 to B-3signal connections, 4-7 to 4-8specifications, A-4

digital trigger specifications, A-5DIO<0..7> signal

description (table), 4-3digital I/O connections, 4-7 to 4-8signal summary (table), 4-5

dltd hardware installation, 2-1 to 2-2documentation

conventions used in manual, xNational Instruments documentation, xiorganization of manual, ix-xrelated documentation, xii

EEEPROM storage of calibration constants, 5-1electronic support services, E-1 to E-2e-mail support, E-2environment specifications, A-7equipment, optional, 1-7external reference input specifications, A-3EXTREF signal

analog output reference selection, 3-3analog output signal connections,

4-6 to 4-7description (table), 4-3signal summary (table), 4-5

EXTSTROBE* signalcontrolling SCXI devices, 4-11description (table), 4-3signal summary (table), 4-5

Ffax and telephone support numbers, E-2Fax-on-Demand support, E-2field wiring considerations, 4-20

FREQ_OUT signaldescription (table), 4-4general-purpose timing connections, 4-2signal summary (table), 4-6

frequently asked questions. See questions and answers.

FTP support, E-1fuse, self-resetting, 4-9, B-1

Ggeneral-purpose timing signal connections,

4-14 to 4-20FREQ_OUT signal, 4-20GPCTR0_GATE signal, 4-15 to 4-16GPCTR0_OUT signal, 4-16GPCTR0_SOURCE signal, 4-14 to 4-15GPCTR0_UP_DOWN signal, 4-16GPCTR1_GATE signal, 4-17 to 4-18GPCTR1_OUT signal, 4-18GPCTR1_SOURCE signal, 4-17GPCTR1_UP_DOWN signal,

4-19 to 4-20questions about, B-3

glitches, 3-3, B-2GPCTR0_GATE signal, 4-15 to 4-16GPCTR0_OUT signal

description (table), 4-4general-purpose timing connections, 4-1signal summary (table), 4-6

GPCTR0_SOURCE signal, 4-14 to 4-15GPCTR0_UP_DOWN signal, 4-16GPCTR1_GATE signal, 4-17 to 4-18GPCTR1_OUT signal

description (table), 4-3general-purpose timing connections, 4-1signal summary (table), 4-5

GPCTR1_SOURCE signal, 4-17GPCTR1_UP_DOWN signal, 4-19 to 4-20

PCI/PXI-6711/6713 User Manual I-2 © National Instruments Corporation

Index

6

Hhardware installation

steps for, 2-1 to 2-2unpacking PCI/PXI-6711/6713, 1-4

hardware overviewanalog output, 3-2 to 3-3reference selection, 3-3reglitch selection, 3-3

block diagram, 3-2digital I/O, 3-3timing signal routing, 3-3 to 3-6

device and RTSI clocks, 3-5programmable function inputs, 3-5RTSI triggers, 3-5 to 3-6

Iinstallation

hardware, 2-1 to 2-2questions about, B-2software, 2-1unpacking PCI/PXI-6711/6713, 1-4

I/O connector, 4-1 to 4-6exceeding maximum ratings

(warning), 4-1I/O signal summary (table), 4-4 to 4-6optional equipment, 1-7pin assignments (figure), 4-2signal descriptions (table), 4-3 to 4-4

JJ2 pin assignments for PCI/PXI-6711/6713

(table), 1-3

LLabVIEW and LabWindows/CVI application

software, 1-4

Mmanual. See documentation.MITE bus interface chip, 1-1

NNI-DAQ driver software, 1-5 to 1-6

Ooptional equipment, 1-7

PPCI/PXI-6711/6713. See also hardware

overview.custom cabling, 1-7optional equipment, 1-7overview, 1-1 to 1-2questions about, B-1 to B-3

general information, B-1installation and configuration, B-2timing and digital I/O, B-2 to B-3

requirements for getting started, 1-3software programming choices, 1-4 to 1-

National Instruments application statement, 1-4 to 1-5

NI-DAQ driver software, 1-5 to 1-6register-level programming, 1-6

unpacking, 1-4using PXI with CompactPCI, 1-2 to 1-3

PFI0 signaldescription (table), 4-3signal summary (table), 4-5




Index

PFI3/GPCTR1_SOURCE signaldescription (table), 4-3signal summary (table), 4-5

PFI4/GPCTR1_GATE signaldescription (table), 4-3signal summary (table), 4-5

PFI5/UPDATE* signaldescription (table), 4-4signal summary (table), 4-5

PFI6/WFTRIG signaldescription (table), 4-4signal summary (table), 4-5


PFI8/GPCTR0_SOURCE signaldescription (table), 4-4signal summary (table), 4-5

PFI9/GPCTR0_GATE signaldescription (table), 4-4signal summary (table), 4-6

PFIs (programmable function inputs), 4-10 to 4-11

connecting to external signal source (warning), B-3

questions about, B-3signal routing, 3-5timing connections, 4-10 to 4-11

physical specifications, A-7pin assignments (figure), 4-2power connections, 4-9

+5 V power pins, 4-9power-on states of PFI and DIO lines, B-3self-resetting fuse, 4-9

power requirement specifications, A-6programmable function inputs (PFIs). See

PFIs (programmable function inputs).PXI, using with CompactPCI, 1-2 to 1-3PXI trigger line specifications, A-6

Qquestions and answers

general information, B-1installation and configuration, B-2timing and digital I/O, B-2 to B-3

Rreference selection, analog output, 3-3register-level programming, 1-6reglitch selection, analog output, 3-3requirements for getting started, 1-3RTSI clocks, 3-5RTSI triggers, 3-5 to 3-6

RTSI bus signal connections (figure), 3-6specifications, A-6

Ssignal connections

analog output signal connections, 4-6 to 4-7

digital I/O, 4-7 to 4-8field wiring considerations, 4-20general-purpose timing signal

connections, 4-14 to 4-20FREQ_OUT signal, 4-20GPCTR0_GATE signal, 4-15 to 4-16GPCTR0_OUT signal, 4-16GPCTR0_SOURCE signal,

4-14 to 4-15GPCTR0_UP_DOWN signal, 4-16GPCTR1_GATE signal, 4-17 to 4-18GPCTR1_OUT signal, 4-18GPCTR1_SOURCE signal, 4-17GPCTR1_UP_DOWN signal,

4-19 to 4-20


Index

,

I/O connector, 4-1 to 4-6exceeding maximum ratings

(warning), 4-1I/O signal summary (table),

4-4 to 4-6pin assignments (figure), 4-2signal descriptions (table), 4-3 to 4-4

power connections, 4-9programmable function input

connections, 4-10 to 4-11timing connections, 4-9 to 4-20waveform generation timing connections,

4-11 to 4-14UISOURCE signal, 4-13 to 4-14UPDATE* signal, 4-12 to 4-13WFTRIG signal, 4-11 to 4-12

software installation, 2-1software programming choices, 1-4 to 1-6

National Instruments application software, 1-4 to 1-5

NI-DAQ driver software, 1-5 to 1-6register-level programming, 1-6

specificationsanalog output, A-1 to A-4

accuracy information, A-2dynamic characteristics, A-3 to A-4external reference input, A-3output characteristics, A-1 to A-2stability, A-4transfer characteristics, A-2 to A-3voltage output, A-3

bus interface, A-6digital I/O, A-4digital trigger, A-5environment, A-7physical, A-7power requirements, A-6RTSI and PXI trigger lines, A-6timing I/O, A-5

stability specifications, A-4

Ttechnical support, E-1 to E-2telephone and fax support numbers, E-2theory of operation. See hardware overview.timing connections, 4-9 to 4-20

general-purpose timing signal connections, 4-14 to 4-20

FREQ_OUT signal, 4-20GPCTR0_GATE signal, 4-15 to 4-16GPCTR0_OUT signal, 4-16GPCTR0_SOURCE signal,

4-14 to 4-15GPCTR0_UP_DOWN signal, 4-16GPCTR1_GATE signal, 4-17 to 4-18GPCTR1_OUT signal, 4-18GPCTR1_SOURCE signal, 4-17GPCTR1_UP_DOWN signal,

4-19 to 4-20programmable function input

connections, 4-10 to 4-11questions about, B-2 to B-3timing I/O connections (figure), 4-10waveform generation timing connections


timing I/O specifications, A-5timing signal routing, 3-3 to 3-6

device and RTSI clocks, 3-5internal timing signals, 3-4programmable function inputs, 3-5RTSI triggers, 3-5 to 3-6UPDATE* signal routing (figure), 3-4

transfer characteristic specifications, A-2 to A-3

triggersdigital trigger specifications, A-5questions about, B-2


Index

UUISOURCE signal, 4-13 to 4-14unpacking PCI/PXI-6711/6713, 1-4UPDATE* signal

input signal timing (figure), 4-13output signal timing (figure), 4-13signal routing, 3-4timing connections, 4-12 to 4-13

VVCC signal (table), 4-5VirtualBench software, 1-5voltage output specifications, A-3

Wwaveform generation, questions about, B-2waveform generation timing connections,


WFTRIG signalinput signal timing (figure), 4-12output signal timing (figure), 4-12timing connections, 4-11 to 4-12

wiring considerations, 4-20


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