pc architecture fundamentals copyright © 1996-2003 intel corp. bios & post chapter 2
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PC Architecture Fundamentals
Copyright © 1996-2003 Intel Corp.Copyright © 1996-2003 Intel Corp.
BIOS & POSTBIOS & POSTChapter 2Chapter 2
CH2 Slide-2PC Architecture Fundamentals
BIOS & POST
OBJECTIVES: Upon completion of this topic, the participant will be able to do the following:
Identify areas of memory reserved for System BIOS.Illustrate the functional hierarchy of H/W, BIOS, & O/SRecognize the functions of POST.Recognize the functions of the Runtime BIOS.
IATT Web Site: http://iatt.intel.com
CH2 Slide-3PC Architecture Fundamentals
System BIOS A set of programs stored in
non-volatile memory (Firmware Hub) on the motherboard.
Non-volatile memory is not lost when the power is turned off.
Contains two components. Power On Self Test (POST)
a built in diagnostic program
Runtime Basic Input/Output System (BIOS) the bottom-most software layer which interfaces with the hardware and operating system.
Firmware is a combination of software and hardware. Program stored in ROM
Processor
Host Bus 133 MHz 64-bit
HubLink Bus
FWH
PCI Bus 33 MHz 32-bit
AGP Bus
System Memory
Audio
USB
LAN
IDE
South Bridge(ICH)
Keybrd
Mouse
Floppy
SerialParallel
Clock Gen
Host Clock
PCI Clock
USB Clock
Hublink Clock
LPC Bus
SM BusCNR
North Bridge(MCH)
SIO
BIOS & POST Overview
CH2 Slide-4PC Architecture Fundamentals
0009 FFFF0000 0000
000B FFFF000A 0000
000D FFFF000C 0000
000E FFFF000E 0000
000F FFFF000F 0000
0010 FFEF0010 0000
FEFF 00000010 FFF0
FFFF FFFFFF00 0000
640K SYSTEMMEMORY
128K VIDEORAM
128K I/OEXPANSION ROM
64K ROMOR DRAM
64K BIOSOR DRAM
HIGH MEMORYAREA
EXTENDEDSYSTEM MEMORY
8MB BIOS AREA
REAL MODEON BOARD DRAM
DISPLAY BUFFER
RESERVED FOR ROMON I/O ADAPTERS
BIOS EXTENSION OR RAM
ROM BIOS OR RAM
ON BOARD DRAM
ON BOARD DRAM
RESERVED FORSYSTEM
ADDRESS DESCRIPTION FUNCTION
1 Meg
System BIOS is decoded at the top of the memory map (4 GB) and also in the 1st 64K block below 1Meg (F0000h-FFFFFh) for compatibility.
The BIOS gets shadowed (copied) into DRAM after memory has been tested and verified to be functional. Shadowing provides faster
access to the BIOS during run time.
CH2 Slide-5PC Architecture Fundamentals
The System BIOS is decoded in the 1st 64K block of memory (0000-FFFF hex).
True
or
FalseFalseTop of memory and the 1st 64K
block below 1MB, between F0000h and FFFFFh for
compatibility
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CH2 Slide-6PC Architecture Fundamentals
Components of the System BIOS
POST
BIOS SetupUtility
Runtime BIOS
Executes at Power-On & System Reset
Initialize ALL components which need to be programmed so that system can boot up
(e.g., CPU, Memory, Chipsets, Timer, DMA Ctlr, Video, Floppy, HDD, USB, etc..)
Executes only when press “Hot Key” sequence to run SETUP
Always available as an interface between hardware & software
CH2 Slide-7PC Architecture Fundamentals
The Runtime BIOS part of the Firmware Hub code provides the Operating System* (O/S) and the programs access to the system devices.
APPLICATIONS
O/S: [BIOS / KERNEL / COMMAND PROCESSOR]
SYSTEM BIOS(RESIDENT)
HARDWARE
The Runtime BIOS isolates the O/S and applications from low-level hardware and provides low level interaction with hardware.
Runtime BIOS services perform I/O by directly addressing the H/W registers on the I/O chipsSystem BIOS is sometimes
called the resident portion since it is built into each PC by the manufacturer. A secondary (optional) or non-resident BIOS codes may read into DRAM from disk when the P/C loads an O/S.
Layered Operating System( *Non-Plug & Play O/S--e.g. DOS, Win 3.1)
CH2 Slide-8PC Architecture Fundamentals
APPLICATIONS
O/S: [BIOS / KERNEL / COMMAND PROCESSOR]
SYSTEM BIOS(RESIDENT)
HARDWARE
Fill in the boxes with the proper labels on the left?
HARDWARE
SYSTEM BIOS(RESIDENT)
O/S: [BIOS / KERNEL / COMMAND PROCESSOR]
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CH2 Slide-9PC Architecture Fundamentals
When system is reset, the CPU fetches, decodes, and executes the first instructions from address fffffff0h. The first instruction is typically a far jump to the main
POST code located just below 1 MB.The CPU executes the code fetched from the System
BIOS and the POST is started. POST detects, checks, & initializes installed components. POST configures the system according to battery backed
CMOS configuration RAM.The BIOS uses various hardware configuration parameters
that are stored in non-volatile CMOS RAM (these are preserved even when the machine is off).
During POST, the System BIOS provides access to a Set-up Program to examine and alter CMOS settings.
See Appendix for more Information
CH2 Slide-10PC Architecture Fundamentals
POST performs Initialization and Resource Allocation. Performs Initialization of sub-systems
Processor, Chipset(s) & Memory
Test sub-systems for proper integrity Memory & I/O Subsystems
Performs sub-system configuration (Boot Devices) Performs Plug and Play resource allocation
PCI devices, AGP, P2P (PCI-PCI bridges) etc..
Initializes installed sub-systems and external devicesKeyboard, Mouse, Floppy, COM Ports, LPT, Video etc..
Initiates Operating System boot up Software Interrupt 19 hex (INT19) bootstrap loader
POST (Power-On-Self-Test)
CH2 Slide-11PC Architecture Fundamentals
The POST runs through a series of tests to determine whether the machine is functional. POST Checks the System
CPU RegistersKeyboard ControllerRTC Rd/Wr CheckSys Bios ChecksumProgrammable Interval TimerDMA Chips & Page RegistersRam RefreshFirst 64K Ram and Parity Test
Jumps to the Bootstrap Loader (INT 19h) and gives control to the Boot Sector Code.
Initialize Master/ Slave DMA Initialize Master/Slave PIC Loads Interrupt Vectors RTC Checksum/Config. Screen Initialization & ROM
Search Check & Initialize remaining
Memory.
POST (Power-On-Self-Test)
CH2 Slide-12PC Architecture Fundamentals
POST (Power-On-Self-Test)POST normally stops on critical failures and indicates
errors by these messages: If the video is operational, POST display a message.
e.g.– “A: Drive Error No response from diskette drive” or “KB/Interface Error Keyboard interface test failed”
In some cases the problem is detected so early that the BIOS cannot access the video card to display a messageIn this case the BIOS will produce a beeping pattern on the
speaker to tell you what the problem is.
BEEP CODES are BIOS VENDOR dependent.
BEEP CODES are useful when you do not have a POST Card or other Diagnostic Tool.
Not all POST codes have BEEP codes. A POST Card will display current POST CODE on LED’s.
CH2 Slide-13PC Architecture Fundamentals
Example Beep Code DescriptionBeep Description
1 Refresh failure
2 Parity cannot be reset
3 First 64 KB memory failure
4 Timer not operational
5 Not used
6 8042 GateA20 cannot be toggled
7 Exception interrupt error
8 Display memory R/W error
9 Not used
10 CMOS Shutdown register test error
11 Invalid BIOS (e.g. POST module not found, etc.)
CH2 Slide-14PC Architecture Fundamentals
POST (Power-On-Self-Test)During POST, the BIOS
generates diagnostic progress codes (POST codes) to I/O port 80h. POST codes are
displayed with an add-in card (a.k.a. POST card) plugged into a PCI slot.
If the POST fails, execution stops & the last generated POST code is left at port 80h.This code is useful for
determining the point where an error occurred.
In addition to displaying POST codes some boards also shows power supply
voltage status on the motherboard.
CH2 Slide-15PC Architecture Fundamentals
POST Routines - Partial List The System BIOS initializes and tests the system and
writes diagnostic progress codes to I/O port 80h. Typical Code Checkpoints (partial list)
D0 - KBC, RTC enabled. Init code Checksum verification starting. D1- Kybd ctlr BAT test, CPU ID saved, going to 4 GB flat mode. D3 - Chipset init. start memory refresh, do memory sizing. D6 - Check recovery mode and verify main BIOS checksum. D8 - Uncompress the main BIOS module. D9 - Copy main BIOS image to F000 shadow RAM. 1A - Memory Refresh toggling. Going to check 15 µs on/off time. 30 - Display memory R/W test passed. 49 - Amount of memory below 1M found and verified. 54 - CPU in real mode. Going to disable gate A20 line... 8F - Hard disk controller reset done. Floppy setup to be done next
CH2 Slide-16PC Architecture Fundamentals
Example POST Sequence - AMI BIOS POST code = d0
POST code = d1
POST code = d2
POST code = d3
POST code = d4
POST code = d5
POST code = d6
POST code = d7
POST code = d8
POST code = d9
POST code = db
POST code = dd
POST code = df
POST code = e0
POST code = d
POST code = e
POST code = 10
POST code = 25
POST code = f0
POST code = f1
POST code = f2
POST code = 28
POST code = 29
POST code = 2a
POST code = 2b
Continues for a few hundred more writes
to I/O port 80h
POST code = e1
POST code = e2
POST code = e3
POST code = e4
POST code = e6
POST code = e7
POST code = e9
POST code = ea
POST code = eb
POST code = ec
POST code = ed
POST code = 23
POST code = 24
CH2 Slide-17PC Architecture Fundamentals
During POST, the BIOS generates diagnostic progress codes (POST codes) to I/O port ___.
80h
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CH2 Slide-18PC Architecture Fundamentals
Once O/S has booted, the Runtime BIOS (Basic Input Output System) interacts directly with the hardware. The Runtime BIOS is the bottom-most software layer in a
PC and functions as the interface between the hardware and the other layers of software (O/S, Applications, etc), isolating them from the details of the hardware.
Low level interface to devices such as Keyboard, Video, Printer, Disk and diskette, and Com.
Always available as an interface between hardware and software.
The runtime BIOS also contains system Interrupt Routines such as Keyboard Interrupt, Timer Interrupt, Real-Time-Clock Interrupt, etc.
CH2 Slide-19PC Architecture Fundamentals
BIOS (Basic Input/Output System)RUNTIME BIOS SERVICES EXAMPLE
Example 1 -- Initializing the COM PORT to Baud Rate = 2400; No Parity; 1 Stop Bit; 8 Data Bits MOV AH,00 ;INITIALIZATION
FUNCTION MOV AL,10100011B ;2400, NP,1 S, 8 DATA MOV DX,0 ;COM1 INT 14H ;BIOS INTERRUPT
Example 2 -- Change Video Mode (e.g., to 640 x 480) MOV AH,00 ;Set Video Mode Function MOV AL,12h ;Select 640 x 480 INT 10H ;Change Video Mode
CH2 Slide-20PC Architecture Fundamentals
reset
Chapter 2 Quiz1) Which location in the memory map is reserved for the
System BIOS?A) In the first 64K block of system memory.
B) In the first 64K block below 1 Mega Byte
2) When the system is ______, the CPU fetches, decodes, and executes the first instructions from address fffffff0h.
3) Which is NOT a component of the System BIOS?A) Runtime BIOS
B) Shadow BIOS
C) Setup Program
D) POST
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CH2 Slide-21PC Architecture Fundamentals
Chapter 2 Quiz
4) Which of the following is/are characteristics of the POST?A) It generates video display messages for all POST codes.
B) It normally stops on critical POST failures.
C) There is a corresponding beep code for every POST code.
D) POST codes & Beep codes are identical for all BIOS vendors.
5) Which of the following is/are functions of the Runtime BIOS component (not the POST component) of the System BIOS?A) Detects, checks, initializes installed components.
B) Performs sub-system configuration
C) Provides low level interaction with hardware.
D) Checks the 1st 64K RAM.
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CH2 Slide-22PC Architecture Fundamentals
REVIEW & SUMMARY
The functional hierarchy: BIOS services perform I/O by
directly addressing hardware registers on I/O chips.
The SYSTEM BIOS is called the resident portion and is built into each PC by the manufacturer.
The Runtime BIOS gets shadowed (copied) into DRAM after memory has been tested and verified to be functional.
APPLICATIONS
O/S: [BIOS / KERNEL / COMMAND PROCESSOR]
SYSTEM BIOS(RESIDENT)
HARDWARE
CH2 Slide-23PC Architecture Fundamentals
REVIEW & SUMMARYThe functions of POST
POST is a built-in diagnostic program that detects, checks, & initializes installed components & configures the system according to the CMOS configuration RAM.
POST writes diagnostic progress codes to I/O port 80h. POST normally stops on critical failures.
The functions of the Runtime BIOS The Runtime BIOS (Basic Input Output System) is a low
level interface to devices such as Keyboard, Video, Printer, Disk and diskette, and Com.
Runtime BIOS functions as the interface between the hardware and the O/S and applications, isolating them from the details of the hardware.
End of Chapter 2End of Chapter 2
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