Some Novel Techniques for Size Reduction of Microstrip Patch Antennas

R. Mittra1, Jonathan Bringuier1, Mohamed Abdel-Mageed1, Khalid Rajab1, 2 and Jesus Ivan Gonzalez1

1 Electromagnetic Communication Laboratory, 319 EE East

2 Materials Research Laboratory

The Pennsylvania State University, University Park, PA 16802 Email: rajmittra@ieee.org

As wireless communication technology strive to develop smaller devices, the demand for efficient antennas that occupy minimal real-estate on cell phones, laptops, and other devices continues to be unwavering. Such antennas find many useful applications in GPS, WLAN, sensors, etc., and the microstrip patch antenna is considered to be one of the most desired types owing to its conformal nature. However, the long dimension of the patch at the typical half-wavelength operating frequency is often too large for the desired application. Several methods have been proposed to accomplish the goal of reducing the size of a microstrip patch antenna. Although maintaining the resonant frequency while reducing the antenna dimensions is a critical design specification, it is equally important to assess other metrics, e.g., bandwidth, return loss, radiation pattern, etc., such that the antenna performance is not compromised at the expense of its reduced size.

A straightforward approach to reducing the size of a microstrip patch antenna is to use a relatively high

dielectric constant. However, these materials are usually intrinsically lossy, and/or have a high cost associated with them. Additionally, such dielectrics increase the sensitivity of the design to minor changes in the geometrical parameters of the antenna. Alternatively, superstrates may be used to increase the effective dielectric constant and achieve size-reduction of the patch. Unfortunately, the required superstrate thickness often causes the patch profile to exceed the desired specifications. Yet another strategy is to modify the geometry of a planar antenna such that it occupies less area than the conventional rectangular patch. One approach to doing this is to insert a shorting pin; however, such a modification can exact a price in terms of performance, e.g., reduction in impedance bandwidth.

Recently, the authors have introduced a novel concept of size-reduction of planar antennas, viz., loading the

edges of the antenna with artificial dielectrics [1, 2]. The principal design methods are based on the transmission line model of the patch antenna operating in the fundamental TM mode relative to the longest dimension. By implementing artificial dielectrics the authors were able to create capacitive loads at the edges of the patch, and effectively increase the resonant length. In order to ascertain that the operating characteristics of the patch were satisfactory, it was necessary to investigate the field and current distributions. Therefore, the results presented herein represent extensive studies pertaining to the performance of the loaded antenna. A typical field distribution is shown in Fig.6 for which the fundamental mode pattern after loading is observed to be virtually unperturbed along the remaining length of the patch. To further optimize design parameters various known techniques, such as introduction of slits and superstrates (see Fig. 13), were employed. Using these modifications, the authors have achieved a 33% percent reduction in the wide dimension of the patch antenna while maintaining its performance integrity.

The first part of this presentation will be devoted to the analysis and design of a size-reduced antenna (see Figs. 1 through 5). These antennas can be easily fabricated through the cost-effective LTCC process. Experimental results for the canonical form of the size-reduced antenna will be shown to support theory. Variations of the original antenna design with enhance performance characteristics will also be presented.

Discussion of the original antenna design will be followed by some examples of modifications that further

reduce the antenna size. It would be demonstrated that introducing one or more open-ended slits in the patch can aid in shrinking the size of the antenna. These slits essentially cause the current distribution to be routed along a circuitous path. The resulting design is a planar antenna with a longer effective resonant length. Extensive simulations for the modified version of the size-reduced antenna will be presented (see Figs. 7-18 included here for illustration). Finally, continued research in this area along with alternative optimization methods for future designs will be discussed in the presentation.

1560-7803-9444-5/06/$20.00 © 2006 IEEE.

REFERENCES: [1] Khalid Z. Rajab, Raj Mittra, and Michael T. Lanagan, “Size Reduction of Microstrip Antennas using

Metamaterials,” 2005 IEEE International Symposium on Antennas and Propagation and USNC/URSI National Radio Science Meeting (AP-S’05), July 3-8, 2005, Washington DC.

[2] Raj Mittra, Khalid Rajab, “Size Reduction of Antennas for Wireless Applications by Integrating Backward-Wave Transmission Lines with Patch Antennas,” 2005 IEEE International Symposium on Antennas and Propagation and USNC/URSI National Radio Science Meeting (AP-S’05), July 3-8, 2005, Washington DC.

Substrate Length = 5.0 in (5000 mil)Patch Length = 3.5 in (3500 mil)

Probe Length = 0.25 in (250 mil)

Patch Width = 2.25 in (2250 mil)

X

Y Loading Length = 0.125 in (125 mil)

Loading Width = 0.75 in (750 mil)Loading Width = 1.0 in (1000 mil)

Probe Width = 0.25 in (250 mil)

Substrate Width = 2.5 in (2500 mil)

Via Width = 0.125 in (125 mil)

PatchSubstrate

Probe Edge(-0.125, -0.5) from the

Center of the Patch

Substrate Edge (-1.25, -2.5) from the Center of the patch

Loading Length = 0.125 in (125 mil)

Center of the Patch (0, 0)

Patch

Via to ground plane

Loading Strip

Width=2.25 ”Length=0.125”

MHzf 430@4.0"5.3 == λ

Height = 0.01875” = 18.75 mils

Via = 0.04375” = 43.75 mils

Y

X

Ground PlaneY

X

Z

9=rε

Substrate

Fig. 1. Top view of the size-reduced antenna. Fig. 2. Top and perspective views of the size reduced antenna.

Fig. 4. Input Impedance (Imaginary Part). Fig. 5. Return Loss (in dB).

Top View

Substrate Length = 5.0 in (127.0 mm)Patch Length = 3.5 in (88.9 mm)

Probe Length = 0.25 in (6.35 mm)

Patch Width = 2.25 in (57.15 mm)

X

Y Loading Length = 0.125 in (25.4 mm)

Loading Width = 0.75 in (19.05 mm)Loading Width = 1.0 in (25.4 mm)

Probe Width = 0.25 in (6.35 mm)

Substrate Width = 2.5 in (63.5 mm)

Via Width = 0.125 in (25.4 mm)

PatchSubstrate

Probe Edge(-0.125, -0.5) from the

Center of the Patch

Substrate Edge (-1.25, -2.5) from the Center of the patch

Loading Length = 0.125 in (25.4 mm)

Center of the Patch (0, 0)

Slit Width = 1.0 in (25.4 mm)

Slit Length = 0.125 in (3.175 mm)

Slit Width = 1.0 in (25.4 mm)

Fig. 6. Ez Field Distribution @ F = 430MHz Fig. 7. Top view of modified design with slits.

157

Fig. 8. Ez Field Distribution in the XY plane. Fig. 9. Input Impedance (Real Part).

Fig. 10. Input Impedance (Imaginary Part). Fig. 11. Return Loss @ F = 374.5 MHz

Fig. 12. Far Field pattern. Fig. 13. Top view of modified design with slits and superstrate.

158

Fig. 14. Top and perspective views of the size Fig. 15. Ez Field Distribution in the XY plane. reduced antenna with slits and superstrate.

Fig. 16. Input Impedance (Real Part). Fig. 17. Input Impedance (Imaginary Part).

Fig. 18. Return Loss @ F = 310 MHz.

159