passive optical networks in particle physics experiments
DESCRIPTION
Passive Optical Networks in Particle Physics Experiments. 24 th November, PH-ESE Seminar. Work conducted by PH-ESE-BE-OPTO Team Members. Outline. Commercial PON technologies PONs in Timing Systems for HEP Future PONs and their implications in Timing Systems. Commercial PON technologies. - PowerPoint PPT PresentationTRANSCRIPT
Passive Optical Networks in Particle Physics Experiments
1
24th November, PH-ESE Seminar
24/11/2009
Work conducted by PH-ESE-BE-OPTO Team Members
• Commercial PON technologies
• PONs in Timing Systems for HEP
• Future PONs and their implications in Timing Systems
224/11/2009
Outline
Commercial PON technologies
[email protected] 24/11/2009 3
o PON definitiono Motivation for current worko PON Protocolso PON Transceiverso Optical Components
PONs in Access Networks• Access Networks are
the last segment connection from COs (central offices) to customers
• They are also called first-last mile networks
• Examples of access networks are: ISDN xDSL WiMAX and most recently
PONs…
WDM mesh
Backbone Network
Metropolitan Network DSLAM
xDSL
POTS
ISDNEthernet, SONET etc
OLT
PON
WiMAX
CO
CO
Access Network
What is a PON?• PON is a Point-to-MultiPoint (PMP) optical network with no active
elements in the signal’s path from the source to the destination• Data are exchanged between a central node, the Optical Line
Terminal (OLT), and a number of end terminals, the Optical Network Units (ONUs)
• A long feeder fiber delivers the data close to the ONUs before signal is split by means of an optical splitter and secondary fibers
• According to where ONUs are placed we have different PON versions namely FTTH, FFTC, FFTB etc
FTTHFTTC
FTTB
General PON Considerations• In the downstream direction (OLT→ONUs) PON is a broadcast network• ONUs are filtering out data not addressed to them• In the upstream direction (ONUs→OLT) however a number of
customers share the same transmission medium and some channel arbitration mechanism should exist to avoid collisions and to distribute bandwidth fairly among ONUs
• TDM is the preferred multiplexing scheme in first generation PONs as it is very cost effective. Dynamic Bandwidth Allocation Algorithms are employed for fairness. All intelingence is built in the OLTs
• Upstream transmission is of burst mode type
FTTC
FTTB
Motivation• There are currently P2P and
P2MP optical links in LHC• P2P links are used in DAQ
due to high bandwidth demands
• P2MP links are used to transmit timing information
• Current TTC system is unidirectional (optically)
• A slow electrical feedback is used to communicate the status of the subdetectors back to the TCS
• It would be beneficial to replace this electrical link with a higher bit rate, “real” time optical link 724/11/[email protected]
h
System Requirements• System has to be able to deliver
synchronous triggers and commands continuously
• Latency has to be fixed at both transmitting and receiving ends
• Recovered clocks have to be of low jitter• System must provide with the flexibility of
both individually addressing or broadcasting to slave nodes
• Slaves have to be able to respond in short time
24/11/2009 [email protected]
TDMA PON Protocols o Ethernet PON (E-PON)
established by IEEE. Work started in 2001, completed in 2005. IEEE 802.3-2005
o Supports Ethernet frames Giga-bit PON (GPON)
established by ITU. Work started in 2001 completed in 2004. ITU G.984
Supports mixed ATM and Ethernet frames through generic encapsulation method (ITU G.7041)
• >95% of LAN data are of Ethernet type but the battle is still on…
Standard EPON GPON
Framing Ethernet GEM
Max. BW 1 Gb/s 2.48 Gb/s
Splitting ratio
16 64
Avg. BW / user
60 Mb/s 40 Mb/s
Max. Reach 20 km 20 km
GPON and EPON Frames Downstream
PC
Bd
Psync (4 bytes)
Ident (4 bytes)
PLOAMd (13 bytes)
BIP (1 byte)
Plend (4 bytes)
US BW Map (N*8 bytes)
Payload
125
μs,
19440 b
yte
s fo
r 1.2
44
G
b/s
sequence used for the sync of the ONU Rx
Counter indicating larger frames (superframes)
Management – Control commands
Bit interleaved parity
Specifies length of BW map and ATM partition
Start time – Stop time for N < 4096 different AllocIDs
Preamble (7 octets)
SFD (4 octets)
Destination Addr. (6 octets)
Source Addr. (6 octets)
Length/Type
Payload / Pad
FCS (4 octets)46 –
15
00 O
ctets
SLD + LLID
Indicates start of frame
Length or type of Ethernet frames mutually exclusive
Error correction
GEM header ONU 1
Data ONU 1
MSB
LSB
MSB
GPONEPON
GEM header ONU N
Data ONU N
…
OLT
ONU 1
ONU N
Downstream
Bandwidth Allocation Schemes
• BW allocation schemes are not part of protocols
• However, both EPONs and GPONs provide with the necessary information for any allocation algorithm to be implemented
• Two main bw allocation schemes:
A. Fixed/Static Bandwidth Allocation (FBA)
B. Dynamic Bandwidth Allocation (DBA)
OLT
ONU N
ONU 2
ONU 1
…
Upstream
FBA PON
1 2 3
4 5
6 7
1 2 3 4 5 6 7
OLT
ONU N
ONU 2
ONU 1
…
Upstream
DBA PON
1 2 3
6 8
1 2 3 4 5 6
7
7
8
4 5
PON Transceivers• Burst mode laser drivers at Slave
(ONU) • FP lasers and PIN diodes for cost
efficiency• Burst mode RXs at OLTs• APDs for high sensitivity and DFB
lasers• WDM filters for upstream-
downstream multiplexing into one fiber
• Bulk-Optic subassembly packaging method
• Cost: ~900$/OLT cost ONU ~90$/ONU. Gigabit Ethernet TRXs $100 SM 1224/09/2009 24/11/2009
1440 nm Rx
1550 nm Rx
1310 nm Tx
Dielectric mirrors
lens
fiber
1550 nm Rx
1310 nm Tx
Dielectric mirrorslens
fiber
Optical Components: Splitter
• Two types of splitters are found
1) Traditional bi-conic fused silica splitter
2) Photonic Lightwave Circuit (PLC) splitter
• PLC has the advantage of smaller footprint
• Better alignment with in/out coupled fibers
• Uniform splitting ratio• Better scalability• Temperature stability
splice
PON Demonstrator for TTC Applications
[email protected] 24/11/2009 14
o PON system specificationso Protocol in the Upstream/Downstream o Transceiver Design on Virtex 5 FPGA
System Specifications
15
Property (General) PON Demonstrator
Clock rate 40 MHz (ie LHC clock rate 40.08MHz)
Max distance Up to 1000m
Encoding | Target BER
NRZ 8b/10b | <10-12
Splitting ratio 1:64
Frame Format Commands + Trigger
BW Allocation Algorithm
Fixed BW
Property (Down|Up) PON Demonstrator
Bit rate 1.6 Gb/s | 800 Mb/s
Latency Fixed and Deterministic| To be determined
Received clock jitter Able to drive a high-speed SERDES24/11/[email protected]
h
System Power Budget
24/09/2009 16TWEPP 2009 21-25 Sep. Paris – Optoelectronics and Links Session
Master
Slave1 Slave2
Upstream
Downstream
Slave N...
Pow
er
(dB
)
PON Demonstrator
• Our system is designed to support 64 slave nodes
• Only 2 slave nodes are used in the first demonstration due to one FPGA platform and number of evaluation board available
• However, all features of a PON can be demonstrated with this system
• Both master and slaves are implemented on the same Virtex 5 platform
• Both physical layer and medium access algorithm have been implemented
1724/11/2009
Master
Slave1
Slave2
Virtex 5
1km
splitters
PON Demonstrator for TTC Applications
[email protected] 24/11/2009 18
o Protocol in the Downstream/Upstream
Master
Slave1 Slave2
Upstream
Downstream
Slave N...
Papakonstantinou et. al.
Downstream Frame• Synchronous transmission of super-frames with a period of
1625ns = 65*25ns at 1.6Gbit/s• Comma, “K”, character for frame alignment and for sync • T character carries trigger info. “F” for trigger protection or
other functions• D1 and D2 carry broadcast or individually addressed
information depending on the first bit of the D1 byte.• “R” field contains the address of the next ONU to transmit• 590.8 Mb/s are available for data downstream
19TWEPP 2009 21-25 Sep. Paris – Optoelectronics and Links Session
Slave1
Slave2
Slave64
Upstream Frame
• Slave N1 receives an R character with its address and switches its laser ON
• IFG between successive emissions allows to master receiver to adapt to different bursts
• Channel arbitration is a logic built-in at the OLT
• Total BW 800Mb/s, 7.7 Mb/s are available per Slave node for pure data
2024/11/[email protected]
Upstream frame (2)
24/11/2009 21
Slave1 Slave2
Slave1 Slave2
• Dynamic range (Pslave1/Pslave2) affects IFG and thus available upstream BW/slave
• It also affects the period between successive transmissions
IFG
5 10 15 200
20406080
100120140
Dynamic Range (dB)
IFG
(n
s)
0 50 100 1500
5000
10000
15000
20000
0
200
400
600
800
2
16
32
64
IFG (ns)
Peri
od
betw
een
tw
o T
x
(µs)
Bu
nch
clo
ck c
ycle
s
PON Demonstrator for TTC Applications
[email protected] 24/11/2009 22
o Master/Slave Transceiver Design on FPGA
Master
Slave1 Slave2
Upstream
Downstream
Slave N...
Master Transmitter
24/11/2009 23
Input Outpu
t
1.6Gb/s
...
2161
Frame Generator / Gear Box
...
2201
8B/10B
F I F O
P I S O
80MHz TXUSRCL
K
Clk refDCM
80MHz 80MHz
clock domain crossing
PMA PLL
800MHz80MHz XCLK
40MHz
Tx-PCS
Tx-PMA
GTX Transmitter
• Latency issues at the Tx arise at clock domain crossing points• It is particularly important to bypass any elastic buffers in the data
path• In GTX Tx this is achieved by advanced mode which forces PMA PLL to
phase align XCLK and RXUSRCLK clocks
Slave Receiver
24
Clk ref
PMA PLL
S I P O
REFCLK
800MHz
Rxin1.6Gb/s
2
20
1
Barrel Shifter
PLL80MHz
RXUSRCCLK
80MHz
Phase corrected 80 MHz clk
Input
24/11/2009
CDR
80 MHz XCLK
Retimed
800 MHz Serial
...
DIV1÷10
80MHz clk
800MHz clk0 1 2 3 19. . . • 80 MHz parallel clk can lock on any of the 20 first
edges of the 800 MHz serial clk• That affects the order with which parallel data
are exiting the SIPO• By fitting “K” characters into the frame and
identifying them in a Barrel shifter we can predict the starting point of the XCLK
1817
Slave Rx Latency, Barrel Shifter
2524/11/2009
0 5 10 15 20 25 30 35 40 45 50
t (ns)
bs = 0
0 5 10 15 20 25 30 35 40 45 50t (ns)
bs = 10
0 5 10 15 20 25 30 35 40 45 50
t (ns)
bs = 5
0 2 4 6 8 10 12 14 16 180
2.5
5
7.5
10
12.5
0
45
90
135
180
225
270
315
360f(x) = NaN x + NaNf(x) = NaN x + NaN
ONU2
Barrel Shifter position
Rela
tive D
ela
y (
ns)
Ph
ase
diff
ere
nce
(d
eg
rees)
OLT Burst Mode Receiver
24/09/2009 26
Clk ref
PMA PLL
S I P O
REFCLK
Rxin
800Mb/s2
20
1
24/11/2009
2
20
1
Oversampling x5
Slave1
Slave2
Δφ
11 1 10 0 0 01 X 11 1 010 10 Samples0
CDR
Future PON
– Tri-band PONs– WDM PONs
Tri-Band PONs
• Tri-band PON transceivers utilize 1440nm band
• They can be used in our context to separate the trigger from the control information
• That can simplify protocols of communication and complexity at the OLT
[email protected] 24/11/2009 28
1440 nm Tx (control)
1550 nm Tx (trigger)
1310 nm Rx
1550 nm Rx1550 nm Rx
1440 nm Rx
1310 nm Tx
1440 nm Tx
1310 nm Tx
Master
Slave1 Slave2
Wavelength Division Multiplexing PON
• In a WDM PON scenario each channel (or channel group) is assigned one wavelength upstream and one downstream for communication with OLT
• Benefits are higher bandwidth per channel, loss is independent from splitting ratio, less complicated scheduling algorithm at OLT, easy expansion, better delivery of services
• Main disadvantage is the need for expensive WDM components such as AWGs, filters, tunable lasers / laser arrays / laser per ONU, broadband receivers etc
• “Colorless” WDM PONs are developed to tackle cost issues
Receiver Array
…
WDM Rx
DEMUX
Coarse WDM
OLT
Band A
Band B
λ1, λ2, … λ16
λ17, λ18, … λ32
1 x 16 AWG …
Receiver
RN ONUs
RSOA
Receiver
REAM
λ1
λ17
λ16
λ32
λ1
λ17
λ32
λ16
Coarse WDM
Coarse WDM
λ
Upstream band
Downstream band
…
WDM Tx
SLED
3 dB λ17, λ18, … λ32
Modulated
CW
Summary
• A passive optical network for timing distribution applications has been successfully demonstrated
• In the downstream direction were trigger is transmitted, deterministic latency has been achieved
• A burst mode receiver was implemented in the upstream
3024/11/[email protected]
Questions?
3124/11/2009Papakonstantinou et. al.
PONs in OSI Architecture• PONs reside in the last two layers in the
OSI architecture namely• Data link layer which is responsible for the
access to the medium and for error correction
• Physical layer which is responsible for transmitting and receiving the information
• In GPON terminology the two layers are called: G-Transmission Convergence (GTC) and Physical Media Dependent (PMD)
• EPON modifies MAC layer to allow for bridging data back to the same port
DBA Algorithms
• Requirements for DBA:a) Fairness: Allocates the
bw between users fairlyb) Low delay: Minimize
latency (<1.5 ms for voice channels)
c) High efficiency: Can increase the efficiency of the bw (throughput) and increase peak rate
• Fair Queuing Scheduling• Interleaved Polling with
Adaptive Cycle Time (IPACT)i. Fixed Serviceii. Limited Serviceiii. Constant Credit Serviceiv. Linear Credit Servicev. Elastic Service• Deficit Round-Robin
Scheduling• DBA using Multiple Queue
Report Set• etc ..
FBA – DBA Comparison• FBA algorithm is easy
to implement• However, unused bw
is wasted• FBA is not frequently
encountered
OLT
ONU N
ONU 2
ONU 1
…
Upstream
FBA PON
1 2 3
4 5
6 7
1 2 3 4 5 6 7
• DBA can result in high bw utilization efficiency
• It can also run efficiently different classes of service
• However, efficiency is traded with higher complexity at the scheduler
OLT
ONU N
ONU 2
ONU 1
…
Upstream
DBA PON
1 2 3
6 8
1 2 3 4 5 6
7
7
8
4 5
IPACT Scheduling•ONUs are addressed sequentially in a round robin fashion• In the Simplest IPACT implementation each ONU is granted all requested bw
Limited Service IPACT
• At light loads all alternative scheduling schemes easily outperform fixed service in terms of delay • As network load increases delay for all scheduling schemes converges to fixed service
ONU 1
OLTTx
Rx
Tx
Rx
Tx
Rx
Tx
Rx
84 84 84484
634
234
84 15500234
84
84
84
400
550
150
400
550
150
ONU 2
ONU 3
0400484
0400
21000550634
234
150150
21000550 150150
250
84
250
1550015500-84
15500-84
234
400+84
550+84
150+84 0+84
>max, grant max = 15500 150+84
GRANT frame with grant length = 84
84
400
REPORT frame reporting queue of 400
300300 byte of Ethernet data including overheads
New ONU Registration EPON
OLT
ONUD
iscovery
Win
dow
Disco
ver
y S
lot
Discovery Gate generation process
GATE { DA = MAC control SA = OLT MAC addr, content = discovery + 1 grant + synctime}
Register generation process
Final registration process
Discovery process
Gate Reception
process
Gate Reception
process
Time Time
Request reception process
REGISTER_REQ { DA = MAC control SA = ONU MAC addr, content = pending grants}
REGISTER{ DA = ONU control SA = OLT MAC addr, content = Assigned port (LLID) + Sync Time + echo of pending grants}
GATE { DA = MAC control SA = OLT MAC addr, content = grant}
REGISTER_ACK { DA = MAC control SA = ONU MAC addr, content = echo of Assigned Port + echo of Sync Time}
MPCPDU sent on unicast logical link
MPCPDU sent on broadcast logical link
Ranging/Synchronization in GPON
• GPON implements an alternative equalization scheme• A variable delay EqD is introduced at the ONU• EqD has the objective to male all ONUs appear equidistant from OLT• Phase of signal is measured from first bit transmitted from OLT to last bit
received by ONU• Every time ONU transmits RTT is compared to expected value and EqD is updated
Ranging request
Ranging Tx
Fiber delay
Basic ONU processing delay
E/O conversion delay
E/O conversion delay
O/E conversion delay
O/E conversion delay
RTT = 2Tpd + Ts + TiO1 + TiO2 + TiS1 + TiS2 + EqD Ts + TiO1 + TiO2 + TiS1 + TiS2 < 50 μs
PON Protection
• Resources that require protection:
1) Feeder fiber2) Distribution Fiber3) OLT Transceiver4) ONU Transceiver5) RN (Splitter / WDM
Demux)• Protection Schemesa) Preplanned Protectionb) Dynamic Restoration
…
Feeder Fiber
Distribution Fibers
TxRx
OLT
RN
TxRx
ONU N
TxRx
ONU 1
…
OLT
ONU NONU 1
OLT
ONU
Path 1 Path 2
Protection Schemes
• ITU-T G.983.1 GPON Protocol specifies four protection architectures for PONs
a) Simple feeder fiber architecture
b) Feeder+OLT transceiver
c) Feeder+Distribution+OLT+ONU Transceivers
d) Hybrid protection
…
OLT
ONU NONU 1
…
OLT
ONU NONU 1…
OLT
ONU NONU 1
…
OLT
ONU NONU 1
EPON vs GPON Physical LayerUNIT Downstream
(GPON)Downstream (EPON)
Upstream (GPON)
Upstream (EPON)
Bit-rate Gb/s 1.244/2.48 1 1.244/2.48 1
Wavelength (SF) nm 1480-1500 1480-1500 1260-1360 1260-1360
Mean Tx Power Min
dBm -4 A/+1 B/ +5 C
-7 -3 A/ -2 B/ +2 C
-4
Mean Tx Power MAX
dBm +1 A/ +6 B/ +9 C
2 +2 A/ +3 B/ +7 C
-1
Splitting Ratio <64 <32 ― ―
Max reach Km 20 20 ― ―
Line coding ⁻ NRZ NRZ NRZ NRZ
Rx Sensitivity dBm -25 A/ -25 B/ -26 C
-27 -24 A/ -28 B/ -29 C
-24
Tx On-Off (1 Gbps)
ns ― ― 13 512
Clock recovery /AGC (1 Gbps)
ns ― ― 36 <400
OLT
ONU 1
ONU N
OLT
ONU 1
ONU N
Downstream Upstream
Burst Mode Rx Decision Threshold set
24/09/2009 42TWEPP 2009 21-25 Sep. Paris – Optoelectronics and Links Session
APD
TIA Data Out
+-
LA
R
CRese
t
Peak Detection Circuit
VrefVref
Vref
P2MP Timing Parameters
24/09/2009 TWEPP 2009 21-25 Sep. Paris – Optoelectronics and Links Session
43
PON Protocol
• Synchronous delivery of a periodic trigger with clock rate 25ns, (T) field
• F field to protect the trigger field, (F) field
• Broadcast commands to ONUs, (D1) and (D2) fields
• Individually addressing of ONUs, (D1) and (D2) fields
• Arbitration of upstream channel to avoid collisions due to simultaneous transmissions from multiple ONUs, (R) field
24/09/2009 44
Master
Slave1 Slave2
A1 A2
A1
A2
D2
D1
F
T
Downstream
Upstream
TWEPP 2009 21-25 Sep. Paris – Optoelectronics and Links Session
K
R
F
T
ANDx64
Protocol Properties
• No destination addresses are required to be transmitted
• Easy resynchronization in case of loss of sync
• Simple algorithm for accessing the upstream channel
• Downstream available BW: 9.23 Mb/s/ONU
• Upstream available BW: 7.66 Mb/s/ONU
24/09/2009 4524/11/2009
Upstream Frame• Slave N1 receives an R character
with its address and switches its laser ON
• IFG between successive emissions allows receiver to adopt between bursts
• Upstream contains 32 bytes of <5555> for CDR followed by two SFD, <D555>, bytes for frame alignment
• A 2 byte address field and data are following
• Channel arbitration is a logic built-in at the OLT
• Total BW 800Mb/s, 7.7 Mb/s are available per Slave node for pure data
24/09/2009 46
Data Data . . . 5555
TWEPP 2009 21-25 Sep. Paris – Optoelectronics and Links Session
AddrK
32 B2 B
2 B90 B
Master Transmitter
24/09/2009 47
Clk ref
Frame Generator
Gear Box
8B/10BPMA PLL
P I S O
REFCLK40MHz
800MHz
...
1
32
...
216
180MHz XCLK
80MHz80MHz
TXUSRCLK
First clock domain crossing
Txout
1.6Gb/s
Input
Output... 220
1
... 220 1
Frame Clock 40MHzPCS Parallel Clock 80MHz
PMA Parallel Clock 80MHz
Serial Clock 800MHz
Second clock domain crossingThird clock domain crossing
2
TWEPP 2009 21-25 Sep. Paris – Optoelectronics and Links Session
TFRK
T
F
R
K
DCM /2 /1
F I F O
OLT Tx – Gear Box
24/09/2009 24/11/2009 48
DCM /2 /1
Frame Generator
Gear Box
40MHz
...
1
32... 2
16
1
80MHz
TXUSRCLK Input
2
TFRK
TF
RK
REF 80MHz
80MHz
40MHz
XXXX
1
1 (o) 2 (e) 3 (o)
2 3
TFRK
RKXX
TF
Frame Generator
...
1
322Gear
Box
80MHz
... 2
16
1XX
XX
40MHz
RK
RK
TF
TF
RK
BW Downstream
• To calculate the BW assigned to each ONU we need:
A) To exclude the trigger, “F” field and “K” and “R” characters 590.76 Mb/s is available for data to all ONUs
B) To exclude BW assigned to 8b/10b encoding
• The usable minimum downstream BW is 9.23Mb/s/ONU (for 64ONUs @ 1.6Gb/s)
24/09/2009 4924/11/2009
OLT Tx Characteristics
24/09/2009 24/11/2009 50
Slave Receiver
24/09/2009 51
Clk ref
PMA PLL
S I P
O
REFCLK
800MHz
Rxin 1.6Gb/s
220
1
Barrel Shifter
PLL80MHz RXRECCLK
80MHz
Phase corrected 80 MHz clk
Input2
16
1
F I F O
Chipscope
ILA
RXUSRCLK
24/11/2009
CDR
80 MHz XCLK
Retimed
800 MHz Serial
... 10b/8b dec.
DIV1÷10
80MHz clk
800MHz clk
0 1 2 3 19. . .
Barrel Shifter
24/09/2009 TWEPP 2009 21-25 Sep. Paris – Optoelectronics and Links Session
52
Clk refPMA PLL
S I P
O
REFCLK
800MHz
Rxin 1.6Gb/s 2
20
1
Barrel Shifter
RXRECCLK
CDR
1/20
80MHz
80MHzD I
V
80MHz clk
800MHz clk
b0 b1 b2 b3 b4 b5 …
Barrel shifter
b16
b5
b4
b3
b2
b1
b0
b19
b18
b17
. . .
“K”
b17b18
b16 . . .
Barrel Shifter
24/09/2009 TWEPP 2009 21-25 Sep. Paris – Optoelectronics and Links Session
53
Clkb0
b7b6b5b4b3b2b1
b0b7b6b5b4b3b2
b1
b0
b7b6b5b4b3b2b1
s0s1s2
MU
X
s0s1s2
MU
X
s0s1s2
MU
X
. . .
D
COUT0
D
COUT1
D
COUT7
. . .
S2 S1 S0 O7 O6 O5 O4 O3 O2 O1 O0
0 0 0 b7 b6 b5 b4 b3 b2 b1 b0
0 0 1 b6 b5 b4 b3 b2 b1 b0 b7
0 1 0 b5 b4 b3 b2 b1 b0 b7 b6
0 1 1 b4 b3 b2 b1 b0 b7 b6 b5
1 0 0 b3 b2 b1 b0 b7 b6 b5 b4
1 0 1 b2 b1 b0 b7 b6 b5 b4 b3
1 1 0 b1 b0 b7 b6 b5 b4 b3 b2
1 1 1 b0 b7 b6 b5 b4 b3 b2 b1
Q
Q
Q
BW Upstream
• In our first implementation we give one timeslot of 1625ns to each ONU
• The overhead due to IFG, <5555>, <D555> and address field is 400ns
• That gives a BW utilization (taking into account the 8b/10) of 61.3%
• It corresponds to 7.66Mb/s/ONU (for 64 ONUs @ 800Mb/s)
24/09/2009 5424/11/2009
ONU Rx Characteristics
24/09/2009 TWEPP 2009 21-25 Sep. Paris – Optoelectronics and Links Session
55
Transceivers for PONs• GPON has far more stringent
requirements than EPON• For this reason GPON
components are in general more expensive than EPON
• OLT needs a 1490 nm laser (usually DFB-DBR)
• Burst Mode Receiver• ONU needs 1310 nm F-P
laser with burst mode laser drivers
• PIN diode or APD at 1490 nm
AGC+
CDR
Coarse WDM
OLT
LDDFB
TOSA
Post-amp
BM ROSA (APD)
… CDR
Coarse WDM
ONU
BM-LD
F-P TOSA
Post-amp
ROSA (PIN)
Optical signalElectrical signal
1310 nm
1490 nm
Tx Enable 16 bits (12.9ns)
Tx Disable 16 bits (12.9 ns)
Total (Tg+Tp+Td) 96 bits (77.2 ns)
Guard time Tg 32 bits
Preamble Time Tp 44 bits (35.2 ns)
Delimiter Time Td 20 bits
Rx Dynamic Range 21 dB
Tx Enable 512 ns
Tx Disable 512 ns
Total (AGC+CDR)
412 ns
Rx Dynamic Range
>21 dB
GPON (1.24 Gb/s) EPON
OLT Rx Characteristics
24/09/2009 TWEPP 2009 21-25 Sep. Paris – Optoelectronics and Links Session
57
ONU Tx Characteristics
24/09/2009 TWEPP 2009 21-25 Sep. Paris – Optoelectronics and Links Session
58
Shared PMA PLL
[email protected] 24/11/2009 59
Latency Map
24/09/2009 60
OLT TRx
Tx+
Tx-
Rx+
Rx-
ONU TRx
Tx+
Tx-
Rx+
Rx-
bias
GTX Receiver GTX Transmitter
5 ns/m
17.6 ns 3.2 ns
Constant
75 ns
Module Introduced Latency (ns)GTX Tx 75OLT Board 3.2Fiber 5 ns/mONU Board 17.6GTX Rx Constant
FPGA
FPGA
OLTONU
OLT Tx Latency
24/09/2009 61
Frame Generator
Gear Box
8B/10BPMA PLL
P I S O
Input
Output
12.5 ns
12.5 ns
12.5 ns25 ns
Module Introduced Latency (ns)Gear Box 12.5FPGA Tx Interface 12.58b/10b encoder 12.5FIFO buffer bypass 12.5PMA+Interface 25TOTAL 75
Clk ref
DCM /2 /1
24/11/2009
FPGATx Int.
12.5 nsF I F O
ONU Rx Total Latency
24/09/2009 62
Module Introduced Latency (ns)PMA + Interface 50buffer bypass 25Barrel Shifter 12.58b/10b decoder 12.5FPGA Rx Interface 25TOTAL 125.5
50 ns 12.5 ns25 ns 25 ns12.5 ns (not yet)
Clk ref
PMA PLL
S I P
O
Rxin
220
1
Barrel Shifter
PLL
Input2
16
1
F I F O
FPGA Rx Interface
CDR
... 10b/8b dec.
DIV1÷20
Jitter Map
63
Master
Tx+
Tx-
Rx+
Rx-
Slave
Tx+
Tx-
Rx+
Rx-
bias
GTX Receiver GTX Transmitter
Ref CLK
pk-pk: 2.21 ps
RMS: 2.05 ps
pk-pk: 53.63 ps
RMS: 11.43 pspk-pk: 58.66
psRMS: 15.11
ps
pk-pk: 31.42 ps
RMS: 13.32 ps
Recovered CLK
1 Km24/11/[email protected]
h
pk-pk: 66.62 ps
RMS: 1.75 ps
SCM and OCDMA over PONs
Hybrid WDM-SCM (sub-carrier modulation) PON
Migration scenario with OCDMA (Optical Code Division Multiplexing Access)
Colorless ONUs based on RSOAs
Self-Seeded (Reflective Semiconductor Optical Amplifier) RSOA based ONUs at 1.25 Gb/s
Externally-Seeded RSOA (Reflective Semiconductor Optical Amplifier) based ONUs at 1.25 Gb/s
Rx1… A
WG
Coarse WDM
OLT
λD1, … λDN
λU1, … λUN
1 x N router …
RN
RxN
RSOA
λDN
λUN
λDN
λUN
Coarse WDM
RxN
Tx1
… AWG
TxN
SLED
3 dB
λU1, … λUN CW
λD1, … λDN Modulated
λD1, … λDN
λUN CW ONU N
Optically Injection Locked ONUs
Externally-Seeded Injection Locked FP-LDs. 1.5 Gb/s over 30KmRx
Coarse WDM
OLT
AWG 2
…
RN
Rx
FP-LD
λDN
λUN
Coarse WDM
Rx
FP-LD
…
AWG1FP-
LD
3 dBONU N
C-Band EDFA
L-Band EDFA
CW Upstream or Downstream
Modulated Upstream or Downstream
DFB seeded Injection Locked VCSELs, 1550 nm 2.5 Gb/s over 25 Km