parking pal team m1: anna kochalko chris moody hong tuck liew john wu project manager: kartik murthy...
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![Page 1: Parking Pal Team M1: Anna Kochalko Chris Moody Hong Tuck Liew John Wu Project Manager: Kartik Murthy November 5, 2007 Your digital parking meter of the](https://reader036.vdocuments.site/reader036/viewer/2022062516/56649d355503460f94a0d29e/html5/thumbnails/1.jpg)
Parking PalParking PalParking PalParking Pal
Team M1:Anna KochalkoChris Moody
Hong Tuck LiewJohn Wu
Project Manager:Kartik Murthy
November 5, 2007
Your digital parking meter of the future!
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StatusProject ChosenOptions explored and eliminated
Wrote Java ImplementationSpecification definedVerilog written/tested/modifiedSchematic DesignLayout
Created/thrown out/started over/Attempted LVS at least once out of desperation
Everything passes LVS successfully…Simulations…
Running…
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SRAMWe are having problems
combining the SRAM cells together and can't figure out why (this is what the pictures are of). Getting errors such as "nets don't match" and "transistor sizes differ." SRAM with decoder should LVS once we figure out this problem.
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Connected SRAM Cells
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SRAM Cell in Layout
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Mult-Adder IssuesWhen trying to pass the
Mult-Adder unit in LVS, we get an output stating: "The net-lists match logically but have mismatched parameters." In the error file, the power transistors say "combined device: parallel devices without complete property match."
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Mult-Adder Simulation
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Tickets Module
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Tickets Module• Very close to complete.
– All components have been laid out.– Comparator has yet to pass LVS– Adder & subtractor were remade to
better fit into the block, and new versions must pass LVS as well.
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Encryption• Suffered a MAJOR setback
yesterday due to a CADENCE CRASH :__(
• The shape is being changed from a rectangular shape to an L shape to allow more efficient use of space.
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Pretty Encryption Block Picture
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Binary to BCD
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Floorplan (Old)
FirstSecond
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Floorplan (New!)