OXIDE STOP-IN-FILM CMP:NEW CHALLENGES FOR THE NEXT GENERATION MEMORY DEVICES

Andrey Zagrebelny, Sony Varghese, Andrew Carswell

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INTRODUCTION

ITRS d M ’ L 3D/ i l hi• ITRS roadmap: Moore’s Law vs. 3D/vertical architectures

• New processes with unique requirements

• Renewed interest in oxide stop-in-film (SiF) slurries

• Existing SiF processes are not capable for next• Existing SiF processes are not capable for next

generation applications

• Superior process performance at reduced CoO

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BACKGROUND AND CONSIDERATIONSBACKGROUND AND CONSIDERATIONS

• Silica slurries are reaching the limit of their capability

• Low cost ceria slurries are sought-after candidates• Low cost ceria slurries are sought-after candidates

• Rare-Earth raw materials supply situation concern

• Other abrasive types are being considered

• Proprietary additives to slurries are increasingly importantProprietary additives to slurries are increasingly important

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ADVANCED SILICA SLURRIESPPros

• Colloidal silica slurries with modified particle morphology/modified pH can exceed performance of fumedmorphology/modified pH can exceed performance of fumed silica▶ Potential for high removal rate▶ Planarization efficiency comparable to fumed silica slurries

• Reduced scratch defectivity when compared to fumed silica

Cons

• Impact of modified colloidal particles on non-scratch d f i i i ll d ddefectivity is not well understood

• Use of these slurries for next generation technology nodes is not proven

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is not proven

FUMED VS ADV. COLLOIDAL SILICA SLURRIES

Advanced colloidal silica slurriesAdvanced colloidal silica slurries show much high removal rates while providing improved defectivity over fumed silica slurries.

Removal rates of both slurries show good correlation with the hardness of undoped films.

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ADVANCED CERIA SLURRIES

Pros

Low solids content therefore low COC• Low solids content, therefore low COC• High removal rate• High planarization efficiency and dependence on• High planarization efficiency and dependence on

pattern density* • Reduced scratch defectivity**when compared to the silica slurries tested to date

Cons

I d CMP l• Integrated post-CMP cleans• Increased removal rate sensitivity to oxide composition• Relatively new to industry

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• Relatively new to industry

LOW pH CERIA SLURRIESLOW pH CERIA SLURRIES

• ζ-potential is maximized at pH levels 2-5*• Positive ζ attracts ceria particles to both negatively charged wafer and

polishing pad surfacespolishing pad surfaces• “Pseudo-fixed-abrasives” effect is created during the polishing process• Ceria consumption is minimized

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*Journal of the Electrochemical Society, 151(10) G658-G662 (2004)

ZIRCONIA SLURRIES

Pros

• Alternative abrasive not subject to restricted Rare jEarth supply

• Similar to ceria in terms of removal rate*ll l h d f *• Exceptionally low scratch defectivity*

• Easier to remove from the wafer surface than ceria**vendor claim

Cons

• New and unproven to semiconductor industryNew and unproven to semiconductor industry• Not high-volume-manufacturing ready• No BKMs developed

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EXPERIMENTAL SET-UP

CMP PROCESS AND THICKNESS MEASUREMENT

• All wafers were split from the same lot

• Process sequence: Hard pad followed by soft pad set up with either 1 min DI or• Process sequence: Hard pad followed by soft pad set up with either 1 min DI or additive “A” or additive “B” buff

• All wafers were pre- and post- measured with 12-point blanket TEOS recipes

OFF LINE WET PROCESSING WAFER CLEAN

• Off line wet processing was performed on one wafer per split to provide and an “ultimate” comparison among the splits*“ultimate” comparison among the splits*

DEFECT ANALYSIS

• All wafers were pre-scanned with KLA SP2All wafers were pre scanned with KLA SP2

• After polish all wafers were inspected on KLA SP2 recipe with low haze setting to subtract surface roughness and a standard KLA SP2 recipe*

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* chemical analysis to be done

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SLURRY SELECTION FLOW CHARTSIF Oxide SlurrySIF Oxide Slurry

POR SIF Direct Plug In High RR, PE Next Gen. SIF

Next Gen Ceria

A idi C i

Silica-Based Slurry Options Advanced Non-Ceria

Acidic Ceria Advanced Ceria

eria

eria

aca s

Collo

idal

C

Fum

ed C

e

Abrasive-free? Zirc

onia

Acid

ic S

ilic

Oth

ers

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C

BLANKET TEOS RR COMPARISON

Average removal rate was calculated from multiple wafers in each split*Removal Rate for CERIA SLURRY A is low since the chemistry is optimized for patterned wafers** CERIA SLURRY D data was collected at vendor site with recipe set up similar to Micron’s POR

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POST CMP DEFECTS COUNT COMPARISON

Legend Split Description1 SILICA SLURRY "A"2 SILICA SLURRY "B'

" "3 SILICA SLURRY "C"4 CERIA SLURRY "A"* + ADDITIVE "A" BUFF5 CERIA SLURRY A* + ADDITIVE "A" BUFF + WPC6 CERIA SLURRY "D"** + WAFER CLEAN WITH ADDITIVE "D"7 CERIA SLURRY "D"** + WAFER CLEAN WITH ADDITIVE "D" + WPC8 CERIA SLURRY "B" + ADDITIVE "A" BUFF9 CERIA SLURRY "B" + ADDITIVE "A" BUFF + WPC10 CERIA SLURRY "C" + ADDITIVE "C" BUFF 11 CERIA SLURRY "C" + ADDITIVE "C" BUFF + WPC

*Number of adders not compared in this analysis due to high sensitivity of SP2 pre-CMP recipes to surface roughness and a large count of non-visual defects

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POST CMP DEFECTS COUNT COMPARISON

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“red” legend – ADDTIVE “A” buff only “blue” legend – after WPC

BLANKET TEOS RR WAFER PROFILES

P li hi i ti i d f SILICA “A”• Polishing recipe optimized for SILICA “A”.• Silica slurries tend to have profiles with the lowest range.• All ceria slurries show edge-fast profile with CERIA “D” having the highest average

range.

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a ge• Significant potential to increase ceria RR and uniformity through process

optimization.

SUMMARY

• Blanket wafer Removal Rate and defectivity data have been collected from slurry candidates being considered for next generation SIF oxide CMP processes.

• As expected, ceria-based slurries have shown significantly higher l h d ili b d l l iremoval rate when compared to silica-based slurry alternatives.

• Further development is required to find a cost-effective solution to remove ceria particles from the wafer surface in order to consider lowremove ceria particles from the wafer surface in order to consider low pH SIF ceria processes in HVM.

• Additional work is needed to confirm this result with a large wafer count as well as performance assessment with other oxide film options .

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FUTURE WORK

• TIER I: PRELIMINARY ASSESSMENT OF RR AND DEFECTIVITY

▶ TEOS blanket RR▶ Evaluation of post-CMP ceria cleaning options specific to each solutionp g p p▶ AFM surface roughness characterization

• TIER II: PLANARIZATION EFFICIENCY AS DEMONSTRATED WITH TM CMP PATTERNS

Mi ’ T t M k O id t h i ht d ti d tt d it iti it▶ Micron’ s Test Mask Oxide step height reduction and pattern density sensitivity characterization

▶ Product-like patterned wafer defect characterization

• TIER III: PERFORMANCE OVER THE RANGE OF MICRON’S OXIDES

▶ Blanket oxide comparison▶ Selective patterned wafer data for critical non-TEOS oxides

• TIER IV: YIELD VERIFICATION, DATA DOCUMENTATION, AND FAB’S FEEDBACK

▶ Process optimization DoE and marathon data ▶ Yield equivalency or better with a selected consumables set

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▶ Yield equivalency or better with a selected consumables set▶ CoO analysis completion for all feasible options

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ACKNOWLEDGEMENTS

ANURAG JINDAL

JOHN SMYTHE

CHET CARTERCHET CARTER

KOZABURO SAKAI

KEITH COOKKEITH COOK

MICHAEL JOSLYN

SHYAM RAMALINGAM

CONTRIBUTING SLURRY SUPPLIERS

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