ota000004 sdh principle issue 2.21
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OTA000004 SDH Principle
ISSUE 2.21
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Upon completion of this course, you will be able to:
Understand the basic of SDH multiplexing standard
Know the features, applications and advantages of SDH based equipment
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Chapter1 SDH OverviewChapter1 SDH Overview
Chapter2 Frame Structure & Multiplexing MethodsChapter2 Frame Structure & Multiplexing Methods
Chapter3 Overhead & PointersChapter3 Overhead & Pointers
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References
SDH Principle Manual
ITU-T G.701, G.702, G.707
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What is SDH?---- Synchronous Digital Hierarchy---- It defines frame structure, multiplexing method, digital rates hierarchy and interface code pattern.
Emergence of SDH
Why did SDH emerge?---- Need for a system to process increasing amounts of information.---- New standard that allows mixing equipment from different suppliers.
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Advantages of SDH ( Interfaces )
PDH
Electrical interfaces
--- Only regional standards. 3 PDH rate hierarchies for PDH: European (2.048 Mb/s), Japanese, North American (1.544 Mb/s).
Optical interfaces
--- No standards for optical line equipments, manufacturers develop at their will.
SDH
Electrical interfaces
--- Can be connected with existing PDH signals.
Optical interfaces
--- Can be connected to multiple vendors’ optical transmission equipments.
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Disadvantages of PDH (Multiplexing methods ) PDH : Asynchronous Multiplexing The location of low-rate signals in high-rate signals is neither regular nor
predictable.
140 Mb/s
34 Mb/s 34 Mb/s
8 Mb/s 8 Mb/s
2 Mb/s
140 Mb/s
de-multiplexer
de-multiplexer
de-multiplexer multiplexer
multiplexer
multiplexer
level by levelNot suitable for huge-volume transmission
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Advantages of SDH (Multiplexing methods )
byte interleaved multiplexing method
Low rate SDH to higher rate SDH ( STM-1→STM-4→STM-16→STM-64 )
4:1
STM-1A
STM-1B
STM-1C
STM-1D
A
B
D
C
B
A
D
C
B
A
…STM-4
One Byte from STM-1 B
--- Synchronous multiplexing method and flexible mapping structure --- Use multistage pointer to align PDH loads in SDH frame, thus, dynamic drop-and-insert capabilities
What about PDH?
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Advantages of SDH (OAM function )
PDH
Weak Operation, Administration & Maintenance function.
SDH
Abundant overheads bytes for operation, administration and maintenance.
About 5% of the total bytes are being used
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Advantages of SDH ( Compatibility )
package
transmit
SDHnetwork
unpacking
PDH, SDH, ATM, Ethernet
packing
STM-N STM-N package
receive Processing Processing
PDH, SDH, ATM, Ethernet
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Comparison between SDH and PDH Low bandwidth utilization ratio.
64 E1139.264 Mbit/sE4
16 E134.368 Mbit/sE3
128 E08.448 Mbit/sE2
32 E02.048 Mbit/sE1
One 64 kbit/s64 kbit/sE0
ChannelsDigital Bit RateSignal
4032 E1, 192 E3, 64 E4STM-6410 Gbit/s9953.28Mbit/s
1008 E1, 48 E3 or 16 E4STM-162.5 Gbit/s2488.32Mbit/s
252 E1, 12 E3 or 4 E4STM-4622 Mbit/s622.08 Mbit/s
63 E1, 3 E3 or 1 E4STM-1155 Mbit/s155.52 Mbit/s
SDH CapacitySDHAbbreviatedBit Rate
PDH Hierarchy
SDH Hierarchy
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Chapter1 SDH OverviewChapter1 SDH Overview
Chapter2 Frame Structure & Multiplexing MethodsChapter2 Frame Structure & Multiplexing Methods
Chapter3 Overhead & PointersChapter3 Overhead & Pointers
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SDH Frame Structure
From ITU-T G.707:
1. One frame lasts for 125 microseconds (8000 frames/s)
2. Rectangular block structure 9 rows and 270 columns(STM-1)
3. Each unit is one byte (8 bits)
4. Transmission mode: Byte by byte, row by row, from left to right, from top to bottom
Frame = 125 us
Bit rate of STM-1= 9*270*8*8000
1 2 3 4 5 6 7 8 9
270 Columns
9 rows
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SDH Frame Structure
Frame = 125 us
9
MSOH
AU-PTR Information Payload
RSOH1 2 3 4 5 6 7 8 9
270 Columns
9 rows
Three parts:
SOH
− RSOH
− MSOH
AU-Pointer
Information Payload
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SDH Frame StructureInformation Payload√ Also known as Virtual Container level 4 (VC-4)√ Used to transport low speed tributary signals√ Contains low rate signals and Path Overhead (POH)√ Location: rows #1 ~ #9, columns #10 ~ #270
9
MSOH
AU-PTRPayload
RSOH
270 ColumnsH
PO
H
1
package
package
low rate signal
LPOH, TU-PTR
LPOH, TU-PTR
9 rows
Data package
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SDH Frame Structure
Functions : Fulfills the section layer OAM
9
270 Columns
9 rows
Types of Section Overhead
1. RSOH monitors the regenerator section
2. MSOH monitors the multiplexing section
Location:1. RSOH: rows #1 ~ #3, columns #1 ~ #92. MSOH: rows #5 ~ #9, columns #1 ~ #9
1 2 3 5 6 7 8 9
MSOH
AU-PTR Information Payload
RSOH
Section OverheadSection Overhead
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SDH Frame Structure
9
MSOH
AU-PTR Information Payload
RSOH
270 Columns
9 rows4
Function: Indicates the first byte of VC4
Location: row #4, columns #1 ~ #9
J1
AU-PTR
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SDH Multiplexing Method
SDH Multiplexing includes:
Low to high rate SDH signals ( STM-1 STM-N )
PDH to SDH signals ( 2M, 34M & 140M STM-N )
Other hierarchy signals to SDH Signals ( IP STM-N )
Some terms and definitions:
Mapping
Aligning
Multiplexing
Go to glossary
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SDH Multiplexing Structure
AU-4
TU-3TUG-3 VC-3 C-3
VC-4 C-4
TU-12 VC-12 C-12
TUG-2
×3
×1
×7
×3
E4 signal
E3 signal
E1 signal
Multiplexing
MappingAligning
STM-1 AUG-1×1
×1
AUG-4
AUG-16
AUG-64
STM-4
STM-16
STM-64
×1
×1
×1
×4
×4
×4
Go to glossary
C-4-4cVC-4-4cAU-4-4c×1
C-4-16cVC-4-16cAU-4-16c×1
C-4-64cVC-4-64cAU-4-64c×1
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SDH Tributary Multiplexing (140M)
140 Mbit/s to STM-N
140M Rate adaptation
Add HPOH
C4
9
1 260125 μs
1
Next page
Mapping
VC4
1
9
125μs1 261
HPOH
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SDH Tributary Multiplexing (140M)
AddAU-PTR
AddSOH
Aligning
AU-PTR AU-4
10 270
×1
AUG-1
MultiplexingAUG-N
1 270
RSOH
MSOH
InfoPayloadAU-PTR
9
STM-1
1270X N
9
STM-N
AddSOH
One STM-1 frame can load only one 140Mbit/s Signal
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SDH Tributary Multiplexing (34M)
34 Mbit/s to STM-N
34M Rate Adaptation
Add LPOH
C3
1 84
9
125μs
1 1
9
VC3
LPOH
125μs1 85
Next page
Mapping
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SDH Tributary Multiplexing (34M)
1st align
Fillgap
×3
86
TU-3
1
H1H2H3
1
9
Aligning
1 861
9
H1H2H3
R
TUG-3
Multiplexing
POH
R
R
VC-4
9
11 2613
Same procedureas 140M
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SDH Tributary Multiplexing (2M)
2 Mbit/s to STM-N
2M Nextpage
125μs
1 4
C12
1
9
4LPOH
VC12
1
1
9
Rate Adaptation
Add LPOH
Add TU-PTR
Mapping Aligning
TU12
1 4
1
9
TU-PTR
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SDH Tributary Multiplexing (2M)
×3
1 12
TUG-2
1
9
×7
Multiplexing
R R
TUG-3
1 86
1
9
MultiplexingSame procedureas 34M
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Questions
What are the main parts of SDH Frame structure?
What is the transmission rate of STM-4?How to calculate?
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Glossary
Mapping - A process used when tributaries are adapted into VCs by adding POH information
Aligning - This process takes place when a pointer is included in a Tributary Unit (TU) or an Administrative Unit (AU), to allow the 1st byte of the VC to be located
Multiplexing - This process is used when multiple low-order path signals are adapted into a higher-order path signal, or when high-order path signals are adapted into a Multiplexing Section
Back
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Glossary
C = Container
VC = Virtual Container
TU = Tributary Unit
AU = Administrative Unit
TUG = Tributary Unit Group
AUG = Administrative Unit Group
STM = Synchronous Transfer Module
POH = Path Overhead
Back
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Chapter1 SDH OverviewChapter1 SDH Overview
Chapter2 Frame Structure & Multiplexing MethodsChapter2 Frame Structure & Multiplexing Methods
Chapter3 Overhead & PointersChapter3 Overhead & Pointers
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Section Overheads
A1 A1 A1 A2 A2 A2 J0
B1 ∆ ∆ E1 ∆ F1
D1 ∆ ∆ D2 ∆ D3
AU-PTR
B2 B2 B2 K1 K2
D4 D5 D6
D7 D8 D9
D10 D11 D12
S1 M1 E2
RSOH
MSOH
∆ = Media dependent bytesSTM-1
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A1 and A2 Bytes
Framing Bytes – Indicate the beginning of the STM-N frame
A1 = f6H (11110110), A2 = 28H (00101000)
In STM-N: (3XN) A1 bytes, (3XN) A2 bytes
STM-N STM-N STM-N STM-N STM-N STM-N
Finding frame head
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A1 and A2 BytesFraming
Nextprocess
FindA1,A2
OOF
LOF
N
Y
AIS
over 3ms
over 625us
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D1 ~ D12 Bytes
Data Communications Channels (DCC) Bytes
RS-DCC – D1 ~ D3 – 192 kbit/s ( 3X64 kbit/s )
MS-DCC – D4 ~ D12 – 576 kbit/s ( 9X64kbit/s )
TMN
DCC channel
NE NE NENE
OAM Information: Operation, Administration and maintenance
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E1 and E2 Bytes
Orderwire Bytes
E1 – RS Orderwire Byte – RSOH orderwire message
E2 – MS Orderwire Byte – MSOH orderwire message
Digital telephone channelE1-RS, E2-MS
E1 and E2
NE NE NENE
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B1 Byte
Bit interleaved Parity Code (BIP-8) Byte –
A parity code (even parity), used to check the
transmission errors over the RS
B1 BBE is represented by RS-BBE( performance event)
Tx
2#STM-N
Rx
1#STM-N Calculate BIP-8=
1#STM-N
2#STM-N
Calculate BIP-8=A1
A1 00110011A2 11001100A3 10101010A4 00001111
B 01011010
BIP-8
B1=A
STM-NB1
A
STM-NB1
Verify A1&A→B1 BBE
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B2 Byte
Bit interleaved Parity Code (MS BIP-24) Byte
BIP-24 is used to check the bit errors over the MS
B2 BBE is represented by MS-BBE( performance event)
The mechanism of B2 is same as B1
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M1 Byte Multiplexing Section Remote Error Indication Byte
A return message from Rx to Tx ,when Rx find B2 bit errors
A count of BIP-24xN (B2) bit errors
Tx generate corresponding performance event MS-FEBBE
Tx Rx
Traffic
Generate
MS-FEBBE
MS-REI
Find B2 bit errors
Generate MS-BBE
Return M1
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K1 and K2 (b1-b5)
Automatic Protection Switching (APS) bytes
Transmitting APS protocol
Used for network multiplexing protection switch function
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K2 (b6 ~ b8)
Rx detects K2 (b6-b8)="111“
Generate MS-AIS alarm
Rx detects K2 (b6-b8)="110"
Generate MS-RDI alarm
GenerateMS-AIS
Start
DetectK2 (b6-
b8)
Return MS-RDI
GenerateMS-RDI
111
110
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S1 Byte
Synchronization Status Message Byte (SSMB): S1
(b5~ b8)
Value indicates the sync. level
bit 5 ~ 8 Description0000 Quality unknown (existing sync. Network)
0010 G.811 PRC
0100 SSU-A (G.812 transit)
1000 SSU-B (G.812 local)
1011 G.813 (Sync. Equipment Timing Clock)
1111 Do not use for sync (DNU).
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Path Overheads
J1
B3
C2
G1
F2
H4
F3
K3
N1
VC-n Path Trace Byte
Path BIP-8
Path Signal Label
Path Status
Path User Channel
TU Multiframe Indi
Path User Channel
AP Switching
Network Operator
Higher Order Path Overhead
1 2 3 4 5 6 7 8 9 10
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Path trace byte: J1
> The first byte of VC-4
> User-programmable
> The received J1 should match with the expected J1
Next process
Detect J1
Match
HP-TIM
YN
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B3 Byte
Path bit parity
code byte (even parity code)
Used to detect bit errors
Mechanism is same as B1and B2
Next process
Verify B3
correct
HP-BBE
YN
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Signal label byte: C2
> Specifies the mapping type in the VC-n
> 00 H Unequipped
02 H TUG structure
13 H ATM mapping
The received C2 should match with the expected C2
Detect C2
00H
HP-UNEQMatch
HP-SLMNext process
Insert AIS downward
N Y
NY
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Path Overheads
V5 J2 N2 K4
VC-12 VC-12 VC-12 VC-12
1
9
1 4
500μs VC-12 multiframe
Low Order Path OverheadLow Order Path Overhead
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Path Overhead Bytes
V5
> First byte of the multiframe
> Indicated by TU-PTR
Functions: Error checking, Signal Label and Path Status of VC-12
b1- b2 Error Performance Monitoring (BIP-2)
b3 Return Error detected in VC-12 (LP-REI)
b4 Return Failure declared in VC-12 (LP-RFI)
b5 ~ b7 Signal Label for VC-12
b8 Indicate Defect in VC-12 path (LP-RDI)
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Pointers
Pointers
AU-PTR TU-PTR
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AU-PTR
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TU-PTR
VC-12 VC-12 VC-12 VC-12
V1 V2 V3 V4
1
9
500μs VC-12 multiframe
TU POINTERS
11 44
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Questions
Which byte is used to report the MS-AIS and MS-RDI?
What is the mechanism for R-LOF generation?
Which byte implements the RS(MS/HP) error monitoring?
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SDH Overview
SDH Frame Structure & Multiplexing Methods
Overhead & Pointers
SummarySummary
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