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1 Juncheng (Lucas) Lu, Ruoyu Hou, and Di Chen GaN Systems Inc. Paper Number :1213 Opportunities and Design Considerations of GaN HEMTs in ZVS Applications

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Page 1: Opportunities and Design Considerations of GaN HEMTs in ...gansystems.com/wp-content/uploads/2018/04/APEC18-Opportunities-and-Design... · 3. GaN HEMTs today. Consumer. Datacenter

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Juncheng (Lucas) Lu, Ruoyu Hou, and Di ChenGaN Systems Inc.

Paper Number :1213

Opportunities and Design Considerations of GaN HEMTs

in ZVS Applications

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Content

1. Introduction

2. Loss Model of GaN HEMTs in ZVS Applications

3. Package Considerations

4. Conclusions

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GaN HEMTs today

Consumer

Datacenter

Industrial

Transportation

Shipping since 2014• Offices in 7 countries• Worldwide disti & direct sales

#1 in GaN• Highest current; broadest voltages• Best electrical performance• Best die & best package• Most widely used by customers

Customer successesSolar Inverter and ESS•Motor Drives•Wireless Power and Charging•AC Adapters•Datacenter Server • and Rack PowerAutomotive Onboard Charger•

High-power

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PowerSupply

Opportunities with GaN E-HEMTs

Efficiency

Power Density

Lower Figure of MeritZero Reverse Recovery

Heatsink Size ReductionSmaller packaging of Device

Passive Component Size ReductionFilter Size ReductionFewer windingsLower ΔBPower

Supply

Power Supply

Replace Si with GaN

Increase Switching Frequency

GaN-enabled topologies and

algorithms

Improvement happening in supporting technologies

Packaging •Magnetic Materials•Gate drivers • …

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Loss Model of GaN HEMTs in ZVS Applications

Half-bridge overall loss vs. switching current under different negative turn-off gate voltage VDRoff (a) with deadtime tD=40 nS, (b) with deadtime tD=100 nS, (c) with deadtime tD=200 nS.

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Parasitics Optimization is the key to the ultra-high performance of GaN HEMT.[1] J. L. Lu and D. Chen, "Paralleling GaN E-HEMTs in 10kW–100kW systems," 2017 IEEE Applied Power Electronics Conference and Exposition (APEC), Tampa, FL, 2017, pp. 3049-3056. doi: 10.1109/APEC.2017.7931131

Key Parasitics for Paralleling [1]

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GaNPX has ultra-low Ls compared to traditional package.

GaNPX T PackageGS66516T (650V/25mΩ)

Top side Bottom side

Package Source inductance Ls=0.05nH

Ansys Q3D 3D modeling of GS66516T TO-247 Package inductance

G DS

LQS = ~ 5~9 nHSS

Packaging Parasitics of Power Semi-conductors

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Reference Design of 240A/650V GaN Module

Gate driver board

Metal Core PCB

More compact layout and lower stray inductance than traditional power module, optimized for high speed GaNThermal resistance RthJC ~= 1̊C/W

Gate driver board design conceptAssemble on top of IMS(metal core) boards

Decoupling capsSi8271 Isolated Gate drivers

60A / 650V GaN HEMT

The thermal performance is enhanced compared with the PCB solution.

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Reference Design of 240A/650V GaN Module

The thermal performance is enhanced compared with the PCB solution.

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Experimental Results

S1

S2

S3

S4

CBUS VDCL1

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Thank you!&

Any questions?