eFPGAsim Features & Applications

Christian Dufour, Ph.D. Senior Simulation specialist, Power System and Motor Drive Applications

OPAL-RT TECHNOLOGIES, Montréal, Canada

Presentation objective

• Introduction to real-time simulation technologies applied to controlled system design

• Explain eFPGAsim: a solver suite for the real-time simulation of power electronic systems and converters on FPGAs

• Demonstrate eFPGAsim with some client cases

Testing and design process of controllers and protections using Model-Based Design

Requirements

Design

Prototype

Integration

Test

Architecture Verification

Concept Assessment Demonstration Manufacture In-service

Real-Time Simulation

Offline Simulation

• Rapid-Control Prototyping to design the control laws.

• Integration into Production Level Controller (PLC)

• Integrate and test PLC until release using HIL.

– Many more tests possible using a virtual plant.

• Use the same process for all PLC software releases.

HIL: Hardware-In-the-Loop

HIL

Testing and design process of controllers and protections using Model-Based Design

• Other benefits: free some costly Dyno time!

• End objective: Early defect detection and cost savings

Bo

ehm

, Bar

ry. S

oft

war

e En

gin

eeri

ng

Eco

no

mic

s. E

ngl

ewo

od

Clif

fs, N

J:

Pre

nti

ce-H

all,

Inc.

19

81

.

Co

ntr

olle

r

Advantages of FPGA simulation

• Excellent resolution for IGBT gating (up to 50-100 kHz)

• Excellent latency (typ. 0.5- 1 µs) for PWM or direct current-control motor applications (ex: hysteretic ctrl)

• Notably fast enough to verify ‘Fast On-Board Drive Protections’ (FOBDP) like IGBT short circuit protection.

ALU cores

I/O

s

Logic & mem

CPU FPGA PCIe bus

FOB

DP

Real-Time Simulator

Disadvantages of FPGA simulation

• Higher coding complexity than CPU counterparts. – User has more control over lower level abstraction levels but

this increases the complexity of the designs

– Many basic CPU coding schemes must be explicited in the FPGA design. Ex: ‘for’ loops in matrix multiplications

• Very long compilation time

– Generating a new FPGA bitstream from FPGA code can take 1-2 hours on big FPGA chips like Virtex-6 or Virtex-7

• Increased debugging/probing difficulty

– Accessing data on the chip is difficult, one may need to recompile the bitstream if a new data is to be probed on the chip

General structure of the eFPGAsim • Suite of electric system models and solvers on FPGA

• Model interconnection and parameters can be changed without re-flashing nor making new FPGA bitstream!

– Fast iteration of models and design is possible.

• All models are connected using floating-point format

eHS: a user programmable non-flashing FPGA solver for electronic converters

• Electric Hardware Solver (eHS) enables the simulation of switched electric circuits on FPGA directly from a SimPowerSystems or PLECS model

• Uses a fixed-admittance matrix nodal method

SimPowerSystems or PLECS editor

eHS solver principles

• Fixed Admittance Matrix Nodal Method (FAMNM)

• All switches in the circuit are modeled as :

– a capacitor when open (ex: 50-200 nF @ 100 ns)

– an inductor when closed (ex: 50-200 nH @ 100 ns)

– If L/h=h/C then the admittance matrix is constant

(For Backward Euler method, h is the time step)

FPGA user models using RT-XSG

• Enables the user to code his own model in the Xilinx System Generator blockset for Simulink

• No VHDL knowledge required

Customized solutions in eFPGAsim Dual-PMSM motor drive with boost converter

• Application: Hybrid Electric Vehicles

• Motors with FEA data from JMAG-RT, MotorSolve or Maxwell software

PMSM Spatial Harmonic Model • Requires the storage of 3-D tables on the FPGA

• Features: cogging torque, slot induced torque fluctuation, slot effects, saturation, etc…

Flux mapping Torque mapping

Boost converter on FPGA • Boost converter was coded on the

FPGA using a state-space method

• Enable to drive the boost converter IGBT up to 50 kHz

• Below we compare real FPGA simulation (captured on Analog Outputs of the MotorHIL) and off-line simulation with 50 kHz PWM

Customized solutions in eFPGAsim SRM drive with H-bridge buck-boost converter

• Application: Hybrid Electric Vehicles

• Motors with FEA from Infolytica’s MotorSolve

(3-phase shown)

L-1

(,iabc)

rotor

FPGA

(Virtex 6)

Digital Input

(5 ns) (IGBT

gates)

Multi-core CPU

(Intel Core i7)

Internal testmodulators

DC-DC PWM

10-100 kHz

SRM Drive

Analog

Output

(currents)

Analog

Output

(resolver)

Digital

Output

(quad enc)

I/Os &

sig. cond.

Analog Input

(resolver

excitation)

High-Level Mechanical system(modeled in Simulink and RTW)

Mas

ter

ECU

Batteryvoltage

H-bridge

Buck-Boost converter

SG User

designed I/O

ECU

un

der

tes

t

CAN

(6/4 SRM shown)

SRM Motor

SRM Flux Data

Labc

SRM controller

(hysterisis current type)

SRM Torque Data

iabc

FPGA

(Virtex 6)

SRM drive on FPGA • SRM inductance data can be obtained from

Infolytica’s MotorSolve

Left: Three-dimensional relationship between excitation current, rotor position and flux

linkages for 12/8 SRM motor Right: FEA analysis on the 12/8 SRM in MotorSolve.

H-bridge buck-boost converter

• 120 ns sampling time

• 100 kHz gating frequency

DC-DC converter load step. FPGA on-chip results (left) vs. SPS offline simulation (right)

H-bridge buck-boost converter

17

eHS design: Matrix Converter Drive

- 22 switches in total in the converter - Connected to PMSM on the FPGA - Calculation time on FPGA :0.59 µs

18

Description

Comparison between eHS Solver running on FPGA in real-time versus the same SimPowerSystem model running offline (Tustin solver) with a time step of 500ns.

• Matrix converter switching frequency : 10 kHz

• Output frequency : 200 Hz

• Source frequency : 50Hz

Conclusion

The results obtained in real time using eHS solver and the ML605EX1 FPGA simulator are exactly the same as the results obtained with an SPS offline reference model, using Tustin solver with 500 ns time step. Witch verifies the eHS solver accuracy. The frequency of the output currents and voltage is well regulated to the frequency set point Fref=200Hz.

AD-Drive-eHs01: Matrix Converter Drive

Test 1 - eHS Solver accuracy

FPGA models can be extended to CPU

- If you want a more complex feeder circuit on CPU and use the full simulation power of the OP5600 simulator

- Ex: 700 node distribution system on 6 cores @ 65 µs

- Complex Active front-end rectifier + 3-level inverters - Using 2 eHS modules on one FPGA + AC-feeder on CPU

eFPGAsim in OP5600 simulator • 1 ML605 Xilinx FPGA card for eFPGAsim models

• 12-core Intel i7 3.3 GHz real-time simulator

• I/Os: 32 16-bit 1 µs Analog Output; 32 16 bit 2µs Analog Inputs; 128 digital inputs and 128 digital output sampled on the FPGA.

– Can be extended! Ex: MMC systems with 1000’s of I/Os

Summary • eFPGAsim was designed to accelerate user test cycles

– In particular, we want to avoid very long ‘Place And Route’ time of modern, large FPGAs

– Non-flashing, variable parameter and variable topology methodology

– Do not require advanced FPGA programming skills.

• eFPGAsim is a useful tool for control & test engineers

– Increase test coverage of power electronic systems

– Early detection of issues in the design process

– Diminish overall project costs