on the design of rf spiral inductors on silicon -...

718 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 50, NO. 3, MARCH 2003

On the Design of RF Spiral Inductors on SiliconJoachim N. Burghartz, Fellow, IEEE,and Behzad Rejaei

Invited Paper

Abstract—This review of design principles for implementationof a spiral inductor in a silicon integrated circuit fabricationprocess summarizes prior art in this field. In addition, a fastand physics-based inductor model is exploited to put the resultscontributed by many different groups in various technologies andachieved over the past eight years into perspective. Inductors arecompared not only by their maximum quality factors ( max), butalso by taking the frequency at max, the inductance value( ),the self-resonance frequency( SR), and the coil area into account.It is further explained that the spiral coil structure on a lossysilicon substrate can operate in three different modes, dependingat first order on the silicon doping concentration. Ranging fromhigh to low substrate resistivity, inductor-mode, resonator-mode,and eddy-current regimes are defined by characteristic changesof max, , and SR. The advantages and disadvantages ofpatterned or blanket resistive ground shields between the inductorcoil and substrate and the effect of a substrate contact on theinductor are also addressed in this paper. Exploring optimuminductor designs under various constraints leverages the speed ofthe model. Finally, in view of the continuously increasing operatingfrequencies in advancing to new generations of RF systems, therange of feasible inductance values for given quality factors arepredicted on the basis of optimum technological features.

Index Terms—Capacitance, electromagnetic induction, HFradio communication, impedance matching, inductive energystorage, inductors, integrated circuit fabrication, losses, magneticfields, magnetic microwave devices, microwave circuits, microwaveresonators, passive circuits, factor, resistance, resonance, thin-film inductors.

I. INTRODUCTION

W ITH THE emergence of communication technologies,and particularly the portable and low-cost consumer ap-

plications during the past decade, the spiral inductor on sil-icon has established itself as a standard passive component inhigh-frequency silicon technologies. The extremely high fre-quencies, at which SiGe bipolar transistors and nowadays alsoCMOS devices are able to operate, have made radio-frequency(RF) circuits prone to the quality of the passive components [1].Since the spiral inductor suffers considerably from both ohmiclosses in metal and substrate losses due to the conductive silicon,this component typically exhibits the lowest quality factor (,defined in Section III-B) of the RF passives. Another issue with

Manuscript received May 24, 2002; revised August 29, 2002. The review ofthis paper was arranged by Editor A. Chatterjee.

The authors are with the Electronic Components, Technology, and Mate-rials (ECTM), Delft Institute for Microelectronics and Submicrontechnology(DIMES), Delft University of Technology, 2600 GA Delft, The Netherlands(e-mail: [email protected]).

Digital Object Identifier 10.1109/TED.2003.810474

inductors on silicon, as far as current solutions go, is their ex-cessive area consumption. Since inductors are built at the wafersurface, by using multilevel interconnect layers, they share thesame complex processing as that of the active devices. Place-ment of the passive over the active devices to overcome thisdisadvantage is not a viable option in planar silicon technology.The small vertical spacing between interconnect layers and fromthe metal to the substrate prevent one from taking that approach[1]. This makes the spiral inductor on silicon a rather costlycomponent. Unlike the classical radio coil, where a ferrite corewas used for size reduction, ferrites cannot be applied at fre-quencies beyond 1 GHz due to high polarization losses and lowpermeability [2]. Soft ferromagnetic cores may be applicable inthe future in that frequency regime, provided that eddy currentlosses in those electrically conductive films can be suppressed[3], [4]. This currently leaves one only with the option to buildan inductor on silicon with an air core, consuming excessivechip area.

In this paper we therefore concentrate on the spiral air coreinductor integrated on a silicon substrate and optimized in atradeoff between area consumption and electrical parameters.We will not only provide a review of the research on integratedinductors in silicon technology, which has been pursued withgreat intensity since 1995 and is now maturing, but it is alsoour intention to put those results into perspective. Furthermore,we will shed light on the task of inductor optimization throughprocess technology and layout options. This will be achievedby using a fast physics-based and predictive inductor model toexplore the entire design space by simulation. This model is de-scribed in Section II, where also its validity is verified. In Sec-tion III, design and optimization guidelines are given, processtechniques to improve the inductor quality are discussed, andthe different modes of operation of a spiral coil structure on sil-icon are explained. In Sections IV and V, we adopt the optimiza-tion guidelines for a detailed discussion on the optimization ofthe spiral coil structure and the substrate engineering for min-imum loss, respectively. Thereby, we will make extensive useof optimization routines on the basis of the model introduced inSection II. A prediction on the extendibility of integrated spiralinductor technology into future RF applications is made in Sec-tion VI, and conclusions are drawn in Section VII.

II. CIRCULAR RING MODEL

With the advent of the spiral inductor in RF silicon tech-nology, the need for fast and accurate compact inductor modelsbecomes apparent [5]. Two generic approaches are pursued.

0018-9383/03$17.00 © 2003 IEEE

BURGHARTZ AND REJAEI: ON THE DESIGN OF RF SPIRAL INDUCTORS ON SILICON 719

Fig. 1. Concentric-ring model of a circular spiral inductor [10].

First, the measured characteristics of a fabricated test inductorcan be matched to a simple lumped-element model, as describedin detail in Section III-A. Such a lumped-element model can ef-ficiently be used in a circuit simulator, but it is nonpredictiveand thus requires experimental work prior to the modeling. Al-ternatively to the fabrication of test devices, the inductor char-acteristics can be derived by using a two-dimensional (2-D)or three-dimensional (3-D) computer-aided design (CAD) tool,like Agilent’s Momentum or Ansoft’s HFSS. This is a prac-tical approach but restricts one to a fixed selection of inductordesigns. Further improvement would come from a model thatwould allow one to optimize the inductor within the circuit de-sign process. One step in that direction came from establishinganalytical relationships between each component of a lumped-element model and the technology and layout parameters froman extensive set of experiments, but this concept was not fur-ther pursued [6]. Instead, as the second generic approach tocompact inductor modeling, the development of physics-basedand fast inductor models has been proposed by several researchgroups, e.g., [7]–[10]. Most of those models have been devel-oped for square inductors, since orthogonal or circular layoutsare often not permitted in photolithographic mask generation.From a modeling point of view, however, a circular structureallows for significant reduction of the model complexity com-pared to a square structure. In Rejaei’s model, this approachhas been chosen in substituting a circular spiral coil by a set ofconcentric rings (Fig. 1) [10]. Since this model is fast enoughif implemented in a circuit design tool, it can also be used toconduct large series of inductor calculations in an optimizationtask within a reasonable time frame. The error in predicting in-ductances and quality factors as a result of the concentric-ringapproximation was found to be only about 5%. For verifica-tion of the validity of the model we fabricated and measured aset of 57 circular spiral inductors with designs for 2-, 5-, and10-nH inductances and maximum’s at 5, 2, and 1 GHz, re-spectively. A four-metal level aluminum (Al) process was used[Fig. 2(a)]. The spiral coils were built by using the M4 layer(1 m thick), with the underpath contact at M3. The coils weretherefore spaced 4m from the silicon substrate [as in Fig. 2(b)].The inductors were built on a 2–5- cm silicon substrate; weassumed an average resistivity of cm in the mod-eling. The layout parameters were varied to meet the mentioneddesign goals (N to 8; to 220 m; to 23

m; to 16 m). The measured inductance andvaluesare shown in Fig. 3(a) and(b) in comparison to the slightly higher

simulated values. The error was5% for the inductances and10% for the ’s. The overestimation by the model resulted

in part from the concentric-ring approximation, as mentionedabove. Another source of error was in the uncertainty of thesubstrate resistivity, and finally there is an inaccuracy in-pa-rameter testing, which can account for an error of about5% aswell. Taking all those issues into account, we believed that wecould use this model to predict general spiral inductor designsand to conduct optimization tasks with good accuracy.

This, however, still left us with the uncertainty of how rel-evant our findings were, since our predictions were restrictedto circular spiral coils, while most published results relate tosquare coils. We therefore simulated the characteristics of aspiral and a square coil, having both , m,

m, m, m, and cm,by using Agilent’s software program Momentum. For an induc-tance of 3.5 nH at the radius of the circular spiral coilwas chosen to 143m, and the area of the square coil was

m . Fig. 4 shows that of the circular coil isabout 12% higher. The reason for this result is in the shorter con-ductor length required for the circular coil to achieve a given in-ductance value. Consequently, the combination of dc resistanceand capacitance to substrate is comparably smaller, leading tothe higher (see Section III-A for more details). We alsoinserted into Fig. 4 a simulation of the circular coil structurebased on Rejaei’s model; it is obvious that the comparison ofthat model to Momentum simulations shows very good agree-ment. Therefore, it is reasonable to assume that the conclusionswe make based on circular coil structures are qualitatively welltransferable to square inductors.

In the optimization and discussions in Section IV and V,we will particularly take advantage of the speed of the con-centric-ring model. Simulations converge at an average rate ofabout 200 frequency points per minute. This means that it takesonly a few seconds to simulate one inductor across the relevantfrequency range. For the optimization tasks we could thereforeuse a simple random-parameter selection method. From therandom data, we derived envelopes of optimum design points(see Figs. 9, 10, 12, 13, and 15).

III. I NDUCTOR DESIGN CONCEPTS

In this section, we discuss the inductors as an RF passivecomponent with a predominant inductive behavior but with con-siderable parasitic capacitance as well. In light of this circuit-design oriented definition, we describe the electrical character-istics of the inductor (Section III-A), introduce the quality factor

(Section III-B), discuss inductor optimization (Section III-C),and distinguish between different modes of operation (SectionIII-D). Herein we also focus on references to previous work onspiral inductors by others and by us.

A. Inductor Integration and Lumped-Element Model

The spiral coil structure [Fig. 5(a)] has predominantly beenselected for the integration of an inductor in silicon technology[11], and there are good reasons for that choice. A solenoidalcoil, in comparison, has its turns alternating between two metallayers, leading to a low due to the relatively high via resistance


(a) (b)

Fig. 2. Cross sections of a four-level metal interconnect stack with (a) all metal layers shown and (b) only a thicker top metal layer; the thickness of the metallayers and insulating oxide layers are indicated.

(a)

(b)

Fig. 3. Comparison of measured (vertical bars) and simulated (smallhorizontal bars) values of (a) inductances and (b)Q-factors of 57 circular spiralaluminum coils (T = 1�m;T = 4�m;� = 2�5�cm� 3:5�cm)having optimum metal widths(W = 4�23�m) and spaces(S = 3�16�m)for given radius(R = 60� 220 �m) and numbers of turns(N = 2� 8).

[12]. Also, the area enclosed by the turns (and hence the enclosedmagnetic flux) is small because of the dense spacing between themetal interconnect layers [12], [13]. The closely spaced inter-connect layers also form a limitation for the third structural op-tion, the multilevel spiral (MLS) inductor [14] [Fig. 5(b)].The re-sulting large capacitance between the stacked coils considerablyreduces the self-resonant frequency in the MLS structure

[14]–[17]. In spite of this shortcoming we will, however, revisitMLS inductors in Section IV-B of this paper.

Refocusing at the planar spiral coil structure in Fig. 5(a), wewill now discuss the design of a spiral inductor in more detail.The lumped-element model in Fig. 6, in spite of its simplicity,can be used well to model an inductor, as mentioned in Section II.The electrical characteristics of the spiral coil itself are repre-sented by the inductance , the series resistance , and the in-terwire capacitance . The resistance is frequency-depen-dent due to the skin effect and the current crowding. We under-stand here the skin effect as an increased current density nearthe conductor edge due to an internal magnetic field, resultingfrom the RFcurrent. Current crowding, incontrast, is defined asachange in current density resulting from the magnetic field froma neighboring conductor. Both effects are additive and cannoteasily be distinguished. The skin effect can often be neglectedin thin metal layers at low gigahertz frequencies or is overshad-owed by parasitic capacitance effects. High-frequency leakagecurrents through the silicon substrate are modeled by the oxidecapacitances , the resistances , and the silicon capaci-tance . Eddy currents in the substrate are illustrated by theloop circuit with and . If the silicon resistivity islow cm , eddy currents in the silicon cause a mag-netic field to weaken the primary field of the metal coil. Thisleads to a reduced inductance . In summary,those elements represent the electrical characteristics of an iso-lated inductor fairly well, but neglect that in practice the mea-surement RF ground (Sub) does not coincide with the true, phys-ical RF ground . More realistic, however, is to assume thatthe measurement ground (Sub) is connected through a parasitic(lumped) impedance to the node between andnear , as shown in Fig. 6. This simple model represents qual-itatively the effect ofa planar contact to the silicon substrateat thesurface near the spiral coil of an inductor. Obviously, if is ofsimilar magnitude or smaller than , the substrate contact canhave a significant effect on the inductor characteristics [18]. Alsoindicated in Fig. 6 is a resistance that represents the elec-trical effect of a metal shield layer inserted between the spiral


Fig. 4. Comparison of inductances and quality factors versus frequency of a square and a circular spiral aluminum inductor designed for identical inductancevalues nearQ (Momentum simulations); also shown is a simulation of the circular coil by using Rejaei’s model (R = 120�m;W = 13:7�m;S = 10:3�m;N = 4; T = 1 �m; T = 4 �m; � = 5 � � cm).

(a)

(b)

Fig. 5. Cross sections of (a) a single spiral coil and (b) two stacked spiral coilsover a silicon substrate.

Fig. 6. Lumped-element model of a spiral inductor on a lossy silicon sub-strate; a planar substrate contact (Sub) and an ideal substrate contact(Sub ) areindicated. The spiral metal coil is represented byL ,R , andC , the leakagecurrent through the substrate byC , R andC , and eddy currents in thesubstrate byL �M andR (including eddy currents in a ground shield). TheresistorR indicates the electrical effect of a ground shield layer insertedbetween the spiral coil and the substrate (excluding eddy currents).

coil and the substrate (discussed in Section V-B). Such a metalshield is generally grounded, as indicated by the connection to

, and can cause eddy currents due to the close proximity tothe spiral coil. The resistance shunts the bulk resistances

and can thus have a strong effect on the inductor character-istics if .

B. Quality Factor

In Fig. 7(a), the frequency dependences of the measured (datapoints) and modeled ’s of a sample inductor are shown. We usethe conventional definition of , being the ratio of the stored todissipated total energy in the component. Both the desired mag-netic and the parasitic capacitive energy components are consid-ered in this definition. This is in contrast to other definitions of

that relate to the stored magnetic energy only [19], [20]. In RFcircuit design, however, consideration of the total energy storedin the component and of the total loss is relevant. The relatedquality factor can simply be calculated as ,with being the impedance of the inductor. While the induc-tance only shows a weak dependence on frequency (not includedin Fig. 7), exhibits a distinct maximum at a certainfrequency [see markers in Fig. 7(a)]. This can easilybe understood from the lumped-element model in Fig. 6. At lowfrequency, is small and and are large, sothat the RF signal essentially passes through the path of,i.e., the spiral metal coil. With increasing frequency,growsinitially as . At frequencies beyond but belowresonance, is larger than but isstill smaller than . This situation occurs since, due tothe planar spiral coil structure, , . The largerpart of the RF signal now passes through the substrate, i.e., thepath of , causing to decay with frequency. Note that alsothe skin- and current-crowding effects lead to a limitation of

, but are in most practical design cases overshadowed bythose substrate RF losses. This becomes evident from the com-parisons in Fig. 7(b). With suppressed substrate losses and in-creased conductivity and thickness of the metal, the skin- andcurrent-crowding effects on become very significant. For thetypical inductor configuration [ in Fig. 7(b)], the decayof beyond due to capacitive substrate currents domi-


(a)

(b)

Fig. 7. Simulated and measured (markers) quality factors (Q) of a circularspiral aluminum inductor (R = 120 �m; W = 13:7 �m; S = 10:3 �m;N = 4; T = 1 �m;T = 4 �m;� = 5� � cm); in (a) the sensitivitiesto changes in metal thickness (T ! 4 �m, i.e.,R ! 0:25� R ), oxidethickness (T ! 8 �m, i.e.,C ! 0:5 � C ), and silicon resistivity(� ! 50 � cm) based on simulation are indicated; in (b) theQ with (solid)or without (dashed) consideration of the skin effect for cases of a low or normalcoil resistance and a low-loss or conventional silicon resistivity are compared,indicating that capacitive substrate currents overshadow the skin effect in theconventional inductor.

nates, making the skin effect less noticeable in comparison. Ata still higher frequency, self-resonance occurs within the spiralcoil, i.e., through and (not shown in Fig. 7). The typi-cally chosen high silicon resistivity ( cm, i.e., large

) is responsible for self-resonance not to occur through thesubstrate, but through the larger . If that is the case, how-ever, the resonance frequency of the inductor is much lower thanin the case sketched above [13]; we will discuss those differentmodes of operation in more detail in Section III-D.

C. Optimization Guidelines

If one aims at maximizing , then and need to beminimized and should be as large as possible. In the casethat should appear at a low frequency, comparably moreattention should be paid to the reduction of. The effect ofa metal resistance on that is four time lower is illustrated inFig. 7(a) . The optimization of and ,in contrast, is most important if should be shifted to ahigh-frequency value. This is illustrated in Fig. 7(a) for the casesof an oxide that is two times thicker between the metal coil andsilicon , as well as for a 10 higher sil-icon resistivity . Modification of the siliconresistivity is a quite practical means for improving, while an

increase of the oxide layer thickness is limited by mechanicalstress constraints in silicon process technology. Therefore, weshow in Fig. 7(a) only the combined effects of the improved re-sistances and (i.e., ) as an example of a coordinatedinductor optimization. These goals can be approached by an op-timum design in a given process technology or by process mod-ifications. Adhering to conventional processing, one can for in-stance take advantage of the available multilevel interconnects.Several metal layers can be shunted together to achieve an ef-fectively thicker metal in the spiral coil [21]–[24]. Other waysto reduce are to make the aluminum top metal layer thicker[25], [26] or to switch in addition to copper [27], [28] or gold[29] metallization.

Reduction of the substrate losses can be achieved by in-creasing the silicon resistivity, by replacing the silicon witha low-loss alternate substrate in a substrate transfer process,or by locally removing or altering the silicon through bulk-micromachining. Any of those steps should preferably bearranged as a modular addition to the core device integra-tion process [30]. Standard silicon wafer material, grown byusing the Czochralski technique, is still limited to resistivitiesbelow 100 cm [31], but the recently introduced magneticCzochralski wafers may allow for resistivities up to 1 kcm[32]. Float-zone (FZ) silicon can routinely be fabricated withresistivities up to 10 k cm [25], [28], [33], though currentlyonly up to a 6-in wafer diameter [31]. Instead of optimizingthe silicon material, there are several techniques to engineer,to replace, or to remove the silicon underneath the inductorcoil. For example, it is possible to transfer the role of silicon asthe mechanical substrate carrier to a glued-on glass substrate,so that all silicon outside of the active device regions can beremoved [34]. Local reduction of the silicon substrate lossescan be achieved through an n-well formation [35], a lateralpn doping structure [36], a thick buried oxide layer [37], theformation of porous silicon [38], [39], or proton bombard-ment [40]. Near elimination of the substrate losses can beaccomplished by local removal of the silicon [41]–[47] or byusing high-aspect-ratio and surface micromachining techniques[48]–[51]. Most of those micromachining approaches have notadvanced yet beyond the feasibility demonstration. Therefore,in a fairly recent approach to the utilization of micromachingin silicon RF technology, early attention is put on cost, processcompatibility, and yieldability [45], [52].

D. Modes of Operation

As explained above in Section III-B, the modes of operationof a spiral coil structure on silicon can vary depending on thesubstrate resistivity. We had simulated , , theinductance at , and of the sample inductorin Fig. 7 as functions of the silicon resistivity. The resultsare shown in Fig. 8(a) and (b). In the simulations the impactof eddy currents in the conductive silicon was illustrated byturning this loss component on or off (solid versus dotted linesin Fig. 8). The results in Fig. 8 illustrate three distinct domainsof operation, which we named “inductor mode,” “resonatormode,” and “eddy current mode.” These operation modes havea counterpart in the TEM, slow-wave, and skin-effect modes of


Fig. 8. Dependence of the maximum quality factor(Q ), the frequency atQ (f(Q )), the inductance atQ (L(Q )), and the self-resonancefrequency(f ) on the substrate resistivity(� ) with (solid lines) and without(dotted lines) consideration of eddy currents in the substrate. The three regimes,i.e., inductor mode (resonance throughC ) at> 10 � cm, resonator mode(resonance throughC ) at 0.1–10 � cm, and with considerable eddy currentat< 0:1 � cm are indicated(T = 1 �m Al).

microstrip transmission lines on conductive substrates [53]. Theanalogy becomes clear if one views the-turn spiral inductoras a system of coupled microstrip lines. However, althoughone can extend the parallel-plate single-line theory of [53]to multiple lines [54], the resulting picture is not particularlysimple due to various electric and magnetic couplings betweenthe lines. The formulation, presented below, merely relies onthe lumped-element representation of the spiral coil, whileleaving the underlying physics of the problem intact.

At silicon resistivities beyond 10 cm, one encounters theregime where the silicon substrate behaves as a dielectric rep-resented by the capacitance. The substrate resistance

is large enough to suppress resonance through therelatively large oxide capacitance . Instead, the inductorresonates mainly through the dielectric and interwinding

capacitances. Both and increase here with, while is about constant and at maximum (inductor

mode).Below 10 cm, the Si substrate starts to behave as a semi-

conductor and one observes a drastic drop of, indicatingthat now resonance starts to occur though the substrate resis-tance via the large oxide capacitance (onset of res-onator or slow-wave mode). Another signature of the resonatormode is the increase of with further reduction of . Un-like in the inductor mode, where an increase of leads tohigher , due to suppression of substrate leakage currents,it is the reduction of that leads to an improved in theresonator mode. The structure consists now of a lossy inductor

with and a lossy capacitor ,which are connected in parallel and form a resonator. Near theonset of resonator mode, i.e., at cm, it is that beginsto limit the resonator . Consequently, areduction of leads to an increase ofwith cm.

This trend is disturbed by eddy currents (skin effect) in thesubstrate if is so small that the thickness of the silicon sub-strate exceeds the skin depth (this occurs at

cm for a – m silicon substrate at 2 GHz). Theappearance of eddy currents causes the inductance, and thus

, to decrease again, while increases due to the smaller. Reaching resonator mode operation while suppressing eddy

currents is well possible. Patterning of the conductive layer per-pendicular to the eddy current vector can suppress these and thusaccentuate the resonator mode. This condition can most effec-tively be realized by using a patterned metal layer. An insertionof a patterned metal shield between the spiral coil and the sil-icon substrate reaches just that goal, even though forcing res-onator-mode operation was likely not the intention when intro-ducing that structure as a means to achieve an improved[53]. It is important to take note that the improvement inwith a patterned metal shield comes at the expense of a reduced

. A similar result could be reached with a halo substratecontact structure that provided a low-impedance shunt in thesubstrate for a one-port ground configuration (“Sub” andatGround in Fig. 6) [18], [56]. From the results in Fig. 8 it becomesobvious that, for operation of a spiral coil structure on silicon,the substrate resistivity should be at least 10cm; for preven-tion from eddy currents that value should be at least 0.2cm.Those numbers apply, of course, to the given geometry and sub-strate definition only. Slight deviations from those boundaryvalues are expected for smaller or larger coil structures.

IV. OPTIMUM SPIRAL COIL DESIGN

The discussions in Section III shows that optimization of aspiral inductor on a lossy silicon substrate is a quite difficult taskthat is further complicated by the different modes of operation.Inductor optimization involves both the layout of the metal coilstructure and the substrate engineering, which cannot easily betreated separately. A distinction can be made, however, betweensubstrate doping levels that are restricted to the inductor modeor that cover all three modes of operation. In Section IV wetherefore focus on the design of the spiral inductor structure andthus on substrate doping levels of 5 cm and above. We areaddressing the three generic design options, i.e., the single-layercoil (Section IV-A), the shunted-metal coil (Section IV-B), andthe stacked coil structures (Section IV-C).

A. Planar Coil Layout

The design of the coil of a spiral inductor is a rather complextask, even though the structure looks simple. The challenge isto choose, for a given technology with a fixed metal layer thick-ness, the optimum combination of, , , and radius toarrive at an optimum for the desired frequency. This has to bedone while considering eddy current effects in the metal turns[57] and current crowding in the metal conductor [58]. Further-more, the area occupied by the inductor should be minimum for


(a)

(b)

Fig. 9. Quality factor versus coil radius for 5-nH inductors at 2.4 GHz for givennumbers of turns (N ). Inductors are on (a) 5- � cm or (b) 1-k � cm siliconsubstrates (T = 3 �m (Al); Fig. 2(b)). For each inductor, the envelope ofoptimum design points is shown (W , S > 3 �m) for either constant width(dashed envelopes) or varied widthW (solid envelopes).

cost reasons. This calls for a tradeoff between maximizingand minimizing the coil radius. To explore this, we had searchedat a given for the maximum ’s as a function of by varying

and . We used a metal (Al) thickness of 3m to high-light the substrate losses, and thus the sensitivity to, in thatcase. The families of curves of identified maxima are shown inFig. 9(a) for 5- cm and in Fig. 9(b) for 1-k cm silicon re-sistivity (thin solid and dotted curves in Fig. 9). The fat solidand dashed envelopes in Fig. 9 indicate the overall optimum de-signs, derived for variable conductor widths [57] and for con-stant conductor width, respectively. It is obvious that on thehigh-resistivity substrate optimum design of the 5-nH inductorat 2.4 GHz calls for larger coil area, which allows wider metallines, thereby reducing ohmic metal losses. On the 5-cmsubstrate, however, increasing the coil area will increase the ca-pacitive coupling to the conductive silicon substrate, leading tohigher substrate losses. The best choice in terms of andcoil area would then be a design with and 125- m radius.Such an optimum design cannot be identified for the 1-kcmsubstrate within the range of economically acceptable inductorsizes [Fig. 9(b)]. This nevertheless provides a 30% higherfor the high resistivity substrate at a 125-m radius comparedto 5- cm silicon or allows us to achieve the same at a90- m radius. Allowing for different track width in the coil tosuppress eddy currents in metal, as mentioned above, can furtheroptimize the designs. The increase of due to this designoption becomes most significant for very high resistivity andlarge coil area, as seen from Fig. 9, [57], and [59]. The current

crowding effect can be improved by changing from a conven-tional coil to a segmented design [60].

B. Metal Layer Shunting

Current crowding in the coil is best minimized by making thecoil conductor narrow [57], [58]. Even though that reduces thecurrent crowding, the structure will suffer from an increasedcoil resistance. Consequently, a thicker metal is necessary toovercome this dilemma. Shunting several metal layers in a mul-tilevel interconnect technology together has been mentioned inSection III-C as a simple technique to provide an effectivelythicker conductor without changing the process technology[21]–[24]. Shunting of metal layers, however, comes at theexpense of a reduced oxide thickness between coil and sub-strate ( in Fig. 5). The therefore becomes larger and

decays at a lower frequency compared to a single-layer coilbuilt by using only the top metal. Metal shunting thereforeallows one to optimize an inductor in a conventional integrationprocess by maximizing and by shifting to the desiredfrequency [24]. The tradeoff between reducingand minimizing had been addressed experimentally in ourearlier work [24]. There it was assumed that large coil areasare required to accommodate the high number of turns forachieving large inductance values. One outcome of this conceptwas that of the large coils occurred at lower frequenciescompared to small coils. Shunting provided a benefit for highnumbers of turns, while for small inductors it was advantageousto build the coil at the top metal level only [24]. For the studypresented in this paper, here we evaluated metal shunting forthe cases of the fixed frequencies 900 MHz, 1.8 GHz, and2.4 GHz. Optimum coil layouts for various inductance valueswere found from a large series of calculations with parametervariations, of which the envelopes of maximum’s are plottedin Fig. 10 (see also Section II). The cases of a single M4 layer,shunted M3/M4 layers, and shunted M2/M3/M4 layers werecompared metal . For each of these cases there wasan optimum inductance value, at which the highestwasachieved. Below that inductance the ohmic losses in the spiralcoil dominated, while above that inductance substrate losseswere most significant (see Fig. 10). That optimum point wasshifted to a lower inductance value for the M2/M3/M4 coilcompared to the M3/M4 and the M4 inductors. Consequently,if one considers a fixed frequency, the decision for a certainshunting scheme is different from the one pointed out in [24].Layer shunting is less advantageous at high inductance values,where substrate losses dominate. This trend is stronger at highfrequency [Fig. 10(c) versus Fig. 10(b) versus Fig. 10(a)]. It isfurther obvious from Fig. 10 that the overall maximum qualityfactor is achieved at 1.8 GHz [Fig. 10(b)]. At 900 MHz,waslimited by the area constraint [Fig. 10(a)], while at 2.5 GHzthe maximum was set by the substrate losses [Fig. 10(c)].It is evident that with higher substrate resistivities the regime,in which coil losses dominate, will shift to higher inductancevalues.

C. Stacked Spiral Coils

In spite of the current crowding and eddy current phenomenain the metal coil described in Section IV-A, mutual coupling


Fig. 10. Envelopes of maximum quality factors at (a) 900 MHz, (b) 1.8 GHz,and (c) 2.4 GHz versus inductances for optimized inductors in a four-level metalprocess (T = 1 �m (Al); Fig. 5(a)) on a 5- � cm substrate, derived fromsimulations with random variations ofW , S, N , andR (R < 200 �m; W ,S > 3 �m; T = 1 �m). Shunting of three (M2/M3/M4) or two (M3/M4)metal layers is compared to inductors built at the top metal layer (M4).

between the turns in a spiral coil is essential to achieve a highinductance per area. In a planar coil structure, such couplingoccurs only laterally. Since a separate metal layer is requiredanyhow to provide an underpath from the inner end of the coilto the outside, this metal layer may as well be used to build asecond spiral coil that overlaps with the first coil [Fig. 5(b)].Such a stacked spiral coil structure provides an increased induc-tance per area (for an identical sense of turn in coils) comparedto two individual coils, but has a reduced due to the highcapacitance between the coils if the spacing is small [14]. Re-ferring to the lumped-element model in Fig. 6, this additionalcapacitance component is part of and thus has a direct im-pact on . The spacing between the stacked coils is restrictedby the maximum thickness of the oxide layer that can be de-posited onto the wafer. The effect of the coil spacing on in-ductance, , , and becomes obvious from thesimulation results in Fig. 11, which have been achieved for afixed layout of the two 2-nH Al-coils ( ; m;

m; m). Three distinct design pointsare indicated in Fig. 11. For the small coil spacing between sub-sequent metal layers in a multilevel interconnect scheme, theinductance is increased by50% due to the additional vertical

Fig. 11. Effect of coil spacing(T ) on maximum quality factor(Q ),frequency atQ (f(Q )), inductance atQ (f(Q )), andresonance frequency(f ) for an inductor consisting of two identical stacked2-nH coils on a 5- � cm substrate (N = 4, R = 120 �m,W = 13:7 �m,S = 10:3 �m). Designs for typical vertical interconnect spacing (“A”), anoptimum combination of inductance per area andQ (“B”), and widelyspaced coils (“C”) are indicated.

mutual coupling (Design “A”). This comes, however, at the ex-pense of a 20% reduction in , a shift of to a some-what lower frequency, and a drastically reduced comparedto effectively de-coupled stacked coils (Design “C”). If one aimsfor an optimum combination of inductance per area and ,one would choose design “B” at 2-m coil spacing (maximumof the product ). This design still suffers from a con-siderable reduction of . A high is only achieved in de-sign “C,” though one loses the advantage of the increased in-ductance per area due to the weak vertical mutual coupling. Thestacked-coil inductor therefore operates at small coil spacingin the resonator mode, but differently from the observations inSection III-D both the decay of beyond and theare affected here by the interwire capacitance. The increasein inductance per area can be 1.5compared to two widelyspaced stacked coils and 3compared to the single 2-nH coil.Even higher inductance-per-area values are feasible, but thenthe structure clearly operates as a resonator (see converging

- and -curves in Fig. 11 at minimum ). Trueinductor operation is only achieved at large coil spacing, butwith a twofold increase in inductance per area compared to asingle spiral coil.

V. MINIMIZATION OF SUBSTRATE LOSSES

Differently from the discussions in Section IV we will nowtreat all modes of operation of the spiral coil structure. We willfocus on two distinct types of substrates, i.e., the uniformlydoped silicon substrate (Section V-A) and the case of a metalground shield between the spiral coil and the silicon substrate(Section V-B). Coil metal thicknesses of 2m and 3 m, re-spectively, have been chosen to suppress ohmic losses in thecoils and thus highlight the substrate losses to be studied.

A. Silicon Substrate Losses

It had been discussed in Section III-C that results froman optimum tailoring of the ohmic losses in the spiral coil andthe substrate losses. The maximumat each inductance value,


Fig. 12. Envelopes of maximum quality factors versus inductances at 2.4 GHzfor 0.1-, 10-, and 1-k � cm substrate resistivities, derived from simulationswith random variations ofW , S, N , andR (R < 200 �m; W , S > 3 �m;N = 1�8) and with the structure depicted in Fig. 2(b)(T = 2 �m; (Al)).

while aiming at a certain frequency, is a result of an optimum de-sign based on coil radius, number of turns, and conductor widthand space. We had searched 20 000 different designs to find the

’s for inductance values up to 20 nH at 2.4 GHz and forsilicon resistivities of 0.1, 10, and 1 k cm. In the randomsearch, was allowed to range from 1 to 8 and the coil ra-dius was constrained to 200m. The results from this searchtask are shown in Fig. 12. At 1-k cm substrate resistivity, onecan clearly identify the (full) numbers of selected turns from thecontour of the envelope. A of about 15 could be achievedthroughout the considered inductance values above 1.5 nH. Thisshows that, due to the high silicon resistivity, the decay ofbe-yond is closely related to rather than (larger

in the model of Fig. 6). This means that then parametersrelated to the lateral coil design will at first order affect .Those parameters change roughly in proportion as one varies thedesign and thus the inductance value, leading to the fairly con-stant optimum versus in Fig. 12 at 1-k cm substrate re-sistivity. In contrast, for the 10- cm substrate, relatively lower

values were determined for large inductances, indicatingthe effect of the capacitive loss currents through and .The larger the impedance of the -path in the model of Fig. 6,consequently the stronger is the effect of leakage through the

-path. As the silicon resistivity is reduced to 0.1 cm,however, the dependence of on is smaller again. At thislow substrate resistivity, the coil structure operates in the res-onator mode, yet before eddy currents in the substrate becomestrongly apparent (see Fig. 8). (This predicted effect has exper-imentally been verified by us, but we do not present that datahere.) The case of the 10- cm substrate stands for the typicalinductor operating in inductor mode and having considerablelosses in both the metal coil and the silicon substrate. As statedearlier in Section II and identified in Section IV-A, ohmic lossesin the coil weigh comparably more at low frequencies, whilelosses due to leakage currents through the silicon dominate athigh frequencies. The design optimum moves therefore at lowfrequency against the maximum area limit [see, e.g., Fig. 10(a)].Consequently, the dependence of the feasible on the in-ductance value is more pronounced at a high target frequency,as shown in Fig. 13. Therefore, the higher the target frequency

Fig. 13. Envelopes of maximum quality factors versus inductances at 0.9, 2.4,and 5.8 GHz for a 10- � cm substrate, derived from simulations with randomvariations ofW , S,N , andR (R < 200�m;W , S > 3 �m;N = 1�8) andwith the structure depicted in Fig. 2(b)(T = 2 �m).

Fig. 14. Electrical characteristics of a 2-nH inductor with a spiral coil(3 �m Al) separated from a 10- � cm silicon substrate by a 1-�m-thickgrounded shield (spacing: coil/shield= 2 �m; shield=Si = 1 �m; N = 4,R = 120 �m,W = 13:7 �m,S = 10:3 �m). The maximum quality factor(Q ), the frequency and inductance atQ (f(Q ); L(Q )), andthe self-resonance frequency(f ) are drawn versus the shield resistivity forcases with (solid lines) and without (dotted lines) eddy current effects.

is, the narrower becomes the range of feasible inductances for agiven . This aspect will further be addressed in Section VI.

B. Substrate Shields

In Section III-D, we had indicated that the effect of the sub-strate losses can strongly be influenced by a patterned or solidconductive ground shield layer placed between the spiral coiland the substrate. This can be a metal layer or a higher resistivepolysilicon film offered by the integration process [55]. The de-pendencies of , , , and on the re-sistivity of a 1- m-thick shield layer are illustrated in Fig. 14for a 10- cm silicon substrate and a 3-m-thick Al layer toform the coil. In that figure, the cases with and without eddycurrents in the shield and the substrate are compared. The qual-itative dependencies of the above-mentioned parameters on theshield resistivity are at first view similar to those shown in Fig. 8,where the metal shield was not present and the substrate resis-tivity was varied. There are, however, considerable differences.The decay of from high to low resistivities in Fig. 14 is notas sharp as that in Fig. 8; this results from the additional leakagecurrents flowing through the 10- cm silicon substrate. The ef-fect of eddy currents illustrated in Fig. 8 and Fig. 14 are similar,however, because the additional eddy currents in 10-cm sil-icon are insignificant (see Fig. 8). Focusing at in Fig. 14,


one notices that the highest can be achieved at low shieldlayer resistivity, provided that eddy currents can be suppressed.It has been shown that, by patterning the shield layer perpen-dicular to the currents in the spiral coil, this is indeed possible[55]. Such a patterned ground shield was advertised as a struc-ture that protects from substrate losses, leading to a higherthan without that shield [55]. Our simulation results confirm thata 30% higher is possible with the use of a ground shield,but that advantage comes at the expense of a strongly reduced

; the structure thus operates in resonator mode. A similar be-havior was observed for an inductor coil combined with a halosubstrate contact [18], [56]. Both the patterned shield layer andthe halo substrate contact form a low-resistive shunt of the sil-icon ( in Fig. 6), but they cannot prevent eddy currents ina highly conductive silicon substrate from affecting the inductorcharacteristics. This could only be achieved by terminating themagnetic field at the shield, which would in factrequire thateddy currents be flowing in the shield layer [61]. The only pos-sibility to form an effective shield, terminating both magneticand electric fields, would be to use a low-resistive blanket metallayer that is spaced sufficiently from the spiral coil. The requiredspacing would need to be as large as 150m [62]. A patternedmetal ground shield is, however, effective in terminating an elec-tric field to prevent RF crosstalk through the substrate [63]–[65].Blanket polysilicon shields have been proposed in place of pat-terned metal for the same purpose [55]. Poly shields have resis-tivities in the range of 0.001–0.01 cm, which is just at theedge of the steep eddy current onset (Fig. 14).

VI. TECHNOLOGY SCALING

The final question to address in this paper is certainly up towhich frequencies spiral inductors can be used in monolithicRF circuit design. We have therefore determined the range ofinductances on basis of the’s required for frequencies up to20 GHz (Fig. 15). Our simulator was used to maximizeat theindividual frequencies by varying , , N, and . Copper wasconsidered here in place of aluminum, and a metal thickness upto 4 m was permitted. The substrate resistivity was limited to 1k cm, andradii not higher than 200m were allowed. Thoseconstraints are in line with economic aspects and the best pos-sible processing features available today for practical inductorintegration [25], [28]. The results are shown in Fig. 15. The max-imum inductance values, for example, , decrease above

3 GHz with frequency due to substrate losses. Below3 GHz,the ranges of inductance become smaller with frequency reduc-tion because of metal losses in the coil and the area constraint.It can be seen from the grey -contours in Fig. 15 that a spe-cific impedance can be maintained in technology scaling for thegiven ’s of 10 and 20 at 3 GHz, while for the con-straint in silicon resistivity becomes well noticeable and limitsthe impedance values. The adjustment of the inductor qualitywith technology scaling becomes more difficult, however, if oneassumes that be increased proportionally with frequency (seedashed grey lines for const. in Fig. 15). Then, e.g., at10 GHz a maximum impedance of 300can be realized with

23, while at 5.8 GHz only 13.5 is required, thereforeextending the impedance range to k . The considerationsbased on the conditions const. and freq only provide

Fig. 15. Envelopes of maximum inductances for given quality factors between10 and 30 for limited metal thickness(T < 4 �m Cu), silicon resistivity(� < 1 k � cm), and radius(R < 200 �m). The dominances of theconstraints in metal thickness at low frequencies and in silicon resistivity at highfrequencies are quite noticeable.

a general insight into the upper limitations in inductor designwith technology scaling. It will depend on the cleverness in RFcircuit design how far up in frequency spiral inductors can real-istically be used. While there is in principle no lower limitationin inductance values, there is certainly a practical limit. As theinterconnect self-inductances become comparable to the induc-tance value of the discrete inductor, it becomes very difficultto design and layout an RF circuit. That limit is typically near0.5 nH. It can therefore be presumed that inductors can practi-cally well be applied up to 10 GHz. At frequencies10 GHz,discrete passive components will have to be substituted by dis-tributed passives, requiring the integration of transmission lineson a silicon chip. Because of very large dimensions of transmis-sion lines at 30 GHz, an interesting challenge presents itselffor frequencies of 10–30 GHz, entertaining the application ofperiodic transmission lines, patterned ground planes, or integra-tion of ferromagnetic and high-materials on silicon.

VII. CONCLUSION

The optimization of a spiral inductor on silicon is, in spite ofthe simplicity of the structure, a complicated task. More insightcan be gained by making a clear distinction between the threemodes of operation of a spiral inductor over a lossy substrate.The boundaries are set by the substrate doping: a spiral coil op-erates in inductor mode at a silicon resistivity above cm,resonator mode occurs in the range of0.2–10 cm, andbelow cm the structure works in the undesirable eddycurrent regime. If one expects from a spiral coil structure to fea-ture a maximum at a much lower frequency than its reso-nance point, design for operation in inductor mode is required.Resonator mode operation can be of interest for coil implemen-tation in an tank circuit, since an increase inby roughly50% is possible at the given frequency. Both ohmic losses in thespiral coil and substrate losses have to be tailored to optimizean inductor for maximum at the target frequency. In a givenprocess technology, there is a tradeoff between the maximum

and the coil area, which one has to take into account. Withtoday’s economically reasonable process feature improvements,


the widest range of inductance values for a givencan be pro-vided near 2.4 GHz. RF circuit design based on discrete inductorcomponents can safely be expected up to 10 GHz, while far be-yond that range a transition to distributed passive componentsmay be required.

ACKNOWLEDGMENT

The authors wish to acknowledge the DIMES integrated pro-cessing laboratory, and in particular H. Schellevis, for fabrica-tion of the test inductors used to verify the validity of the con-centric-ring inductor model. The development of the inductormodel was sponsored by Philips Semiconductors.

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Joachim N. Burghartz (M’90–SM’92–F’02)received the M.S. degree from the RWTH Aachen,Germany, in 1982 and the Ph.D. degree from theUniversity of Stuttgart, Stuttgart, Germany, in 1987.

From 1987 to 1998, he was with the IBM T. J.Watson Research Center, Yorktown Heights, NY,working on selective epitaxial growth of silicon,high-speed Si and SiGe bipolar integration processes,0.18-�m CMOS, the integration of spiral inductorsand other passive components for RF applications,and on RF circuit design. In 1998 he became Full

Professor at the Technical University of Delft, Delft, The Netherlands, wherehe has set up a research program in RF silicon technology, including topics innovel materials, micromachining post-process modules, wafer-level chip-scalepackaging, passive components, circuit integration processes, compact tran-sistor modeling, high-frequency characterization, and RF circuit design. SinceMarch 2001, he is the Scientific Director of the research institute Delft Institutefor Microelectronics and Submicrontechnology (DIMES).

Dr. Burghartz has served, or is currently serving, in conference committeessuch as IEDM, BCTM, and ESSDERC/ESSCIRC. He is an Associate Editor ofthe IEEE TRANSACTIONS ONELECTRONDEVICES.

Behzad Rejaeireceived the M.Sc. degree in elec-trical engineering from the Delft University of Tech-nology, Delft, The Netherlands, in 1990 and the Ph.D.degree in theoretical condensed matter physics fromthe University of Leiden, Leiden, The Netherlands,in 1994.

He was a Post-Doctoral Research Fellow in theTheoretical Physics Department at the Universityof Leiden in 1994 and 1995 and in the Departmentof Applied Physics at the Technology University ofDelft from 1995 to 1997. Since 1997, he has been

with the Department of Information Technology and Systems at the DelftUniversity of Technology, where he is currently an Associate Professor. Hisresearch interests are in the area’s of electromagnetic modehng of integratedpassive components and physics of ferromagnetic devices.

on the design of rf spiral inductors on silicon -...

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