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New Multilevel Inverter Topology with reduced number of Switches Presentation by, T.Anandkumar. ME (PED) – I Year 1 20/10/2015

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Page 1: New Multilevel Inverter Topology

New Multilevel Inverter Topology with reduced number of

Switches

Presentation by,T.Anandkumar.ME (PED) – I Year

120/10/2015

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Contents

• Introduction• Cascaded H-Bridge Inverters• Multilevel DC Link Inverter • Modulation Strategies Inverter• Carrier based PWM methods• Simulation Results• Conclusions• References

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ABSTRACT

• New class of three phase seven level inverter based on a multilevel DC link (MLDCL) and a bridge inverter to reduce the number of switches.

• For voltage levels, the required number of active switches is 2 (m-1) for the existing multilevel inverters, but it is m+3 for the MLDCL inverters.

• The output of proposed MLDCL is synthesized as the staircase wave, whose characteristics are nearer to a desired sinusoidal output.

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• Multilevel inverters consist of 3 types named as

i. Diode clamped flying

ii. Capacitor multilevel inverter

iii. Cascaded multilevel inverter• Compared to diode clamped & flying capacitor type

cascaded H-bridge multilevel inverter requires least no. of components to achieve same no of voltage levels

INTRODUCTION

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H-BRIDGE INVERTERS

• In single phase inverter, for positive half cycle S1 and s2 will turn on, for negative half cycle S3 and S4 will turn

• Connecting two or more inverter in series than it said to be Multi level inverter.

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Cascaded H-Bridge InvertersFor Three Phase

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Switching sequence for 1–Ф 7 level cascaded inverter

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Output Waveform of H-bridge Inverter

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Cascaded H-Bridge Inverters Operation

• An N level Cascaded H bridge inverter consists of series connected (N-1)/2 number of cells in each phase.

• Each cell consists of single phase H bridge inverter with separate dc source.

• There are four active devices in each cell and can produce three levels 0, Vdc/2 and –Vdc/2.

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Multilevel DC Link Inverter

• Compared with the existing multi level inverters, the new MLDCL inverters can significantly reduce no. of gate drivers

• And as the no. of voltage levels increases• For a given no.of voltage levels m, the new

inverter requires m+3 active switches

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Block diagram for proposed MLDCL Inverter for Single Phase

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Multilevel DC Link Inverter

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Switching sequence for single phase 7 level MLDCL inverter

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Output Waveform of DC Link Inverter

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Comparison of the proposed MLDCL inverters and the existing Multilevel Inverters

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Modulation Strategies Inverter

• A number of modulation strategies are used in multilevel power conversion applications.

• They can generally be classified into three categories:

• Fundamental Frequency switching strategies

• Space Vector PWM strategies

• Carrier based PWM strategies

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Carrier based PWM using Sub-harmonic Methods

• The sub-harmonic pulse-width modulation (SPWM) is commonly used in industrial applications.

• The frequency of reference signals fr determines the inverter output frequency f0.

• Its peak amplitude A controls the modulation index M.

• For a seven level inverter it requires 6 triangular carriers.

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Sinusoidal reference with triangular carriers for a 3-phase

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Carrier based PWM methods using Modified Space vector PWM

• SPWM scheme for two-level inverters.

• Each reference phase voltage is compared with the triangular carrier and the individual pole voltages are generated.

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Modified reference voltages and triangular carriers for a 3-phase

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Conclusion

• The cascaded MLDCL inverters are cost less due to the savings from the eliminated gate drivers

• From fewer assembly steps because of the substantially reduced number of components, which also leads to a smaller size and volume.

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Thank You

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