multilevel arch & str org.& mips, 8086, memory

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Need for Memory Hierarchy (Unit-1,3)(M.M. Chapter 12) The memory unit is an essential component in a digital computer since it is needed for storing program and data. A small computer with a limited application may be able to fulfill its intended task without the need of additional storage capacity. Most general-purpose computers would run more efficiently if they were equipped with additional storage beyond the capacity of the main memory. there is just not enough space in one memory unit to accommodate all the programs used in a typical computer. It is more economical to use low-cost storage devices to serve as a backup for storing the information that is not currently used by the CPU. The memory unit that communicates directly with the CPU is called the main memory. Devices that provide backup storage are called auxiliary memory. The most common auxiliary memory devices used in computer systems are magnetic tapes and magnetic disks. They are used for storing system programs, large data files, and other backup information. Only programs and data currently needed by the processor reside in main memory.

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Page 1: Multilevel arch & str org.& mips, 8086, memory

Need for Memory Hierarchy (Unit-1,3)(M.M. Chapter 12)

• The memory unit is an essential component in a digital computer since it is needed for storing program and data.

• A small computer with a limited application may be able to fulfill its intended task without the need of additional storage capacity.

• Most general-purpose computers would run more efficiently if they were equipped with additional storage beyond the capacity of the main memory. there is just not enough space in one memory unit to accommodate all the programs used in a typical computer.

• It is more economical to use low-cost storage devices to serve as a backup for storing the information that is not currently used by the CPU.

• The memory unit that communicates directly with the CPU is called the main memory.

• Devices that provide backup storage are called auxiliary memory. The most common auxiliary memory devices used in computer systems are magnetic tapes and magnetic disks. They are used for storing system programs, large data files, and other backup information.

• Only programs and data currently needed by the processor reside in main memory.

Page 2: Multilevel arch & str org.& mips, 8086, memory

• The total memory capacity of a computer can be visualized as hierarchy of components.

• The memory hierarchy system consists of all storage devices employed in a computer system from the slow but high-capacity auxiliary memory to a relatively faster main memory, to an even smaller and faster cache memory accessible to the high-speed processing logic.

• The overall goal of Memory Hierarchy is to obtain the highest possible average access speed while minimizing the total cost of the entire memory system.

I/O Processor

Magnetic disks

Magnetic tapesMain Memory

CPUCache Memory

Page 3: Multilevel arch & str org.& mips, 8086, memory

• At the bottom of the hierarchy are the relatively slow magnetic tapes used to store removable files.

• Next are the magnetic disks used as backup storage.• The main memory occupies a central position by being able to

communicate directly with the CPU and with auxiliary memory devices through an I/O processor.

• Cache Memory :- L1 cache & L2 cache

1. A special very high speed memory called cache. 2. It is sometimes used to increase the speed of processing by making

current programs and data available to the CPU at a rapid rate.3. The cache memory is employed in computer system to compensate for

the speed differential between main memory access time and processor logic.

4. The Cache memory is concerned with the transfer of information between main memory & CPU.

• L1 cache is a small, fast memory cache that is built onto a CPU and helps speed access to important and frequently-used data.

• L1 cache is typically smaller and faster than L2 cache.• L1 cache is an abbreviation of Level 1 cache.

Page 4: Multilevel arch & str org.& mips, 8086, memory

• While I/O processor manages data transfers between auxiliary memory and main memory, the cache organization is concerned with the transfer of information between main memory and CPU.

• Many operating systems are designed to enable the CPU to process a number of independent programs concurrently . This concept is called multiprogramming, refers to the existence of two or more programs in different parts of the memory hierarchy at the same time.

• The part of the computer system that supervises the flow of information between auxiliary memory and main memory is called the memory management system.

Page 5: Multilevel arch & str org.& mips, 8086, memory

Main Memory

• The technology used for main memory is based on Semiconductor Integrated Circuits.

• Main Memory : RAM & ROM• RAM (volatile) : SRAM & DRAM• SRAM consist of internal flip-flops to store binary information.

The stored information remains valid as long as power is applied to the unit.

• SRAM is easier to use & has shorter read/write cycles.• DRAM stores information in the form of electrical charges that

are applied to capacitors.• The stored charge on the capacitors tend to discharge with

time.• It needs refreshing.• DRAM offers reduced power consumption & larger storage

capacity in a single memory chip.

Page 6: Multilevel arch & str org.& mips, 8086, memory

• ROM : Read only Memory• It is also Random Access, permanent.• ROM is required to store initial program called

bootstrap loader.• Its function is to start the computer software

operating when power is turned on.• The hardware of the computer sets the Program

Counter (PC) to the first address of the bootstrap loader.

• It loads a portion of the O.S. from disk to main memory & then control is transferred to the O.S.

Page 7: Multilevel arch & str org.& mips, 8086, memory

Multilevel Viewpoint of a Machine

• Each higher level is built on a preceding one and provides more abstract instructions that are translated to the lower level to be executed.

• Each higher level is a virtual machine related to the language describing its capabilities.

Page 8: Multilevel arch & str org.& mips, 8086, memory

Multilevel Computer

Problem oriented language level

Assembly Language

Operating System machine level

Instruction Set Architecture

Micro-architecture level

Digital Logic Level

Level 5

Level 3

Level 2

Level 1

Level 0

Level 4

Page 9: Multilevel arch & str org.& mips, 8086, memory

• Microarchitecture also known as Computer organization at a lower level.

• It is the description of the system that involves how the constituent parts of the system are interconnected and how they interoperate in order to implement the ISA.

• It is the way a given instruction set architecture (ISA) is implemented on a processor.

• A given ISA may be implemented with different microarchitectures. • Implementations might vary due to different goals of a given design

or due to shifts in technology.• Computer architecture is the combination of microarchitecture and

instruction set design.• Instruction Set Architecture (ISA) is the abstract image of a

computing system that is seen by a machine language (or assembly language) programmer.

• ISA includes the instruction set, word size, memory address modes, processor registers, and address and data formats.

Page 10: Multilevel arch & str org.& mips, 8086, memory

Computer Level Hierarchy

Level 6 User Executable Program

Level 5 High Level Lang. C++, Java etc.

Level 4 Assembly Lang. Assembly Code

Level 3 System Software Operating System, Library Code

Level 2 Machine Level Instruction Set Architecture

Level 1 Control Unit Microprogrammed or Hardwired

Level 0 Digital Logic Circuits, gates etc.

Page 11: Multilevel arch & str org.& mips, 8086, memory

Functions of Operating System

• Process Management• Memory Management• File Management• Device Management

Types of Control UnitMicro Program is a program written in a low level lang. that

is implemented by the hardware. This results in CISC architecture.

Hardwired CU consist of hardware that directly executes machine instructions. This design results in RISC architecture.

Page 12: Multilevel arch & str org.& mips, 8086, memory

Structured Organization of a computer System

System Bus

CPU Main Memory

Disk ControllerVideo Subsytem

Interfaces Audio

Hard Disks

VDU

Serial (COM)

Parallel (LPT) Port

Page 13: Multilevel arch & str org.& mips, 8086, memory

The Functions performed by a computing System

• Data Processing Functions : carried out by CPU• Data Movement Functions : Registers & Memory• Control Functions : carried out by CU• Data Storage Functions : Memory Units

System Bus Structure : Communication pathway connecting two or more devices like CPU, Main Memory or I/O. Bus is a group of physical wires.

• Address Bus (Unidirectional)• Data Bus (Bidirectional)• Control Bus (Unidirectional)

Page 14: Multilevel arch & str org.& mips, 8086, memory

MIPS and MFLOPS as Performance Metrics

MIPS rating of a CPU refers to how many low level machine code instructions, a processor can execute in one sec.

One way to measure CPU performance is MIPS, or Million Instructions

per second.

MIPS = Instruction count / Execution time * 106

Since, Execution time = Instruction count * CPI / Clock rate (CPI- Cycles per instruction)Equation becomesMIPS = Clock rate / CPI * 106

Since MIPS is a rate of operations per unit time, CPU performance can be specified as the inverse of execution time, with faster machines having a higher MIPS rating.

Advantages:• Easy to understand• Faster machines will have higher MIPS rating and appear to have

better performance.

Page 15: Multilevel arch & str org.& mips, 8086, memory

However, there are problems with using MIPS as a performance metric.

• MIPS is dependent on the instruction set of the CPU, making it difficult to compare the MIPS ratings of processors with different instruction sets.

• MIPS can vary inversely to performance.

MFLOPS : Mega FLoating point OPerations per Second. One million floating point operations per second. (FLoating point Operations Per Second)

• The measurement of floating point calculations. • The FLOPS is a measure of a computer's performance, especially

in fields of scientific calculations that make heavy use of floating point calculations, similar to the older, simpler, instructions per second.

• Used for finding the performance of specialized computers like supercomputers.

• MFLOPS depends on programming behavior and hardware design of the computer.

• The programs which has no floating point operation have rating zero.

• MFLOPS can measure the performance of the system more correctly than MIPS.

Page 16: Multilevel arch & str org.& mips, 8086, memory

MFLOPS -

No. of floating point operations in program / execution time * 106

Advantage:• Useful in comparing performance of scientific applications machine.• Intended to provide a fair comparison between such machines such

a flop is the same on all machines.

Problems:• Not all machines implemented the same set of flops – some

operations are synthesized from some primitive flops.

Page 17: Multilevel arch & str org.& mips, 8086, memory

Language Of the Machine 8086

• 8086 is a 16bit N-Channel, HMOS Microprocessor.• It Consumes less power.• It draws 360 mA on 5 Volt.• The 8086 operates in both single processor and multiple processor

configurations to achieve high performance.• It is manufactured for standard temperature range 32’f – 180’f as well as

extended temperature range from 40’f – 180’f.• Its clock frequencies for different versions are 5, 8 and 10 MHz.• It is built on single semiconductor chip and packaged in 40 pin IC package.

The type of package is DIP (Dual Inline Package).• It uses 20 address lines & 16 data lines.• It can directly address upto 220 = 1Mbit of memory.• 16 bit data word is divided into low order byte & high order byte.• 20 address lines are multiplexed lines – 16 low address lines are time

multiplexed with data & 4 high address lines are time multiplexed with status signals.

Page 18: Multilevel arch & str org.& mips, 8086, memory
Page 19: Multilevel arch & str org.& mips, 8086, memory

8086 CPU is divided into independent Functional Parts:

1. Bus Interface Unit (BIU)2. Execution Unit (EU)

• BIU sends out addresses, fetches instructions from memory, reads data from ports & memory and write data to ports & memory.

• It handles all transfers of data & addresses on buses or execution unit.

• EU tells BIU where to fetch instruction or data from & decodes instructions & execute instructions.

• EU contains control circuitry which direct internal operations, decoder in EU translates instructions fetched from memory into series of actions which EU carries out.

• EU has 16 bit ALU which can add, subtract, AND, OR, XOR, increment, decrement, complement or shift binary numbers.

• A 16 bit register in EU has 9 active flags where flag is a flip-flop that indicates some conditions produced by execution of an instruction.

Page 20: Multilevel arch & str org.& mips, 8086, memory

Register Organization of 8086

• 8086 has fourteen 16 bit registers classified as :

General purpose Register : Ax, Bx, Cx, DxPointer & Index Register : SP, BP, SI, DISegment register : CS (Code), DS (Data),

SS (Stack), ES (Extra)Instruction pointer & status register

Page 21: Multilevel arch & str org.& mips, 8086, memory

Language levels used to write a program for a microcomputer:

• Machine Language• Assembly Language• High level Language

• Statement in Assembly Language

Label Field OPcode field Operand field Comment field

NEXT: ADD AL, 07H ;

Page 22: Multilevel arch & str org.& mips, 8086, memory

Simulation Using MASM (Microsoft Assembler)

Need for Assembler : Learn how computer works at low level. Write device drivers Optimize program for speed & size. Debug, hack & dissect other programs Bootstrap new computer system Communicate with input, output directly Write utilities in HLL using features not available in those languages.

MASM for microprocessor can be used in 2 ways:1. With models that are unique to a particular assembler2. With full segment definition that allow full control over the assembly

process & are universal to all assemblers.

Page 23: Multilevel arch & str org.& mips, 8086, memory

CAO Model Question PaperUnit – 1

Q: 1 Explain Stored program control concept of various types of computers.

Q: 2 On what basis Flynn has classified computers? Explain.

Q: 3 What are the characteristics of CISC architecture ? How is it different from RISC architecture?

Q: 4 Explain Immediate and indexed addressing mode. Discuss their advantages and disadvantages.

Q: 5 How do you classify instructions in an instruction set? Explain any two instructions in each category with suitable examples.

Q: 6 Discuss the two metrics to measure the performance of a computer system. What are their advantages & Disadvantages?

Q: 7 Distinguish between SRAM and DRAM.

Q: 8 Discuss Multilevel viewpoint of a Machine.