Multidisciplinary Engineering Senior Design

Project 6505: Multi-channel Biomedical Signal Acquisition System

Preliminary Design Review

11/11/2005

Project Sponsor / Advisor / Mentor: Dr. Daniel Phillips

Team Members: Jim Massaro, Charles Spuckler, and Matthew Huff

Kate Gleason College of EngineeringRochester Institute of Technology

Project Overview

• Background–Epilepsy

•1% of world population suffers from epilepsy

•Less than 50% have a detectable cause

•25% have no means of controlling or predicting seizures reliably

–Current Methods of Treatment / Predicting Seizures

•Medication

•Surgery

•Seizure sensing / predicting dogs

•Electroencephalogram (EEG) signal analysis

Project Overview

• Proposal

–Create an MCU based embedded data acquisition and processing system

that will filter and digitize multiple EEG output channels which will then be

sent to a real-time signal processing system. The system output will be

compatible for connection to the primary destination of a multiple DSP

based processing and analysis system then to a PC or workstation for

storage and offline processing and analysis.

EEG

Multi-channel Biomedical Data

Acquisition System

DSP based Processing

SystemPC

Project Rationale

• Why not just find a DSP with the necessary ADC properties and be done with it?

–Minimize DSP requirements and acquisition time

•Allows for more time spent in signal processing

•Specialized system more efficient at receiving and converting data

–Makes a senior design project of converting an analog EEG system into a digital system seem more feasible

–Able to be used with continuation for DSP senior design project

Initial Steps of Design Process

–Met with sponsor to receive more specific information on system

requirements, limitations (budget), and expected deliverables

–Initial system design was produced with basic functionality derived

from requirements list

–System specifications were created and proposed for approval of

sponsor

–Rough time table was created and individual responsibilities within

the group were decided

System Requirements & Critical Parameters

•Sampling rate and digital bit resolution high enough so that data can be considered synchronous and

accurate: required to be at least 1 kHz and 12 bits

•Able to convert, process and transmit up to 23 analog EEG signals in one sampling period

•Signals filtered for any noise encountered between EEG machine and system without modifying

original signal

•Serial output connection compatible with present Texas Instruments DSP chip available

•System calibration command available to user

•Error checking capability for data transmitted

•System electrically isolated from all peripherals to ensure user and patient safety

•Able to apply known input signals and test output for accuracy

•Overall price of system not to exceed $1000

Initial System Design for Functionality

EEGFilters(23)

32 Input Multiplexer

Analog to Digital

Converter

MicrocontrollerDSP

Sample / Holds (23)

Key

Data Path

Control Lines

Proposed System

1 Serial Line

23 Analog Lines

16 bit Parallel Output

Single Output

Enable Signal to 23 Inputs

Enable Signal

5 Address Lines

McBSP Protocol

23 23 Lines

Enable Signal and

Proposed System Specifications

•Variable output bit resolution: 16, 14, 12, 10, and 8 bits over a range

of ±6.5V (maximum range of EEG output signals)

•Variable sampling rate: 1000, 500, and 200 Hz

•23 analog inputs available (number of outputs on EEG provided by

sponsor)

•Serial connection acting both as output of system and input for

variable settings and system commands with McBSP protocol used

to maintain compatibility with TI DSP

•Output data format (as determined by McBSP protocol) will include

Header, Data, and Error Code

•User defined number and order of outputs

Proposed System Specifications (cont.)

• User controls from DSP to include start converting (including parameter

setup), stop converting, and calibrate

• Anti-aliasing filters matched to each sampling frequency: cutoff

frequencies of 35, 70, and 120 Hz for sampling rates of 200, 500, and

1000 Hz respectively and maximum attenuation at 100 dB for Nyquist

rate

• Internal calibration signal source as available input to system

• Required power input of 120 Vac (standard grounded plug)

• Power supply electrically isolated from peripherals of system at level to

meet biomedical application requirements

• LED indicators for Power and System Error

Rough Gantt Chart for Project Timeline: Fall Quarter

Action Week 2 Week 3 Week 4 Week 5 Week 6 Week 7 Week 8 Week 9 Week 10Determine Requirements ------>Create Initial Design --------------------->Determine Specifications -------------------------------------->Choose MUX --------------------->Choose ADC --------------------->Choose MCU --------------------->Choose Power Supply --------------------->Design AA Filters --------------------------------------------------------------------->Finalize Design --------------------->Order Parts --------------------->

Individual Responsibilities / General Work Distribution Outline

• Jim

–EEG signals and machine information

–Filter design specification

• Charles

–Filter Design implementation

–Design layout, PCB integration, PSPICE simulation

• Matt

–Microcontroller information

–McBSP protocol information

EEG Specifications

• Signal Conditioning

–Two input signals with differential amplification CMRR > 10,000

–High-pass filter adjustable cut-off frequencies 0.1 Hz, 0.5 Hz, 1 Hz, and 5 Hz

–Low-pass filter adjustable cut-off frequencies 15 Hz, 35 Hz, 70 Hz, and 120 Hz

–Notch filter for 50/60 Hz

–Amplification of 50 μV signals with total gain 20,000 V/V

• Signal Types

–Cerebral EEG frequency range >0 to 70 Hz

–ECG frequency range >0 to 100 Hz

Block Diagram of EEG Signal Processing

Differential Amplifier

Gain 1000 High-Pass Filter Low-Pass Filter

Notch FilterGain 1/2Gain 40

Multi-Channel Biomedical Data

Acquisition System

Electrode 1

Electrode 2

EEG Signal Reconstruction

• Objective

–To successfully digitize the EEG signals without degradation

–Anti-Aliasing filter frequency response must match the frequency response of the EEG

• Solution

– Build three filters

•Sampling rate of 1000 Hz cut-off 120 Hz

•Sampling rate 500 Hz cut-off 70 Hz

•Sampling rate 200 Hz cut-off 35 Hz

System Design Process and Description

Detailed part descriptions and reasons for selection

Design Process

• Sampling–Synchronous sampling

•Needed sample and hold and filtering systems to each input

•Sponsor confirmed that a small time delay between signals would be acceptable

•Only one sample and hold is needed

• Anti-aliasing filter–Different sampling time would require different filters to avoid aliasing

– Adjustable anti-aliasing filter was suggested

•A large number capacitors of would need to be changed

•Switched capacitor filter did not meet specifications

Design Process

• Microcontroller–Communication Capability in Hardware

•RS-232 or USB protocol

–USB 2.0 would be preferable for higher transfer rates – 1.5 Mbytes/sec

•SPI to be used with McBSP protocol

• Calibration Signal–Needed as selectable analog input to system

–Single 5 VDC source from power supply

Final Design

Anti-Aliasing Filters

Filter MUX

Multiplexer

ADC

MCU

Calibration AC Source

EEGAnalog Source

Signals

Convert Enable

Line Select

16 Digital Lines

Sampling Cutoff Frequency Adjust

Control Lines

Digital Signal Processor

Chip

Serial Digital System I/O

System Input 3 Analog Lines

Multiplexers

• Two input or sampling multiplexers

–Receives inputs from the EEG

–MCU controls sampling

–Switching time less than 150 ns and input range of +/-6.5 volts

• One 4 input multiplexer

–Filter selection

–Switching time less than 150 ns and output range of +/-6.5 volts

A0-A3 GND

S1-S16 ADG406 D

VDD EN VSS

16 Analog Signals 1 Analog Signal

Enable Signal from MCU

3 Line Selects from MCU

To AA FiltersFrom EEG or Calibration

EN GND

S1A-S3A ADG409 DA

VDD A0-A1 VSS

Enable Signal from MCU

2 Line Selects from MCU

3 Analog Signal 1 Analog Signal

To A/D ConverterFrom AA Filters

Anti-Aliasing Filter

• Three filters designed for different sampling frequencies

• Cut-off frequency of the filters made to match filters of the EEG

–35 Hz for 200 Hz sampling frequency

–70 Hz for 500 Hz sampling frequency

–120 Hz for 1000 Hz sampling frequency

• Feature large attenuation of 100 dB at half the sampling rate to prevent aliasing

• Signal from sampling MUX into filters

• Output into filter MUX to ADC

C14.0433e-4

C15

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R15

1k

R16

1k

+5

-6

V+8

V-4

OUT7

U40B

LM158

One stage of Sallen Key Filter

0

Microcontroller

• PIC18F4550 was chosen

•Capable of controlling the different parts of the system

–48 MHz clock speed fast enough to take samples and prepare the data to send to the DSP within the shortest sampling period.

•Also has a USB connection which will help with interacting with the system.

•34 I/O for controlling the system, reception of ADC data, and serial output

–Control lines to the multiplexers, and ADC.

2 kbytes of RAM to hold up to 23, 16 bit signals, error codes, and headers

USB I/O I/O

I/O PIC18F4550 I/O

GND PWR I/O

16 Digital Signals

From A/D Converter

Status Signal from ADC

Enable Signals to ADC and MUX’s

Line Selects for MUX’s

USB Communication

with PC

1 Digital Signal

To DSP using McBSP

Microcontroller Communication

• Microcontroller will be able to receive commands from the DSP

–Commands include start conversion, stop conversion, calibrate.

–It will also receive setup commands and information

•Includes sampling frequency, bit resolution, and which lines to sample in which order.

–Communication will happen through McBSP

•McBSP is supported by the DSP and is capable of sending data at the needed speeds.

• Will also prepare the converted data to be sent to the DSP

–Preparation includes adding a header and error checking codes

• Controls when the sampling occurs, input order, and bit resolution

Analog to Digital Converter

• ADS7805 was chosen•Features a fast sampling period of 10µs

•Allows the microcontroller enough time to process the data and allows for a short delay between sampling of all input signals

•16 bit resolution

•Available reference input to set ADC voltage range to match the range of the EEG output signals

•Sample and hold circuit included

•Receives its input from the filter MUX and sends data to the microcontroller

•Conversion controlled by microcontroller

R/C Gnd

D0-D15 ADS7805 VIN

VAn BUSY VDig

16 Digital Signals

To MCU From Filter MUX

1 Analog Signal

Enable Signal From MCU

Status Signal to MCU

Power Supply

• NFS40-7908

–Medical power supply capable of outputting the voltage levels needed by the other components

–Power output greater than the amount consumed by the other components

–Isolated to help protect a person connected to the EEG machine and the system itself.

–Supplies +12, -12, and +5 voltage to all components

AC Input

+12V NFS40-7908 -12V

GND +5V

120 VAC Input

VDD for MUX’s VSS for MUX’s

Electronic Component

Power

Component Ground

Major Component Power Draw

Component Part # Max Power (W)

Microcontroller PIC18F4550 1

A/D Converter ADS7805 0.825

Filter Op-Amps LM741 (x20) 10

Analog Inputs MUX ADG406 0.6

Filter Select MUX ADG409 0.6

  Total Power Draw 13.025

     

Power Supply NFS40-7908 50

Detailed Design

Plans for Test and Implementation

Senior Design II Outlook

Test Plans and Integration

• Test Plans

–Verification of design

–Each component tested individually

–No unexpected outputs occur between components

–Timing and response of each component to ensure an accurate sampling rate

• Integration

–System construction on a PCB

–PCB software available on PSPICE

–Experience must be gained with software

Rough Timing Diagram

initialize

250 ns

150 ns

samplesample Convert

Input 1

Sampling MUX

MCU

AA Filter

ADC

Filter MUX

Input 2

process Convert

10 us

Jim Massaro 11/07/05 Rough Timing Diagram Not To Scale

Testing Input Multiplexer and Filters

• Input Multiplexer testing

–Simulation using PSPICE

–Hardware tested using oscilloscope

–Compared and documented

• Filter Testing

–Filter simulated in PSPICE

–Input frequency can be varied

–Hardware tested using a breadboard and a signal generator

–Filter timing has to be determined

ADC and MCU Testing

• MCU Testing

–MCU software designed in PICDEM Full Speed USB demo kit

–DSP provided to test communication link

–Output viewable through DSP software

– Experience must be gained with the software

• MCU with ADC testing

–ADC critical component

–The hardware tested with controlled input

EEG Compatibility

• Objective

–All components tested individually

–Assemble the system into analog and digital portions

–Main concern is that the acquisition system doesn’t degrade the output of the EEG

• Solution

–EEG is capable of taking DC inputs and processing through external outputs

–Electrode signals simulated by controlled input

–Output of each filter to match the output from the EEG

Block Diagram for testing with EEG

EEG I/O Board

Biomedical Data Acquisition

System

External Output

DC Input

Signal GeneratorPC

Oscilloscope To output of Filters

Bill of Materials

BOM for the Biomedical Data Acquisition System

11/4/2005

Part Part Number Quantity Price/unit total price Manufacturer Package Supplier

Microprocessor PIC18F4550 2 10.90 21.80 Microchip TQFP/QFN Digi-key

MCU Development Kit DM163025 2 59.00 118.00 Microchip USB Microchip

ADC ADS7805U 2 31.07 62.14 Texas Instruments SOIC Digi-key

Op-Amp LM741CM-ND 22 0.84 18.48 National Semiconductor DIP Digi-key

Medical Power Supply NFS40-7908 1 53.08 53.08 Artesyn   Arrow Electronics

Sampling MUX ADG406 4 8.43 33.72 Analog Devices DIP Digi-key

Filter MUX ADG409 4 5.27 21.08 Analog Devices DIP, SOIC Digi-key

IC Adapter A726-ND 2 3.84 7.68 Aries Electronics Inc. SOIC Digi-key

Stereo Cables DVI-PA06 25 4.50 112.50 DVI Gear 3.5 mm DVI Gear

Stereo Cable Adapters GPM103 25 1.95 48.75 Hosa 6.3 to 3.5 mm BSW

USB adapter 13400 2 11.99 23.98 Cables to Go A/B Cables to Go

PCB Integration   2 137.00 274.00 PCB Express 2 Layer PCB Express

               

               

    Total Price 795.21      

Work Distribution/Responsibilities for Senior Design II

• Charles Spuckler

–Simulation of filters

–Gain experience with PCB software and integration

–Hardware Design and test of filters

–System integration testing with EEG

• Jim Massaro

–Gain experience with DSP software

–System integration testing with EEG

–Hardware Design and test of filters

• Matthew Huff

–ADC and MCU software design and integration

–Testing MCU with sampling MUX

–System integration testing with EEG

Senior Design II Gantt Chart

Action Week 1 Week 2 Week 3 Week 4 Week 5 Week 6 Week 7 Week 8 Week 9 Week 10Parts Delivered ------------>Simulate Filters ------------------------->Test Filters in Hardware ------------------------->Test ADC with MCU and DSP ---------------------------------------------------------->Test sampling MUX with MCU -------------------------------------------------------->System Assembly -------------------------------------->Test System with EEG ----------------------------------------------------------------------->

Questions?

Suggestions?

Filter for 200 Hz Sampling

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R 4

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Frequency Response of the Filter

Frequency

0Hz 20Hz 40Hz 60Hz 80Hz 100Hz 120Hz 140Hz 160Hz 180Hz 200HzDB(V(R14:2))

-160

-120

-80

-40

-0

40

DB(V(R14:2))

McBSP and SPI Compatability

When the McBSP is configured to operate in SPI mode, both the transmitter

and the receiver operate together as a master or a slave. The McBSP is a

master when it generates clocks. When the McBSP is the SPI master, CLKX

drives both its own internal receive clock (CLKR) and the serial clock (SCK)

of the SPI slave. The FSR and CLKR signals should not be used in SPI mode.

These do not function as SPI signals like the FSX and CLKX signals. In

conjunction with CLKSTP enabled, CLKXM = 1 (in PCR) indicates that the

McBSP is a master, and CLKXM = 0 indicates that the McBSP is an SPI slave.

The slave enable signal (FSX/SS) enables the serial data input and output

driver on the slave device (the device not providing the output clock).