msd system design review agenda p11212 : lve controls, rf module
DESCRIPTION
MSD System Design Review Agenda P11212 : LVE Controls, RF Module. Meeting Purpose 1. Present an overview of the project. 2. Confirm understanding of Customer Needs and Engineering Specifications. 3. Review Concept Generation and Refinement process. - PowerPoint PPT PresentationTRANSCRIPT
MSD System Design Review AgendaP11212 : LVE Controls, RF Module
• Meeting Purpose• 1. Present an overview of the project.• 2. Confirm understanding of Customer Needs and Engineering Specifications.• 3. Review Concept Generation and Refinement process.• 4. Proposal for a design solution and analysis of benefits vs. disadvantages.• 5. Discuss Feasibility and possible alteration of plan.• Materials to be Reviewed• 1. Project Description • 2. Work Breakdown Structure • 3. Customer Needs• 4. Engineering Specifications • 5. Interface Document • 6. Concept Selection Matrix • 7. Proposed Ideas• 8. LVE Controls vs. LV 1 Gen 1 Design and RP1 Gen 2 Design • 9. Project Plan Moving Forward• 10. Risk Management
Meeting TimelineStart Time Topic of Review
12:30 Project Introduction12:40 Work Break Down structure12:45 Customer Needs12:50 Engineering Specifications
1:00 Interface Control Document1:10 Concept Generation and Selection1:20 LVE vs LV1 and RP11:35 Project Plan1:40 Risk Assessment1:50 Are we ready to design?
Work Break Down Assignments
• Wireless Interface – Dan• Microcontroller – Dan• Communication Bus – Gokhan• Logic Power – Nick• Motor Power – Nick• H-bridge Drivers – Gokhan• Pulse Width Modulation - Gokhan
System Analysis
• Delay through transmission: – Theoretical message size: 18 bits – Single Message Latency:
• Time through USART: 18b / 31kBps = 72us • Time through RF: 18b / 40kbps = 450us • Total time: 72us + 450us = 522us
– Max messages: 5 – Max messages size: 54 bits – Max Message Latency:
• Time through USART: 54b / 31kBps = 217us • Time through RF: 54b / 40kbps = 1.35ms • Total time: 217us + 1350us = 1.567ms
– Forward Backward Left Right M1 + M1 - M2 + M2 - M3 + M3 - M4 + M4 - M5 + M5 - M6 + M6 - M7 + M7 - M8 + M8 – – 5 bit: instruction 0-31 – 4 bit: speed 0-15 – X bit: redundancy – 5 instructions at once – (5+4+9)*3= 54 bits/instruction set
System Analysis
• Heat Transfer Rate:• Q = ΔT/R • ΔT = Tinteral - Texternal
• R = d/ka• d = material thickness• k = thermal conductivity• a = exposed surface area• so Q = ΔTka/d