motor control application kit - infineon technologies

Microcontrol ler

Motor Control Appl icat ion Ki t For XMC1000 Family

Board User„s Manual

Revision 1.0, 2013-11-05

KIT_XMC1300_DC_V1 XMC1300 Drive Card V1.0

Edition 2013-11-05

Published by Infineon Technologies AG 81726 Munich, Germany

© 2013 Infineon Technologies AG All Rights Reserved.

Legal Disclaimer

The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party.

Information

For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com).

Warnings

Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office.

Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

KIT_XMC1300_DC_V1 Drive Card XMC1300 V1

Template: IFX_Template_2011-02-24.dot

Revision History

Page or Item Subjects (major changes since previous revision)

Revision 1.0,

2013-11-05

Initial release

Trademarks of Infineon Technologies AG

AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, EconoPACK™, CoolMOS™, CoolSET™, CORECONTROL™, CROSSAVE™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™, IsoPACK™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OptiMOS™, ORIGA™, PRIMARION™, PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™, SINDRION™, SIPMOS™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™, TRENCHSTOP™, TriCore™.

Other Trademarks

Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™, PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™, FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG. FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™ of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc., OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc. RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc. SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes Zetex Limited.

Last Trademarks Update 2011-02-24


Table of Contents

Board User's Manual 4 Revision 1.0, 2013-11-05

Table of Contents

1 Overview ............................................................................................................................................. 7 1.1 Key Features ........................................................................................................................................ 7 1.2 Block Diagram ...................................................................................................................................... 8

2 Hardware Description ........................................................................................................................ 9 2.1 Power Supply ....................................................................................................................................... 9 2.2 Clock Generation ............................................................................................................................... 11 2.3 Debug Interface .................................................................................................................................. 11 2.3.1 On-board USB Debugger ................................................................................................................... 11 2.3.2 Debug Connector (8-pin) .................................................................................................................... 13 2.3.3 Infineon Debug Connector (16-pin) .................................................................................................... 13 2.4 Potentiometer and User LEDs ........................................................................................................... 15 2.5 USIC0 Connector ............................................................................................................................... 15 2.6 Hall Sensor and Encoder Connectors ................................................................................................ 16 2.7 Power Board Connector ..................................................................................................................... 17

3 Production Data................................................................................................................................ 19 3.1 Schematics ......................................................................................................................................... 19 3.2 Component Placement ....................................................................................................................... 22 3.3 Bill of Material (BOM) ......................................................................................................................... 23


List of Figures


List of Figures

Figure 1 Block Diagram of KIT_XMC1300_DC_V1 ........................................................................................... 8 Figure 2 XMC1300 Drive Card (KIT_XMC1300_DC_V1) .................................................................................. 9 Figure 3 Power Supply Concept and Powering Options .................................................................................. 10 Figure 4 Block Diagram of Power Supply Concept .......................................................................................... 10 Figure 5 DAVE™ - “BMI Get Set” for XMC1000 Family ................................................................................... 11 Figure 6 Installation of Serial Port Driver .......................................................................................................... 12 Figure 7 On-Board USB Debugger .................................................................................................................. 12 Figure 8 Pin Assignment of Debug Connector (8-pin) ..................................................................................... 13 Figure 9 Infineon Debug Connector (16-pin) .................................................................................................... 14 Figure 10 Potentiometer and LEDs .................................................................................................................... 15 Figure 11 USIC Interface Connector .................................................................................................................. 15 Figure 12 Hall Sensor and Encoder Connectors ................................................................................................ 16 Figure 13 Hall Sensor and Encoder Interface Circuitry ...................................................................................... 16 Figure 14 Power Board Connector ..................................................................................................................... 17 Figure 15 XMC1302 MCU, Power Supply, HALL and Encoder Interface, USIC0 interface .............................. 20 Figure 16 Isolated On-board Debugger .............................................................................................................. 21 Figure 17 Component Placement ....................................................................................................................... 22


List of Figures


List of Tables

Table 1 Power status LED‟s .............................................................................................................................. 9 Table 2 Potentiometer ..................................................................................................................................... 15 Table 3 USIC0 Connector X104 ...................................................................................................................... 15 Table 4 HALL Sensor and Encoder Interfaces ............................................................................................... 17 Table 5 Power Board Connector ..................................................................................................................... 18 Table 6 Use Cases of PWM Signals ............................................................................................................... 19 Table 7 BOM of KIT_XMC1300_DC_V1 Board .............................................................................................. 23


Overview


Introduction

This document describes the features and hardware details of the DriveCard XMC1300 V1 (KIT_XMC1300_DC_V1) designed to work with Infineon‟s inverter boards. This board is part of Infineon‟s Motor Control Application Kits.

1 Overview

The drive card KIT_XMC1300_DC_V1 houses the XMC1302 Microcontroller from Infineon Technologies, a power board connector, a set of position interface circuits with hall and encoder connectors, a USIC interface and an isolated on-board debug interface. The board along with a three phase inverter demonstrates the capabilities of the XMC1302. The main use case for this board is to demonstrate the motor control features of the XMC1302 device including tool chain. The focus is safe operation under evaluation conditions. The board is neither cost nor size optimized and does not serve as a reference design.

1.1 Key Features

The KIT_XMC1300_DC_V1 board is equipped with the following features

Infineon XMC1302 (ARM® Cortex™-M0-based) Microcontroller, 200 kByte on-chip Flash, TSSOP38

Connection to power inverter via the power board connector

Combined hall sensor and encoder interface

USIC interface connector for connection of UART, SPI or I2C

6 LEDs − 2 Power indicating LEDs − 1 User LED (P0.4) − 1 Encoder enable LED − 2 Debug LEDs (DEBUG, COM)

Potentiometer, connected to analog input P2.5 (ADC group 1, channel 7)

Isolated Debug options − On-Board Debugger (SEGGER J-Link LITE) via USB connector − Infineon Debug connector 16-pin (0.1”) with DriveMonitor USB Stick V2 (KIT_DRIVEMONI_USB_V2)

Isolated Connectivity − UART channel of On-Board Debugger (SEGGER J-Link LITE) via USB connector

Power supply of MCU domain − Via power board connector (5V)

Power supply of isolated debug domain − Via Debug USB connector − Via Infineon Debug connector 16-pin


Overview


1.2 Block Diagram

Figure 1 shows the functional block diagram of the KIT_XMC1300_DC_V1 board. For more information about the power supply domains please refer to chapter 2.1.

The drive card has got the following building blocks:

1 Power Board Connector

1 set of position interface connectors (HALL, ENCODER)

Encoder Enable signals via GPIOs (P0.10)

1 User LED connected to GPIOs (P0.4)

Variable resistor (POTI) connected to GPIO P2.5 (ADC group 1, channel 7)

USIC0 interface connector (P0.10, P0.14, P1.4, P1.5)

Isolated On-board Debugger via Debug USB connector (Micro-USB) with UART channel (USIC0, channel 1)

Optional Infineon Debug interface connector for Drive Monitor USB Stick V2 (KIT_DRIVEMONI_USB_V2)

Figure 1 Block Diagram of KIT_XMC1300_DC_V1

BlockDiagram.emf

XMC1300

TSSOP38

POTI

ADC

USIC0

Po

we

r B

oa

rd C

on

ne

cto

r

De

bu

g

US

B

On

-bo

ard

De

bu

gg

er

XM

C4

20

0

USICU0C1

DebugSWD/SPD

POSIF0

USICU0C0/C1

1x PWM

6x PWM

1x IN

HALL ENCODER

driver

IFX

De

bu

g

5V

iso

latio

nis

ola

tio

n

GPIO 1x enable

XMC1300 Drive CardKIT_XMC1300_DC_V1

GP

IOe

na

ble

CCU80

11x

CCU40


Hardware Description


2 Hardware Description

The following sections give a detailed description of the hardware and how it can be used.

Figure 2 XMC1300 Drive Card (KIT_XMC1300_DC_V1)

2.1 Power Supply

The KIT_XMC1300_DC_V1 board is designed with two galvanically isolated supply domains. On the left side, there is the debug domain, which contains a XMC4200 MCU as on-board debug controller (OBD) as well as level shifters to a 5V debug interface like the drive monitor USB stick (KIT_DRIVEMONI_USB_V2). The debug domain can be powered via the USB plug (5V) as well as the Infineon debug connector. On the middle to the right side there is the power GND supply domain, which provides the power supply for the MCU and the peripheral components. This supply domain is usually powered from the power board connector. The typical current drawn by the drive card at the power GND domain is about 25 mA.

To indicate the power status of the KIT_XMC1300_DC_V1 board two power indicating LEDs are provided on board (see Figure 3). The LED will be “ON” when the corresponding power rail is powered.

Table 1 Power status LED’s

LED Reference Power Rail Voltage Note

LED101 VDD5 5 V Power GND domain, must always be “ON”

LED201 VISO5 5 V Debug supply domain, “ON” if debug domain is intened to be used.

Figure 3 and Figure 4 show details of the power supply concept of the drive card.

Board_Interfaces.emf

Potentiometer XMC1300

CPU

Power

indicating

LED

Power Board

ConnectorEncoder

Interface

HALL

Interface

Power GND

Domain

User LED

Encoder

Enable

LED

On-board

Debugger

Infineon

Debug

Connector

Debug USB

Connector

Power

indicating

LED

Isolated

Debug Domain Debug

Connector

Debug

Connector




Figure 3 Power Supply Concept and Powering Options

Figure 4 Block Diagram of Power Supply Concept

Power.emf

Power

indicating

LED

Power Board

Connector

Power GND

Domain

Infineon

Debug

Connector

Debug USB

Connector

Power

indicating

LED

Isolated

Debug DomainDebug Connector

(5V – GND)

Debug Connector

(5V – GND)

IFX1763: 3.3V Linear

LDO Voltage Regulator

Drive Card XMC1300 V1

KIT_XMC1300_DC_V1

Po

we

r B

oa

rd

Co

nn

ec

tor

Debug

USB

IC101

XMC1300

TSSOP38

Power_Block.emf

Power

LED

VISO5 +5V

XMC4200

OBD

VISO5VUSB5

OBD_OFF#

IFX1763

U202

IFX

Debug

16-pin

VISO3.3

VDD5 +5V

iso

latio

n

UART

SWD

Level Shifters

3.3V -> 5V

Power

LED

VDD5

U201




2.2 Clock Generation

An internal oscillator provides the clock signal to the XMC1300 microcontroller. The CPU can be adjusted to maximum 32MHz (MCLK) whereas the PWM peripherals can be configured to use double of this clock (PCLK).

2.3 Debug Interface

The KIT_XMC1300_DC_V1 is designed to use “Serial Wire Debug” (SWD) or “Single Pin Debug” (SPD) as debug interfaces. It supports debugging via different channels which are all galvanically isolated from the power GND supply domain:

On-board Debugger

Infineon Debug Connector (16-pin) with Debug and UART interface

2.3.1 On-board USB Debugger

The on-board debugger [1] supports

Serial Wire Debug (SWD) [2]

o SWIO P0.14 (SWD0) o SWCLK P0.15 (SWD0)

or o SWIO P1.3 (SWD1) o SWCLK P1.2 (SWD1)

Single Pin Debug (SPD) [2]

o SPD P0.14 (SPD0) or

o SPD P1.3 (SPD1)

Full Duplex UART communication via a Virtual COM port

o PC_RXD P1.2 USIC0CH1.DOUT0 o PC_TXD P1.3 USIC0CH1.DX0A

or o PC_RXD P0.15 USIC0CH0.DOUT0 o PC_TXD P0.14 USIC0CH0.DX0A

[1] Attention: The firmware of the on-board debugger requires the latest J-Link driver (V4.62 or higher) and a Serial Port Driver (CDC driver) installed on your computer. Please check “Install J-Link Serial Port Driver” when installing the latest J-Link driver (see Figure 6)

[2] The debug interface type (SPD or SWD) is selected via boot mode index (BMI) configuration. Changing the BMI is supported by the DAVE™ IDE and the “BMI Get Set” window (see Figure 5).

Figure 5 DAVE™ - “BMI Get Set” for XMC1000 Family




Figure 6 Installation of Serial Port Driver

The on-board debugger can be accessed through the Debug USB connector shown in Figure 7. The Debug LED (LED202) shows the status during debugging.

Figure 7 On-Board USB Debugger

When using an external debugger connected to the Infineon Debug Connector (16pin), the on-board debugger has to be switched off. This is done by connecting pin 6 of the Infineon Debug Connector to GNDISO.

Debug

Connector

Debugger.emf

On-board

Debugger

Infineon

Debug

Connector

Debug

Connector

Debug USB

Connector isolation

SWD

&

UART

Debug

LEDs

SEGGER J-LINK part

(isolated)

XMC1300 part




2.3.2 Debug Connector (8-pin)

The KIT_XMC1300_DC_V1 board supports debugging via SWD and SPD with the OBD as described in section 2.3.1. The pin assignment is provided in a way that both SWD ports (SWD0 and SWD1) can be selected. Please refer to Figure 8 for details on pin assignment.

Figure 8 Pin Assignment of Debug Connector (8-pin)

The default connection will provide the following set-up:

Serial Wire Debug (SWD)

o SWIO/SPD P0.14 (SWD0) o SWCLK P0.15 (SWD0)



While breaking off the J-LINK part of the PCB and connecting the debug interface with a ribbon cable, the direct connection will provide the same set-up.

A reverse connection of the debug connector (pin1 to pin8) provides the other set-up:

Serial Wire Debug (SWD)

o SWIO/SPD P1.3 (SWD1) o SWCLK P1.2 (SWD1)



2.3.3 Infineon Debug Connector (16-pin)

The KIT_XMC1300_DC_V1 board supports debugging via Infineon‟s device access server (DAS), when using KIT_DRIVEMONI_USB_V2 as interface device. The latest release of DAS software can be downloaded from http://www.infineon.com/das. When using an external debugger, the on-board debugger (OBD) has to be switched off. This is done by connecting pin 6 to GNDISO. KIT_DRIVEMONI_USB_V2 already provides this connection and the OBD is disabled as soon as the connector is plugged in.

Next to the SWD and SPD debug signals which are provided as unidirectional signals because of the galvanic isolation, UART signals can be accessed through this connector as well. Figure 9 shows the pin assignment of the connector, the following table lists the signals as well.

Debug_8pin.emf

+5V (VDD5)

OBD Debug

Connector (8-pin)

SWCLK (SC)

GND

1 2

3 4

5 6

7 8

SWIO (SD)

+5V (VDD5)

GND

PC_RXPC_TX

+5V (VDD5)

Debug

Connector (8-pin)

P0.15

GND

1 2

3 4

5 6

7 8

P0.14

+5V (VDD5)

GND

P1.2P1.3

http://www.infineon.com/das




Figure 9 Infineon Debug Connector (16-pin)

Pin No. Signal Name I/O Serial Wire Debug

1 SWD_DIR O Defines the direction of SWIO

2 +5V (VISO5) - +5V supply of isolated debug domain

3 SWD_IN I Input signal of SWIO

4 GNDISO - Ground of isolated debug domain

5 PC_RXD I UART Receive signal (P1.3, DOUT0 USIC0, channel1)

6 OBD_OFF# I Disable on-board debug device (Low active)

7 SWD_OUT O Output signal of SWIO

8 n.c. - Not connected



11 SWCLK O SWD clock signal



14 PC_TXD I UART Transmit signal (P1.2, DX0A, USIC0, channel1)



Infineon_Debug_16pin.emf

OBD_OFF

Infineon Debug

Connector (16-pin)

n.c.

+5V (VISO5)

GNDISO

1 2

3 4

5 6

7 8

9 10

SWD_DIR

SWD_IN

PC_RXD

SWD_OUT

n.c.

11 12

13 14

15 16

n.c.

n.c.

PC_TXD

n.c.

SWCLK

n.c.

n.c.




2.4 Potentiometer and User LEDs

The KIT_XMC1300_DC_V1 provides a potentiometer which is connected to ADC group1, channel7 and one user LED (P0.4). Next to the LED, a testpoint is available in order to easily connect an oscilloscope‟s probe for software controlled trigger signals.

Figure 10 Potentiometer and LEDs

Table 2 Potentiometer

Potentiometer Connected to Port Pin

R103 P2.5 / G1_CH7 (Group 1, channel 7)

User LEDs Connected to Port Pin

LED102 P0.4 (LED)

Attention: The testpoints are referenced to power GND supply domain. Hence they may carry hazzardous voltages.

2.5 USIC0 Connector

The USIC Interface provides access to USIC 0 channel 0, which supports SPI, UART and I2C communication protocolls.

Figure 11 USIC Interface Connector

Table 3 USIC0 Connector X104

Pin Port Peripherals Comment

X104-1 P1.4 USIC0_CH0.DX5E

X104-2 VDD5 5V

X104-3 P1.5 USIC0_CH0.DOUT0

X104-4 P0.10 USIC0_CH0.SELO1 / DX2C Overlaps with ENENC

X104-5 P0.14 USIC0_CH0.SCLKOUT Overlaps with SWD0/SPD0

X104-6 GND GND

Potentiometer_LED.emf

Potentiometer

User LED

USIC0.emf

USIC 0

channel 0




2.6 Hall Sensor and Encoder Connectors

The KIT_XMC1300_DC_V1 provides two pairs of HALL and incremental encoder connectors as indicated in Figure 12. The encoder interface connector provides a differential input which is transformed into single ended signals by an interface IC. The HALL sensor interface provides a pull-up resistor for each HALL sensor signal as well as power supply for the HALL sensors

Figure 12 Hall Sensor and Encoder Connectors

Both the HALL and the encoder signals are connected to the same POSIF interface. The ENENC-signal is used to either enable the output signals of the encoder IC or to activate the power supply and pull-up resistor supply of the HALL sensor interface. As a result, both interfaces can be connected at the same time and the user can select by software which interface to use. Figure 13 shows the HALL sensor and encoder interface circuitry. Please refer to Table 4 for details on pin and peripheral assignment.

Figure 13 Hall Sensor and Encoder Interface Circuitry

Hall_Encoder.emf

Encoder

Interface

HALL

Interface

Encoder

Enable

LEDPower Supply LED POTILED at P0.4

VADC0.G1CH5

XMC1300 CORTEX-M0 Microcontroller in TSSOP38 Package

SSC and ASC

Power Board Connector

HALL SENSOR CONNECTOR

ENCODER LINE DRIVER AND CONNECTOR

220n

100n

330p/0603

100nF/0402

10

0n

F/0

40

2

15nF/0603

15nF/0603

15nF/0603

GND

GND

GND

GND

GND

GNDGND

GND

GND

GND

GND

GND

GNDGND

GND GND

GND

XMC1302-T038

XMC1302-T038

XMC1302-T038

PWM

BLM18PG600

LE

D-G

N/D

/06

03

LE

D-G

E/D

/06

03

LE

D-G

N/D

/06

03

4k74k7

PO

TI

1k5

R/0

60

3

1k5

/06

03

0R

n.m./0603

0R/0603

n.m.(33k)

1k9

6/0

40

2

1k9

6/0

40

2

1k9

6/0

40

2

120R/0402

120R/0402

120R/0402

120R/0402

1k9

6/0

40

2

1K

5/0

60

3

120R/0402

120R/0402

BCR198W BCR198W

no ass.

no ass.

no ass.

VD

D5

VD

D5

VD

D5

VD

D5

VD

D5

VD

D5

VD

D5

VDD5

VDD5

VD

D5

VD

D5

AM26C32IPW

MPT0,5/5-2,54

ENCODER

MAB32B2 MAB32B2

n.m.

CTRAP/P0.12

CTRAP/P0.12

EA_POS0/P0.13

EA_POS0/P0.13

EA_POS0/P0.13

EB_POS1/P1.1

EB_POS1/P1.1

EB_POS1/P1.1EI_POS2/P1.0

EI_POS2/P1.0

EI_POS2/P1.0

ENC0A+

ENC0A+

ENC0A-

ENC0A-

ENC0B+

ENC0B+

ENC0B-

ENC0B-

ENC0I+

ENC0I+

ENC0I-

ENC0I-

ENENC/P0.10

ENENC/P0.10

ENENC/P0.10

ENENC/P0.10

ENPOW/P0.11

ENPOW/P0.11

H0_POSIF.INAH0_POSIF.INBH0_POSIF.INI

I_AVG

I_AVG

I_DC

I_DC

I_DC

I_PFC

I_PFC

I_U

I_U

I_V

I_V

I_W

I_W

LED/P0.4

LED/P0.4

LED/P0.4

P0.15

P1.4

P1.4

P1.5

P1.5

PC_RXD/P1.2PC_TXD/P1.3

PFC_GATE/CMP2.OUT

PFC_GATE/CMP2.OUT

POT

POT

SWCLK/P0.15SWIO/P0.14

SWIO/P0.14

U_H

U_H

U_L

U_L

V_DC

V_DC

V_H

V_H

V_L

V_L

V_PFC

V_PFC

V_U

V_U

V_V

V_V

V_W

V_W

W_H

W_H

W_L

W_L

C101

C102

C103

C104

C1

05

C106

C107

C108

P0.017

P0.118

P0.219

P0.320

P0.421

P0.522

P0.623

P0.724

P0.827

P0.928

P0.1029

P0.1130

P0.1231

P0.1332

P0.1433

P0.1534

VDDP26

VSSP25

IC101_P0

P1.016

P1.115

P1.214

P1.313

P1.412

P1.511

VDD10

VSS9

IC101_P1

P2.035P2.136P2.237P2.338

P2.41

P2.52

P2.63

P2.74

P2.85

P2.96

P2.107

P2.118

IC101_P2

123456789

10

JP101

L101

LE

D1

01

LE

D1

02

LE

D1

03

R101R102

AE

S

R1

03

R1

04

R1

05

R106

R107

R108

R109 R1

10

R1

11

R1

12

R113

R114

R115

R116

R1

17

R1

18

R119

R120

1

32

T101 1

32

T102

TP1

1

TP201

1

TP202

1

TP203

1A2

1B1 1Y

3

2A6

2B7 2Y

5

3A10

3B9 3Y

11

4A14

4B15 4Y

13

G4

G#12

GND8

VCC16

U101

12345

X101

1 23 45 67 89 10

X102

X103-A1X103-A2X103-A3X103-A4X103-A5X103-A6X103-A7X103-A8X103-A9X103-A10X103-A11X103-A12X103-A13X103-A14X103-A15X103-A16

X103-B1X103-B2X103-B3X103-B4X103-B5X103-B6X103-B7X103-B8X103-B9

X103-B10X103-B11X103-B12X103-B13X103-B14X103-B15X103-B16

1 23 45 6

X104

A

B

C

D

E

1 2 3 4 5 6 7 8

A

B

C

D

E

1 2 3 4 5 6 7 8

KIT_XMC1300_DC_V1

28/10/2013 09:34:45

2/3Sheet:

Legal Disclaimer

The information given in this document shall in no event be regarded as a guarantee of conditions or

characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any

information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties

and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights

of any third party.

Port 0 - standard port Port 1 - high current port

G1.CH7

G1.CH6

G1.CH5

G0.CH7

G0.CH6

G0.CH5

G0.CH0

G1.CH1

G1.CH0

G0.CH2

G0.CH3

G0.CH4

G0.CH1

G1.CH4

G1.CH2

G1.CH3

CMP0

CMP1

CMP2

S&H0 S&H0S&H1S&H1 ACMPORC ORC

Port 2 - analogue features

XMC1300

V1.1 / 28.10.2013 / AR

f_cutoff = 14.6kHz




Table 4 HALL Sensor and Encoder Interfaces

Pin Port Peripheral

HALL Sensor Interface X101

1 GND

2 P1.0 POSIF0.IN2A

3 P1.1 POSIF0.IN1B

4 P0.13 POSIF0.IN0B

5 VDD5 HALL sensor power supply

Encoder Interface X102

1 n.c.

2 VDD5 Encoder power supply

3 GND

4 n.c.

5 ENCA- POSIF0.IN0B

6 ENCA+

7 ENCB- POSIF0.IN1B

8 ENCB+

9 ENCI- POSIF0.IN2A

10 ENCI+

Enable Encoder

LED103 P0.10 High: Enable Encoder Interface Low: Enable HALL Interface including supply

2.7 Power Board Connector

The KIT_XMC1300_DC_V1 board provides a power board connector with all the signals required to control the power inverter. Next to the PWM output signals of CCU4 and CCU8 as well as the ADC signals, there are the power supply pins for the power GND domain.

Figure 14 shows a picture of the power board connector. The pin and peripheral assignment can be found in Table 5. In addition, different use cases for three phase inverters can be found in Table 6.

Figure 14 Power Board Connector

Attention: The power board connector is also providing the power supply for the power GND supply domain. Hence it may carry hazzardous voltages.

PowerBoard_Con.emf

Power Board

Connector




Table 5 Power Board Connector

X302

MAB32B2

Female

FAB32Q2

Function on Power Inverter

Port Peripherals

A1 A16 GND VSS, VSSP

A2 A15 PFC Gate P0.5 CCU40.CC40 CMP2.OUT

A3 A14 IPFC P2.2 VADC0.G0CH7 ACMP2.INN

A4 A13 VPFC P2.4 VADC0.G1CH6

A5 A12 VBEMF_U / IU (2) P2.9 VADC0.G0CH2 VADC0.G1CH4

A6 A11 VBEMF_V / IV (2) P2.10 VADC0.G0CH3 VADC0.G1CH2

A7 A10 VBEMF_W / IW (2) P2.11 VADC0.G0CH4 VADC0.G1CH3

A8 A9 I_AVG / IDClink (2) P2.1 VADC0.G0CH6

A9 A8 U1_L -

A10 A7 U1_H -

A11 A6 V1_L -

A12 A5 V1_H -

A13 A4 W1_L -

A14 A3 W1_H -

A15 A2 CTRAP1 -

A16 A1 ENPOW1 -

B1 B16 VCC 5V VDD, VDDP

B2 B15 Brake Gate -

B3 B14 Brake temp -

B4 B13 VDClink P2.3 VADC0.G1CH5

B5 B12 VBEMF_U / IU (1) P2.6 VADC0.G0CH0

B6 B11 VBEMF_V / IV (1) P2.8 VADC0.G0CH1 VADC0.G1CH0

B7 B10 VBEMF_W / IW (1) P2.0 VADC0.G0CH5

B8 B9 IDClink (1) P2.7 VADC0.G1CH1

B9 B8 U0_L P0.1 CCU80.OUT01

B10 B7 U0_H P0.0 CCU80.OUT00

B11 B6 V0_L P0.6 CCU80.OUT11

B12 B5 V0_H P0.7 CCU80.OUT10

B13 B4 W0_L P0.9 & P0.3 CCU80.OUT21 CCU80.OUT03

B14 B3 W0_H P0.8 & P0.2 CCU80.OUT20 CCU80.OUT02

B15 B2 CTRAP0 P0.12 CCU80.IN0A,IN1A,IN2A,IN3A

B16 B1 ENPOW0 P0.11 GPIO

Note: Please note that the numbering of the power board connector at the drive card is inverse to the numbering at the power board.


Production Data


Table 6 Use Cases of PWM Signals

X302 (MAB32B2) Function Port Peripheral

2-Level Inverter with CCU80

B9 U0_L P0.1 CCU80.OUT01

B10 U0_H P0.0 CCU80.OUT00

B11 V0_L P0.6 CCU80.OUT11

B12 V0_H P0.7 CCU80.OUT10

B13 W0_L P0.9 CCU80.OUT21

B14 W0_H P0.8 CCU80.OUT20

B15 CTRAP0 P0.12 CCU80.IN0A,IN1A,IN2A,IN3A

B16 ENPOW0 P0.11 GPIO

2-Level Inverter with CCU80 (2 slices only)

B9 U0_L P0.1 CCU80.OUT01

B10 U0_H P0.0 CCU80.OUT00

B11 V0_L P0.6 CCU80.OUT11

B12 V0_H P0.7 CCU80.OUT10

B13 W0_L P0.3 CCU80.OUT03

B14 W0_H P0.2 CCU80.OUT02

B15 CTRAP0 P0.12 CCU80.IN0A,IN1A,IN2A,IN3A

B16 Enable0 P0.11 GPIO

3 Production Data

3.1 Schematics

This chapter contains the schematics for the drive card:

XMC1302 MCU, Power Supply, HALL and Encoder Interface, USIC0 interface

Isolated On-board Debugger The board has been designed with Eagle. The full PCB design data of this board can also be downloaded from www.infineon.com/xmc-dev.

http://www.infineon.com/xmc-dev


Production Data


Figure 15 XMC1302 MCU, Power Supply, HALL and Encoder Interface, USIC0 interface

Po

we

r S

up

ply

LE

DP

OT

IL

ED

at

P0

.4

VA

DC

0.G

1C

H5

XM

C1

30

0 C

OR

TE

X-M

0 M

icro

co

ntr

olle

r in

TS

SO

P3

8 P

acka

ge

SS

C a

nd

AS

C

Po

we

r B

oa

rd C

on

ne

cto

r

HA

LL

SE

NS

OR

CO

NN

EC

TO

R

EN

CO

DE

R L

INE

DR

IVE

R A

ND

CO

NN

EC

TO

R

220n

100n

330p/0

603

100nF

/0402

100nF/0402

15nF

/0603

15nF

/0603

15nF

/0603

GN

D

GN

D

GN

D

GN

D

GN

D

GN

DG

ND

GN

D

GN

D

GN

D

GN

D

GN

D

GN

DG

ND

GN

DG

ND

GN

D

XM

C1302-T

038

XM

C1302-T

038

XM

C1302-T

038

PW

M

BLM

18P

G600

LED-GN/D/0603

LED-GE/D/0603

LED-GN/D/0603

4k7

4k7

POTI

1k5R/0603

1k5/0603

0R

n.m

./0603

0R

/0603

n.m

.(33k)

1k96/0402

1k96/0402

1k96/0402

120R

/0402

120R

/0402

120R

/0402

120R

/0402

1k96/0402

1K5/0603

120R

/0402

120R

/0402

BC

R198W

BC

R198W

no a

ss.

no a

ss.

no a

ss.

VDD5

VDD5

VDD5

VDD5

VDD5

VDD5

VDD5

VD

D5

VD

D5

VDD5

VDD5

AM

26C

32IP

W

MP

T0,5

/5-2

,54

EN

CO

DE

R

MA

B32B

2M

AB

32B

2

n.m

.

CT

RA

P/P

0.1

2

CT

RA

P/P

0.1

2

EA

_P

OS

0/P

0.1

3

EA

_P

OS

0/P

0.1

3

EA

_P

OS

0/P

0.1

3

EB

_P

OS

1/P

1.1

EB

_P

OS

1/P

1.1

EB

_P

OS

1/P

1.1

EI_

PO

S2/P

1.0

EI_

PO

S2/P

1.0

EI_

PO

S2/P

1.0

EN

C0A

+

EN

C0A

+

EN

C0A

-

EN

C0A

-

EN

C0B

+

EN

C0B

+

EN

C0B

-

EN

C0B

-

EN

C0I+

EN

C0I+

EN

C0I-

EN

C0I-

EN

EN

C/P

0.1

0

EN

EN

C/P

0.1

0

EN

EN

C/P

0.1

0

EN

EN

C/P

0.1

0

EN

PO

W/P

0.1

1

EN

PO

W/P

0.1

1

H0_P

OS

IF.IN

AH

0_P

OS

IF.IN

BH

0_P

OS

IF.IN

I

I_A

VG

I_A

VG

I_D

C

I_D

C

I_D

C

I_P

FC

I_P

FC

I_U

I_U

I_V

I_V

I_W

I_W

LE

D/P

0.4

LE

D/P

0.4

LE

D/P

0.4

P0.1

5

P1.4

P1.4

P1.5

P1.5

PC

_R

XD

/P1.2

PC

_T

XD

/P1.3

PF

C_G

AT

E/C

MP

2.O

UT

PF

C_G

AT

E/C

MP

2.O

UT

PO

T

PO

T

SW

CLK

/P0.1

5S

WIO

/P0.1

4

SW

IO/P

0.1

4

U_H

U_H

U_L

U_L

V_D

C

V_D

C

V_H

V_H

V_L

V_L

V_P

FC

V_P

FC

V_U

V_U

V_V

V_V

V_W V_W

W_H

W_H

W_L

W_L

C101

C102

C103

C104

C105

C106

C107

C108

P0

.01

7

P0

.11

8

P0

.21

9

P0

.32

0

P0

.42

1

P0

.52

2

P0

.62

3

P0

.72

4

P0

.82

7

P0

.92

8

P0

.10

29

P0

.11

30

P0

.12

31

P0

.13

32

P0

.14

33

P0

.15

34

VD

DP

26

VS

SP

25

IC101_P

0

P1

.01

6

P1

.11

5

P1

.21

4

P1

.31

3

P1

.41

2

P1

.51

1

VD

D1

0

VS

S9

IC101_P

1

P2

.03

5P

2.1

36

P2

.23

7P

2.3

38

P2

.41

P2

.52

P2

.63

P2

.74

P2

.85

P2

.96

P2

.10

7

P2

.11

8

IC101_P

2

1 2 3 4 5 6 7 8 91

0

JP

101

L101

LED101

LED102

LED103

R101

R102

AE

S

R103

R104

R105

R106

R107

R108

R109

R110

R111

R112

R113

R114

R115

R116

R117

R118

R119

R120

1

32

T101

1

32

T102

TP

1

1

TP

201

1

TP

202

1

TP

203

1A

2

1B

11

Y3

2A

6

2B

72

Y5

3A

10

3B

93

Y1

1

4A

14

4B

15

4Y

13

G4

G#

12

GN

D8

VC

C1

6

U101

12345

X101

12

34

56

78

91

0

X102

X103-A

1X

103-A

2X

103-A

3X

103-A

4X

103-A

5X

103-A

6X

103-A

7X

103-A

8X

103-A

9X

103-A

10

X103-A

11

X103-A

12

X103-A

13

X103-A

14

X103-A

15

X103-A

16

X103-B

1X

103-B

2X

103-B

3X

103-B

4X

103-B

5X

103-B

6X

103-B

7X

103-B

8X

103-B

9X

103-B

10

X103-B

11

X103-B

12

X103-B

13

X103-B

14

X103-B

15

X103-B

16

12

34

56

X104

A B C D E

12

34

56

78

A B C D E

12

34

56

78

KIT

_X

MC

13

00

_D

C_

V1

28/1

0/2

013 0

9:3

4:4

5

2/3

Sh

ee

t:

Legal D

iscla

imer

The info

rmation g

iven in this

docum

ent shall

in n

o e

vent be r

egard

ed a

s a

guara

nte

e o

f conditio

ns o

r

chara

cte

ristics. W

ith r

espect to

any e

xam

ple

s o

r hin

ts g

iven h

ere

in, any typic

al valu

es s

tate

d h

ere

in a

nd/o

r any

info

rmation r

egard

ing the a

pplic

ation o

f th

e d

evic

e, In

fineon T

echnolo

gie

s h

ere

by d

iscla

ims a

ny a

nd a

ll w

arr

anties

and lia

bili

ties o

f any k

ind, in

clu

din

g w

ithout lim

itation, w

arr

anties o

f non-infr

ingem

ent of in

telle

ctu

al pro

pert

y r

ights

of any third p

art

y.

Port

0 -

sta

ndard

port

Port

1 -

hig

h c

urr

ent port

G1.C

H7

G1.C

H6

G1.C

H5

G0.C

H7

G0.C

H6

G0.C

H5

G0.C

H0

G1.C

H1

G1.C

H0

G0.C

H2

G0.C

H3

G0.C

H4

G0.C

H1

G1.C

H4

G1.C

H2

G1.C

H3

CM

P0

CM

P1

CM

P2

S&

H0

S&

H0

S&

H1

S&

H1

AC

MP

OR

CO

RC

Port

2 -

analo

gue featu

res

XM

C1300

V1.1

/ 2

8.1

0.2

013 / A

R

f_cuto

ff =

14.6

kH

z


Production Data


Figure 16 Isolated On-board Debugger

Segger

J-L

ink O

BD

Th

e b

oa

rd in

clu

de

s a

n O

n-B

oa

rd-D

eb

ug

ge

r (O

BD

) u

sin

g a

XM

C m

icro

co

ntr

olle

r p

lus

the

J-lin

k S

W f

rom

Se

gg

er.

Th

e O

BD

ma

y b

e d

esig

ne

d a

s b

rea

k-o

ut

or

no

n b

rea

k-o

ut

op

tio

n.

In

b

oth

ca

se

s,

the

lic

en

se

usa

ge

of

this

OB

D w

ith

th

e J

-Lin

k S

W is lim

ite

d t

o

the

de

live

red

bo

ard

.

OB

D V

olta

ge

Le

ve

l S

hifte

r

Isolation

OB

D P

ow

er

Su

pp

ly

OB

D 3

.3V

Po

we

r S

up

ply

De

bu

g a

nd

UA

RT

In

terf

ace

On

-bo

ard

De

bu

gg

er

(OB

D)

an

d U

AR

T I

F

LE

D

X201

OB

D I

so

latio

n

OB

D D

eb

ug

Co

nn

ecto

r

100nF

/0402

10nF

/0402

10uF/10V/0805

10uF/10V/0805

100nF/0402

15pF/0402

15pF/0402

100nF/0402

1uF

/0402

100nF/0402

100nF/0402

4.7uF/X7R/0805

100nF/0402

100nF/0402

100nF/0402

10uF/10V/0805

1uF/0402

100nF

/0402

GN

D

GN

DG

ND

GN

D

GN

D

GN

D

BLM

18P

G600

LED-GN/D/0603

LED-GN/D/0603

LED-RT/D/0603

12M

HZ

/S/3

.2X

2.5

680R/0603

680R/0603

1k5/0603

33R

/0402

510R

/0603

33R

/0402

4k7/0402 10k/0402

1M/0402

10k/0402

4k7/0

402

n.m

./0402

10k/0402

1k/0402

0R

/0402

BS

S223P

W

BC

R148W

GN

DIS

O

VIS

O5

VIS

O3.3

GN

DIS

O

GN

DIS

O

GN

DIS

O

GN

DIS

OG

ND

ISO

GN

DIS

O

VUSB5

VIS

O3.3

GN

DIS

O

VDD5

VIS

O3.3

GN

DIS

O

VU

SB

5

VIS

O5

VDD5

VD

D5

VD

D5

VD

D5

GN

DIS

O

GN

DIS

O

GN

DIS

O

GN

DIS

O

GN

DIS

O

VIS

O3.3

VIS

O3.3

VISO3.3

VIS

O3.3

VISO5

VIS

O5

VIS

O5

VIS

O5

VIS

O5

GN

DIS

O

VIS

O3.3

VIS

O3.3

GN

DIS

OG

ND

ISO

GN

DIS

O

GN

DIS

OG

ND

ISO

GN

DIS

OG

ND

ISO

GN

DIS

O

GN

DIS

OG

ND

ISO

XM

C4200_Q

FN

48

IFX

1763_P

AD

NO

P

74LV

C1G

126G

W

Si8

462B

B-B

-IS

1

SN

74

LV

C2

T4

5D

CT

SN

74

LV

C2

T4

5D

CT

SN

74

LV

C2

T4

5D

CT

BA

S3010A

-03W

BAS3010A-03W

ESD8V0L2B-03L

ZX62-AB-5PA

debug

debug

no a

ss.

CO

M_LE

D#

CS

CS

DE

BU

G_LE

D#

OB

D_O

FF

#

OB

D_O

FF

#

OB

D_O

FF

#

OB

D_T

CK

OB

D_T

MS

PC

_R

XD

/P1.2

PC

_R

XD

/P1.2

/2.5

AP

C_R

XD

/P1.2

/2.5

A

PC

_R

XD

5

PC

_R

XD

5

PC

_R

XD

5

PC

_T

XD

/P1.3

PC

_T

XD

/P1.3

/2.5

AP

C_T

XD

/P1.3

/2.5

A

PC

_T

XD

5

PC

_T

XD

5

PC

_T

XD

5

RX

RX

SW

CLK

/P0.1

5/2

.1B

SW

CLK

/P0.1

5

SW

CLK

/P0.1

5/2

.1B

SW

CLK

5

SW

CLK

5

SW

CLK

5

SW

CLK

_IS

O

SW

CLK

_IS

O

SW

CLK

_IS

O

SW

D_D

IR

SW

D_D

IR

SW

D_D

IR5

SW

D_D

IR5

SW

D_D

IR5

SW

D_IN

SW

D_IN

SW

D_IN

5

SW

D_IN

5

SW

D_IN

5

SW

D_O

UT

SW

D_O

UT

SW

D_O

UT

5

SW

D_O

UT

5

SW

D_O

UT

5

SW

IO/P

0.1

4

SW

IO/P

0.1

4/2

.1E

SW

IO/P

0.1

4/2

.1E

TX

TX

C201

C202

C203

C204

C205

C206

C207

C208

C209

C210

C211

C212

C213

C214

C215

C216

C217

C218

L201

LED201

LED202

LED203

Q201

R201

R202

R203

R204

R205

R206

R207 R208

R209

R210

R211

R212

R213

R214

R215

T201

T202

EP

AD

EP

AD

HIB

_IO

_0

7

P0.0

2P

0.1

1P

0.2

48

P0.3

47

P0.4

46

P0.5

45

P0.6

44

P0.7

43

P0.8

42

P1.0

40

P1.1

39

P1.2

38

P1.3

37

P1.4

36

P1.5

35

P2.0

26

P2.1

25

P2.2

24

P2.3

23

P2.4

22

P2.5

21

P14.0

16

P14.3

15

P14.4

14

P14.5

13

P14.6

12

P14.7

11

P14.8

20

P14.9

19

PO

RS

T#

32

RT

C_X

TA

L_1

8

RT

C_X

TA

L_2

9

TC

K34

TM

S33

US

B_D

+4

US

B_D

-3

VA

GN

D17

VA

RE

F18

VB

AT

10

VD

DC

6V

DD

C1

31

VD

DP

5V

DD

P1

28

VD

DP

241

VS

S27

XT

AL1

29

XT

AL2

30

U201

BY

P4

EN

5

EX

P9

GN

D3

GN

D6

GN

D7

IN8

OU

T1

SE

NS

E/A

DJ

2

U202

A2

GN

D3

OE

1V

CC

5

Y4

U203

A1

2

A2

3

A3

4

A4

5

A5

6

A6

7

B1

15

B2

14

B3

13

B4

12

B5

11

B6

10

GN

D1

8G

ND

29

VD

D1

1V

DD

216

U204

A1

2

A2

3B

17

B2

6

DIR

5G

ND

4

VC

CA

1V

CC

B8

U2

05

A1

2

A2

3B

17

B2

6

DIR

5G

ND

4

VC

CA

1V

CC

B8

U2

06

A1

2

A2

3B

17

B2

6

DIR

5G

ND

4

VC

CA

1V

CC

B8

U2

07

AC

V201

ACV202

1

23

V203

BR

KIN

BR

KO

UT

GN

D1

GN

D2

GN

D3

NC

1

NC

2N

C3

NC

4

RE

SE

T

TC

LK

TD

I

TD

OT

MS

TR

ST

VD

DP

DriveM

onitor2

1 2 3 4 5

X202C

12

34

56

78

X203

12

34

56

78

X204

1 2 3 4 5

X205

A B C D E

12

34

56

78

A B C D E

12

34

56

78

KIT

_X

MC

13

00

_D

C_

V1

28

/10

/20

13

09

:34

:45

3/3

Sh

ee

t:

Legal D

iscla

imer

Th

e in

form

atio

n g

ive

n in

th

is d

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me

nt

sh

all

in n

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ve

nt

be

re

ga

rde

d a

s a

gu

ara

nte

e o

f co

nd

itio

ns o

r

ch

ara

cte

ristics.

With

re

sp

ect

to a

ny e

xa

mp

les o

r h

ints

giv

en

he

rein

, a

ny t

yp

ica

l va

lue

s s

tate

d h

ere

in a

nd

/or

an

y

info

rma

tio

n r

eg

ard

ing

th

e a

pp

lica

tio

n o

f th

e d

evic

e,

Infin

eo

n T

ech

no

log

ies h

ere

by d

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ims a

ny a

nd

all

wa

rra

ntie

s

an

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bili

tie

s o

f a

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ind

, in

clu

din

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ith

ou

t lim

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tio

n,

wa

rra

ntie

s o

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-in

frin

ge

me

nt

of

inte

llectu

al p

rop

ert

y r

igh

ts

of

an

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hird

pa

rty.

US

B

Supply

Analo

g

Dig

ital

Hib

ern

ate

/RT

C

D1

D2

OB

DV1.1

/ 2

8.1

0.2

013 / A

R

SC

LK

OU

T-P

1.1

DX

0B

-P1.4

SP

I S

lave

SW

D_O

UT

SW

CLK

MO

SI

CLK

_O

UT

MIS

O

CS

_IN

CLK

_IN

CS

_O

UT

SP

I M

aste

rU

0C

0

U0C

1

DO

UT

0-P

1.5

SE

LO

0-P

1.0

DX

2A

-P2.3

DX

1A

-P2.4

RX

DT

XD

UA

RT

2 (

DM

2)

RX

DT

XD

DX

0A

-P0.4

DO

UT

0-P

0.5

U1C

0

TX

AC

TIV

E#

GP

IO-P

0.6

RE

SE

T#

GP

IO-P

0.3

DE

BU

G_LE

D#

DE

BU

G_LE

D#

GP

IO-P

0.2

TX

_E

NA

BLE

GP

IO-P

0.7

SW

D D

IRG

PIO

-P1.3

SW

D_D

IRS

WD

_IN

AD

C AIN

P14.9

PU

LL S

ele

ct

GP

IO-P

0.8

CO

M_LE

D#

AU

X_LE

D#

GP

IO-P

0.1

UA

RT

SP

D

No R

ES

ET

Pin

Level S

hifte

rC

OM

LE

D

SW

VJT

AG

CO

NT

RO

LG

PIO

s

--->

--->

<--

-


Production Data


3.2 Component Placement

Figure 17 Component Placement

1

2

A

B

32

A

3

C C

1

B

4

4

KIT_XMC1300_DC_V1

28/10/2013 09:34:45

Sheet:

V1 / 02.08.2013 / AR

1/1

2013/31

Drive CardXMC1300

GND

ENABLE

CTRAP

W_H

W_L

V_H

V_L

U_H

U_L

GN

D

HA

0

HA

1

HA

2

+5V

HALL

X101GND

+5V GND

1

X2

02

ENENCX102

POTIP2.5

P0.4LED

XMC1300

DE

BU

G

CO

M

A1B1

G1CH7

1

TxRx

SCSD

0+0 +

P1.3

P1.2

P0.1

5

P0.1

4

GN

D5V

GN

D5V

X203

debug

X103X201

USIC0

Debug & COM(isolated)

X204 X104

P1.4

P1.5

P0.

5V

P0.10

GND 14

TP1

1 2 3 4 5

1a

16

b

DIN

41612-B

/2

1

ADJ_301

ADJ_302

ADJ_303 C101

C1

02

C1

03

C104

C1

05

C106C107C108

C2

01

C202

C2

03

C2

04

C205

C206

C207

C208

C209

C210

C2

11

C212

C2

13

C214

C2

15

C216

C2

17

C2

18

IC101

JP101

L101

L201

LE

D1

01

LED102

LED103

LE

D2

01

LE

D2

02

LE

D2

03

Q201

R1

01

R1

02

R103

R104

R1

05

R1

06

R107

R108

R109

R110

R111

R112 R113

R114

R115

R116

R117 R118

R119R120

R2

01

R2

02

R203

R2

04

R205

R2

06

R2

07

R2

08

R2

09

R2

10

R211

R212

R2

13

R214

R215

T101T102

T2

01

T2

02

TP1

TP201 TP202

TP203

U101

U201

U202

U203

U2

04

U205

U206

U207

V201

V202

V203

X101

X102

X103

X104

X2

02

X2

03

X204

X2

05


Production Data


3.3 Bill of Material (BOM)

Table 7 BOM of KIT_XMC1300_DC_V1 Board

Pos. No.

Qty Value Device Reference Des.

1 2 4k7 RESISTOR 0603 R101, R102

2 1 10k potentiometer R103

3 1 1k5R/0603 RESISTOR 0603 R104

4 2 1k5/0603 RESISTOR 0603 R105, R203

5 1 0R RESISTOR 0603 R106

6 1 n.m./0603 RESISTOR 0603 R107

7 1 0R/0603 RESISTOR 0603 R108

8 1 n.m.(33k) RESISTOR 0603 R109

9 4 1k96/0402 RESISTOR 0402 R110, R111, R112, R117

10 6 120R/0402 RESISTOR 0402 R113, R114, R115, R116, R119, R120

11 1 1K5/0603 RESISTOR 0603 R118

12 2 680R/0603 RESISTOR 0603 R201, R202

13 2 33R/0402 RESISTOR 0402 R204, R206

14 1 510R/0603 RESISTOR 0603 R205

15 2 4k7/0402 RESISTOR 0402 R207, R211

16 3 10k/0402 RESISTOR 0402 R208, R210, R213

17 1 1M/0402 RESISTOR 0603 R209

18 1 n.m./0402 RESISTOR 0402 R212

19 1 1k/0402 RESISTOR 0402 R214

20 1 0R/0402 RESISTOR 0402 R215

21 1 220n CAPACITOR 0603 C101

22 1 100n CAPACITOR 0603 C102

23 1 330p/0603 CAPACITOR 0603 C103

24 11 100nF/0402 CAPACITOR 0402 C104, C105, C201, C205, C208, C210, C211, C213, C214, C215, C218

25 3 15nF/0603 CAPACITOR 0603 C106, C107, C108

26 1 10nF/0402 CAPACITOR 0402 C202

27 3 10uF/10V/0805 CAPACITOR 0805K C203, C204, C216

28 2 15pF/0402 CAPACITOR 0402 C206, C207

29 2 1uF/0402 CAPACITOR 0402 C209, C217

30 1 4.7uF/X7R/0805 CAPACITOR 0805K C212

31 2 12MHZ/S/3.2X2.5 CRYSTAL Q201

32 2 BLM18PG600 FERRIT BEAD L101, L201

33 4 LED-GN/D/0603 LEDCHIPLED 0603 LED101, LED103, LED201, LED202

34 1 LED-GE/D/0603 LEDCHIPLED 0603 LED102

35 1 LED-RT/D/0603 LEDCHIPLED 0603 LED203

36 2 BCR198W TRANSISTOR T101, T102

37 1 BSS223PW TRANSISTOR T201

38 1 BCR148W TRANSISTOR T202

39 1 XMC1302_TSSOP38 INFINEON MCU IC101

40 1 IFX1763 INFINEON LDO U202

41 1 AM26C32IPW ENCODER IC U101

42 1 XMC4200_QFN48 INFINEON MCU U201


Production Data


43 1 Si8462BB-B-IS1 ISOLATED DIGITAL U204

44 1 74LVC1G126GW LOGIC U203

45 3 SN74LVC2T45DCT LOGIC U205, U206, U207

46 2 BAS3010A-03W BAT60 V201, V202

47 1 ESD8V0L2B-03L ESD DIODE V203

48 1 ZX62-AB-5PA MICRO-USB X202

49 1 W1*10 CONNECTOR JP101

50 1 CONP_2X05 CONNECTOR X102

51 1 MAB32B2 CONNECTOR X103

52 1 MPT0,5/5-2,54 CONNECTOR X101

53 2 W2*4 CONNECTOR (DEBUG) X203, X204

54 1 W2*3 CONNECTOR (USIC) X104

w w w . i n f i n e o n . c o m

Published by Infineon Technologies AG

motor control application kit - infineon technologies

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